+
// First Attempt = 494 lines
// current = 106 lines
int v3_handle_cr0_write(struct guest_info * info) {
static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr) {
-
// 32 bit registers
- struct cr0_32 *real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
- struct cr0_32 *new_cr0= (struct cr0_32 *)(dec_instr->src_operand.operand);
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+ struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
+ PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
+ PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
+
+ // Guest always sees the value they wrote
+ *guest_cr0 = *new_cr0;
+
+ // This value must always be set to 1
+ guest_cr0->et = 1;
+
+ // Set the shadow register to catch non-virtualized flags
+ *shadow_cr0 = *guest_cr0;
- PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
- *real_cr0 = *new_cr0;
+
+ if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ PrintDebug("Setting up Guest Page Table\n");
+ info->ctrl_regs.cr3 = *(addr_t*)guest_cr3;
+ } else {
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+ shadow_cr0->pg = 1;
+ }
+ PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
-
- PrintDebug("Old Shadow CR0=%x\n", *(uint_t *)shadow_cr0);
-
- real_cr0->et = 1;
-
- *shadow_cr0 = *new_cr0;
- shadow_cr0->et = 1;
-
- if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
- PrintDebug("Setting up Shadow Page Table\n");
- info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
- } else {
- info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
- real_cr0->pg = 1;
- }
-
- PrintDebug("New Shadow CR0=%x\n",*(uint_t *)shadow_cr0);
- }
- PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
+ PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
return 0;
}
static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
// CLTS
- struct cr0_32 *real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+ struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
real_cr0->ts = 0;
if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- shadow_cr0->ts = 0;
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ guest_cr0->ts = 0;
}
return 0;
}
static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
- struct cr0_real *real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
- struct cr0_real *new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
+ struct cr0_real * real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
+ struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
uchar_t new_cr0_val;
PrintDebug("LMSW\n");
PrintDebug("OperandVal = %x\n", new_cr0_val);
+ // We can just copy the new value through
+ // we don't need to virtualize the lower 4 bits
PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
*(uchar_t*)real_cr0 &= 0xf0;
*(uchar_t*)real_cr0 |= new_cr0_val;
PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
+ // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_real * shadow_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
+ struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
- PrintDebug(" Old Shadow CR0=%x\n", *(uint_t *)shadow_cr0);
- *(uchar_t*)shadow_cr0 &= 0xf0;
- *(uchar_t*)shadow_cr0 |= new_cr0_val;
- PrintDebug("New Shadow CR0=%x\n", *(uint_t *)shadow_cr0);
+ PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
+ *(uchar_t*)guest_cr0 &= 0xf0;
+ *(uchar_t*)guest_cr0 |= new_cr0_val;
+ PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
}
return 0;
}
-
-
-
-
-
// First attempt = 253 lines
// current = 51 lines
int v3_handle_cr0_read(struct guest_info * info) {
}
if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
- struct cr0_32 * virt_cr0 = (struct cr0_32 *)(dec_instr.dst_operand.operand);
- struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
-
+ struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+
PrintDebug("MOVCR2\n");
- PrintDebug("CR0 at 0x%p\n", (void *)real_cr0);
if (info->shdw_pg_mode == SHADOW_PAGING) {
- *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ *dst_reg = *guest_cr0;
} else {
- *virt_cr0 = *real_cr0;
+ *dst_reg = *shadow_cr0;
}
-
- PrintDebug("real CR0: %x\n", *(uint_t*)real_cr0);
- PrintDebug("returned CR0: %x\n", *(uint_t*)virt_cr0);
+
+ PrintDebug("Shadow CR0: %x\n", *(uint_t*)shadow_cr0);
+ PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
} else if (v3_opcode_cmp(V3_OPCODE_SMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
- struct cr0_real *real_cr0= (struct cr0_real*)&(info->ctrl_regs.cr0);
- struct cr0_real *virt_cr0 = (struct cr0_real *)(dec_instr.dst_operand.operand);
- char cr0_val = *(char*)real_cr0 & 0x0f;
+ struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
+ struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
+ char cr0_val = *(char*)shadow_cr0 & 0x0f;
PrintDebug("SMSW\n");
- PrintDebug("CR0 at 0x%p\n", real_cr0);
-
- *(char *)virt_cr0 &= 0xf0;
- *(char *)virt_cr0 |= cr0_val;
+ // The lower 4 bits of the guest/shadow CR0 are mapped through
+ // We can treat nested and shadow paging the same here
+ *(char *)dst_reg &= 0xf0;
+ *(char *)dst_reg |= cr0_val;
} else {
PrintError("Unhandled opcode in handle_cr0_read\n");
if (info->shdw_pg_mode == SHADOW_PAGING) {
struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr->src_operand.operand);
struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
- int cached = 0;
-
+ // struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+
PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
*(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
+ // Store the write value to virtualize CR3
+ *guest_cr3 = *new_cr3;
-
- cached = v3_cache_page_tables32(info, (addr_t)V3_PAddr((void *)(addr_t)CR3_TO_PDE32((void *)*(addr_t *)new_cr3)));
-
- if (cached == -1) {
- PrintError("CR3 Cache failed\n");
+ if (v3_activate_shadow_pt(info) == -1) {
+ PrintError("Failed to activate 32 bit shadow page table\n");
return -1;
- } else if (cached == 0) {
- addr_t shadow_pt;
-
- if(info->mem_mode == VIRTUAL_MEM) {
- PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
- delete_page_tables_32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
- }
-
- shadow_pt = v3_create_new_shadow_pt();
-
- shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PD32_BASE_ADDR(shadow_pt));
- PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
- //PrintDebugPageTables( (pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3) );
-
-
- } else {
- PrintDebug("Reusing cached shadow Page table\n");
}
-
-
- shadow_cr3->pwt = new_cr3->pwt;
- shadow_cr3->pcd = new_cr3->pcd;
-
- // What the hell...
- *guest_cr3 = *new_cr3;
-
+
PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
- *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
-
- if (info->mem_mode == VIRTUAL_MEM) {
- // If we aren't in paged mode then we have to preserve the identity mapped CR3
- info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
- }
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
}
return 0;
}
if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
PrintDebug("MOVCR32\n");
- struct cr3_32 * virt_cr3 = (struct cr3_32 *)(dec_instr.dst_operand.operand);
+ struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
if (info->shdw_pg_mode == SHADOW_PAGING) {
- *virt_cr3 = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ *dst_reg = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
} else {
- *virt_cr3 = *(struct cr3_32 *)&(info->ctrl_regs.cr3);
+ *dst_reg = *(struct cr3_32 *)&(info->ctrl_regs.cr3);
}
} else {
PrintError("Unhandled opcode in handle_cr3_read\n");
if ((info->cpu_mode == PROTECTED) || (info->cpu_mode == PROTECTED_PAE)) {
struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
- struct cr4_32 * old_cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
- PrintDebug("Old CR4=%x\n", *(uint_t *)old_cr4);
-
-
-
+ PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
if ((info->shdw_pg_mode == SHADOW_PAGING) &&
(v3_get_mem_mode(info) == PHYSICAL_MEM)) {
- if ((old_cr4->pae == 0) && (new_cr4->pae == 1)) {
+ if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
PrintDebug("Creating PAE passthrough tables\n");
// Delete the old 32 bit direct map page tables
// reset cr3 to new page tables
info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
- } else if ((old_cr4->pae == 1) && (new_cr4->pae == 0)) {
+ } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
// Create passthrough standard 32bit pagetables
return -1;
}
}
- *old_cr4 = *new_cr4;
- PrintDebug("New CR4=%x\n", *(uint_t *)old_cr4);
+ *cr4 = *new_cr4;
+ PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
} else {
+ PrintError("CR4 write not supported in CPU_MODE: %d\n", info->cpu_mode);
return -1;
}
int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
struct guest_info * info = (struct guest_info *)(priv_data);
struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
- struct efer_64 * old_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
+ struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
+ struct v3_msr * guest_efer = &(info->guest_efer);
PrintDebug("EFER Write\n");
- PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(old_efer));
+ PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
// We virtualize the guests efer to hide the SVME and LMA bits
- info->guest_efer.value = src.value;
+ guest_efer->value = src.value;
+
if ((info->shdw_pg_mode == SHADOW_PAGING) &&
(v3_get_mem_mode(info) == PHYSICAL_MEM)) {
- if ((old_efer->lme == 0) && (new_efer->lme == 1)) {
+ if ((shadow_efer->lme == 0) && (new_efer->lme == 1)) {
PrintDebug("Transition to longmode\n");
PrintDebug("Creating Passthrough 64 bit page tables\n");
// reset cr3 to new page tables
info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
-
- // Does this mean we will have to fully virtualize a shadow EFER?? (yes it does)
+ // We mark the Long Mode active because we have paging enabled
+ // We do this in new_efer because we copy the msr in full below
new_efer->lma = 1;
- } else if ((old_efer->lme == 1) && (new_efer->lme == 0)) {
+ } else if ((shadow_efer->lme == 1) && (new_efer->lme == 0)) {
// transition out of long mode
//((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
//((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
return -1;
}
- *old_efer = *new_efer;
- PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(old_efer));
+ // accept all changes to the efer, but make sure that the SVME bit is set... (SVM specific)
+ *shadow_efer = *new_efer;
+ shadow_efer->svme = 1;
+
+
+
+ PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(shadow_efer));
} else {
+ PrintError("Write to EFER in NESTED_PAGING or VIRTUAL_MEM mode not supported\n");
+ // Should probably just check for a long mode transition, and bomb out if it is
return -1;
}
#include <palacios/vmm.h>
#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_decoder.h>
+#include <palacios/vmm_ctrl_regs.h>
#ifndef DEBUG_SHADOW_PAGING
#undef PrintDebug
-
static uint_t pte_hash_fn(addr_t key) {
return hash_long(key, 32);
}
}
+
+static int activate_shadow_pt_32(struct guest_info * info);
+static int activate_shadow_pt_32pae(struct guest_info * info);
+static int activate_shadow_pt_64(struct guest_info * info);
+
+
static int handle_shadow_pte32_fault(struct guest_info* info,
addr_t fault_addr,
pf_error_t error_code,
struct shadow_page_state * state = &(info->shdw_pg_state);
state->guest_cr3 = 0;
- state->shadow_cr3 = 0;
-
state->guest_cr0 = 0;
-
-
state->cr3_cache = create_hashtable(0, &cr3_hash_fn, &cr3_equals);
state->cached_cr3 = 0;
int v3_replace_shdw_page32(struct guest_info * info, addr_t location, pte32_t * new_page, pte32_t * old_page) {
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->ctrl_regs.cr3);
pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(location)]);
if (shadow_pde->large_page == 0) {
+static int activate_shadow_pt_32(struct guest_info * info) {
+ struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ int cached = 0;
+
+ // Check if shadow page tables are in the cache
+ cached = v3_cache_page_tables32(info, (addr_t)V3_PAddr((void *)(addr_t)CR3_TO_PDE32((void *)*(addr_t *)guest_cr3)));
+
+ if (cached == -1) {
+ PrintError("CR3 Cache failed\n");
+ return -1;
+ } else if (cached == 0) {
+ addr_t shadow_pt;
+
+ PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
+ delete_page_tables_32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+
+ shadow_pt = v3_create_new_shadow_pt();
+
+ shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PD32_BASE_ADDR(shadow_pt));
+ PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
+ //PrintDebugPageTables( (pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3) );
+ } else {
+ PrintDebug("Reusing cached shadow Page table\n");
+ }
+
+ shadow_cr3->pwt = guest_cr3->pwt;
+ shadow_cr3->pcd = guest_cr3->pcd;
+
+ return 0;
+}
+
+static int activate_shadow_pt_32pae(struct guest_info * info) {
+ PrintError("Activating 32 bit PAE page tables not implemented\n");
+ return -1;
+}
+
+static int activate_shadow_pt_64(struct guest_info * info) {
+ PrintError("Activating 64 bit page tables not implemented\n");
+ return -1;
+}
+
+
+// Reads the guest CR3 register
+// creates new shadow page tables
+// updates the shadow CR3 register to point to the new pts
+int v3_activate_shadow_pt(struct guest_info * info) {
+ switch (info->cpu_mode) {
+
+ case PROTECTED:
+ return activate_shadow_pt_32(info);
+ case PROTECTED_PAE:
+ return activate_shadow_pt_32pae(info);
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ return activate_shadow_pt_64(info);
+ default:
+ PrintError("Invalid CPU mode: %d\n", info->cpu_mode);
+ return -1;
+ }
+
+ return 0;
+}
+
int v3_handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
static int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
pde32_t * guest_pd = NULL;
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
- addr_t guest_cr3 = (addr_t) V3_PAddr( CR3_TO_PDE32(info->shdw_pg_state.guest_cr3) );
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->ctrl_regs.cr3);
+ addr_t guest_cr3 = (addr_t) V3_PAddr(CR3_TO_PDE32(info->shdw_pg_state.guest_cr3) );
pt_access_status_t guest_pde_access;
pt_access_status_t shadow_pde_access;
pde32_t * guest_pde = NULL;
/* Currently Does not work with Segmentation!!! */
int v3_handle_shadow_invlpg(struct guest_info * info)
{
- if (info->mem_mode != VIRTUAL_MEM) {
- // Paging must be turned on...
- // should handle with some sort of fault I think
- PrintError("ERROR: INVLPG called in non paged mode\n");
- return -1;
- }
-
-
- if (info->cpu_mode != PROTECTED)
- return 0;
-
- uchar_t instr[15];
- int index = 0;
-
- int ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- PrintError("Could not read instruction 0x%p (ret=%d)\n", (void *)(addr_t)(info->rip), ret);
- return -1;
- }
-
-
- /* Can INVLPG work with Segments?? */
- while (is_prefix_byte(instr[index])) {
- index++;
- }
+ if (info->mem_mode != VIRTUAL_MEM) {
+ // Paging must be turned on...
+ // should handle with some sort of fault I think
+ PrintError("ERROR: INVLPG called in non paged mode\n");
+ return -1;
+ }
+
+
+ if (info->cpu_mode != PROTECTED) {
+ return 0;
+ }
+
+ uchar_t instr[15];
+ int index = 0;
+
+ int ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ if (ret != 15) {
+ PrintError("Could not read instruction 0x%p (ret=%d)\n", (void *)(addr_t)(info->rip), ret);
+ return -1;
+ }
+
+
+ /* Can INVLPG work with Segments?? */
+ while (is_prefix_byte(instr[index])) {
+ index++;
+ }
- if( instr[index + 0] != (uchar_t) 0x0f
- || instr[index + 1] != (uchar_t) 0x01
- ) {
- PrintError("invalid Instruction Opcode\n");
- PrintTraceMemDump(instr, 15);
- return -1;
- }
-
- addr_t first_operand;
- addr_t second_operand;
- addr_t guest_cr3 = (addr_t)V3_PAddr( (void*)(addr_t) CR3_TO_PDE32(info->shdw_pg_state.guest_cr3) );
-
- pde32_t * guest_pd = NULL;
-
- if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1)
- {
- PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
- return -1;
- }
-
- index += 2;
-
- v3_operand_type_t addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
-
- if (addr_type != MEM_OPERAND) {
- PrintError("Invalid Operand type\n");
- return -1;
- }
-
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
- pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
- pde32_t * guest_pde;
-
- //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
- //PrintDebug("FirstOperand = %x\n", first_operand);
-
- PrintDebug("Invalidating page for %p\n", (void *)first_operand);
-
- guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(first_operand)]);
-
- if (guest_pde->large_page == 1) {
- shadow_pde->present = 0;
- PrintDebug("Invalidating Large Page\n");
- } else
- if (shadow_pde->present == 1) {
- pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
- pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(first_operand)] );
+ if( (instr[index + 0] != (uchar_t) 0x0f) ||
+ (instr[index + 1] != (uchar_t) 0x01) ) {
+ PrintError("invalid Instruction Opcode\n");
+ PrintTraceMemDump(instr, 15);
+ return -1;
+ }
+
+ addr_t first_operand;
+ addr_t second_operand;
+ addr_t guest_cr3 = (addr_t)V3_PAddr( (void*)(addr_t) CR3_TO_PDE32(info->shdw_pg_state.guest_cr3) );
+
+ pde32_t * guest_pd = NULL;
+
+ if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
+ PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
+ return -1;
+ }
+
+ index += 2;
+ v3_operand_type_t addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+
+ if (addr_type != MEM_OPERAND) {
+ PrintError("Invalid Operand type\n");
+ return -1;
+ }
+
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->ctrl_regs.cr3);
+ pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
+ pde32_t * guest_pde;
+
+ //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
+ //PrintDebug("FirstOperand = %x\n", first_operand);
+
+ PrintDebug("Invalidating page for %p\n", (void *)first_operand);
+
+ guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(first_operand)]);
+
+ if (guest_pde->large_page == 1) {
+ shadow_pde->present = 0;
+ PrintDebug("Invalidating Large Page\n");
+ } else
+ if (shadow_pde->present == 1) {
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(first_operand)] );
+
#ifdef DEBUG_SHADOW_PAGING
- PrintDebug("Setting not present\n");
- PrintPTE32(first_operand, shadow_pte );
+ PrintDebug("Setting not present\n");
+ PrintPTE32(first_operand, shadow_pte );
#endif
-
- shadow_pte->present = 0;
- }
-
- info->rip += index;
-
- return 0;
+
+ shadow_pte->present = 0;
+ }
+
+ info->rip += index;
+
+ return 0;
}
