}
hdr_desc = &(q->desc[desc_idx]);
- if (v3_gpa_to_hva(core, hdr_desc->addr_gpa, &(hdr_addr)) == -1) {
- PrintError("Could not translate block header address\n");
- goto exit_error;
- }
+ if (v3_gpa_to_hva(core, hdr_desc->addr_gpa, &(hdr_addr)) != -1) {
+ struct virtio_net_hdr_mrg_rxbuf * hdr;
+ struct vring_desc * buf_desc;
- hdr = (struct virtio_net_hdr_mrg_rxbuf *)hdr_addr;
- desc_idx = hdr_desc->next;
+ hdr = (struct virtio_net_hdr_mrg_rxbuf *)hdr_addr;
+ desc_idx = hdr_desc->next;
- V3_Net_Print(2, "Virtio NIC: TX hdr count : %d\n", hdr->num_buffers);
-
- /* here we assumed that one ethernet pkt is not splitted into multiple buffer */
- struct vring_desc * buf_desc = &(q->desc[desc_idx]);
- if (tx_one_pkt(core, virtio_state, buf_desc) == -1) {
- PrintError("Virtio NIC: Fails to send packet\n");
- }
- if(buf_desc->next & VIRTIO_NEXT_FLAG){
- PrintError("Virtio NIC: TX more buffer need to read\n");
+ /* here we assumed that one ethernet pkt is not splitted into multiple buffer */
+ buf_desc = &(q->desc[desc_idx]);
+ if (tx_one_pkt(core, virtio_state, buf_desc) == -1) {
+ PrintError("Virtio NIC: Fails to send packet\n");
+ }
+ } else {
+ PrintError("Could not translate block header address\n");
}
+
+ flags = v3_lock_irqsave(virtio_state->tx_lock);
q->used->ring[q->used->index % q->queue_size].id =
- q->avail->ring[q->cur_avail_idx % q->queue_size];
+ q->avail->ring[tmp_idx % q->queue_size];
- q->used->ring[q->used->index % q->queue_size].length =
- buf_desc->length; /* What do we set this to???? */
+ //q->used->ring[q->used->index % q->queue_size].length = buf_desc->length; /* What do we set this to???? */
q->used->index ++;
- q->cur_avail_idx ++;
- if(++txed >= quote && quote > 0){
- left = (q->cur_avail_idx != q->avail->index);
- break;
- }
+ v3_unlock_irqrestore(virtio_state->tx_lock, flags);
+
+ txed ++;
}
-
- v3_unlock_irqrestore(virtio_state->tx_lock, flags);
-
+
if (txed && !(q->avail->flags & VIRTIO_NO_IRQ_FLAG)) {
v3_pci_raise_irq(virtio_state->virtio_dev->pci_bus,
- 0, virtio_state->pci_dev);
+ virtio_state->pci_dev, 0);
virtio_state->virtio_cfg.pci_isr = 0x1;
virtio_state->stats.rx_interrupts ++;
}