increasing the appeal of a composition through subtle means."
\newline\newline
Translation: Use the spacebar, newlines, and parentheses.
-\newline\newline
+
+Curly-brackets are not optional, even for single line conditionals.
+
+Tabs should be 4 characters in width.
+
+{\em Special:} If you are using XEmacs add the following to your \verb.init\.el. file:
+\begin{verbatim}
+(setq c-basic-offset 4)
+(c-set-offset 'case-label 4)
+\end{verbatim}
+
{\em Bad}
\begin{verbatim}
-if(a&&b==5||c!=0){return;}
+if(a&&b==5||c!=0) return;
\end{verbatim}
\begin{verbatim}
if (((a) && (b == 5)) ||
(c != 0)) {
- return;
+ return;
}
\end{verbatim}
+
+
\paragraph*{Fail Stop}
Because booting a basic linux kernel results in over 1 million VM exits
catching silent errors is next to impossible. For this reason
\item \verb.v3_. prefix
\newline
Major interface functions should be named with the prefix \verb.v3_. This
-allows easy understanding of how to interact with the subsystems. And
+xallows easy understanding of how to interact with the subsystems. And
in the case that they need to be externally visible to the host os,
make them unlikely to collide with other functions.
\end{enumerate}
\item PrintDebug:
\newline
-Should be used for debugging output that will often be
-turned off selectively by the VMM configuration.
+Should be used for debugging output that will often be turned off
+selectively by the VMM configuration.
\item PrintError
\newline
\end{verbatim}
Mercurial queues use the same stack operations as stacked git, however
-does not automatically handle the synchronization with pull
+it does not automatically handle the synchronization with pull
operations. Before you update from the central version of Kitten you
need to pop all of the patches, and then push them once the update is
complete.
hg qpop -a
hg pull
hg update
-hg qupush -a
+hg qpush -a
\end{verbatim}
--- /dev/null
+(custom-set-variables
+ '(paren-mode (quote sexp) nil (paren))
+ '(column-number-mode t)
+ '(pending-delete-mode nil nil (pending-del))
+ '(line-number-mode t)
+ '(mouse-yank-at-point t)
+ '(font-lock-mode t nil (font-lock))
+)
+(custom-set-faces
+ '(cperl-nonoverridable-face ((((class color) (background light)) (:foreground "steelblue"))))
+ '(cperl-array-face ((((class color) (background light)) (:foreground "Blue" :background "black" :bold t))))
+ '(cperl-hash-face ((((class color) (background light)) (:foreground "Red" :background "black" :bold t :italic t)))))
--- /dev/null
+;; .emacs
+
+;;; uncomment this line to disable loading of "default.el" at startup
+;; (setq inhibit-default-init t)
+
+(defvar running-xemacs (string-match "XEmacs\\|Lucid" emacs-version))
+
+;; turn on font-lock mode
+(when (fboundp 'global-font-lock-mode)
+ (global-font-lock-mode t))
+
+;; enable visual feedback on selections
+;(setq transient-mark-mode t)
+
+;; default to better frame titles
+;;(setq frame-title-format
+;; (concat "%b - emacs@" system-name))
+;; stop at the end of the file, not just add lines
+(setq next-line-add-newlines nil)
+
+
+(cond ((not running-xemacs)
+ (global-font-lock-mode t)
+))
+
+
+(when window-system
+ ;; enable wheelmouse support by default
+ (mwheel-install))
+
+(global-set-key "%" 'match-paren)
+
+ (defun match-paren (arg)
+ "Go to the matching parenthesis if on parenthesis otherwise insert %."
+ (interactive "p")
+ (cond ((looking-at "\\s\(") (forward-list 1) (backward-char 1))
+ ((looking-at "\\s\)") (forward-char 1) (backward-list 1))
+ (t (self-insert-command (or arg 1)))))
+
+
+(c-set-offset 'case-label 4)
+(setq c-basic-offset 4)
+
+(custom-set-variables
+ '(paren-mode (quote sexp) nil (paren))
+ '(column-number-mode t)
+ '(line-number-mode t)
+ '(font-lock-mode t nil (font-lock))
+)
+(custom-set-faces)
+
+
+
+(set-face-background 'default "Black")
+(set-face-foreground 'default "green")
+;;(set-face-foreground 'highlight "LightSeaGreen")
+;;(set-face-background 'highlight "blue")
+
+(set-face-foreground 'font-lock-function-name-face "White")
+(set-face-foreground 'font-lock-keyword-face "Red")
+(set-face-background 'font-lock-keyword-face "black")
+(set-face-foreground 'font-lock-string-face "LightGoldenRod")
+(set-face-foreground 'font-lock-comment-face "Grey")
+
+
+(set-face-background 'modeline "CadetBlue")
+(set-face-foreground 'modeline "black");
+
devices/os_debug.o \
devices/apic.o \
devices/io_apic.o \
+ devices/vpci.o \
+
+
+# devices/vnic.o \
$(DEVICES_OBJS) :: EXTRA_CFLAGS = \
$(JRLDEBUG) \
struct lapic_id_reg {
- union {
- uint32_t val;
- struct {
- uint_t rsvd : 24;
- uint_t apic_id : 8;
+ union {
+ uint32_t val;
+ struct {
+ uint_t rsvd : 24;
+ uint_t apic_id : 8;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct apic_ver_reg {
- union {
- uint32_t val;
- struct {
- uint_t ver : 8;
- uint_t rsvd1 : 8;
- uint_t max_lvts : 8;
- uint_t rsvd2 : 7;
- uint_t ext_reg_present : 1;
+ union {
+ uint32_t val;
+ struct {
+ uint_t ver : 8;
+ uint_t rsvd1 : 8;
+ uint_t max_lvts : 8;
+ uint_t rsvd2 : 7;
+ uint_t ext_reg_present : 1;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct ext_apic_ctrl_reg {
- union {
- uint32_t val;
- struct {
- uint_t ver : 1;
- uint_t seoi_enable : 1;
- uint_t ext_id_enable : 1;
- uint_t rsvd2 : 29;
+ union {
+ uint32_t val;
+ struct {
+ uint_t ver : 1;
+ uint_t seoi_enable : 1;
+ uint_t ext_id_enable : 1;
+ uint_t rsvd2 : 29;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct local_vec_tbl_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t msg_type : 3;
- uint_t rsvd1 : 1;
- uint_t del_status : 1;
- uint_t rsvd2 : 1;
- uint_t rem_irr : 1;
- uint_t trig_mode : 1;
- uint_t mask : 1;
- uint_t tmr_mode : 1;
- uint_t rsvd3 : 14;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t msg_type : 3;
+ uint_t rsvd1 : 1;
+ uint_t del_status : 1;
+ uint_t rsvd2 : 1;
+ uint_t rem_irr : 1;
+ uint_t trig_mode : 1;
+ uint_t mask : 1;
+ uint_t tmr_mode : 1;
+ uint_t rsvd3 : 14;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct tmr_vec_tbl_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t rsvd : 4;
- uint_t del_status : 1;
- uint_t rsvd2 : 3;
- uint_t mask : 1;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t rsvd : 4;
+ uint_t del_status : 1;
+ uint_t rsvd2 : 3;
+ uint_t mask : 1;
#define APIC_TMR_ONESHOT 0
#define APIC_TMR_PERIODIC 1
- uint_t tmr_mode : 1;
- uint_t rsvd3 : 14;
+ uint_t tmr_mode : 1;
+ uint_t rsvd3 : 14;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
#define APIC_TMR_DIV32 0x8 // 1000
#define APIC_TMR_DIV64 0x9 // 1001
#define APIC_TMR_DIV128 0xa // 1010
- union {
- uint32_t val;
- struct {
- uint_t div_val : 2;
- uint_t rsvd1 : 1;
- uint_t div_val2 : 1;
- uint_t rsvd2 : 28;
+ union {
+ uint32_t val;
+ struct {
+ uint_t div_val : 2;
+ uint_t rsvd1 : 1;
+ uint_t div_val2 : 1;
+ uint_t rsvd2 : 28;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct lint_vec_tbl_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t msg_type : 3;
- uint_t rsvd1 : 1;
- uint_t del_status : 1;
- uint_t rsvd2 : 1;
- uint_t rem_irr : 1;
- uint_t trig_mode : 1;
- uint_t mask : 1;
- uint_t rsvd3 : 15;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t msg_type : 3;
+ uint_t rsvd1 : 1;
+ uint_t del_status : 1;
+ uint_t rsvd2 : 1;
+ uint_t rem_irr : 1;
+ uint_t trig_mode : 1;
+ uint_t mask : 1;
+ uint_t rsvd3 : 15;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct perf_ctr_loc_vec_tbl_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t msg_type : 3;
- uint_t rsvd1 : 1;
- uint_t del_status : 1;
- uint_t rsvd2 : 3;
- uint_t mask : 1;
- uint_t rsvd3 : 15;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t msg_type : 3;
+ uint_t rsvd1 : 1;
+ uint_t del_status : 1;
+ uint_t rsvd2 : 3;
+ uint_t mask : 1;
+ uint_t rsvd3 : 15;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct therm_loc_vec_tbl_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t msg_type : 3;
- uint_t rsvd1 : 1;
- uint_t del_status : 1;
- uint_t rsvd2 : 3;
- uint_t mask : 1;
- uint_t rsvd3 : 15;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t msg_type : 3;
+ uint_t rsvd1 : 1;
+ uint_t del_status : 1;
+ uint_t rsvd2 : 3;
+ uint_t mask : 1;
+ uint_t rsvd3 : 15;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct err_vec_tbl_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t msg_type : 3;
- uint_t rsvd1 : 1;
- uint_t del_status : 1;
- uint_t rsvd2 : 3;
- uint_t mask : 1;
- uint_t rsvd3 : 15;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t msg_type : 3;
+ uint_t rsvd1 : 1;
+ uint_t del_status : 1;
+ uint_t rsvd2 : 3;
+ uint_t mask : 1;
+ uint_t rsvd3 : 15;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct err_status_reg {
- union {
- uint32_t val;
- struct {
- uint_t rsvd1 : 2;
- uint_t sent_acc_err : 1;
- uint_t recv_acc_err : 1;
- uint_t rsvd2 : 1;
- uint_t sent_ill_err : 1;
- uint_t recv_ill_err : 1;
- uint_t ill_reg_addr : 1;
- uint_t rsvd3 : 24;
+ union {
+ uint32_t val;
+ struct {
+ uint_t rsvd1 : 2;
+ uint_t sent_acc_err : 1;
+ uint_t recv_acc_err : 1;
+ uint_t rsvd2 : 1;
+ uint_t sent_ill_err : 1;
+ uint_t recv_ill_err : 1;
+ uint_t ill_reg_addr : 1;
+ uint_t rsvd3 : 24;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct spurious_int_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t apic_soft_en : 1;
- uint_t foc_cpu_chk : 1;
- uint_t rsvd1 : 22;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t apic_soft_en : 1;
+ uint_t foc_cpu_chk : 1;
+ uint_t rsvd1 : 22;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct int_cmd_reg {
- union {
- uint64_t val;
-
- struct {
- uint32_t lo;
- uint32_t hi;
- } __attribute__((packed));
-
- struct {
- uint_t vec : 8;
- uint_t msg_type : 3;
- uint_t dst_mode : 1;
- uint_t del_status : 1;
- uint_t rsvd1 : 1;
- uint_t lvl : 1;
- uint_t trig_mode : 1;
- uint_t rem_rd_status : 2;
- uint_t dst_shorthand : 2;
- uint64_t rsvd2 : 36;
- uint32_t dst : 8;
+ union {
+ uint64_t val;
+
+ struct {
+ uint32_t lo;
+ uint32_t hi;
+ } __attribute__((packed));
+
+ struct {
+ uint_t vec : 8;
+ uint_t msg_type : 3;
+ uint_t dst_mode : 1;
+ uint_t del_status : 1;
+ uint_t rsvd1 : 1;
+ uint_t lvl : 1;
+ uint_t trig_mode : 1;
+ uint_t rem_rd_status : 2;
+ uint_t dst_shorthand : 2;
+ uint64_t rsvd2 : 36;
+ uint32_t dst : 8;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct log_dst_reg {
- union {
- uint32_t val;
- struct {
- uint_t rsvd1 : 24;
- uint_t dst_log_id : 8;
+ union {
+ uint32_t val;
+ struct {
+ uint_t rsvd1 : 24;
+ uint_t dst_log_id : 8;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct dst_fmt_reg {
- union {
- uint32_t val;
- struct {
- uint_t rsvd1 : 28;
- uint_t model : 4;
+ union {
+ uint32_t val;
+ struct {
+ uint_t rsvd1 : 28;
+ uint_t model : 4;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct arb_prio_reg {
- union {
- uint32_t val;
- struct {
- uint_t arb_prio_sub : 4;
- uint_t arb_prio : 4;
- uint_t rsvd1 : 24;
+ union {
+ uint32_t val;
+ struct {
+ uint_t arb_prio_sub : 4;
+ uint_t arb_prio : 4;
+ uint_t rsvd1 : 24;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct task_prio_reg {
- union {
- uint32_t val;
- struct {
- uint_t task_prio_sub : 4;
- uint_t task_prio : 4;
- uint_t rsvd1 : 24;
+ union {
+ uint32_t val;
+ struct {
+ uint_t task_prio_sub : 4;
+ uint_t task_prio : 4;
+ uint_t rsvd1 : 24;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct proc_prio_reg {
- union {
- uint32_t val;
- struct {
- uint_t proc_prio_sub : 4;
- uint_t proc_prio : 4;
- uint_t rsvd1 : 24;
+ union {
+ uint32_t val;
+ struct {
+ uint_t proc_prio_sub : 4;
+ uint_t proc_prio : 4;
+ uint_t rsvd1 : 24;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct ext_apic_feature_reg {
- union {
- uint32_t val;
- struct {
- uint_t int_en_reg_cap : 1;
- uint_t spec_eoi_cap : 1;
- uint_t ext_apic_id_cap: 1;
- uint_t rsvd1 : 13;
- uint_t ext_lvt_cnt : 8;
- uint_t rsvd2 : 8;
+ union {
+ uint32_t val;
+ struct {
+ uint_t int_en_reg_cap : 1;
+ uint_t spec_eoi_cap : 1;
+ uint_t ext_apic_id_cap: 1;
+ uint_t rsvd1 : 13;
+ uint_t ext_lvt_cnt : 8;
+ uint_t rsvd2 : 8;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct spec_eoi_reg {
- union {
- uint32_t val;
- struct {
- uint_t vec : 8;
- uint_t rsvd1 : 24;
+ union {
+ uint32_t val;
+ struct {
+ uint_t vec : 8;
+ uint_t rsvd1 : 24;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct cdrom_ops {
- /*
- * Load CD-ROM. Returns false if CD is not ready.
- */
- rd_bool (*insert_cdrom)(void * private_data);
-
- /*
- * Logically eject the CD.
- */
- void (*eject_cdrom)(void * private_data);
+ /*
+ * Load CD-ROM. Returns false if CD is not ready.
+ */
+ rd_bool (*insert_cdrom)(void * private_data);
+
+ /*
+ * Logically eject the CD.
+ */
+ void (*eject_cdrom)(void * private_data);
- /*
- * Read CD TOC. Returns false if start track is out of bounds.
- */
- rd_bool (*read_toc)(void * private_data, uchar_t * buf, int * length, rd_bool msf, int start_track);
+ /*
+ * Read CD TOC. Returns false if start track is out of bounds.
+ */
+ rd_bool (*read_toc)(void * private_data, uchar_t * buf, int * length, rd_bool msf, int start_track);
- /*
- * Return CD-ROM capacity (in 2048 byte frames)
- */
- uint32_t (*capacity)(void * private_data);
+ /*
+ * Return CD-ROM capacity (in 2048 byte frames)
+ */
+ uint32_t (*capacity)(void * private_data);
- /*
- * Read a single block from the CD
- */
- void (*read_block)(void * private_data, uchar_t * buf, int lba);
+ /*
+ * Read a single block from the CD
+ */
+ void (*read_block)(void * private_data, uchar_t * buf, int lba);
- /*
- * Start (spin up) the CD.
- */
- int (*start_cdrom)(void * private_data);
+ /*
+ * Start (spin up) the CD.
+ */
+ int (*start_cdrom)(void * private_data);
- void (*set_LBA)(void * private_data, uchar_t lba);
+ void (*set_LBA)(void * private_data, uchar_t lba);
};
#define MAX_ATA_CHANNEL 4
typedef enum _sense {
- SENSE_NONE = 0,
- SENSE_NOT_READY = 2,
- SENSE_ILLEGAL_REQUEST = 5,
- SENSE_UNIT_ATTENTION = 6
+ SENSE_NONE = 0,
+ SENSE_NOT_READY = 2,
+ SENSE_ILLEGAL_REQUEST = 5,
+ SENSE_UNIT_ATTENTION = 6
} sense_t ;
typedef enum _asc {
- ASC_INV_FIELD_IN_CMD_PACKET = 0x24,
- ASC_MEDIUM_NOT_PRESENT = 0x3a,
- ASC_SAVING_PARAMETERS_NOT_SUPPORTED = 0x39,
- ASC_LOGICAL_BLOCK_OOR = 0x21
+ ASC_INV_FIELD_IN_CMD_PACKET = 0x24,
+ ASC_MEDIUM_NOT_PRESENT = 0x3a,
+ ASC_SAVING_PARAMETERS_NOT_SUPPORTED = 0x39,
+ ASC_LOGICAL_BLOCK_OOR = 0x21
} asc_t ;
typedef struct {
- unsigned cylinders;
- unsigned heads;
- unsigned sectors;
+ unsigned cylinders;
+ unsigned heads;
+ unsigned sectors;
} device_image_t;
struct interrupt_reason_t {
- unsigned c_d : 1;
- unsigned i_o : 1;
- unsigned rel : 1;
- unsigned tag : 5;
+ unsigned c_d : 1;
+ unsigned i_o : 1;
+ unsigned rel : 1;
+ unsigned tag : 5;
};
struct controller_status {
- rd_bool busy;
- rd_bool drive_ready;
- rd_bool write_fault;
- rd_bool seek_complete;
- rd_bool drq;
- rd_bool corrected_data;
- rd_bool index_pulse;
- unsigned int index_pulse_count;
- rd_bool err;
+ rd_bool busy;
+ rd_bool drive_ready;
+ rd_bool write_fault;
+ rd_bool seek_complete;
+ rd_bool drq;
+ rd_bool corrected_data;
+ rd_bool index_pulse;
+ unsigned int index_pulse_count;
+ rd_bool err;
};
struct sense_info_t {
- sense_t sense_key;
+ sense_t sense_key;
- struct {
- Bit8u arr[4];
- } information;
+ struct {
+ Bit8u arr[4];
+ } information;
- struct {
- Bit8u arr[4];
- } specific_inf;
+ struct {
+ Bit8u arr[4];
+ } specific_inf;
- struct {
- Bit8u arr[3];
- } key_spec;
+ struct {
+ Bit8u arr[3];
+ } key_spec;
- Bit8u fruc;
- Bit8u asc;
- Bit8u ascq;
+ Bit8u fruc;
+ Bit8u asc;
+ Bit8u ascq;
};
struct error_recovery_t {
- unsigned char data[8];
+ unsigned char data[8];
};
struct cdrom_t {
- rd_bool ready;
- rd_bool locked;
+ rd_bool ready;
+ rd_bool locked;
- struct cdrom_ops * cd;
+ struct cdrom_ops * cd;
- uint32_t capacity;
- int next_lba;
- int remaining_blocks;
+ uint32_t capacity;
+ int next_lba;
+ int remaining_blocks;
- struct currentStruct {
- struct error_recovery_t error_recovery;
- } current;
+ struct currentStruct {
+ struct error_recovery_t error_recovery;
+ } current;
};
struct atapi_t {
- uint8_t command;
- int drq_bytes;
- int total_bytes_remaining;
+ uint8_t command;
+ int drq_bytes;
+ int total_bytes_remaining;
};
typedef enum { IDE_NONE, IDE_DISK, IDE_CDROM } device_type_t;
struct controller_t {
- struct controller_status status;
- Bit8u error_register;
- Bit8u head_no;
+ struct controller_status status;
+ Bit8u error_register;
+ Bit8u head_no;
- union {
- Bit8u sector_count;
- struct interrupt_reason_t interrupt_reason;
- };
+ union {
+ Bit8u sector_count;
+ struct interrupt_reason_t interrupt_reason;
+ };
- Bit8u sector_no;
+ Bit8u sector_no;
- union {
- Bit16u cylinder_no;
- Bit16u byte_count;
- };
+ union {
+ Bit16u cylinder_no;
+ Bit16u byte_count;
+ };
- Bit8u buffer[2048];
- Bit32u buffer_index;
- Bit32u drq_index;
- Bit8u current_command;
- Bit8u sectors_per_block;
- Bit8u lba_mode;
+ Bit8u buffer[2048];
+ Bit32u buffer_index;
+ Bit32u drq_index;
+ Bit8u current_command;
+ Bit8u sectors_per_block;
+ Bit8u lba_mode;
- struct {
- rd_bool reset; // 0=normal, 1=reset controller
- rd_bool disable_irq; // 0=allow irq, 1=disable irq
- } control;
+ struct {
+ rd_bool reset; // 0=normal, 1=reset controller
+ rd_bool disable_irq; // 0=allow irq, 1=disable irq
+ } control;
- Bit8u reset_in_progress;
- Bit8u features;
+ Bit8u reset_in_progress;
+ Bit8u features;
};
struct drive_t {
- device_image_t hard_drive;
- device_type_t device_type;
- // 512 byte buffer for ID drive command
- // These words are stored in native word endian format, as
- // they are fetched and returned via a return(), so
- // there's no need to keep them in x86 endian format.
- Bit16u id_drive[256];
+ device_image_t hard_drive;
+ device_type_t device_type;
+ // 512 byte buffer for ID drive command
+ // These words are stored in native word endian format, as
+ // they are fetched and returned via a return(), so
+ // there's no need to keep them in x86 endian format.
+ Bit16u id_drive[256];
- struct controller_t controller;
- struct cdrom_t cdrom;
- struct sense_info_t sense;
- struct atapi_t atapi;
+ struct controller_t controller;
+ struct cdrom_t cdrom;
+ struct sense_info_t sense;
+ struct atapi_t atapi;
- /* JRL */
- void * private_data;
+ /* JRL */
+ void * private_data;
- Bit8u model_no[41];
+ Bit8u model_no[41];
};
// For each ATA channel we should have one controller struct
// and an array of two drive structs
struct channel_t {
- struct drive_t drives[2];
- unsigned drive_select;
+ struct drive_t drives[2];
+ unsigned drive_select;
- Bit16u ioaddr1;
- Bit16u ioaddr2;
- Bit8u irq;
+ Bit16u ioaddr1;
+ Bit16u ioaddr2;
+ Bit8u irq;
};
struct ramdisk_t {
- struct channel_t channels[MAX_ATA_CHANNEL];
+ struct channel_t channels[MAX_ATA_CHANNEL];
};
--- /dev/null
+/*\r
+ * This file is part of the Palacios Virtual Machine Monitor developed\r
+ * by the V3VEE Project with funding from the United States National \r
+ * Science Foundation and the Department of Energy. \r
+ *\r
+ * The V3VEE Project is a joint project between Northwestern University\r
+ * and the University of New Mexico. You can find out more at \r
+ * http://www.v3vee.org\r
+ *\r
+ * Copyright (c) 2008, Lei Xia <lxia@northwestern.edu> \r
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> \r
+ * All rights reserved.\r
+ *\r
+ * Author: Lei Xia <lxia@northwestern.edu>\r
+ *\r
+ * This is free software. You are permitted to use,\r
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".\r
+ */\r
+\r
+#ifndef __VNIC_H_\r
+#define __VNIC_H_\r
+\r
+#include <palacios/vm_dev.h>\r
+\r
+#define NIC_BASE_ADDR 0xc100\r
+\r
+#define NIC_IRQ 11 /* Interrupt channel */\r
+\r
+#define MAX_ETH_FRAME_SIZE 1514\r
+\r
+#define NE2K_PMEM_SIZE (32*1024)\r
+#define NE2K_PMEM_START (16*1024)\r
+#define NE2K_PMEM_END (NE2K_PMEM_SIZE+NE2K_PMEM_START)\r
+#define NE2K_MEM_SIZE NE2K_PMEM_END\r
+\r
+#define EN0_COMMAND (0x00) // The command register (for all pages) \r
+\r
+#define NIC_DATA_PORT (0x10) // The data read/write port\r
+\r
+#define NIC_RESET_PORT (0x1f) // The data read/write port\r
+\r
+// Page 0 registers\r
+#define EN0_CLDALO (0x01) // Low byte of current local dma addr RD \r
+#define EN0_STARTPG (0x01) // Starting page of ring bfr WR \r
+#define EN0_CLDAHI (0x02) // High byte of current local dma addr RD \r
+#define EN0_STOPPG (0x02) //Ending page +1 of ring bfr WR \r
+#define EN0_BOUNDARY (0x03) //Boundary page of ring bfr RD WR \r
+#define EN0_TSR (0x04) //Transmit status reg RD \r
+#define EN0_TPSR (0x04) //Transmit starting page WR \r
+#define EN0_NCR (0x05) //Number of collision reg RD \r
+#define EN0_TCNTLO (0x05) //Low byte of tx byte count WR \r
+#define EN0_FIFO (0x06) //FIFO RD \r
+#define EN0_TCNTHI (0x06) //High byte of tx byte count WR \r
+#define EN0_ISR (0x07) //Interrupt status reg RD WR \r
+#define EN0_CRDALO (0x08) //low byte of current remote dma address RD \r
+#define EN0_RSARLO (0x08) //Remote start address reg 0 \r
+#define EN0_CRDAHI (0x09) //high byte, current remote dma address RD \r
+#define EN0_RSARHI (0x09) //Remote start address reg 1 \r
+#define EN0_RCNTLO (0x0a) //Remote byte count reg WR \r
+#define EN0_RTL8029ID0 (0x0a) //Realtek ID byte #1 RD \r
+#define EN0_RCNTHI (0x0b) //Remote byte count reg WR \r
+#define EN0_RTL8029ID1 (0x0b) //Realtek ID byte #2 RD \r
+#define EN0_RSR (0x0c) //rx status reg RD \r
+#define EN0_RXCR (0x0c) //RX configuration reg WR \r
+#define EN0_TXCR (0x0d) //TX configuration reg WR \r
+#define EN0_COUNTER0 (0x0d) //Rcv alignment error counter RD \r
+#define EN0_DCFG (0x0e) //Data configuration reg WR \r
+#define EN0_COUNTER1 (0x0e) //Rcv CRC error counter RD \r
+#define EN0_IMR (0x0f) //Interrupt mask reg WR \r
+#define EN0_COUNTER2 (0x0f) //Rcv missed frame error counter RD \r
+\r
+//Page 1 registers\r
+#define EN1_PHYS (0x01)\r
+#define EN1_CURPAG (0x07)\r
+#define EN1_MULT (0x08)\r
+\r
+//Page 2 registers\r
+#define EN2_STARTPG (0x01) //Starting page of ring bfr RD \r
+#define EN2_STOPPG (0x02) //Ending page +1 of ring bfr RD \r
+#define EN2_LDMA0 (0x01) //Current Local DMA Address 0 WR \r
+#define EN2_LDMA1 (0x02) //Current Local DMA Address 1 WR \r
+#define EN2_RNPR (0x03) //Remote Next Packet Pointer RD WR \r
+#define EN2_TPSR (0x04) //Transmit Page Start Address RD \r
+#define EN2_LNRP (0x05) // Local Next Packet Pointer RD WR \r
+#define EN2_ACNT0 (0x06) // Address Counter Upper WR \r
+#define EN2_ACNT1 (0x07) // Address Counter Lower WR \r
+#define EN2_RCR (0x0c) // Receive Configuration Register RD \r
+#define EN2_TCR (0x0d) // Transmit Configuration Register RD \r
+#define EN2_DCR (0x0e) // Data Configuration Register RD \r
+#define EN2_IMR (0x0f) // Interrupt Mask Register RD \r
+\r
+//Page 3 registers\r
+#define EN3_CONFIG0 (0x03)\r
+#define EN3_CONFIG1 (0x04)\r
+#define EN3_CONFIG2 (0x05)\r
+#define EN3_CONFIG3 (0x06)\r
+\r
+//Bits in EN0_ISR - Interrupt status register\r
+#define ENISR_RX 0x01 //Receiver, no error \r
+#define ENISR_TX 0x02 //Transmitter, no error \r
+#define ENISR_RX_ERR 0x04 //Receiver, with error \r
+#define ENISR_TX_ERR 0x08 //Transmitter, with error \r
+#define ENISR_OVER 0x10 //Receiver overwrote the ring \r
+#define ENISR_COUNTERS 0x20 //Counters need emptying \r
+#define ENISR_RDC 0x40 //remote dma complete \r
+#define ENISR_RESET 0x80 //Reset completed \r
+#define ENISR_ALL 0x3f //Interrupts we will enable \r
+\r
+//Bits in received packet status byte and EN0_RSR\r
+#define ENRSR_RXOK 0x01 //Received a good packet \r
+#define ENRSR_CRC 0x02 //CRC error \r
+#define ENRSR_FAE 0x04 //frame alignment error \r
+#define ENRSR_FO 0x08 //FIFO overrun \r
+#define ENRSR_MPA 0x10 //missed pkt \r
+#define ENRSR_PHY 0x20 //physical/multicast address \r
+#define ENRSR_DIS 0x40 //receiver disable. set in monitor mode \r
+#define ENRSR_DEF 0x80 //deferring \r
+\r
+//Transmitted packet status, EN0_TSR\r
+#define ENTSR_PTX 0x01 //Packet transmitted without error \r
+#define ENTSR_ND 0x02 //The transmit wasn't deferred. \r
+#define ENTSR_COL 0x04 //The transmit collided at least once. \r
+#define ENTSR_ABT 0x08 //The transmit collided 16 times, and was deferred. \r
+#define ENTSR_CRS 0x10 //The carrier sense was lost. \r
+#define ENTSR_FU 0x20 //A "FIFO underrun" occurred during transmit. \r
+#define ENTSR_CDH 0x40 //The collision detect "heartbeat" signal was lost. \r
+#define ENTSR_OWC 0x80 //There was an out-of-window collision. \r
+\r
+//command, Register accessed at EN0_COMMAND\r
+#define NE2K_STOP 0x01\r
+#define NE2K_START 0x02\r
+#define NE2K_TRANSMIT 0x04\r
+#define NE2K_DMAREAD 0x08 /* Remote read */\r
+#define NE2K_DMAWRITE 0x10 /* Remote write */\r
+#define NE2K_DMASEND 0x18\r
+#define NE2K_ABORTDMA 0x20 /* Abort/Complete DMA */\r
+#define NE2K_PAGE0 0x00 /* Select page chip registers */\r
+#define NE2K_PAGE1 0x40 /* using the two high-order bits */\r
+#define NE2K_PAGE2 0x80\r
+#define NE2K_PAGE 0xc0\r
+\r
+struct vm_device *v3_create_vnic();\r
+\r
+#endif\r
--- /dev/null
+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
+ * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
+ * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Lei Xia <lxia@northwestern.edu>
+ * Chang Seok Bae <jhuell@gmail.com>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+#ifndef _VPCI_H__
+#define _VPCI_H__
+
+#include <palacios/vm_dev.h>
+#include <palacios/vmm_types.h>
+
+#define PROG_INTERFACE(x) ((x)[0])
+#define SUBCLASS(x) ((x)[1])
+#define CLASSCODE(x) ((x)[2])
+
+#define HEADER_TYPE(x) ((x)&0x7f)
+
+#define PCI_DEVICE 0x0
+
+#define IS_DEVICE(x) (HEADER_TYPE(x)==0x0)
+
+#define IS_IO_ADDR(x) ((x)&0x1)
+#define IS_MEM_ADDR(x) (!((x)&0x1))
+#define GET_IO_ADDR(x) (((uint_t)(x))&0xfffffffc)
+#define GET_MEM_ADDR(x) (((uint_t)(x))&0xfffffff0)
+#define GET_MEM_TYPE(x) (((x)&0x6)>>2)
+
+#define PCI_CONFIG_ADDRESS 0xcf8 // 32 bit, little endian
+#define PCI_CONFIG_DATA 0xcfc // 32 bit, little endian
+
+#define PCI_IO_REGIONS 6
+
+struct pci_device_config {
+ uint16_t vendor_id;
+ uint16_t device_id;
+ uint16_t command;
+ uint16_t status;
+ uchar_t revision;
+ uchar_t class_code[3]; // in order: programming interface, subclass, class code
+ uchar_t cache_line_size;
+ uchar_t latency_time;
+ uchar_t header_type; // bits 6-0: 00: other, 01: pci-pci bridge, 02: pci-cardbus; bit 7: 1=multifunction
+ uchar_t BIST;
+ uint32_t BAR[6];
+ uint32_t cardbus_cis_pointer;
+ uint16_t subsystem_vendor_id;
+ uint16_t subsystem_id;
+ uint32_t expansion_rom_address;
+ uchar_t cap_ptr; // capabilities list offset in config space
+ uchar_t reserved[7];
+ uchar_t intr_line; // 00=none, 01=IRQ1, etc.
+ uchar_t intr_pin; // 00=none, otherwise INTA# to INTD#
+ uchar_t min_grant; // min busmaster time - units of 250ns
+ uchar_t max_latency; // units of 250ns - busmasters
+ uint32_t device_data[48];
+};
+
+struct pci_device;
+
+ typedef void pci_mapioregion_fn(struct pci_device *pci_dev, int region_num,
+ uint32_t addr, uint32_t size, int type);
+
+typedef int port_read_fn(ushort_t port, void * dst, uint_t length, struct vm_device *vmdev);
+typedef int port_write_fn(ushort_t port, void * src, uint_t length, struct vm_device *vmdev);
+
+#define PCI_ADDRESS_SPACE_MEM 0x00
+#define PCI_ADDRESS_SPACE_IO 0x01
+#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
+
+struct pci_ioregion {
+ uint32_t addr; //current PCI mapping address. -1 means not mapped
+ uint32_t size; //actual ports/memories needed by device
+ uint32_t mapped_size; //mapped size, usually bigger than needed size, -1 not mapped
+ uint8_t type;
+ uchar_t reg_num; //correponding to which BAR register it is
+ pci_mapioregion_fn *map_func;
+
+ port_read_fn **port_reads; //array of read functions, hooked for each port in order, if NULL, do not hook that port
+ port_write_fn **port_writes;
+};
+
+
+struct pci_device {
+ struct pci_device_config config;
+ struct pci_bus *bus;
+ struct pci_device *next;
+
+ int dev_num;
+ char name[64];
+ int irqline;
+
+ struct pci_ops {
+ void (*raise_irq)(struct pci_device *dev, void *data);
+ void (*config_write)(struct pci_device *pci_dev, uchar_t addr, uint32_t val, int len);
+ uint32_t (*config_read)(struct pci_device *pci_dev, uchar_t addr, int len);
+ }ops;
+
+ struct pci_ioregion *ioregion[PCI_IO_REGIONS];
+};
+
+
+/*
+struct pci_class_desc {
+ uint16_t class;
+ const char *desc;
+};
+
+static struct pci_class_desc pci_class_descriptions[] =
+{
+ { 0x0100, "SCSI controller"},
+ { 0x0101, "IDE controller"},
+ { 0x0102, "Floppy controller"},
+ { 0x0103, "IPI controller"},
+ { 0x0104, "RAID controller"},
+ { 0x0106, "SATA controller"},
+ { 0x0107, "SAS controller"},
+ { 0x0180, "Storage controller"},
+ { 0x0200, "Ethernet controller"},
+ { 0x0201, "Token Ring controller"},
+ { 0x0202, "FDDI controller"},
+ { 0x0203, "ATM controller"},
+ { 0x0280, "Network controller"},
+ { 0x0300, "VGA controller"},
+ { 0x0301, "XGA controller"},
+ { 0x0302, "3D controller"},
+ { 0x0380, "Display controller"},
+ { 0x0400, "Video controller"},
+ { 0x0401, "Audio controller"},
+ { 0x0402, "Phone"},
+ { 0x0480, "Multimedia controller"},
+ { 0x0500, "RAM controller"},
+ { 0x0501, "Flash controller"},
+ { 0x0580, "Memory controller"},
+ { 0x0600, "Host bridge"},
+ { 0x0601, "ISA bridge"},
+ { 0x0602, "EISA bridge"},
+ { 0x0603, "MC bridge"},
+ { 0x0604, "PCI bridge"},
+ { 0x0605, "PCMCIA bridge"},
+ { 0x0606, "NUBUS bridge"},
+ { 0x0607, "CARDBUS bridge"},
+ { 0x0608, "RACEWAY bridge"},
+ { 0x0680, "Bridge"},
+ { 0x0c03, "USB controller"},
+ { 0, NULL}
+};
+
+*/
+struct vm_device *v3_create_vpci();
+
+#endif
+
struct svm_io_info {
- uint_t type : 1 PACKED; // (0=out, 1=in)
- uint_t rsvd : 1 PACKED; // Must be Zero
- uint_t str : 1 PACKED; // string based io
- uint_t rep : 1 PACKED; // repeated io
- uint_t sz8 : 1 PACKED; // 8 bit op size
- uint_t sz16 : 1 PACKED; // 16 bit op size
- uint_t sz32 : 1 PACKED; // 32 bit op size
- uint_t addr16 : 1 PACKED; // 16 bit addr
- uint_t addr32 : 1 PACKED; // 32 bit addr
- uint_t addr64 : 1 PACKED; // 64 bit addr
- uint_t rsvd2 : 6 PACKED; // Should be Zero
- ushort_t port PACKED; // port number
+ uint_t type : 1 PACKED; // (0=out, 1=in)
+ uint_t rsvd : 1 PACKED; // Must be Zero
+ uint_t str : 1 PACKED; // string based io
+ uint_t rep : 1 PACKED; // repeated io
+ uint_t sz8 : 1 PACKED; // 8 bit op size
+ uint_t sz16 : 1 PACKED; // 16 bit op size
+ uint_t sz32 : 1 PACKED; // 32 bit op size
+ uint_t addr16 : 1 PACKED; // 16 bit addr
+ uint_t addr32 : 1 PACKED; // 32 bit addr
+ uint_t addr64 : 1 PACKED; // 64 bit addr
+ uint_t rsvd2 : 6 PACKED; // Should be Zero
+ ushort_t port PACKED; // port number
};
struct vm_device_ops {
- int (*init)(struct vm_device *dev);
- int (*deinit)(struct vm_device *dev);
+ int (*init)(struct vm_device *dev);
+ int (*deinit)(struct vm_device *dev);
- int (*reset)(struct vm_device *dev);
+ int (*reset)(struct vm_device *dev);
- int (*start)(struct vm_device *dev);
- int (*stop)(struct vm_device *dev);
+ int (*start)(struct vm_device *dev);
+ int (*stop)(struct vm_device *dev);
- //int (*save)(struct vm_device *dev, struct *iostream);
- //int (*restore)(struct vm_device *dev, struct *iostream);
+ //int (*save)(struct vm_device *dev, struct *iostream);
+ //int (*restore)(struct vm_device *dev, struct *iostream);
};
struct vm_device {
- char name[32];
+ char name[32];
- void *private_data;
+ void *private_data;
- struct vm_device_ops * ops;
+ struct vm_device_ops * ops;
- struct guest_info * vm;
+ struct guest_info * vm;
- struct list_head dev_link;
+ struct list_head dev_link;
- uint_t num_io_hooks;
- struct list_head io_hooks;
- uint_t num_mem_hooks;
- struct list_head mem_hooks;
- uint_t num_irq_hooks;
- struct list_head irq_hooks;
+ uint_t num_io_hooks;
+ struct list_head io_hooks;
+ uint_t num_mem_hooks;
+ struct list_head mem_hooks;
+ uint_t num_irq_hooks;
+ struct list_head irq_hooks;
};
int v3_dev_hook_io(struct vm_device *dev,
- ushort_t port,
- int (*read)(ushort_t port, void * dst, uint_t length, struct vm_device * dev),
- int (*write)(ushort_t port, void * src, uint_t length, struct vm_device * dev));
+ ushort_t port,
+ int (*read)(ushort_t port, void * dst, uint_t length, struct vm_device * dev),
+ int (*write)(ushort_t port, void * src, uint_t length, struct vm_device * dev));
int v3_dev_unhook_io(struct vm_device *dev,
- ushort_t port);
+ ushort_t port);
int v3_dev_hook_mem(struct vm_device *dev,
- void *start,
- void *end);
+ void *start,
+ void *end);
int v3_dev_unhook_mem(struct vm_device * dev,
- void * start,
- void * end);
+ void * start,
+ void * end);
int v3_dev_hook_irq(struct vm_device * dev,
- uint_t irq,
- int (*handler)(uint_t irq, struct vm_device * dev));
+ uint_t irq,
+ int (*handler)(uint_t irq, struct vm_device * dev));
int v3_dev_unhook_irq(struct vm_device * dev, uint_t irq);
struct v3_gprs {
- v3_reg_t rdi;
- v3_reg_t rsi;
- v3_reg_t rbp;
- v3_reg_t rsp;
- v3_reg_t rbx;
- v3_reg_t rdx;
- v3_reg_t rcx;
- v3_reg_t rax;
-
- v3_reg_t r8;
- v3_reg_t r9;
- v3_reg_t r10;
- v3_reg_t r11;
- v3_reg_t r12;
- v3_reg_t r13;
- v3_reg_t r14;
- v3_reg_t r15;
+ v3_reg_t rdi;
+ v3_reg_t rsi;
+ v3_reg_t rbp;
+ v3_reg_t rsp;
+ v3_reg_t rbx;
+ v3_reg_t rdx;
+ v3_reg_t rcx;
+ v3_reg_t rax;
+
+ v3_reg_t r8;
+ v3_reg_t r9;
+ v3_reg_t r10;
+ v3_reg_t r11;
+ v3_reg_t r12;
+ v3_reg_t r13;
+ v3_reg_t r14;
+ v3_reg_t r15;
} __attribute__((packed));
struct v3_ctrl_regs {
- v3_reg_t cr0;
- v3_reg_t cr2;
- v3_reg_t cr3;
- v3_reg_t cr4;
- v3_reg_t cr8;
- v3_reg_t rflags;
- v3_reg_t efer;
+ v3_reg_t cr0;
+ v3_reg_t cr2;
+ v3_reg_t cr3;
+ v3_reg_t cr4;
+ v3_reg_t cr8;
+ v3_reg_t rflags;
+ v3_reg_t efer;
};
struct v3_dbg_regs {
- v3_reg_t dr0;
- v3_reg_t dr1;
- v3_reg_t dr2;
- v3_reg_t dr3;
- v3_reg_t dr6;
- v3_reg_t dr7;
+ v3_reg_t dr0;
+ v3_reg_t dr1;
+ v3_reg_t dr2;
+ v3_reg_t dr3;
+ v3_reg_t dr6;
+ v3_reg_t dr7;
};
struct v3_segment {
- ushort_t selector;
- uint_t limit;
- ullong_t base;
- uint_t type : 4;
- uint_t system : 1;
- uint_t dpl : 2;
- uint_t present : 1;
- uint_t avail : 1;
- uint_t long_mode : 1;
- uint_t db : 1;
- uint_t granularity : 1;
+ ushort_t selector;
+ uint_t limit;
+ ullong_t base;
+ uint_t type : 4;
+ uint_t system : 1;
+ uint_t dpl : 2;
+ uint_t present : 1;
+ uint_t avail : 1;
+ uint_t long_mode : 1;
+ uint_t db : 1;
+ uint_t granularity : 1;
} __attribute__((packed));
struct v3_segments {
- struct v3_segment cs;
- struct v3_segment ds;
- struct v3_segment es;
- struct v3_segment fs;
- struct v3_segment gs;
- struct v3_segment ss;
- struct v3_segment ldtr;
- struct v3_segment gdtr;
- struct v3_segment idtr;
- struct v3_segment tr;
+ struct v3_segment cs;
+ struct v3_segment ds;
+ struct v3_segment es;
+ struct v3_segment fs;
+ struct v3_segment gs;
+ struct v3_segment ss;
+ struct v3_segment ldtr;
+ struct v3_segment gdtr;
+ struct v3_segment idtr;
+ struct v3_segment tr;
};
struct shadow_page_state;
struct guest_info {
- ullong_t rip;
+ ullong_t rip;
- uint_t cpl;
+ uint_t cpl;
- addr_t mem_size; // In bytes for now
- v3_shdw_map_t mem_map;
+ addr_t mem_size; // In bytes for now
+ v3_shdw_map_t mem_map;
- struct vm_time time_state;
+ struct vm_time time_state;
- v3_paging_mode_t shdw_pg_mode;
- struct shadow_page_state shdw_pg_state;
- addr_t direct_map_pt;
- // nested_paging_t nested_page_state;
+ v3_paging_mode_t shdw_pg_mode;
+ struct shadow_page_state shdw_pg_state;
+ addr_t direct_map_pt;
+ // nested_paging_t nested_page_state;
- // This structure is how we get interrupts for the guest
- struct v3_intr_state intr_state;
+ // This structure is how we get interrupts for the guest
+ struct v3_intr_state intr_state;
- v3_io_map_t io_map;
+ v3_io_map_t io_map;
- struct v3_msr_map msr_map;
+ struct v3_msr_map msr_map;
- v3_hypercall_map_t hcall_map;
+ v3_hypercall_map_t hcall_map;
- // device_map
- struct vmm_dev_mgr dev_mgr;
+ // device_map
+ struct vmm_dev_mgr dev_mgr;
- struct v3_host_events host_event_hooks;
+ struct v3_host_events host_event_hooks;
- v3_vm_cpu_mode_t cpu_mode;
- v3_vm_mem_mode_t mem_mode;
- uint_t addr_width;
+ v3_vm_cpu_mode_t cpu_mode;
+ v3_vm_mem_mode_t mem_mode;
+ uint_t addr_width;
- struct v3_gprs vm_regs;
- struct v3_ctrl_regs ctrl_regs;
- struct v3_dbg_regs dbg_regs;
- struct v3_segments segments;
+ struct v3_gprs vm_regs;
+ struct v3_ctrl_regs ctrl_regs;
+ struct v3_dbg_regs dbg_regs;
+ struct v3_segments segments;
- v3_vm_operating_mode_t run_state;
- void * vmm_data;
+ v3_vm_operating_mode_t run_state;
+ void * vmm_data;
- uint_t enable_profiler;
- struct v3_profiler profiler;
+ uint_t enable_profiler;
+ struct v3_profiler profiler;
- void * decoder_state;
+ void * decoder_state;
- v3_msr_t guest_efer;
+ v3_msr_t guest_efer;
- /* Do we need these ? */
- v3_msr_t guest_star;
- v3_msr_t guest_lstar;
- v3_msr_t guest_cstar;
- v3_msr_t guest_syscall_mask;
- v3_msr_t guest_gs_base;
+ /* Do we need these ? */
+ v3_msr_t guest_star;
+ v3_msr_t guest_lstar;
+ v3_msr_t guest_cstar;
+ v3_msr_t guest_syscall_mask;
+ v3_msr_t guest_gs_base;
- uint64_t fs;
- uint64_t gs;
+ uint64_t fs;
+ uint64_t gs;
struct Ctrl_Registers {
- uint_t cr0 : 1;
- uint_t cr1 : 1;
- uint_t cr2 : 1;
- uint_t cr3 : 1;
- uint_t cr4 : 1;
- uint_t cr5 : 1;
- uint_t cr6 : 1;
- uint_t cr7 : 1;
- uint_t cr8 : 1;
- uint_t cr9 : 1;
- uint_t cr10 : 1;
- uint_t cr11 : 1;
- uint_t cr12 : 1;
- uint_t cr13 : 1;
- uint_t cr14 : 1;
- uint_t cr15 : 1;
+ uint_t cr0 : 1;
+ uint_t cr1 : 1;
+ uint_t cr2 : 1;
+ uint_t cr3 : 1;
+ uint_t cr4 : 1;
+ uint_t cr5 : 1;
+ uint_t cr6 : 1;
+ uint_t cr7 : 1;
+ uint_t cr8 : 1;
+ uint_t cr9 : 1;
+ uint_t cr10 : 1;
+ uint_t cr11 : 1;
+ uint_t cr12 : 1;
+ uint_t cr13 : 1;
+ uint_t cr14 : 1;
+ uint_t cr15 : 1;
} __attribute__((packed));
struct Instr_Intercepts {
- uint_t INTR : 1;
- uint_t NMI : 1;
- uint_t SMI : 1;
- uint_t INIT : 1;
- uint_t VINTR : 1;
- uint_t CR0 : 1;
- uint_t RD_IDTR : 1;
- uint_t RD_GDTR : 1;
- uint_t RD_LDTR : 1;
- uint_t RD_TR : 1;
- uint_t WR_IDTR : 1;
- uint_t WR_GDTR : 1;
- uint_t WR_LDTR : 1;
- uint_t WR_TR : 1;
- uint_t RDTSC : 1;
- uint_t RDPMC : 1;
- uint_t PUSHF : 1;
- uint_t POPF : 1;
- uint_t CPUID : 1;
- uint_t RSM : 1;
- uint_t IRET : 1;
- uint_t INTn : 1;
- uint_t INVD : 1;
- uint_t PAUSE : 1;
- uint_t HLT : 1;
- uint_t INVLPG : 1;
- uint_t INVLPGA : 1;
- uint_t IOIO_PROT : 1;
- uint_t MSR_PROT : 1;
- uint_t task_switch : 1;
- uint_t FERR_FREEZE : 1;
- uint_t shutdown_evts: 1;
+ uint_t INTR : 1;
+ uint_t NMI : 1;
+ uint_t SMI : 1;
+ uint_t INIT : 1;
+ uint_t VINTR : 1;
+ uint_t CR0 : 1;
+ uint_t RD_IDTR : 1;
+ uint_t RD_GDTR : 1;
+ uint_t RD_LDTR : 1;
+ uint_t RD_TR : 1;
+ uint_t WR_IDTR : 1;
+ uint_t WR_GDTR : 1;
+ uint_t WR_LDTR : 1;
+ uint_t WR_TR : 1;
+ uint_t RDTSC : 1;
+ uint_t RDPMC : 1;
+ uint_t PUSHF : 1;
+ uint_t POPF : 1;
+ uint_t CPUID : 1;
+ uint_t RSM : 1;
+ uint_t IRET : 1;
+ uint_t INTn : 1;
+ uint_t INVD : 1;
+ uint_t PAUSE : 1;
+ uint_t HLT : 1;
+ uint_t INVLPG : 1;
+ uint_t INVLPGA : 1;
+ uint_t IOIO_PROT : 1;
+ uint_t MSR_PROT : 1;
+ uint_t task_switch : 1;
+ uint_t FERR_FREEZE : 1;
+ uint_t shutdown_evts: 1;
} __attribute__((packed));
struct SVM_Instr_Intercepts {
- uint_t VMRUN : 1;
- uint_t VMMCALL : 1;
- uint_t VMLOAD : 1;
- uint_t VMSAVE : 1;
- uint_t STGI : 1;
- uint_t CLGI : 1;
- uint_t SKINIT : 1;
- uint_t RDTSCP : 1;
- uint_t ICEBP : 1;
- uint_t WBINVD : 1;
- uint_t MONITOR : 1;
- uint_t MWAIT_always : 1;
- uint_t MWAIT_if_armed : 1;
- uint_t reserved : 19; // Should be 0
+ uint_t VMRUN : 1;
+ uint_t VMMCALL : 1;
+ uint_t VMLOAD : 1;
+ uint_t VMSAVE : 1;
+ uint_t STGI : 1;
+ uint_t CLGI : 1;
+ uint_t SKINIT : 1;
+ uint_t RDTSCP : 1;
+ uint_t ICEBP : 1;
+ uint_t WBINVD : 1;
+ uint_t MONITOR : 1;
+ uint_t MWAIT_always : 1;
+ uint_t MWAIT_if_armed : 1;
+ uint_t reserved : 19; // Should be 0
} __attribute__((packed));
struct Guest_Control {
- uchar_t V_TPR;
- uint_t V_IRQ : 1;
- uint_t rsvd1 : 7; // Should be 0
- uint_t V_INTR_PRIO : 4;
- uint_t V_IGN_TPR : 1;
- uint_t rsvd2 : 3; // Should be 0
- uint_t V_INTR_MASKING : 1;
- uint_t rsvd3 : 7; // Should be 0
- uchar_t V_INTR_VECTOR;
- uint_t rsvd4 : 24; // Should be 0
+ uchar_t V_TPR;
+ uint_t V_IRQ : 1;
+ uint_t rsvd1 : 7; // Should be 0
+ uint_t V_INTR_PRIO : 4;
+ uint_t V_IGN_TPR : 1;
+ uint_t rsvd2 : 3; // Should be 0
+ uint_t V_INTR_MASKING : 1;
+ uint_t rsvd3 : 7; // Should be 0
+ uchar_t V_INTR_VECTOR;
+ uint_t rsvd4 : 24; // Should be 0
} __attribute__((packed));
#define SVM_INJECTION_EXTERNAL_INTR 0
#define SVM_INJECTION_SOFT_INTR 4
struct Interrupt_Info {
- uint_t vector : 8;
- uint_t type : 3;
- uint_t ev : 1;
- uint_t rsvd : 19;
- uint_t valid : 1;
- uint_t error_code : 32;
+ uint_t vector : 8;
+ uint_t type : 3;
+ uint_t ev : 1;
+ uint_t rsvd : 19;
+ uint_t valid : 1;
+ uint_t error_code : 32;
} __attribute__((packed));
struct VMCB_Control_Area {
- // offset 0x0
- struct Ctrl_Registers cr_reads;
- struct Ctrl_Registers cr_writes;
- struct Debug_Registers dr_reads;
- struct Debug_Registers dr_writes;
- struct Exception_Vectors exceptions;
- struct Instr_Intercepts instrs;
- struct SVM_Instr_Intercepts svm_instrs;
+ // offset 0x0
+ struct Ctrl_Registers cr_reads;
+ struct Ctrl_Registers cr_writes;
+ struct Debug_Registers dr_reads;
+ struct Debug_Registers dr_writes;
+ struct Exception_Vectors exceptions;
+ struct Instr_Intercepts instrs;
+ struct SVM_Instr_Intercepts svm_instrs;
- uchar_t rsvd1[44]; // Should be 0
+ uchar_t rsvd1[44]; // Should be 0
- // offset 0x040
- ullong_t IOPM_BASE_PA;
- ullong_t MSRPM_BASE_PA;
- ullong_t TSC_OFFSET;
+ // offset 0x040
+ ullong_t IOPM_BASE_PA;
+ ullong_t MSRPM_BASE_PA;
+ ullong_t TSC_OFFSET;
- uint_t guest_ASID;
- uchar_t TLB_CONTROL;
+ uint_t guest_ASID;
+ uchar_t TLB_CONTROL;
- uchar_t rsvd2[3]; // Should be 0
+ uchar_t rsvd2[3]; // Should be 0
- struct Guest_Control guest_ctrl;
+ struct Guest_Control guest_ctrl;
- uint_t interrupt_shadow : 1;
- uint_t rsvd3 : 31; // Should be 0
- uint_t rsvd4; // Should be 0
+ uint_t interrupt_shadow : 1;
+ uint_t rsvd3 : 31; // Should be 0
+ uint_t rsvd4; // Should be 0
- ullong_t exit_code;
- ullong_t exit_info1;
- ullong_t exit_info2;
+ ullong_t exit_code;
+ ullong_t exit_info1;
+ ullong_t exit_info2;
- /* This could be a typo in the manual....
- * It doesn't actually say that there is a reserved bit
- * But it does say that the EXITINTINFO field is in bits 63-1
- * ALL other occurances mention a 1 bit reserved field
- */
- // uint_t rsvd5 : 1;
- //ullong_t exit_int_info : 63;
- /* ** */
+ /* This could be a typo in the manual....
+ * It doesn't actually say that there is a reserved bit
+ * But it does say that the EXITINTINFO field is in bits 63-1
+ * ALL other occurances mention a 1 bit reserved field
+ */
+ // uint_t rsvd5 : 1;
+ //ullong_t exit_int_info : 63;
+ /* ** */
- // AMD Manual 2, pg 391, sect: 15.19
- struct Interrupt_Info exit_int_info;
+ // AMD Manual 2, pg 391, sect: 15.19
+ struct Interrupt_Info exit_int_info;
- // uint_t NP_ENABLE : 1;
- //ullong_t rsvd6 : 63; // Should be 0
- ullong_t NP_ENABLE;
+ // uint_t NP_ENABLE : 1;
+ //ullong_t rsvd6 : 63; // Should be 0
+ ullong_t NP_ENABLE;
- uchar_t rsvd7[16]; // Should be 0
+ uchar_t rsvd7[16]; // Should be 0
- // Offset 0xA8
- struct Interrupt_Info EVENTINJ;
+ // Offset 0xA8
+ struct Interrupt_Info EVENTINJ;
- /* This could be a typo in the manual....
- * It doesn't actually say that there is a reserved bit
- * But it does say that the EXITINTINFO field is in bits 63-1
- * ALL other occurances mention a 1 bit reserved field
- */
- // uint_t rsvd8 : 1;
- //ullong_t N_CR3 : 63;
- ullong_t N_CR3;
- /* ** */
+ /* This could be a typo in the manual....
+ * It doesn't actually say that there is a reserved bit
+ * But it does say that the EXITINTINFO field is in bits 63-1
+ * ALL other occurances mention a 1 bit reserved field
+ */
+ // uint_t rsvd8 : 1;
+ //ullong_t N_CR3 : 63;
+ ullong_t N_CR3;
+ /* ** */
- uint_t LBR_VIRTUALIZATION_ENABLE : 1;
- ullong_t rsvd9 : 63; // Should be 0
+ uint_t LBR_VIRTUALIZATION_ENABLE : 1;
+ ullong_t rsvd9 : 63; // Should be 0
} __attribute__((packed));
struct vmcb_selector {
- ushort_t selector;
-
- /* These attributes are basically a direct map of the attribute fields of a segment desc.
- * The segment limit in the middle is removed and the fields are fused together
- * There IS empty space at the end... See AMD Arch vol3, sect. 4.7.1, pg 78
- */
- union {
- ushort_t raw;
- struct {
- uint_t type : 4; // segment type, [see Intel vol. 3b, sect. 3.4.5.1 (because I have the books)]
- uint_t S : 1; // System=0, code/data=1
- uint_t dpl : 2; // priviledge level, corresonds to protection ring
- uint_t P : 1; // present flag
- uint_t avl : 1; // available for use by system software
- uint_t L : 1; // long mode (64 bit?)
- uint_t db : 1; // default op size (0=16 bit seg, 1=32 bit seg)
- uint_t G : 1; // Granularity, (0=bytes, 1=4k)
- uint_t rsvd : 4;
- } __attribute__((packed)) fields;
- } __attribute__((packed)) attrib;
-
- uint_t limit;
- ullong_t base;
+ ushort_t selector;
+
+ /* These attributes are basically a direct map of the attribute fields of a segment desc.
+ * The segment limit in the middle is removed and the fields are fused together
+ * There IS empty space at the end... See AMD Arch vol3, sect. 4.7.1, pg 78
+ */
+ union {
+ ushort_t raw;
+ struct {
+ uint_t type : 4; // segment type, [see Intel vol. 3b, sect. 3.4.5.1 (because I have the books)]
+ uint_t S : 1; // System=0, code/data=1
+ uint_t dpl : 2; // priviledge level, corresonds to protection ring
+ uint_t P : 1; // present flag
+ uint_t avl : 1; // available for use by system software
+ uint_t L : 1; // long mode (64 bit?)
+ uint_t db : 1; // default op size (0=16 bit seg, 1=32 bit seg)
+ uint_t G : 1; // Granularity, (0=bytes, 1=4k)
+ uint_t rsvd : 4;
+ } __attribute__((packed)) fields;
+ } __attribute__((packed)) attrib;
+
+ uint_t limit;
+ ullong_t base;
} __attribute__((packed));
struct VMCB_State_Save_Area {
- struct vmcb_selector es; // only lower 32 bits of base are implemented
- struct vmcb_selector cs; // only lower 32 bits of base are implemented
- struct vmcb_selector ss; // only lower 32 bits of base are implemented
- struct vmcb_selector ds; // only lower 32 bits of base are implemented
- struct vmcb_selector fs;
- struct vmcb_selector gs;
+ struct vmcb_selector es; // only lower 32 bits of base are implemented
+ struct vmcb_selector cs; // only lower 32 bits of base are implemented
+ struct vmcb_selector ss; // only lower 32 bits of base are implemented
+ struct vmcb_selector ds; // only lower 32 bits of base are implemented
+ struct vmcb_selector fs;
+ struct vmcb_selector gs;
- struct vmcb_selector gdtr; // selector+attrib are reserved, only lower 16 bits of limit are implemented
- struct vmcb_selector ldtr;
- struct vmcb_selector idtr; // selector+attrib are reserved, only lower 16 bits of limit are implemented
- struct vmcb_selector tr;
+ struct vmcb_selector gdtr; // selector+attrib are reserved, only lower 16 bits of limit are implemented
+ struct vmcb_selector ldtr;
+ struct vmcb_selector idtr; // selector+attrib are reserved, only lower 16 bits of limit are implemented
+ struct vmcb_selector tr;
- uchar_t rsvd1[43];
+ uchar_t rsvd1[43];
- //offset 0x0cb
- uchar_t cpl; // if the guest is real-mode then the CPL is forced to 0
- // if the guest is virtual-mode then the CPL is forced to 3
+ //offset 0x0cb
+ uchar_t cpl; // if the guest is real-mode then the CPL is forced to 0
+ // if the guest is virtual-mode then the CPL is forced to 3
- uint_t rsvd2;
+ uint_t rsvd2;
- // offset 0x0d0
- ullong_t efer;
+ // offset 0x0d0
+ ullong_t efer;
- uchar_t rsvd3[112];
+ uchar_t rsvd3[112];
- //offset 0x148
- ullong_t cr4;
- ullong_t cr3;
- ullong_t cr0;
- ullong_t dr7;
- ullong_t dr6;
- ullong_t rflags;
- ullong_t rip;
-
- uchar_t rsvd4[88];
+ //offset 0x148
+ ullong_t cr4;
+ ullong_t cr3;
+ ullong_t cr0;
+ ullong_t dr7;
+ ullong_t dr6;
+ ullong_t rflags;
+ ullong_t rip;
+
+ uchar_t rsvd4[88];
- //offset 0x1d8
- ullong_t rsp;
-
- uchar_t rsvd5[24];
-
- //offset 0x1f8
- ullong_t rax;
- ullong_t star;
- ullong_t lstar;
- ullong_t cstar;
- ullong_t sfmask;
- ullong_t KernelGsBase;
- ullong_t sysenter_cs;
- ullong_t sysenter_esp;
- ullong_t sysenter_eip;
- ullong_t cr2;
-
-
- uchar_t rsvd6[32];
-
- //offset 0x268
- ullong_t g_pat; // Guest PAT
- // -- only used if nested paging is enabled
- ullong_t dbgctl; // Guest DBGCTL MSR
- // -- only used if the LBR registers are virtualized
- ullong_t br_from; // Guest LastBranchFromIP MSR
- // -- only used if the LBR registers are virtualized
- ullong_t br_to; // Guest LastBranchToIP MSR
- // -- only used if the LBR registers are virtualized
- ullong_t lastexcpfrom; // Guest LastExceptionFromIP MSR
- // -- only used if the LBR registers are virtualized
- ullong_t lastexcpto; // Guest LastExceptionToIP MSR
- // -- only used if the LBR registers are virtualized
+ //offset 0x1d8
+ ullong_t rsp;
+
+ uchar_t rsvd5[24];
+
+ //offset 0x1f8
+ ullong_t rax;
+ ullong_t star;
+ ullong_t lstar;
+ ullong_t cstar;
+ ullong_t sfmask;
+ ullong_t KernelGsBase;
+ ullong_t sysenter_cs;
+ ullong_t sysenter_esp;
+ ullong_t sysenter_eip;
+ ullong_t cr2;
+
+
+ uchar_t rsvd6[32];
+
+ //offset 0x268
+ ullong_t g_pat; // Guest PAT
+ // -- only used if nested paging is enabled
+ ullong_t dbgctl; // Guest DBGCTL MSR
+ // -- only used if the LBR registers are virtualized
+ ullong_t br_from; // Guest LastBranchFromIP MSR
+ // -- only used if the LBR registers are virtualized
+ ullong_t br_to; // Guest LastBranchToIP MSR
+ // -- only used if the LBR registers are virtualized
+ ullong_t lastexcpfrom; // Guest LastExceptionFromIP MSR
+ // -- only used if the LBR registers are virtualized
+ ullong_t lastexcpto; // Guest LastExceptionToIP MSR
+ // -- only used if the LBR registers are virtualized
} __attribute__((packed));
#include <palacios/vm_guest.h>
#include <palacios/vmm_mem.h>
+#include <palacios/vmm_types.h>
+
#ifdef __V3VEE__
#define PrintDebug(fmt, args...) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->print_debug) { \
- (os_hooks)->print_debug((fmt), ##args); \
- } \
- } while (0)
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->print_debug) { \
+ (os_hooks)->print_debug((fmt), ##args); \
+ } \
+ } while (0)
#if 1
#else
#define PrintError(fmt, args...) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->print_debug) { \
- (os_hooks)->print_debug("%s(%d): " fmt, __FILE__, __LINE__, ##args); \
- } \
- } while (0)
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->print_debug) { \
+ (os_hooks)->print_debug("%s(%d): " fmt, __FILE__, __LINE__, ##args); \
+ } \
+ } while (0)
#ifdef VMM_INFO
#define PrintInfo(fmt, args...) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->print_info) { \
- (os_hooks)->print_info((fmt), ##args); \
- } \
- } while (0)
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->print_info) { \
+ (os_hooks)->print_info((fmt), ##args); \
+ } \
+ } while (0)
#else
#define PrintInfo(fmt, args...)
#endif
#ifdef VMM_TRACE
-#define PrintTrace(fmt, args...) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->print_trace) { \
- (os_hooks)->print_trace(fmt, ##args); \
- } \
- } while (0)
+#define PrintTrace(fmt, args...) \
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->print_trace) { \
+ (os_hooks)->print_trace(fmt, ##args); \
+ } \
+ } while (0)
#else
#define PrintTrace(fmt, args...)
#endif
-#define V3_AllocPages(num_pages) \
- ({ \
- extern struct v3_os_hooks * os_hooks; \
- void * ptr = 0; \
- if ((os_hooks) && (os_hooks)->allocate_pages) { \
- ptr = (os_hooks)->allocate_pages(num_pages); \
- } \
- ptr; \
- }) \
-
-
-#define V3_FreePage(page) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->free_page) { \
- (os_hooks)->free_page(page); \
- } \
- } while(0) \
-
-
-#define V3_VAddr(addr) ({ \
- extern struct v3_os_hooks * os_hooks; \
- void * var = 0; \
- if ((os_hooks) && (os_hooks)->paddr_to_vaddr) { \
- var = (os_hooks)->paddr_to_vaddr(addr); \
- } \
- var; \
- })
-
-
-#define V3_PAddr(addr) ({ \
- extern struct v3_os_hooks * os_hooks; \
- void * var = 0; \
- if ((os_hooks) && (os_hooks)->vaddr_to_paddr) { \
- var = (os_hooks)->vaddr_to_paddr(addr); \
- } \
- var; \
+#define V3_AllocPages(num_pages) \
+ ({ \
+ extern struct v3_os_hooks * os_hooks; \
+ void * ptr = 0; \
+ if ((os_hooks) && (os_hooks)->allocate_pages) { \
+ ptr = (os_hooks)->allocate_pages(num_pages); \
+ } \
+ ptr; \
})
+#define V3_FreePage(page) \
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->free_page) { \
+ (os_hooks)->free_page(page); \
+ } \
+ } while(0)
-#define V3_Malloc(size) ({ \
- extern struct v3_os_hooks * os_hooks; \
- void * var = 0; \
- if ((os_hooks) && (os_hooks)->malloc) { \
- var = (os_hooks)->malloc(size); \
- } \
- var; \
- })
-
-// We need to check the hook structure at runtime to ensure its SAFE
-#define V3_Free(addr) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->free) { \
- (os_hooks)->free(addr); \
- } \
- } while (0) \
+#define V3_VAddr(addr) ({ \
+ extern struct v3_os_hooks * os_hooks; \
+ void * var = 0; \
+ if ((os_hooks) && (os_hooks)->paddr_to_vaddr) { \
+ var = (os_hooks)->paddr_to_vaddr(addr); \
+ } \
+ var; \
+ })
-// uint_t V3_CPU_KHZ();
-#define V3_CPU_KHZ() \
- ({ \
- unsigned int khz = 0; \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->get_cpu_khz) { \
- khz = (os_hooks)->get_cpu_khz(); \
- } \
- khz; \
- }) \
-
-
-
-#define V3_Hook_Interrupt(irq, opaque) \
- ({ \
- int ret = 0; \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->hook_interrupt) { \
- ret = (os_hooks)->hook_interrupt(irq, opaque); \
- } \
- ret; \
- }) \
-#define V3_Yield(addr) \
- do { \
- extern struct v3_os_hooks * os_hooks; \
- if ((os_hooks) && (os_hooks)->yield_cpu) { \
- (os_hooks)->yield_cpu(); \
- } \
- } while (0) \
+#define V3_PAddr(addr) ({ \
+ extern struct v3_os_hooks * os_hooks; \
+ void * var = 0; \
+ if ((os_hooks) && (os_hooks)->vaddr_to_paddr) { \
+ var = (os_hooks)->vaddr_to_paddr(addr); \
+ } \
+ var; \
+ })
+#define V3_Malloc(size) ({ \
+ extern struct v3_os_hooks * os_hooks; \
+ void * var = 0; \
+ if ((os_hooks) && (os_hooks)->malloc) { \
+ var = (os_hooks)->malloc(size); \
+ } \
+ var; \
+ })
+// We need to check the hook structure at runtime to ensure its SAFE
+#define V3_Free(addr) \
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->free) { \
+ (os_hooks)->free(addr); \
+ } \
+ } while (0)
+// uint_t V3_CPU_KHZ();
+#define V3_CPU_KHZ() ({ \
+ unsigned int khz = 0; \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->get_cpu_khz) { \
+ khz = (os_hooks)->get_cpu_khz(); \
+ } \
+ khz; \
+ }) \
+
+
+
+#define V3_CREATE_THREAD(fn, name) \
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->start_kernel_thread) { \
+ (os_hooks)->start_kernel_thread(fn, name); \
+ } \
+ } while (0)
+
+
+#define V3_Hook_Interrupt(irq, opaque) ({ \
+ int ret = 0; \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->hook_interrupt) { \
+ ret = (os_hooks)->hook_interrupt(irq, opaque); \
+ } \
+ ret; \
+ }) \
+
+#define V3_Yield(addr) \
+ do { \
+ extern struct v3_os_hooks * os_hooks; \
+ if ((os_hooks) && (os_hooks)->yield_cpu) { \
+ (os_hooks)->yield_cpu(); \
+ } \
+ } while (0) \
+ \
+ \
+ \
+ \
+ \
/* ** */
#define V3_ASSERT(x) \
- do { \
- if (!(x)) { \
- PrintDebug("Failed assertion in %s: %s at %s, line %d, RA=%lx\n", \
- __func__, #x, __FILE__, __LINE__, \
- (ulong_t) __builtin_return_address(0)); \
- while(1); \
- } \
- } while(0) \
-
+ do { \
+ if (!(x)) { \
+ PrintDebug("Failed assertion in %s: %s at %s, line %d, RA=%lx\n", \
+ __func__, #x, __FILE__, __LINE__, \
+ (ulong_t) __builtin_return_address(0)); \
+ while(1); \
+ } \
+ } while(0) \
+
/* This will contain function pointers that provide OS services */
struct v3_os_hooks {
- void (*print_info)(const char * format, ...)
+ void (*print_info)(const char * format, ...)
__attribute__ ((format (printf, 1, 2)));
- void (*print_debug)(const char * format, ...)
+ void (*print_debug)(const char * format, ...)
__attribute__ ((format (printf, 1, 2)));
- void (*print_trace)(const char * format, ...)
+ void (*print_trace)(const char * format, ...)
__attribute__ ((format (printf, 1, 2)));
- void *(*allocate_pages)(int numPages);
- void (*free_page)(void * page);
-
- void *(*malloc)(unsigned int size);
- void (*free)(void * addr);
-
- void *(*paddr_to_vaddr)(void *addr);
- void *(*vaddr_to_paddr)(void *addr);
-
- // int (*hook_interrupt)(struct guest_info *s, int irq);
-
- int (*hook_interrupt)(struct guest_info * vm, unsigned int irq);
+ void *(*allocate_pages)(int numPages);
+ void (*free_page)(void * page);
- int (*ack_irq)(int irq);
+ void *(*malloc)(unsigned int size);
+ void (*free)(void * addr);
+ void *(*paddr_to_vaddr)(void *addr);
+ void *(*vaddr_to_paddr)(void *addr);
- unsigned int (*get_cpu_khz)(void);
+ int (*hook_interrupt)(struct guest_info * vm, unsigned int irq);
+ int (*ack_irq)(int irq);
- void (*start_kernel_thread)(void); // include pointer to function
+ unsigned int (*get_cpu_khz)(void);
- void (*yield_cpu)(void);
+ void (*start_kernel_thread)(int (*fn)(void * arg), char * thread_name);
+ void (*yield_cpu)(void);
};
struct v3_vm_config {
- void * rombios;
- int rombios_size;
+ void * rombios;
+ int rombios_size;
- void * vgabios;
- int vgabios_size;
+ void * vgabios;
+ int vgabios_size;
- unsigned long mem_size; // in bytes, var should be natural size of cpu
- // so we can specify maximum physical address size
- // (We're screwed if we want to do 32 bit host/64 bit guest)
+ unsigned long mem_size; // in bytes, var should be natural size of cpu
+ // so we can specify maximum physical address size
+ // (We're screwed if we want to do 32 bit host/64 bit guest)
- int enable_profiling;
+ int enable_profiling;
- int use_ramdisk;
- void * ramdisk;
- int ramdisk_size;
+ int use_ramdisk;
+ void * ramdisk;
+ int ramdisk_size;
};
/* This will contain Function pointers that control the VMs */
struct v3_ctrl_ops {
- struct guest_info *(*allocate_guest)(void);
+ struct guest_info *(*allocate_guest)(void);
- int (*config_guest)(struct guest_info * info, struct v3_vm_config * config_ptr);
- int (*init_guest)(struct guest_info * info);
- int (*start_guest)(struct guest_info * info);
- // int (*stop_vm)(uint_t vm_id);
+ int (*config_guest)(struct guest_info * info, struct v3_vm_config * config_ptr);
+ int (*init_guest)(struct guest_info * info);
+ int (*start_guest)(struct guest_info * info);
+ // int (*stop_vm)(uint_t vm_id);
- int (*has_nested_paging)(void);
+ int (*has_nested_paging)(void);
- // v3_cpu_arch_t (*get_cpu_arch)();
+ // v3_cpu_arch_t (*get_cpu_arch)();
};
// This is the interrupt state that the VMM's interrupt handlers need to see
//
struct v3_interrupt {
- unsigned int irq;
- unsigned int error;
+ unsigned int irq;
+ unsigned int error;
- unsigned int should_ack; // Should the vmm ack this interrupt, or will
- // the host OS do it?
+ unsigned int should_ack; // Should the vmm ack this interrupt, or will
+ // the host OS do it?
};
#include <palacios/vm_guest.h>
struct cr0_real {
- uint_t pe : 1;
- uint_t mp : 1;
- uint_t em : 1;
- uint_t ts : 1;
+ uint_t pe : 1;
+ uint_t mp : 1;
+ uint_t em : 1;
+ uint_t ts : 1;
} __attribute__((packed));
struct cr0_32 {
- uint_t pe : 1;
- uint_t mp : 1;
- uint_t em : 1;
- uint_t ts : 1;
- uint_t et : 1;
- uint_t ne : 1;
- uint_t rsvd1 : 10;
- uint_t wp : 1;
- uint_t rsvd2 : 1;
- uint_t am : 1;
- uint_t rsvd3 : 10;
- uint_t nw : 1;
- uint_t cd : 1;
- uint_t pg : 1;
+ uint_t pe : 1;
+ uint_t mp : 1;
+ uint_t em : 1;
+ uint_t ts : 1;
+ uint_t et : 1;
+ uint_t ne : 1;
+ uint_t rsvd1 : 10;
+ uint_t wp : 1;
+ uint_t rsvd2 : 1;
+ uint_t am : 1;
+ uint_t rsvd3 : 10;
+ uint_t nw : 1;
+ uint_t cd : 1;
+ uint_t pg : 1;
} __attribute__((packed));
struct cr0_64 {
- uint_t pe : 1;
- uint_t mp : 1;
- uint_t em : 1;
- uint_t ts : 1;
- uint_t et : 1;
- uint_t ne : 1;
- uint_t rsvd1 : 10;
- uint_t wp : 1;
- uint_t rsvd2 : 1;
- uint_t am : 1;
- uint_t rsvd3 : 10;
- uint_t nw : 1;
- uint_t cd : 1;
- uint_t pg : 1;
-
- uint_t rsvd4; // MBZ
+ uint_t pe : 1;
+ uint_t mp : 1;
+ uint_t em : 1;
+ uint_t ts : 1;
+ uint_t et : 1;
+ uint_t ne : 1;
+ uint_t rsvd1 : 10;
+ uint_t wp : 1;
+ uint_t rsvd2 : 1;
+ uint_t am : 1;
+ uint_t rsvd3 : 10;
+ uint_t nw : 1;
+ uint_t cd : 1;
+ uint_t pg : 1;
+
+ uint_t rsvd4; // MBZ
} __attribute__((packed));
struct cr2_32 {
- uint_t pf_vaddr;
+ uint_t pf_vaddr;
} __attribute__((packed));
struct cr2_64 {
- ullong_t pf_vaddr;
+ ullong_t pf_vaddr;
} __attribute__((packed));
struct cr3_32 {
- uint_t rsvd1 : 3;
- uint_t pwt : 1;
- uint_t pcd : 1;
- uint_t rsvd2 : 7;
- uint_t pdt_base_addr : 20;
+ uint_t rsvd1 : 3;
+ uint_t pwt : 1;
+ uint_t pcd : 1;
+ uint_t rsvd2 : 7;
+ uint_t pdt_base_addr : 20;
} __attribute__((packed));
struct cr3_32_PAE {
- uint_t rsvd1 : 3;
- uint_t pwt : 1;
- uint_t pcd : 1;
- uint_t pdpt_base_addr : 27;
+ uint_t rsvd1 : 3;
+ uint_t pwt : 1;
+ uint_t pcd : 1;
+ uint_t pdpt_base_addr : 27;
} __attribute__((packed));
struct cr3_64 {
- uint_t rsvd1 : 3;
- uint_t pwt : 1;
- uint_t pcd : 1;
- uint_t rsvd2 : 7;
- ullong_t pml4t_base_addr : 40;
- uint_t rsvd3 : 12;
+ uint_t rsvd1 : 3;
+ uint_t pwt : 1;
+ uint_t pcd : 1;
+ uint_t rsvd2 : 7;
+ ullong_t pml4t_base_addr : 40;
+ uint_t rsvd3 : 12;
} __attribute__((packed));
struct cr4_32 {
- uint_t vme : 1;
- uint_t pvi : 1;
- uint_t tsd : 1;
- uint_t de : 1;
- uint_t pse : 1;
- uint_t pae : 1;
- uint_t mce : 1;
- uint_t pge : 1;
- uint_t pce : 1;
- uint_t osf_xsr : 1;
- uint_t osx : 1;
- uint_t rsvd1 : 21;
+ uint_t vme : 1;
+ uint_t pvi : 1;
+ uint_t tsd : 1;
+ uint_t de : 1;
+ uint_t pse : 1;
+ uint_t pae : 1;
+ uint_t mce : 1;
+ uint_t pge : 1;
+ uint_t pce : 1;
+ uint_t osf_xsr : 1;
+ uint_t osx : 1;
+ uint_t rsvd1 : 21;
} __attribute__((packed));
struct cr4_64 {
- uint_t vme : 1;
- uint_t pvi : 1;
- uint_t tsd : 1;
- uint_t de : 1;
- uint_t pse : 1;
- uint_t pae : 1;
- uint_t mce : 1;
- uint_t pge : 1;
- uint_t pce : 1;
- uint_t osf_xsr : 1;
- uint_t osx : 1;
- uint_t rsvd1 : 21;
- uint_t rsvd2 : 32;
+ uint_t vme : 1;
+ uint_t pvi : 1;
+ uint_t tsd : 1;
+ uint_t de : 1;
+ uint_t pse : 1;
+ uint_t pae : 1;
+ uint_t mce : 1;
+ uint_t pge : 1;
+ uint_t pce : 1;
+ uint_t osf_xsr : 1;
+ uint_t osx : 1;
+ uint_t rsvd1 : 21;
+ uint_t rsvd2 : 32;
} __attribute__((packed));
struct efer_64 {
- uint_t sce : 1;
- uint_t rsvd1 : 7; // RAZ
- uint_t lme : 1;
- uint_t rsvd2 : 1; // MBZ
- uint_t lma : 1;
- uint_t nxe : 1;
- uint_t svme : 1;
- uint_t rsvd3 : 1; // MBZ
- uint_t ffxsr : 1;
- uint_t rsvd4 : 12; // MBZ
- uint_t rsvd5 : 32; // MBZ
+ uint_t sce : 1;
+ uint_t rsvd1 : 7; // RAZ
+ uint_t lme : 1;
+ uint_t rsvd2 : 1; // MBZ
+ uint_t lma : 1;
+ uint_t nxe : 1;
+ uint_t svme : 1;
+ uint_t rsvd3 : 1; // MBZ
+ uint_t ffxsr : 1;
+ uint_t rsvd4 : 12; // MBZ
+ uint_t rsvd5 : 32; // MBZ
} __attribute__((packed));
struct rflags {
- uint_t cf : 1; // carry flag
- uint_t rsvd1 : 1; // Must be 1
- uint_t pf : 1; // parity flag
- uint_t rsvd2 : 1; // Read as 0
- uint_t af : 1; // Auxillary flag
- uint_t rsvd3 : 1; // Read as 0
- uint_t zf : 1; // zero flag
- uint_t sf : 1; // sign flag
- uint_t tf : 1; // trap flag
- uint_t intr : 1; // interrupt flag
- uint_t df : 1; // direction flag
- uint_t of : 1; // overflow flag
- uint_t iopl : 2; // IO privilege level
- uint_t nt : 1; // nested task
- uint_t rsvd4 : 1; // read as 0
- uint_t rf : 1; // resume flag
- uint_t vm : 1; // Virtual-8086 mode
- uint_t ac : 1; // alignment check
- uint_t vif : 1; // virtual interrupt flag
- uint_t vip : 1; // virtual interrupt pending
- uint_t id : 1; // ID flag
- uint_t rsvd5 : 10; // Read as 0
- uint_t rsvd6 : 32; // Read as 0
+ uint_t cf : 1; // carry flag
+ uint_t rsvd1 : 1; // Must be 1
+ uint_t pf : 1; // parity flag
+ uint_t rsvd2 : 1; // Read as 0
+ uint_t af : 1; // Auxillary flag
+ uint_t rsvd3 : 1; // Read as 0
+ uint_t zf : 1; // zero flag
+ uint_t sf : 1; // sign flag
+ uint_t tf : 1; // trap flag
+ uint_t intr : 1; // interrupt flag
+ uint_t df : 1; // direction flag
+ uint_t of : 1; // overflow flag
+ uint_t iopl : 2; // IO privilege level
+ uint_t nt : 1; // nested task
+ uint_t rsvd4 : 1; // read as 0
+ uint_t rf : 1; // resume flag
+ uint_t vm : 1; // Virtual-8086 mode
+ uint_t ac : 1; // alignment check
+ uint_t vif : 1; // virtual interrupt flag
+ uint_t vip : 1; // virtual interrupt pending
+ uint_t id : 1; // ID flag
+ uint_t rsvd5 : 10; // Read as 0
+ uint_t rsvd6 : 32; // Read as 0
} __attribute__((packed));
#include <palacios/vmm.h>
struct dbg_bp32 {
- uint_t breakpoint : 32;
+ uint_t breakpoint : 32;
};
struct dbg_bp64 {
- ullong_t breakpoint;
+ ullong_t breakpoint;
};
struct dr6_32 {
- uint_t bp0 : 1;
- uint_t bp1 : 1;
- uint_t bp2 : 1;
- uint_t bp3 : 1;
- uint_t rsvd1 : 8; // read as ones
- uint_t rsvd2 : 1; // read as zero
- uint_t bd : 1;
- uint_t bs : 1;
- uint_t bt : 1;
- uint_t rsvd3 : 16; // read as one
+ uint_t bp0 : 1;
+ uint_t bp1 : 1;
+ uint_t bp2 : 1;
+ uint_t bp3 : 1;
+ uint_t rsvd1 : 8; // read as ones
+ uint_t rsvd2 : 1; // read as zero
+ uint_t bd : 1;
+ uint_t bs : 1;
+ uint_t bt : 1;
+ uint_t rsvd3 : 16; // read as one
};
struct dr6_64 {
- uint_t bp0 : 1;
- uint_t bp1 : 1;
- uint_t bp2 : 1;
- uint_t bp3 : 1;
- uint_t rsvd1 : 8; // read as ones
- uint_t rsvd2 : 1; // read as zero
- uint_t bd : 1;
- uint_t bs : 1;
- uint_t bt : 1;
- uint_t rsvd3 : 16; // read as one
- uint_t rsvd4 : 32; // MBZ
+ uint_t bp0 : 1;
+ uint_t bp1 : 1;
+ uint_t bp2 : 1;
+ uint_t bp3 : 1;
+ uint_t rsvd1 : 8; // read as ones
+ uint_t rsvd2 : 1; // read as zero
+ uint_t bd : 1;
+ uint_t bs : 1;
+ uint_t bt : 1;
+ uint_t rsvd3 : 16; // read as one
+ uint_t rsvd4 : 32; // MBZ
};
struct dr7_32 {
- uint_t L0 : 1;
- uint_t G0 : 1;
- uint_t L1 : 1;
- uint_t G1 : 1;
- uint_t L2 : 1;
- uint_t G2 : 1;
- uint_t L3 : 1;
- uint_t G3 : 1;
- uint_t LE : 1;
- uint_t GE : 1;
- uint_t rsvd1 : 1; // Read as one
- uint_t rsvd2 : 2; // Read as zero
- uint_t GD : 1;
- uint_t rsvd3 : 2; // Read as zero
- uint_t rw0 : 1;
- uint_t len0 : 1;
- uint_t rw1 : 1;
- uint_t len1 : 1;
- uint_t rw2 : 1;
- uint_t len2 : 1;
- uint_t rw3 : 1;
- uint_t len3 : 1;
+ uint_t L0 : 1;
+ uint_t G0 : 1;
+ uint_t L1 : 1;
+ uint_t G1 : 1;
+ uint_t L2 : 1;
+ uint_t G2 : 1;
+ uint_t L3 : 1;
+ uint_t G3 : 1;
+ uint_t LE : 1;
+ uint_t GE : 1;
+ uint_t rsvd1 : 1; // Read as one
+ uint_t rsvd2 : 2; // Read as zero
+ uint_t GD : 1;
+ uint_t rsvd3 : 2; // Read as zero
+ uint_t rw0 : 1;
+ uint_t len0 : 1;
+ uint_t rw1 : 1;
+ uint_t len1 : 1;
+ uint_t rw2 : 1;
+ uint_t len2 : 1;
+ uint_t rw3 : 1;
+ uint_t len3 : 1;
};
struct dr7_64 {
- uint_t L0 : 1;
- uint_t G0 : 1;
- uint_t L1 : 1;
- uint_t G1 : 1;
- uint_t L2 : 1;
- uint_t G2 : 1;
- uint_t L3 : 1;
- uint_t G3 : 1;
- uint_t LE : 1;
- uint_t GE : 1;
- uint_t rsvd1 : 1; // Read as one
- uint_t rsvd2 : 2; // Read as zero
- uint_t GD : 1;
- uint_t rsvd3 : 2; // Read as zero
- uint_t rw0 : 1;
- uint_t len0 : 1;
- uint_t rw1 : 1;
- uint_t len1 : 1;
- uint_t rw2 : 1;
- uint_t len2 : 1;
- uint_t rw3 : 1;
- uint_t len3 : 1;
- uint_t rsvd4 : 32; // MBZ
+ uint_t L0 : 1;
+ uint_t G0 : 1;
+ uint_t L1 : 1;
+ uint_t G1 : 1;
+ uint_t L2 : 1;
+ uint_t G2 : 1;
+ uint_t L3 : 1;
+ uint_t G3 : 1;
+ uint_t LE : 1;
+ uint_t GE : 1;
+ uint_t rsvd1 : 1; // Read as one
+ uint_t rsvd2 : 2; // Read as zero
+ uint_t GD : 1;
+ uint_t rsvd3 : 2; // Read as zero
+ uint_t rw0 : 1;
+ uint_t len0 : 1;
+ uint_t rw1 : 1;
+ uint_t len1 : 1;
+ uint_t rw2 : 1;
+ uint_t len2 : 1;
+ uint_t rw3 : 1;
+ uint_t len3 : 1;
+ uint_t rsvd4 : 32; // MBZ
};
typedef enum {INVALID_OPERAND, REG_OPERAND, MEM_OPERAND, IMM_OPERAND} v3_operand_type_t;
struct x86_operand {
- addr_t operand;
- uint_t size;
- v3_operand_type_t type;
+ addr_t operand;
+ uint_t size;
+ v3_operand_type_t type;
};
struct x86_prefixes {
- uint_t lock : 1; // 0xF0
- uint_t repne : 1; // 0xF2
- uint_t repnz : 1; // 0xF2
- uint_t rep : 1; // 0xF3
- uint_t repe : 1; // 0xF3
- uint_t repz : 1; // 0xF3
- uint_t cs_override : 1; // 0x2E
- uint_t ss_override : 1; // 0x36
- uint_t ds_override : 1; // 0x3E
- uint_t es_override : 1; // 0x26
- uint_t fs_override : 1; // 0x64
- uint_t gs_override : 1; // 0x65
- uint_t br_not_taken : 1; // 0x2E
- uint_t br_taken : 1; // 0x3E
- uint_t op_size : 1; // 0x66
- uint_t addr_size : 1; // 0x67
+ uint_t lock : 1; // 0xF0
+ uint_t repne : 1; // 0xF2
+ uint_t repnz : 1; // 0xF2
+ uint_t rep : 1; // 0xF3
+ uint_t repe : 1; // 0xF3
+ uint_t repz : 1; // 0xF3
+ uint_t cs_override : 1; // 0x2E
+ uint_t ss_override : 1; // 0x36
+ uint_t ds_override : 1; // 0x3E
+ uint_t es_override : 1; // 0x26
+ uint_t fs_override : 1; // 0x64
+ uint_t gs_override : 1; // 0x65
+ uint_t br_not_taken : 1; // 0x2E
+ uint_t br_taken : 1; // 0x3E
+ uint_t op_size : 1; // 0x66
+ uint_t addr_size : 1; // 0x67
};
struct x86_instr {
- struct x86_prefixes prefixes;
- uint_t instr_length;
- v3_op_type_t op_type;
- uint_t num_operands;
- struct x86_operand dst_operand;
- struct x86_operand src_operand;
- struct x86_operand third_operand;
- addr_t str_op_length;
- addr_t is_str_op;
- void * decoder_data;
+ struct x86_prefixes prefixes;
+ uint_t instr_length;
+ v3_op_type_t op_type;
+ uint_t num_operands;
+ struct x86_operand dst_operand;
+ struct x86_operand src_operand;
+ struct x86_operand third_operand;
+ addr_t str_op_length;
+ addr_t is_str_op;
+ void * decoder_data;
};
struct basic_instr_info {
- uint_t instr_length;
- uint_t op_size;
- uint_t str_op : 1;
- uint_t has_rep : 1;
+ uint_t instr_length;
+ uint_t op_size;
+ uint_t str_op : 1;
+ uint_t has_rep : 1;
};
- /************************/
- /* EXTERNAL DECODER API */
+/************************/
+/* EXTERNAL DECODER API */
/************************/
/*
This is an External API definition that must be implemented by a decoder
#define MODRM_RM(x) (x & 0x7)
struct modrm_byte {
- uint_t rm : 3 PACKED;
- uint_t reg : 3 PACKED;
- uint_t mod : 2 PACKED;
+ uint_t rm : 3 PACKED;
+ uint_t reg : 3 PACKED;
+ uint_t mod : 2 PACKED;
};
#define SIB_SCALE(x) (x & 0x7)
struct sib_byte {
- uint_t base : 3 PACKED;
- uint_t index : 3 PACKED;
- uint_t scale : 2 PACKED;
+ uint_t base : 3 PACKED;
+ uint_t index : 3 PACKED;
+ uint_t scale : 2 PACKED;
};
static inline int is_prefix_byte(uchar_t byte) {
- switch (byte) {
- case 0xF0: // lock
- case 0xF2: // REPNE/REPNZ
- case 0xF3: // REP or REPE/REPZ
- case 0x2E: // CS override or Branch hint not taken (with Jcc instrs)
- case 0x36: // SS override
- case 0x3E: // DS override or Branch hint taken (with Jcc instrs)
- case 0x26: // ES override
- case 0x64: // FS override
- case 0x65: // GS override
- //case 0x2E: // branch not taken hint
- // case 0x3E: // branch taken hint
- case 0x66: // operand size override
- case 0x67: // address size override
- return 1;
- break;
- default:
- return 0;
- break;
- }
+ switch (byte) {
+ case 0xF0: // lock
+ case 0xF2: // REPNE/REPNZ
+ case 0xF3: // REP or REPE/REPZ
+ case 0x2E: // CS override or Branch hint not taken (with Jcc instrs)
+ case 0x36: // SS override
+ case 0x3E: // DS override or Branch hint taken (with Jcc instrs)
+ case 0x26: // ES override
+ case 0x64: // FS override
+ case 0x65: // GS override
+ //case 0x2E: // branch not taken hint
+ // case 0x3E: // branch taken hint
+ case 0x66: // operand size override
+ case 0x67: // address size override
+ return 1;
+ break;
+ default:
+ return 0;
+ break;
+ }
}
static inline v3_reg_t get_gpr_mask(struct guest_info * info) {
- switch (info->cpu_mode) {
- case REAL:
- return 0xffff;
- break;
- case PROTECTED:
- case PROTECTED_PAE:
- return 0xffffffff;
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- default:
- PrintError("Unsupported Address Mode\n");
- return -1;
- }
+ switch (info->cpu_mode) {
+ case REAL:
+ return 0xffff;
+ break;
+ case PROTECTED:
+ case PROTECTED_PAE:
+ return 0xffffffff;
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ default:
+ PrintError("Unsupported Address Mode\n");
+ return -1;
+ }
}
static inline addr_t get_addr_linear(struct guest_info * info, addr_t addr, struct v3_segment * seg) {
- switch (info->cpu_mode) {
- case REAL:
- // It appears that the segment values are computed and cached in the vmcb structure
- // We Need to check this for Intel
- /* return addr + (seg->selector << 4);
- break;*/
-
- case PROTECTED:
- case PROTECTED_PAE:
- case LONG_32_COMPAT:
- return addr + seg->base;
- break;
-
- case LONG:
- // In long mode the segment bases are disregarded (forced to 0), unless using
- // FS or GS, then the base addresses are added
- return addr + seg->base;
-
- case LONG_16_COMPAT:
- default:
- PrintError("Unsupported CPU Mode: %d\n", info->cpu_mode);
- return -1;
- }
+ switch (info->cpu_mode) {
+ case REAL:
+ // It appears that the segment values are computed and cached in the vmcb structure
+ // We Need to check this for Intel
+ /* return addr + (seg->selector << 4);
+ break;*/
+
+ case PROTECTED:
+ case PROTECTED_PAE:
+ case LONG_32_COMPAT:
+ return addr + seg->base;
+ break;
+
+ case LONG:
+ // In long mode the segment bases are disregarded (forced to 0), unless using
+ // FS or GS, then the base addresses are added
+ return addr + seg->base;
+
+ case LONG_16_COMPAT:
+ default:
+ PrintError("Unsupported CPU Mode: %d\n", info->cpu_mode);
+ return -1;
+ }
}
struct v3_gprs;
static inline addr_t decode_register(struct v3_gprs * gprs, char reg_code, reg_size_t reg_size) {
- addr_t reg_addr;
-
- switch (reg_code) {
- case 0:
- reg_addr = (addr_t)&(gprs->rax);
- break;
- case 1:
- reg_addr = (addr_t)&(gprs->rcx);
- break;
- case 2:
- reg_addr = (addr_t)&(gprs->rdx);
- break;
- case 3:
- reg_addr = (addr_t)&(gprs->rbx);
- break;
- case 4:
- if (reg_size == REG8) {
- reg_addr = (addr_t)&(gprs->rax) + 1;
- } else {
- reg_addr = (addr_t)&(gprs->rsp);
- }
- break;
- case 5:
- if (reg_size == REG8) {
- reg_addr = (addr_t)&(gprs->rcx) + 1;
- } else {
- reg_addr = (addr_t)&(gprs->rbp);
+ addr_t reg_addr;
+
+ switch (reg_code) {
+ case 0:
+ reg_addr = (addr_t)&(gprs->rax);
+ break;
+ case 1:
+ reg_addr = (addr_t)&(gprs->rcx);
+ break;
+ case 2:
+ reg_addr = (addr_t)&(gprs->rdx);
+ break;
+ case 3:
+ reg_addr = (addr_t)&(gprs->rbx);
+ break;
+ case 4:
+ if (reg_size == REG8) {
+ reg_addr = (addr_t)&(gprs->rax) + 1;
+ } else {
+ reg_addr = (addr_t)&(gprs->rsp);
+ }
+ break;
+ case 5:
+ if (reg_size == REG8) {
+ reg_addr = (addr_t)&(gprs->rcx) + 1;
+ } else {
+ reg_addr = (addr_t)&(gprs->rbp);
+ }
+ break;
+ case 6:
+ if (reg_size == REG8) {
+ reg_addr = (addr_t)&(gprs->rdx) + 1;
+ } else {
+ reg_addr = (addr_t)&(gprs->rsi);
+ }
+ break;
+ case 7:
+ if (reg_size == REG8) {
+ reg_addr = (addr_t)&(gprs->rbx) + 1;
+ } else {
+ reg_addr = (addr_t)&(gprs->rdi);
+ }
+ break;
+ default:
+ reg_addr = 0;
+ break;
}
- break;
- case 6:
- if (reg_size == REG8) {
- reg_addr = (addr_t)&(gprs->rdx) + 1;
- } else {
- reg_addr = (addr_t)&(gprs->rsi);
- }
- break;
- case 7:
- if (reg_size == REG8) {
- reg_addr = (addr_t)&(gprs->rbx) + 1;
- } else {
- reg_addr = (addr_t)&(gprs->rdi);
- }
- break;
- default:
- reg_addr = 0;
- break;
- }
- return reg_addr;
+ return reg_addr;
}
static inline v3_operand_type_t decode_operands16(struct v3_gprs * gprs, // input/output
- char * modrm_instr, // input
- int * offset, // output
- addr_t * first_operand, // output
- addr_t * second_operand, // output
- reg_size_t reg_size) { // input
+ char * modrm_instr, // input
+ int * offset, // output
+ addr_t * first_operand, // output
+ addr_t * second_operand, // output
+ reg_size_t reg_size) { // input
- struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
- addr_t base_addr = 0;
- modrm_mode_t mod_mode = 0;
- v3_operand_type_t addr_type = INVALID_OPERAND;
- char * instr_cursor = modrm_instr;
+ struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
+ addr_t base_addr = 0;
+ modrm_mode_t mod_mode = 0;
+ v3_operand_type_t addr_type = INVALID_OPERAND;
+ char * instr_cursor = modrm_instr;
- // PrintDebug("ModRM mod=%d\n", modrm->mod);
+ // PrintDebug("ModRM mod=%d\n", modrm->mod);
- instr_cursor += 1;
+ instr_cursor += 1;
- if (modrm->mod == 3) {
- mod_mode = REG;
- addr_type = REG_OPERAND;
- //PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
+ if (modrm->mod == 3) {
+ mod_mode = REG;
+ addr_type = REG_OPERAND;
+ //PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
- *first_operand = decode_register(gprs, modrm->rm, reg_size);
+ *first_operand = decode_register(gprs, modrm->rm, reg_size);
- } else {
+ } else {
- addr_type = MEM_OPERAND;
+ addr_type = MEM_OPERAND;
- if (modrm->mod == 0) {
- mod_mode = DISP0;
- } else if (modrm->mod == 1) {
- mod_mode = DISP8;
- } else if (modrm->mod == 2) {
- mod_mode = DISP16;
- }
+ if (modrm->mod == 0) {
+ mod_mode = DISP0;
+ } else if (modrm->mod == 1) {
+ mod_mode = DISP8;
+ } else if (modrm->mod == 2) {
+ mod_mode = DISP16;
+ }
- switch (modrm->rm) {
- case 0:
- base_addr = gprs->rbx + gprs->rsi;
- break;
- case 1:
- base_addr = gprs->rbx + gprs->rdi;
- break;
- case 2:
- base_addr = gprs->rbp + gprs->rsi;
- break;
- case 3:
- base_addr = gprs->rbp + gprs->rdi;
- break;
- case 4:
- base_addr = gprs->rsi;
- break;
- case 5:
- base_addr = gprs->rdi;
- break;
- case 6:
- if (modrm->mod == 0) {
- base_addr = 0;
- mod_mode = DISP16;
- } else {
- base_addr = gprs->rbp;
- }
- break;
- case 7:
- base_addr = gprs->rbx;
- break;
- }
+ switch (modrm->rm) {
+ case 0:
+ base_addr = gprs->rbx + gprs->rsi;
+ break;
+ case 1:
+ base_addr = gprs->rbx + gprs->rdi;
+ break;
+ case 2:
+ base_addr = gprs->rbp + gprs->rsi;
+ break;
+ case 3:
+ base_addr = gprs->rbp + gprs->rdi;
+ break;
+ case 4:
+ base_addr = gprs->rsi;
+ break;
+ case 5:
+ base_addr = gprs->rdi;
+ break;
+ case 6:
+ if (modrm->mod == 0) {
+ base_addr = 0;
+ mod_mode = DISP16;
+ } else {
+ base_addr = gprs->rbp;
+ }
+ break;
+ case 7:
+ base_addr = gprs->rbx;
+ break;
+ }
- if (mod_mode == DISP8) {
- base_addr += (uchar_t)*(instr_cursor);
- instr_cursor += 1;
- } else if (mod_mode == DISP16) {
- base_addr += (ushort_t)*(instr_cursor);
- instr_cursor += 2;
- }
+ if (mod_mode == DISP8) {
+ base_addr += (uchar_t)*(instr_cursor);
+ instr_cursor += 1;
+ } else if (mod_mode == DISP16) {
+ base_addr += (ushort_t)*(instr_cursor);
+ instr_cursor += 2;
+ }
- *first_operand = base_addr;
- }
+ *first_operand = base_addr;
+ }
- *offset += (instr_cursor - modrm_instr);
- *second_operand = decode_register(gprs, modrm->reg, reg_size);
+ *offset += (instr_cursor - modrm_instr);
+ *second_operand = decode_register(gprs, modrm->reg, reg_size);
- return addr_type;
+ return addr_type;
}
static inline v3_operand_type_t decode_operands32(struct v3_gprs * gprs, // input/output
- uchar_t * modrm_instr, // input
- int * offset, // output
- addr_t * first_operand, // output
- addr_t * second_operand, // output
- reg_size_t reg_size) { // input
+ uchar_t * modrm_instr, // input
+ int * offset, // output
+ addr_t * first_operand, // output
+ addr_t * second_operand, // output
+ reg_size_t reg_size) { // input
- uchar_t * instr_cursor = modrm_instr;
- struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
- addr_t base_addr = 0;
- modrm_mode_t mod_mode = 0;
- uint_t has_sib_byte = 0;
- v3_operand_type_t addr_type = INVALID_OPERAND;
+ uchar_t * instr_cursor = modrm_instr;
+ struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
+ addr_t base_addr = 0;
+ modrm_mode_t mod_mode = 0;
+ uint_t has_sib_byte = 0;
+ v3_operand_type_t addr_type = INVALID_OPERAND;
- instr_cursor += 1;
+ instr_cursor += 1;
- if (modrm->mod == 3) {
- mod_mode = REG;
- addr_type = REG_OPERAND;
+ if (modrm->mod == 3) {
+ mod_mode = REG;
+ addr_type = REG_OPERAND;
- // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
+ // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
- *first_operand = decode_register(gprs, modrm->rm, reg_size);
+ *first_operand = decode_register(gprs, modrm->rm, reg_size);
- } else {
+ } else {
- addr_type = MEM_OPERAND;
+ addr_type = MEM_OPERAND;
- if (modrm->mod == 0) {
- mod_mode = DISP0;
- } else if (modrm->mod == 1) {
- mod_mode = DISP8;
- } else if (modrm->mod == 2) {
- mod_mode = DISP32;
- }
+ if (modrm->mod == 0) {
+ mod_mode = DISP0;
+ } else if (modrm->mod == 1) {
+ mod_mode = DISP8;
+ } else if (modrm->mod == 2) {
+ mod_mode = DISP32;
+ }
- switch (modrm->rm) {
- case 0:
- base_addr = gprs->rax;
- break;
- case 1:
- base_addr = gprs->rcx;
- break;
- case 2:
- base_addr = gprs->rdx;
- break;
- case 3:
- base_addr = gprs->rbx;
- break;
- case 4:
- has_sib_byte = 1;
- break;
- case 5:
- if (modrm->mod == 0) {
- base_addr = 0;
- mod_mode = DISP32;
- } else {
- base_addr = gprs->rbp;
- }
- break;
- case 6:
- base_addr = gprs->rsi;
- break;
- case 7:
- base_addr = gprs->rdi;
- break;
- }
+ switch (modrm->rm) {
+ case 0:
+ base_addr = gprs->rax;
+ break;
+ case 1:
+ base_addr = gprs->rcx;
+ break;
+ case 2:
+ base_addr = gprs->rdx;
+ break;
+ case 3:
+ base_addr = gprs->rbx;
+ break;
+ case 4:
+ has_sib_byte = 1;
+ break;
+ case 5:
+ if (modrm->mod == 0) {
+ base_addr = 0;
+ mod_mode = DISP32;
+ } else {
+ base_addr = gprs->rbp;
+ }
+ break;
+ case 6:
+ base_addr = gprs->rsi;
+ break;
+ case 7:
+ base_addr = gprs->rdi;
+ break;
+ }
- if (has_sib_byte) {
- instr_cursor += 1;
- struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
- int scale = 1;
-
- instr_cursor += 1;
-
-
- if (sib->scale == 1) {
- scale = 2;
- } else if (sib->scale == 2) {
- scale = 4;
- } else if (sib->scale == 3) {
- scale = 8;
- }
-
-
- switch (sib->index) {
- case 0:
- base_addr = gprs->rax;
- break;
- case 1:
- base_addr = gprs->rcx;
- break;
- case 2:
- base_addr = gprs->rdx;
- break;
- case 3:
- base_addr = gprs->rbx;
- break;
- case 4:
- base_addr = 0;
- break;
- case 5:
- base_addr = gprs->rbp;
- break;
- case 6:
- base_addr = gprs->rsi;
- break;
- case 7:
- base_addr = gprs->rdi;
- break;
- }
-
- base_addr *= scale;
-
-
- switch (sib->base) {
- case 0:
- base_addr += gprs->rax;
- break;
- case 1:
- base_addr += gprs->rcx;
- break;
- case 2:
- base_addr += gprs->rdx;
- break;
- case 3:
- base_addr += gprs->rbx;
- break;
- case 4:
- base_addr += gprs->rsp;
- break;
- case 5:
- if (modrm->mod != 0) {
- base_addr += gprs->rbp;
+ if (has_sib_byte) {
+ instr_cursor += 1;
+ struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
+ int scale = 1;
+
+ instr_cursor += 1;
+
+
+ if (sib->scale == 1) {
+ scale = 2;
+ } else if (sib->scale == 2) {
+ scale = 4;
+ } else if (sib->scale == 3) {
+ scale = 8;
+ }
+
+
+ switch (sib->index) {
+ case 0:
+ base_addr = gprs->rax;
+ break;
+ case 1:
+ base_addr = gprs->rcx;
+ break;
+ case 2:
+ base_addr = gprs->rdx;
+ break;
+ case 3:
+ base_addr = gprs->rbx;
+ break;
+ case 4:
+ base_addr = 0;
+ break;
+ case 5:
+ base_addr = gprs->rbp;
+ break;
+ case 6:
+ base_addr = gprs->rsi;
+ break;
+ case 7:
+ base_addr = gprs->rdi;
+ break;
+ }
+
+ base_addr *= scale;
+
+
+ switch (sib->base) {
+ case 0:
+ base_addr += gprs->rax;
+ break;
+ case 1:
+ base_addr += gprs->rcx;
+ break;
+ case 2:
+ base_addr += gprs->rdx;
+ break;
+ case 3:
+ base_addr += gprs->rbx;
+ break;
+ case 4:
+ base_addr += gprs->rsp;
+ break;
+ case 5:
+ if (modrm->mod != 0) {
+ base_addr += gprs->rbp;
+ }
+ break;
+ case 6:
+ base_addr += gprs->rsi;
+ break;
+ case 7:
+ base_addr += gprs->rdi;
+ break;
+ }
+
+ }
+
+
+ if (mod_mode == DISP8) {
+ base_addr += (uchar_t)*(instr_cursor);
+ instr_cursor += 1;
+ } else if (mod_mode == DISP32) {
+ base_addr += (uint_t)*(instr_cursor);
+ instr_cursor += 4;
}
- break;
- case 6:
- base_addr += gprs->rsi;
- break;
- case 7:
- base_addr += gprs->rdi;
- break;
- }
-
- }
-
-
- if (mod_mode == DISP8) {
- base_addr += (uchar_t)*(instr_cursor);
- instr_cursor += 1;
- } else if (mod_mode == DISP32) {
- base_addr += (uint_t)*(instr_cursor);
- instr_cursor += 4;
- }
- *first_operand = base_addr;
- }
+ *first_operand = base_addr;
+ }
- *offset += (instr_cursor - modrm_instr);
+ *offset += (instr_cursor - modrm_instr);
- *second_operand = decode_register(gprs, modrm->reg, reg_size);
+ *second_operand = decode_register(gprs, modrm->reg, reg_size);
- return addr_type;
+ return addr_type;
}
struct vmm_dev_mgr {
- uint_t num_devs;
- struct list_head dev_list;
+ uint_t num_devs;
+ struct list_head dev_list;
- uint_t num_io_hooks;
- struct list_head io_hooks;
+ uint_t num_io_hooks;
+ struct list_head io_hooks;
- uint_t num_mem_hooks;
- struct list_head mem_hooks;
+ uint_t num_mem_hooks;
+ struct list_head mem_hooks;
- uint_t num_msr_hook;
- struct list_head msr_hooks;
+ uint_t num_msr_hook;
+ struct list_head msr_hooks;
};
struct dev_io_hook {
- ushort_t port;
+ ushort_t port;
- int (*read)(ushort_t port, void * dst, uint_t length, struct vm_device * dev);
- int (*write)(ushort_t port, void * src, uint_t length, struct vm_device * dev);
+ int (*read)(ushort_t port, void * dst, uint_t length, struct vm_device * dev);
+ int (*write)(ushort_t port, void * src, uint_t length, struct vm_device * dev);
- struct vm_device * dev;
+ struct vm_device * dev;
- // Do not touch anything below this
+ // Do not touch anything below this
- struct list_head dev_list;
- struct list_head mgr_list;
+ struct list_head dev_list;
+ struct list_head mgr_list;
};
struct dev_mem_hook {
- void *addr_start;
- void *addr_end;
+ void *addr_start;
+ void *addr_end;
- struct vm_device * dev;
+ struct vm_device * dev;
- // Do not touch anything below this
- struct list_head dev_list;
- struct list_head mgr_list;
+ // Do not touch anything below this
+ struct list_head dev_list;
+ struct list_head mgr_list;
};
int v3_emulate_write_op(struct guest_info * info, addr_t write_gva, addr_t write_gpa, addr_t dst_addr,
- int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
- void * priv_data);
+ int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
+ void * priv_data);
int v3_emulate_read_op(struct guest_info * info, addr_t read_gva, addr_t read_gpa, addr_t src_addr,
int (*read_fn)(addr_t guest_addr, void * dst, uint_t length, void * priv_data),
#define DEFINE_HASHTABLE_INSERT(fnname, keytype, valuetype) \
- static int fnname (struct hashtable * htable, keytype key, valuetype value) { \
- return hashtable_insert(htable, (addr_t)key, (addr_t)value); \
- }
+ static int fnname (struct hashtable * htable, keytype key, valuetype value) { \
+ return hashtable_insert(htable, (addr_t)key, (addr_t)value); \
+ }
#define DEFINE_HASHTABLE_SEARCH(fnname, keytype, valuetype) \
- static valuetype * fnname (struct hashtable * htable, keytype key) { \
- return (valuetype *) (hashtable_search(htable, (addr_t)key)); \
- }
+ static valuetype * fnname (struct hashtable * htable, keytype key) { \
+ return (valuetype *) (hashtable_search(htable, (addr_t)key)); \
+ }
#define DEFINE_HASHTABLE_REMOVE(fnname, keytype, valuetype, free_key) \
- static valuetype * fnname (struct hashtable * htable, keytype key) { \
- return (valuetype *) (hashtable_remove(htable, (addr_t)key, free_key)); \
- }
+ static valuetype * fnname (struct hashtable * htable, keytype key) { \
+ return (valuetype *) (hashtable_remove(htable, (addr_t)key, free_key)); \
+ }
int hashtable_dec(struct hashtable * htable, addr_t key, addr_t value);
- /* ************ */
- /* ITERATOR API */
+/* ************ */
+/* ITERATOR API */
/* ************ */
#define DEFINE_HASHTABLE_ITERATOR_SEARCH(fnname, keytype) \
- int fnname (struct hashtable_itr * iter, struct hashtable * htable, keytype * key) { \
- return (hashtable_iterator_search(iter, htable, key)); \
- }
+ int fnname (struct hashtable_itr * iter, struct hashtable * htable, keytype * key) { \
+ return (hashtable_iterator_search(iter, htable, key)); \
+ }
/* This struct is only concrete here to allow the inlining of two of the
* accessor functions. */
struct hashtable_iter {
- struct hashtable * htable;
- struct hash_entry * entry;
- struct hash_entry * parent;
- uint_t index;
+ struct hashtable * htable;
+ struct hash_entry * entry;
+ struct hash_entry * parent;
+ uint_t index;
};
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
+ */
struct v3_keyboard_event {
- unsigned char status;
- unsigned char scan_code;
+ unsigned char status;
+ unsigned char scan_code;
};
struct v3_mouse_event {
- unsigned char data[3];
+ unsigned char data[3];
};
struct v3_timer_event {
- unsigned int period_us;
+ unsigned int period_us;
};
#ifdef __V3VEE__
union v3_host_event_handler {
- int (*keyboard_handler)(struct guest_info * info, struct v3_keyboard_event * evt, void * priv_data);
- int (*mouse_handler)(struct guest_info * info, struct v3_mouse_event * evt, void * priv_data);
- int (*timer_handler)(struct guest_info * info, struct v3_timer_event * evt, void * priv_data);
+ int (*keyboard_handler)(struct guest_info * info, struct v3_keyboard_event * evt, void * priv_data);
+ int (*mouse_handler)(struct guest_info * info, struct v3_mouse_event * evt, void * priv_data);
+ int (*timer_handler)(struct guest_info * info, struct v3_timer_event * evt, void * priv_data);
};
struct v3_host_event_hook {
- union v3_host_event_handler cb;
- void * private_data;
- struct list_head link;
+ union v3_host_event_handler cb;
+ void * private_data;
+ struct list_head link;
};
struct v3_host_events {
- struct list_head keyboard_events;
- struct list_head mouse_events;
- struct list_head timer_events;
+ struct list_head keyboard_events;
+ struct list_head mouse_events;
+ struct list_head timer_events;
};
#define MAKE_1OP_8FLAGS_INST(iname) static inline void iname##8(addr_t * dst, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %2; " \
- "popf; " \
- #iname"b %0; " \
- "pushf; " \
- "pop %1; " \
- "popf; " \
- : "=q"(*(uint8_t *)dst),"=q"(*flags) \
- : "q"(*flags), "0"(*(uint8_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
+ asm volatile ( \
+ "pushf; " \
+ "push %2; " \
+ "popf; " \
+ #iname"b %0; " \
+ "pushf; " \
+ "pop %1; " \
+ "popf; " \
+ : "=q"(*(uint8_t *)dst),"=q"(*flags) \
+ : "q"(*flags), "0"(*(uint8_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
\
- }
+ }
#define MAKE_1OP_16FLAGS_INST(iname) static inline void iname##16(addr_t * dst, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %2; " \
- "popf; " \
- #iname"w %0; " \
- "pushf; " \
- "pop %1; " \
- "popf; " \
- : "=q"(*(uint16_t *)dst),"=q"(*flags) \
- : "q"(*flags), "0"(*(uint16_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
+ asm volatile ( \
+ "pushf; " \
+ "push %2; " \
+ "popf; " \
+ #iname"w %0; " \
+ "pushf; " \
+ "pop %1; " \
+ "popf; " \
+ : "=q"(*(uint16_t *)dst),"=q"(*flags) \
+ : "q"(*flags), "0"(*(uint16_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
\
- }
+ }
#define MAKE_1OP_32FLAGS_INST(iname) static inline void iname##32(addr_t * dst, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %2; " \
- "popf; " \
- #iname"l %0; " \
- "pushf; " \
- "pop %1; " \
- "popf; " \
- : "=q"(*(uint32_t *)dst),"=q"(*flags) \
- : "q"(*flags), "0"(*(uint32_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
+ asm volatile ( \
+ "pushf; " \
+ "push %2; " \
+ "popf; " \
+ #iname"l %0; " \
+ "pushf; " \
+ "pop %1; " \
+ "popf; " \
+ : "=q"(*(uint32_t *)dst),"=q"(*flags) \
+ : "q"(*flags), "0"(*(uint32_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
\
- }
+ }
#define MAKE_1OP_64FLAGS_INST(iname) static inline void iname##64(addr_t * dst, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushfq; " \
- "push %2; " \
- "popfq; " \
- #iname"q %0; " \
- "pushfq; " \
- "pop %1; " \
- "popfq; " \
- : "=q"(*(uint64_t *)dst),"=q"(*flags) \
- : "q"(*flags), "0"(*(uint64_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
+ asm volatile ( \
+ "pushfq; " \
+ "push %2; " \
+ "popfq; " \
+ #iname"q %0; " \
+ "pushfq; " \
+ "pop %1; " \
+ "popfq; " \
+ : "=q"(*(uint64_t *)dst),"=q"(*flags) \
+ : "q"(*flags), "0"(*(uint64_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
\
- }
+ }
#define MAKE_1OP_8_INST(iname) static inline void iname##8(addr_t * dst) { \
- asm volatile ( \
- #iname"b %0; " \
- : "=q"(*(uint8_t *)dst) \
- : "0"(*(uint8_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"b %0; " \
+ : "=q"(*(uint8_t *)dst) \
+ : "0"(*(uint8_t *)dst) \
+ ); \
+ }
#define MAKE_1OP_16_INST(iname) static inline void iname##16(addr_t * dst) { \
- asm volatile ( \
- #iname"w %0; " \
- : "=q"(*(uint16_t *)dst) \
- : "0"(*(uint16_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"w %0; " \
+ : "=q"(*(uint16_t *)dst) \
+ : "0"(*(uint16_t *)dst) \
+ ); \
+ }
#define MAKE_1OP_32_INST(iname) static inline void iname##32(addr_t * dst) { \
- asm volatile ( \
- #iname"l %0; " \
- : "=q"(*(uint32_t *)dst) \
- : "0"(*(uint32_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"l %0; " \
+ : "=q"(*(uint32_t *)dst) \
+ : "0"(*(uint32_t *)dst) \
+ ); \
+ }
#define MAKE_1OP_64_INST(iname) static inline void iname##64(addr_t * dst) { \
- asm volatile ( \
- #iname"q %0; " \
- : "=q"(*(uint64_t *)dst) \
- : "0"(*(uint64_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"q %0; " \
+ : "=q"(*(uint64_t *)dst) \
+ : "0"(*(uint64_t *)dst) \
+ ); \
+ }
#define MAKE_2OP_64FLAGS_INST(iname) static inline void iname##64(addr_t * dst, addr_t * src, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushfq\r\n" \
- "push %3\r\n" \
- "popfq\r\n" \
- #iname"q %2, %0\r\n" \
- "pushfq\r\n" \
- "pop %1\r\n" \
- "popfq\r\n" \
- : "=q"(*(uint64_t *)dst),"=q"(*flags) \
- : "q"(*(uint64_t *)src),"q"(*flags), "0"(*(uint64_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
+ asm volatile ( \
+ "pushfq\r\n" \
+ "push %3\r\n" \
+ "popfq\r\n" \
+ #iname"q %2, %0\r\n" \
+ "pushfq\r\n" \
+ "pop %1\r\n" \
+ "popfq\r\n" \
+ : "=q"(*(uint64_t *)dst),"=q"(*flags) \
+ : "q"(*(uint64_t *)src),"q"(*flags), "0"(*(uint64_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
\
- }
+ }
#define MAKE_2OP_32FLAGS_INST(iname) static inline void iname##32(addr_t * dst, addr_t * src, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %3; " \
- "popf; " \
- #iname"l %2, %0; " \
- "pushf; " \
- "pop %1; " \
- "popf; " \
- : "=q"(*(uint32_t *)dst),"=q"(*flags) \
- : "q"(*(uint32_t *)src),"q"(*flags), "0"(*(uint32_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %3; " \
+ "popf; " \
+ #iname"l %2, %0; " \
+ "pushf; " \
+ "pop %1; " \
+ "popf; " \
+ : "=q"(*(uint32_t *)dst),"=q"(*flags) \
+ : "q"(*(uint32_t *)src),"q"(*flags), "0"(*(uint32_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_16FLAGS_INST(iname) static inline void iname##16(addr_t * dst, addr_t * src, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %3; " \
- "popf; " \
- #iname"w %2, %0; " \
- "pushf; " \
- "pop %1; " \
- "popf; " \
- : "=q"(*(uint16_t *)dst),"=q"(*flags) \
- : "q"(*(uint16_t *)src),"q"(*flags), "0"(*(uint16_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %3; " \
+ "popf; " \
+ #iname"w %2, %0; " \
+ "pushf; " \
+ "pop %1; " \
+ "popf; " \
+ : "=q"(*(uint16_t *)dst),"=q"(*flags) \
+ : "q"(*(uint16_t *)src),"q"(*flags), "0"(*(uint16_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_8FLAGS_INST(iname) static inline void iname##8(addr_t * dst, addr_t * src, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %3; " \
- "popf; " \
- #iname"b %2, %0; " \
- "pushf; " \
- "pop %1; " \
- "popf; " \
- : "=q"(*(uint8_t *)dst),"=q"(*flags) \
- : "q"(*(uint8_t *)src),"q"(*flags), "0"(*(uint8_t *)dst) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %3; " \
+ "popf; " \
+ #iname"b %2, %0; " \
+ "pushf; " \
+ "pop %1; " \
+ "popf; " \
+ : "=q"(*(uint8_t *)dst),"=q"(*flags) \
+ : "q"(*(uint8_t *)src),"q"(*flags), "0"(*(uint8_t *)dst) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_64STR_INST(iname) static inline void iname##64(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushfq; " \
- "pushq %4; " \
- "popfq; " \
- "rep; " \
- #iname"q; " \
- "pushfq; " \
- "popq %0; " \
- "popfq; " \
- : "=q"(*flags) \
- : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushfq; " \
+ "pushq %4; " \
+ "popfq; " \
+ "rep; " \
+ #iname"q; " \
+ "pushfq; " \
+ "popq %0; " \
+ "popfq; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_32STR_INST(iname) static inline void iname##32(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %4; " \
- "popf; " \
- "rep; " \
- #iname"l; " \
- "pushf; " \
- "pop %0; " \
- "popf; " \
- : "=q"(*flags) \
- : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %4; " \
+ "popf; " \
+ "rep; " \
+ #iname"l; " \
+ "pushf; " \
+ "pop %0; " \
+ "popf; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_16STR_INST(iname) static inline void iname##16(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %4; " \
- "popf; " \
- "rep; " \
- #iname"w; " \
- "pushf; " \
- "pop %0; " \
- "popf; " \
- : "=q"(*flags) \
- : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %4; " \
+ "popf; " \
+ "rep; " \
+ #iname"w; " \
+ "pushf; " \
+ "pop %0; " \
+ "popf; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_8STR_INST(iname) static inline void iname##8(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %4; " \
- "popf; " \
- "rep; " \
- #iname"b; " \
- "pushf; " \
- "pop %0; " \
- "popf; " \
- : "=q"(*flags) \
- : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %4; " \
+ "popf; " \
+ "rep; " \
+ #iname"b; " \
+ "pushf; " \
+ "pop %0; " \
+ "popf; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"S"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_1OP_64STR_INST(iname) static inline void iname##64(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushfq; " \
- "pushq %4; " \
- "popfq; " \
- "rep; " \
- #iname"q; " \
- "pushfq; " \
- "popq %0; " \
- "popfq; " \
- : "=q"(*flags) \
- : "D"(*dst),"a"(*src),"c"(*ecx),"q"(*flags) \
- ); \
+ asm volatile ( \
+ "pushfq; " \
+ "pushq %4; " \
+ "popfq; " \
+ "rep; " \
+ #iname"q; " \
+ "pushfq; " \
+ "popq %0; " \
+ "popfq; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"a"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
\
- *flags |= flags_rsvd; \
- }
+ *flags |= flags_rsvd; \
+ }
#define MAKE_1OP_32STR_INST(iname) static inline void iname##32(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %4; " \
- "popf; " \
- "rep; " \
- #iname"l; " \
- "pushf; " \
- "pop %0; " \
- "popf; " \
- : "=q"(*flags) \
- : "D"(*(uint32_t *)dst),"a"(*(uint32_t *)src),"c"(*(uint32_t *)ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %4; " \
+ "popf; " \
+ "rep; " \
+ #iname"l; " \
+ "pushf; " \
+ "pop %0; " \
+ "popf; " \
+ : "=q"(*flags) \
+ : "D"(*(uint32_t *)dst),"a"(*(uint32_t *)src),"c"(*(uint32_t *)ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_1OP_16STR_INST(iname) static inline void iname##16(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %4; " \
- "popf; " \
- "rep; " \
- #iname"w; " \
- "pushf; " \
- "pop %0; " \
- "popf; " \
- : "=q"(*flags) \
- : "D"(*dst),"a"(*src),"c"(*ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %4; " \
+ "popf; " \
+ "rep; " \
+ #iname"w; " \
+ "pushf; " \
+ "pop %0; " \
+ "popf; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"a"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_1OP_8STR_INST(iname) static inline void iname##8(addr_t * dst, \
addr_t * src, \
addr_t * ecx, addr_t * flags) { \
- /* Some of the flags values are not copied out in a pushf, we save them here */ \
- addr_t flags_rsvd = *flags & ~0xfffe7fff; \
+ /* Some of the flags values are not copied out in a pushf, we save them here */ \
+ addr_t flags_rsvd = *flags & ~0xfffe7fff; \
\
- asm volatile ( \
- "pushf; " \
- "push %4; " \
- "popf; " \
- "rep; " \
- #iname"b; " \
- "pushf; " \
- "pop %0; " \
- "popf; " \
- : "=q"(*flags) \
- : "D"(*dst),"a"(*src),"c"(*ecx),"q"(*flags) \
- ); \
- *flags |= flags_rsvd; \
- }
+ asm volatile ( \
+ "pushf; " \
+ "push %4; " \
+ "popf; " \
+ "rep; " \
+ #iname"b; " \
+ "pushf; " \
+ "pop %0; " \
+ "popf; " \
+ : "=q"(*flags) \
+ : "D"(*dst),"a"(*src),"c"(*ecx),"q"(*flags) \
+ ); \
+ *flags |= flags_rsvd; \
+ }
#define MAKE_2OP_64_INST(iname) static inline void iname##64(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"q %1, %0; " \
- : "=q"(*(uint64_t *)dst) \
- : "q"(*(uint64_t *)src), "0"(*(uint64_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"q %1, %0; " \
+ : "=q"(*(uint64_t *)dst) \
+ : "q"(*(uint64_t *)src), "0"(*(uint64_t *)dst) \
+ ); \
+ }
#define MAKE_2OP_32_INST(iname) static inline void iname##32(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"l %1, %0; " \
- : "=q"(*(uint32_t *)dst) \
- : "q"(*(uint32_t *)src), "0"(*(uint32_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"l %1, %0; " \
+ : "=q"(*(uint32_t *)dst) \
+ : "q"(*(uint32_t *)src), "0"(*(uint32_t *)dst) \
+ ); \
+ }
#define MAKE_2OP_16_INST(iname) static inline void iname##16(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"w %1, %0; " \
- : "=q"(*(uint16_t *)dst) \
- : "q"(*(uint16_t *)src), "0"(*(uint16_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"w %1, %0; " \
+ : "=q"(*(uint16_t *)dst) \
+ : "q"(*(uint16_t *)src), "0"(*(uint16_t *)dst) \
+ ); \
+ }
#define MAKE_2OP_8_INST(iname) static inline void iname##8(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"b %1, %0; " \
- : "=q"(*(uint8_t *)dst) \
- : "q"(*(uint8_t *)src), "0"(*(uint8_t *)dst) \
- ); \
- }
+ asm volatile ( \
+ #iname"b %1, %0; " \
+ : "=q"(*(uint8_t *)dst) \
+ : "q"(*(uint8_t *)src), "0"(*(uint8_t *)dst) \
+ ); \
+ }
#define MAKE_2OP_8EXT_INST(iname) static inline void iname##8(addr_t * dst, addr_t * src, uint_t dst_len) { \
- if (dst_len == 2) { \
- asm volatile ( \
- #iname" %1, %0; " \
- : "=q"(*(uint16_t *)dst) \
- : "q"(*(uint8_t *)src), "0"(*(uint16_t *)dst) \
- ); \
- } else if (dst_len == 4) { \
- asm volatile ( \
- #iname" %1, %0; " \
- : "=q"(*(uint32_t *)dst) \
- : "q"(*(uint8_t *)src), "0"(*(uint32_t *)dst) \
- ); \
- } else if (dst_len == 8) { \
- asm volatile ( \
- #iname" %1, %0; " \
- : "=q"(*(uint64_t *)dst) \
- : "q"(*(uint8_t *)src), "0"(*(uint64_t *)dst) \
- ); \
- } \
- }
+ if (dst_len == 2) { \
+ asm volatile ( \
+ #iname" %1, %0; " \
+ : "=q"(*(uint16_t *)dst) \
+ : "q"(*(uint8_t *)src), "0"(*(uint16_t *)dst) \
+ ); \
+ } else if (dst_len == 4) { \
+ asm volatile ( \
+ #iname" %1, %0; " \
+ : "=q"(*(uint32_t *)dst) \
+ : "q"(*(uint8_t *)src), "0"(*(uint32_t *)dst) \
+ ); \
+ } else if (dst_len == 8) { \
+ asm volatile ( \
+ #iname" %1, %0; " \
+ : "=q"(*(uint64_t *)dst) \
+ : "q"(*(uint8_t *)src), "0"(*(uint64_t *)dst) \
+ ); \
+ } \
+ }
#define MAKE_2OP_16EXT_INST(iname) static inline void iname##16(addr_t * dst, addr_t * src, uint_t dst_len) { \
- if (dst_len == 4) { \
- asm volatile ( \
- #iname" %1, %0; " \
- : "=q"(*(uint32_t *)dst) \
- : "q"(*(uint16_t *)src), "0"(*(uint32_t *)dst) \
- ); \
- } else if (dst_len == 8) { \
- asm volatile ( \
- #iname" %1, %0; " \
- : "=q"(*(uint64_t *)dst) \
- : "q"(*(uint16_t *)src), "0"(*(uint64_t *)dst) \
- ); \
- } \
- }
+ if (dst_len == 4) { \
+ asm volatile ( \
+ #iname" %1, %0; " \
+ : "=q"(*(uint32_t *)dst) \
+ : "q"(*(uint16_t *)src), "0"(*(uint32_t *)dst) \
+ ); \
+ } else if (dst_len == 8) { \
+ asm volatile ( \
+ #iname" %1, %0; " \
+ : "=q"(*(uint64_t *)dst) \
+ : "q"(*(uint16_t *)src), "0"(*(uint64_t *)dst) \
+ ); \
+ } \
+ }
#define MAKE_2OUT_64_INST(iname) static inline void iname##64(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"q %1, %0; " \
- : "=q"(*(uint64_t *)dst), "=q"(*(uint64_t *)src) \
- : "0"(*(uint64_t *)dst), "1"(*(uint64_t *)src) \
- ); \
- }
+ asm volatile ( \
+ #iname"q %1, %0; " \
+ : "=q"(*(uint64_t *)dst), "=q"(*(uint64_t *)src) \
+ : "0"(*(uint64_t *)dst), "1"(*(uint64_t *)src) \
+ ); \
+ }
#define MAKE_2OUT_32_INST(iname) static inline void iname##32(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"l %1, %0; " \
- : "=q"(*(uint32_t *)dst), "=q"(*(uint32_t *)src) \
- : "0"(*(uint32_t *)dst), "1"(*(uint32_t *)src) \
- ); \
- }
+ asm volatile ( \
+ #iname"l %1, %0; " \
+ : "=q"(*(uint32_t *)dst), "=q"(*(uint32_t *)src) \
+ : "0"(*(uint32_t *)dst), "1"(*(uint32_t *)src) \
+ ); \
+ }
#define MAKE_2OUT_16_INST(iname) static inline void iname##16(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"w %1, %0; " \
- : "=q"(*(uint16_t *)dst), "=q"(*(uint16_t *)src) \
- : "0"(*(uint16_t *)dst), "1"(*(uint16_t *)src) \
- ); \
- }
+ asm volatile ( \
+ #iname"w %1, %0; " \
+ : "=q"(*(uint16_t *)dst), "=q"(*(uint16_t *)src) \
+ : "0"(*(uint16_t *)dst), "1"(*(uint16_t *)src) \
+ ); \
+ }
#define MAKE_2OUT_8_INST(iname) static inline void iname##8(addr_t * dst, addr_t * src) { \
- asm volatile ( \
- #iname"b %1, %0; " \
- : "=q"(*(uint8_t *)dst), "=q"(*(uint8_t *)src) \
- : "0"(*(uint8_t *)dst), "1"(*(uint8_t *)src) \
- ); \
- }
+ asm volatile ( \
+ #iname"b %1, %0; " \
+ : "=q"(*(uint8_t *)dst), "=q"(*(uint8_t *)src) \
+ : "0"(*(uint8_t *)dst), "1"(*(uint8_t *)src) \
+ ); \
+ }
struct v3_irq_hook {
- int (*handler)(struct guest_info * info, struct v3_interrupt * intr, void * priv_data);
- void * priv_data;
+ int (*handler)(struct guest_info * info, struct v3_interrupt * intr, void * priv_data);
+ void * priv_data;
};
struct v3_intr_state {
- /* We need to rework the exception state, to handle stacking */
- uint_t excp_pending;
- uint_t excp_num;
- uint_t excp_error_code_valid : 1;
- uint_t excp_error_code;
+ /* We need to rework the exception state, to handle stacking */
+ uint_t excp_pending;
+ uint_t excp_num;
+ uint_t excp_error_code_valid : 1;
+ uint_t excp_error_code;
- struct list_head controller_list;
+ struct list_head controller_list;
- /* some way to get the [A]PIC intr */
- struct v3_irq_hook * hooks[256];
+ /* some way to get the [A]PIC intr */
+ struct v3_irq_hook * hooks[256];
};
struct intr_ctrl_ops {
- int (*intr_pending)(void * private_data);
- int (*get_intr_number)(void * private_data);
- int (*raise_intr)(void * private_data, int irq);
- int (*lower_intr)(void * private_data, int irq);
- int (*begin_irq)(void * private_data, int irq);
+ int (*intr_pending)(void * private_data);
+ int (*get_intr_number)(void * private_data);
+ int (*raise_intr)(void * private_data, int irq);
+ int (*lower_intr)(void * private_data, int irq);
+ int (*begin_irq)(void * private_data, int irq);
};
int v3_injecting_intr(struct guest_info * info, uint_t intr_num, intr_type_t type);
/*
-int start_irq(struct vm_intr * intr);
-int end_irq(struct vm_intr * intr, int irq);
+ int start_irq(struct vm_intr * intr);
+ int end_irq(struct vm_intr * intr, int irq);
*/
struct v3_io_hook {
- ushort_t port;
+ ushort_t port;
- // Reads data into the IO port (IN, INS)
- int (*read)(ushort_t port, void * dst, uint_t length, void * priv_data);
+ // Reads data into the IO port (IN, INS)
+ int (*read)(ushort_t port, void * dst, uint_t length, void * priv_data);
- // Writes data from the IO port (OUT, OUTS)
- int (*write)(ushort_t port, void * src, uint_t length, void * priv_data);
+ // Writes data from the IO port (OUT, OUTS)
+ int (*write)(ushort_t port, void * src, uint_t length, void * priv_data);
- void * priv_data;
+ void * priv_data;
- struct rb_node tree_node;
+ struct rb_node tree_node;
};
#ifdef __V3_32BIT__
void __inline__ v3_cpuid(uint_t target, addr_t * eax, addr_t * ebx, addr_t * ecx, addr_t * edx) {
- __asm__ __volatile__ (
- "pushl %%ebx\n\t"
- "cpuid\n\t"
- "movl %%ebx, %%esi\n\t"
- "popl %%ebx\n\t"
- : "=a" (*eax), "=S" (*ebx), "=c" (*ecx), "=d" (*edx)
- : "a" (target)
- );
- return;
+ __asm__ __volatile__ (
+ "pushl %%ebx\n\t"
+ "cpuid\n\t"
+ "movl %%ebx, %%esi\n\t"
+ "popl %%ebx\n\t"
+ : "=a" (*eax), "=S" (*ebx), "=c" (*ecx), "=d" (*edx)
+ : "a" (target)
+ );
+ return;
}
#elif __V3_64BIT__
void __inline__ v3_cpuid(uint_t target, addr_t * eax, addr_t * ebx, addr_t * ecx, addr_t * edx) {
- __asm__ __volatile__ (
- "pushq %%rbx\n\t"
- "cpuid\n\t"
- "movq %%rbx, %%rsi\n\t"
- "popq %%rbx\n\t"
- : "=a" (*eax), "=S" (*ebx), "=c" (*ecx), "=d" (*edx)
- : "a" (target)
- );
- return;
+ __asm__ __volatile__ (
+ "pushq %%rbx\n\t"
+ "cpuid\n\t"
+ "movq %%rbx, %%rsi\n\t"
+ "popq %%rbx\n\t"
+ : "=a" (*eax), "=S" (*ebx), "=c" (*ecx), "=d" (*edx)
+ : "a" (target)
+ );
+ return;
}
#endif
void __inline__ v3_set_msr(uint_t msr, uint_t high_byte, uint_t low_byte) {
- __asm__ __volatile__ (
- "wrmsr"
- :
- : "c" (msr), "d" (high_byte), "a" (low_byte)
- );
+ __asm__ __volatile__ (
+ "wrmsr"
+ :
+ : "c" (msr), "d" (high_byte), "a" (low_byte)
+ );
}
void __inline__ v3_get_msr(uint_t msr, uint_t * high_byte, uint_t * low_byte) {
- __asm__ __volatile__ (
- "rdmsr"
- : "=d" (*high_byte), "=a" (*low_byte)
- : "c" (msr)
- );
+ __asm__ __volatile__ (
+ "rdmsr"
+ : "=d" (*high_byte), "=a" (*low_byte)
+ : "c" (msr)
+ );
}
void __inline__ v3_enable_ints() {
- __asm__ __volatile__ ("sti");
+ __asm__ __volatile__ ("sti");
}
void __inline__ v3_disable_ints() {
- __asm__ __volatile__ ("cli");
+ __asm__ __volatile__ ("cli");
}
// These are the types of physical memory address regions
// from the perspective of the HOST
typedef enum shdw_region_type {
- SHDW_REGION_INVALID, // This region is INVALID (this is a return type to denote errors)
- SHDW_REGION_WRITE_HOOK, // This region is mapped as read-only (page faults on write)
- SHDW_REGION_FULL_HOOK, // This region is mapped as not present (always generate page faults)
- SHDW_REGION_ALLOCATED, // Region is a section of host memory
+ SHDW_REGION_INVALID, // This region is INVALID (this is a return type to denote errors)
+ SHDW_REGION_WRITE_HOOK, // This region is mapped as read-only (page faults on write)
+ SHDW_REGION_FULL_HOOK, // This region is mapped as not present (always generate page faults)
+ SHDW_REGION_ALLOCATED, // Region is a section of host memory
} v3_shdw_region_type_t;
typedef struct v3_shdw_map {
- addr_t hook_hva;
+ addr_t hook_hva;
- struct rb_root shdw_regions;
+ struct rb_root shdw_regions;
} v3_shdw_map_t;
struct v3_shadow_region {
- addr_t guest_start;
- addr_t guest_end;
+ addr_t guest_start;
+ addr_t guest_end;
- v3_shdw_region_type_t host_type;
+ v3_shdw_region_type_t host_type;
- addr_t host_addr; // This either points to a host address mapping
+ addr_t host_addr; // This either points to a host address mapping
- // Called when data is read from a memory page
- int (*read_hook)(addr_t guest_addr, void * dst, uint_t length, void * priv_data);
- // Called when data is written to a memory page
- int (*write_hook)(addr_t guest_addr, void * src, uint_t length, void * priv_data);
+ // Called when data is read from a memory page
+ int (*read_hook)(addr_t guest_addr, void * dst, uint_t length, void * priv_data);
+ // Called when data is written to a memory page
+ int (*write_hook)(addr_t guest_addr, void * src, uint_t length, void * priv_data);
- void * priv_data;
+ void * priv_data;
- struct rb_node tree_node;
+ struct rb_node tree_node;
};
struct v3_msr {
- union {
- ullong_t value;
+ union {
+ ullong_t value;
- struct {
- uint_t lo;
- uint_t hi;
+ struct {
+ uint_t lo;
+ uint_t hi;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
typedef struct v3_msr v3_msr_t;
struct v3_msr_hook {
- uint_t msr;
+ uint_t msr;
- int (*read)(uint_t msr, struct v3_msr * dst, void * priv_data);
- int (*write)(uint_t msr, struct v3_msr src, void * priv_data);
+ int (*read)(uint_t msr, struct v3_msr * dst, void * priv_data);
+ int (*write)(uint_t msr, struct v3_msr src, void * priv_data);
- void * priv_data;
+ void * priv_data;
- struct list_head link;
+ struct list_head link;
};
struct v3_msr_hook;
struct v3_msr_map {
- uint_t num_hooks;
- struct list_head hook_list;
+ uint_t num_hooks;
+ struct list_head hook_list;
};
guest-visible paging state
- This is the state that the guest thinks the machine is using
- It consists of
- - guest physical memory
- The physical memory addresses the guest is allowed to use
- (see shadow page maps, below)
- - guest page tables
- (we care about when the current one changes)
- - guest paging registers (these are never written to hardware)
- CR0
- CR3
+This is the state that the guest thinks the machine is using
+It consists of
+- guest physical memory
+The physical memory addresses the guest is allowed to use
+(see shadow page maps, below)
+- guest page tables
+(we care about when the current one changes)
+- guest paging registers (these are never written to hardware)
+CR0
+CR3
shadow paging state
- This the state that the machine will actually use when the guest
- is running. It consists of:
- - current shadow page table
- This is the page table actually useed when the guest is running.
- It is changed/regenerated when the guest page table changes
- It mostly reflects the guest page table, except that it restricts
- physical addresses to those the VMM allocates to the guest.
- - shadow page maps
- This is a mapping from guest physical memory addresses to
- the current location of the guest physical memory content.
- It maps from regions of physical memory addresses to regions
- located in physical memory or elsewhere.
- (8192,16384) -> MEM(8912,...)
- (0,8191) -> DISK(65536,..)
- - guest paging registers (these are written to guest state)
- CR0
- CR3
+This the state that the machine will actually use when the guest
+is running. It consists of:
+- current shadow page table
+This is the page table actually useed when the guest is running.
+It is changed/regenerated when the guest page table changes
+It mostly reflects the guest page table, except that it restricts
+physical addresses to those the VMM allocates to the guest.
+- shadow page maps
+This is a mapping from guest physical memory addresses to
+the current location of the guest physical memory content.
+It maps from regions of physical memory addresses to regions
+located in physical memory or elsewhere.
+(8192,16384) -> MEM(8912,...)
+(0,8191) -> DISK(65536,..)
+- guest paging registers (these are written to guest state)
+CR0
+CR3
host paging state
- This is the state we expect to be operative when the VMM is running.
- Typically, this is set up by the host os into which we have embedded
- the VMM, but we include the description here for clarity.
- - current page table
- This is the page table we use when we are executing in
- the VMM (or the host os)
- - paging regisers
- CR0
- CR3
+This is the state we expect to be operative when the VMM is running.
+Typically, this is set up by the host os into which we have embedded
+the VMM, but we include the description here for clarity.
+- current page table
+This is the page table we use when we are executing in
+the VMM (or the host os)
+- paging regisers
+CR0
+CR3
The reason why the shadow paging state and the host paging state are
typedef enum {PT_ENTRY_NOT_PRESENT, PT_ENTRY_LARGE_PAGE, PT_ENTRY_PAGE} pt_entry_type_t;
+
typedef enum {PT_ACCESS_OK, PT_ACCESS_NOT_PRESENT, PT_ACCESS_WRITE_ERROR, PT_ACCESS_USER_ERROR} pt_access_status_t;
typedef struct gen_pt {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
} __attribute__((packed)) gen_pt_t;
typedef struct pde32 {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t reserved : 1;
- uint_t large_page : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t pt_base_addr : 20;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t reserved : 1;
+ uint_t large_page : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t pt_base_addr : 20;
} __attribute__((packed)) pde32_t;
typedef struct pde32_4MB {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t large_page : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t pat : 1;
- uint_t rsvd : 9;
- uint_t page_base_addr : 10;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t large_page : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t pat : 1;
+ uint_t rsvd : 9;
+ uint_t page_base_addr : 10;
} __attribute__((packed)) pde32_4MB_t;
typedef struct pte32 {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t pte_attr : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t page_base_addr : 20;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t pte_attr : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t page_base_addr : 20;
} __attribute__((packed)) pte32_t;
/* ***** */
/* 32 bit PAE PAGE STRUCTURES */
typedef struct pdpe32pae {
- uint_t present : 1;
- uint_t rsvd : 2; // MBZ
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t avail : 1;
- uint_t rsvd2 : 2; // MBZ
- uint_t vmm_info : 3;
- uint_t pd_base_addr : 24;
- uint_t rsvd3 : 28; // MBZ
+ uint_t present : 1;
+ uint_t rsvd : 2; // MBZ
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t avail : 1;
+ uint_t rsvd2 : 2; // MBZ
+ uint_t vmm_info : 3;
+ uint_t pd_base_addr : 24;
+ uint_t rsvd3 : 28; // MBZ
} __attribute__((packed)) pdpe32pae_t;
typedef struct pde32pae {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t avail : 1;
- uint_t large_page : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t pt_base_addr : 24;
- uint_t rsvd : 28;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t avail : 1;
+ uint_t large_page : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t pt_base_addr : 24;
+ uint_t rsvd : 28;
} __attribute__((packed)) pde32pae_t;
typedef struct pde32pae_2MB {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t one : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t pat : 1;
- uint_t rsvd : 8;
- uint_t page_base_addr : 15;
- uint_t rsvd2 : 28;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t one : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t pat : 1;
+ uint_t rsvd : 8;
+ uint_t page_base_addr : 15;
+ uint_t rsvd2 : 28;
} __attribute__((packed)) pde32pae_2MB_t;
typedef struct pte32pae {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t pte_attr : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t page_base_addr : 24;
- uint_t rsvd : 28;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t pte_attr : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t page_base_addr : 24;
+ uint_t rsvd : 28;
} __attribute__((packed)) pte32pae_t;
/* LONG MODE 64 bit PAGE STRUCTURES */
typedef struct pml4e64 {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t reserved : 1;
- uint_t zero : 2;
- uint_t vmm_info : 3;
- ullong_t pdp_base_addr : 40;
- uint_t available : 11;
- uint_t no_execute : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t reserved : 1;
+ uint_t zero : 2;
+ uint_t vmm_info : 3;
+ ullong_t pdp_base_addr : 40;
+ uint_t available : 11;
+ uint_t no_execute : 1;
} __attribute__((packed)) pml4e64_t;
typedef struct pdpe64 {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t avail : 1;
- uint_t large_page : 1;
- uint_t zero : 1;
- uint_t vmm_info : 3;
- ullong_t pd_base_addr : 40;
- uint_t available : 11;
- uint_t no_execute : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t avail : 1;
+ uint_t large_page : 1;
+ uint_t zero : 1;
+ uint_t vmm_info : 3;
+ ullong_t pd_base_addr : 40;
+ uint_t available : 11;
+ uint_t no_execute : 1;
} __attribute__((packed)) pdpe64_t;
// We Don't support this
typedef struct pdpe64_1GB {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t large_page : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t pat : 1;
- uint_t rsvd : 17;
- ullong_t page_base_addr : 22;
- uint_t available : 11;
- uint_t no_execute : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t large_page : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t pat : 1;
+ uint_t rsvd : 17;
+ ullong_t page_base_addr : 22;
+ uint_t available : 11;
+ uint_t no_execute : 1;
} __attribute__((packed)) pdpe64_1GB_t;
typedef struct pde64 {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t avail : 1;
- uint_t large_page : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- ullong_t pt_base_addr : 40;
- uint_t available : 11;
- uint_t no_execute : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t avail : 1;
+ uint_t large_page : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ ullong_t pt_base_addr : 40;
+ uint_t available : 11;
+ uint_t no_execute : 1;
} __attribute__((packed)) pde64_t;
typedef struct pde64_2MB {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t large_page : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- uint_t pat : 1;
- uint_t rsvd : 8;
- ullong_t page_base_addr : 31;
- uint_t available : 11;
- uint_t no_execute : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t large_page : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ uint_t pat : 1;
+ uint_t rsvd : 8;
+ ullong_t page_base_addr : 31;
+ uint_t available : 11;
+ uint_t no_execute : 1;
} __attribute__((packed)) pde64_2MB_t;
typedef struct pte64 {
- uint_t present : 1;
- uint_t writable : 1;
- uint_t user_page : 1;
- uint_t write_through : 1;
- uint_t cache_disable : 1;
- uint_t accessed : 1;
- uint_t dirty : 1;
- uint_t pte_attr : 1;
- uint_t global_page : 1;
- uint_t vmm_info : 3;
- ullong_t page_base_addr : 40;
- uint_t available : 11;
- uint_t no_execute : 1;
+ uint_t present : 1;
+ uint_t writable : 1;
+ uint_t user_page : 1;
+ uint_t write_through : 1;
+ uint_t cache_disable : 1;
+ uint_t accessed : 1;
+ uint_t dirty : 1;
+ uint_t pte_attr : 1;
+ uint_t global_page : 1;
+ uint_t vmm_info : 3;
+ ullong_t page_base_addr : 40;
+ uint_t available : 11;
+ uint_t no_execute : 1;
} __attribute__((packed)) pte64_t;
/* *************** */
typedef struct pf_error_code {
- uint_t present : 1; // if 0, fault due to page not present
- uint_t write : 1; // if 1, faulting access was a write
- uint_t user : 1; // if 1, faulting access was in user mode
- uint_t rsvd_access : 1; // if 1, fault from reading a 1 from a reserved field (?)
- uint_t ifetch : 1; // if 1, faulting access was an instr fetch (only with NX)
- uint_t rsvd : 27;
+ uint_t present : 1; // if 0, fault due to page not present
+ uint_t write : 1; // if 1, faulting access was a write
+ uint_t user : 1; // if 1, faulting access was in user mode
+ uint_t rsvd_access : 1; // if 1, fault from reading a 1 from a reserved field (?)
+ uint_t ifetch : 1; // if 1, faulting access was an instr fetch (only with NX)
+ uint_t rsvd : 27;
} __attribute__((packed)) pf_error_t;
struct v3_profiler {
- uint_t total_exits;
+ uint_t total_exits;
- ullong_t start_time;
- ullong_t end_time;
+ ullong_t start_time;
+ ullong_t end_time;
- uint_t guest_pf_cnt;
+ uint_t guest_pf_cnt;
- struct rb_root root;
+ struct rb_root root;
};
struct queue_entry {
- addr_t entry;
- struct list_head entry_list;
+ addr_t entry;
+ struct list_head entry_list;
};
struct gen_queue {
- uint_t num_entries;
- struct list_head entries;
+ uint_t num_entries;
+ struct list_head entries;
- // We really need to implement this....
- // void * lock;
+ // We really need to implement this....
+ // void * lock;
};
#undef offsetof
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
-#define container_of(ptr, type, member) ({ \
- const typeof( ((type *)0)->member ) *__mptr = (ptr); \
- (type *)( (char *)__mptr - offsetof(type,member) );})
+#define container_of(ptr, type, member) ({ \
+ const typeof( ((type *)0)->member ) *__mptr = (ptr); \
+ (type *)( (char *)__mptr - offsetof(type,member) );})
struct rb_node
{
- unsigned long rb_parent_color;
+ unsigned long rb_parent_color;
#define RB_RED 0
#define RB_BLACK 1
- struct rb_node *rb_right;
- struct rb_node *rb_left;
+ struct rb_node *rb_right;
+ struct rb_node *rb_left;
} __attribute__((aligned(sizeof(long))));
- /* The alignment might seem pointless, but allegedly CRIS needs it */
+/* The alignment might seem pointless, but allegedly CRIS needs it */
struct rb_root
{
- struct rb_node *rb_node;
+ struct rb_node *rb_node;
};
static inline void rb_set_parent(struct rb_node *rb, struct rb_node *p)
{
- rb->rb_parent_color = (rb->rb_parent_color & 3) | (unsigned long)p;
+ rb->rb_parent_color = (rb->rb_parent_color & 3) | (unsigned long)p;
}
static inline void rb_set_color(struct rb_node *rb, int color)
{
- rb->rb_parent_color = (rb->rb_parent_color & ~1) | color;
+ rb->rb_parent_color = (rb->rb_parent_color & ~1) | color;
}
#define RB_ROOT (struct rb_root) { NULL, }
static inline void rb_link_node(struct rb_node * node, struct rb_node * parent,
struct rb_node ** rb_link)
{
- node->rb_parent_color = (unsigned long )parent;
- node->rb_left = node->rb_right = NULL;
+ node->rb_parent_color = (unsigned long )parent;
+ node->rb_left = node->rb_right = NULL;
- *rb_link = node;
+ *rb_link = node;
}
#endif
struct v3_ringbuf {
- uchar_t * buf;
- uint_t size;
+ uchar_t * buf;
+ uint_t size;
- uint_t start;
- uint_t end;
- uint_t current_len;
+ uint_t start;
+ uint_t end;
+ uint_t current_len;
};
struct shadow_page_state {
- // virtualized control registers
- v3_reg_t guest_cr3;
- v3_reg_t guest_cr0;
+ // virtualized control registers
+ v3_reg_t guest_cr3;
+ v3_reg_t guest_cr0;
- // list of allocated shadow pages
- struct list_head page_list;
+ // list of allocated shadow pages
+ struct list_head page_list;
- /* SOON TO BE DEPRECATED */
- // Hash table that contains a mapping of guest pte addresses to host pte addresses
- struct hashtable * cached_ptes;
- addr_t cached_cr3;
+ /* SOON TO BE DEPRECATED */
+ // Hash table that contains a mapping of guest pte addresses to host pte addresses
+ struct hashtable * cached_ptes;
+ addr_t cached_cr3;
};
#include <palacios/vmm.h>
-#define V3_SOCK long
#ifdef __V3VEE__
-#define V3_Create_UDP_Socket() ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- V3_SOCK sock = 0; \
- if ((sock_hooks) && (sock_hooks)->udp_socket) { \
- sock = (sock_hooks)->udp_socket(0,0); \
- } \
- sock; \
- })
+#define V3_Create_UDP_Socket() ({ \
+ extern struct v3_socket_hooks * sock_hooks; \
+ int sock = 0; \
+ if ((sock_hooks) && (sock_hooks)->udp_socket) { \
+ sock = (sock_hooks)->udp_socket(0,0); \
+ } \
+ sock; \
+ })
-#define V3_Create_TCP_Socket() ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- V3_SOCK sock = 0; \
- if ((sock_hooks) && (sock_hooks)->tcp_socket) { \
- sock = (sock_hooks)->tcp_socket(0,0,0); \
- } \
- sock; \
- })
+#define V3_Create_TCP_Socket() ({ \
+ extern struct v3_socket_hooks * sock_hooks; \
+ int sock = 0; \
+ if ((sock_hooks) && (sock_hooks)->tcp_socket) { \
+ sock = (sock_hooks)->tcp_socket(0,0,0); \
+ } \
+ sock; \
+ })
-#define V3_Close_Socket(sock) \
- do { \
- extern struct v3_socket_hooks * sock_hooks; \
- if ((sock_hooks) && (sock_hooks)->close) { \
- (sock_hooks)->close(sock); \
- } \
- } while (0);
+#define V3_Close_Socket(sock) \
+ do { \
+ extern struct v3_socket_hooks * sock_hooks; \
+ if ((sock_hooks) && (sock_hooks)->close) { \
+ (sock_hooks)->close(sock); \
+ } \
+ } while (0);
#define V3_Bind_Socket(sock, port) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->bind_socket) { \
- ret = (sock_hooks)->bind_socket(sock, port); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->bind_socket) { \
+ ret = (sock_hooks)->bind_socket(sock, port); \
+ } \
+ ret; \
+ })
-#define V3_Listen_Socket(sock, backlog) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->listen) { \
- ret = (sock_hooks)->listen(sock, backlog); \
- } \
- ret; \
- })
+#define V3_Listen_Socket(sock, backlog) ({ \
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->listen) { \
+ ret = (sock_hooks)->listen(sock, backlog); \
+ } \
+ ret; \
+ })
#define V3_Accept_Socket(sock, ip_ptr, port_ptr) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- V3_SOCK client_sock = 0; \
- if ((sock_hooks) && (sock_hooks)->accept) { \
- client_sock = (sock_hooks)->accept(sock, ip_ptr, port_ptr); \
- } \
- client_sock; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int client_sock = 0; \
+ if ((sock_hooks) && (sock_hooks)->accept) { \
+ client_sock = (sock_hooks)->accept(sock, ip_ptr, port_ptr); \
+ } \
+ client_sock; \
+ })
-#define V3_Select_Socket(rset,wset,eset,tv) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->select) { \
- ret = (sock_hooks)->select(rset, wset, eset, tv); \
- } \
- ret; \
- })
+#define V3_Select_Socket(rset,wset,eset,tv) ({ \
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->select) { \
+ ret = (sock_hooks)->select(rset, wset, eset, tv); \
+ } \
+ ret; \
+ })
-#define V3_Connect_To_IP(sock, ip, port) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->connect_to_ip) { \
- ret = (sock_hooks)->connect_to_ip(sock, ip, port); \
- } \
- ret; \
- })
+#define V3_Connect_To_IP(sock, ip, port) ({ \
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->connect_to_ip) { \
+ ret = (sock_hooks)->connect_to_ip(sock, ip, port); \
+ } \
+ ret; \
+ })
#define V3_Connect_To_Host(sock, hostname, port) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->connect_to_host) { \
- ret = (sock_hooks)->connect_to_host(sock, hostname, port); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->connect_to_host) { \
+ ret = (sock_hooks)->connect_to_host(sock, hostname, port); \
+ } \
+ ret; \
+ })
#define V3_Send(sock, buf, len) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->send) { \
- ret = (sock_hooks)->send(sock, buf, len); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->send) { \
+ ret = (sock_hooks)->send(sock, buf, len); \
+ } \
+ ret; \
+ })
#define V3_Recv(sock, buf, len) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->recv) { \
- ret = (sock_hooks)->recv(sock, buf, len); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->recv) { \
+ ret = (sock_hooks)->recv(sock, buf, len); \
+ } \
+ ret; \
+ })
#define V3_SendTo_Host(sock, hostname, port, buf, len) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->sendto_host) { \
- ret = (sock_hooks)->sendto_host(sock, hostname, port, buf, len); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->sendto_host) { \
+ ret = (sock_hooks)->sendto_host(sock, hostname, port, buf, len); \
+ } \
+ ret; \
+ })
#define V3_SendTo_IP(sock, ip, port, buf, len) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->sendto_ip) { \
- ret = (sock_hooks)->sendto_ip(sock, ip, port, buf, len); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->sendto_ip) { \
+ ret = (sock_hooks)->sendto_ip(sock, ip, port, buf, len); \
+ } \
+ ret; \
+ })
#define V3_RecvFrom_Host(sock, hostname, port, buf, len) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->recvfrom_host) { \
- ret = (sock_hooks)->recvfrom_host(sock, hostname, port, buf, len); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->recvfrom_host) { \
+ ret = (sock_hooks)->recvfrom_host(sock, hostname, port, buf, len); \
+ } \
+ ret; \
+ })
#define V3_RecvFrom_IP(sock, ip, port, buf, len) ({ \
- extern struct v3_socket_hooks * sock_hooks; \
- int ret = -1; \
- if ((sock_hooks) && (sock_hooks)->recvfrom_ip) { \
- ret = (sock_hooks)->recvfrom_ip(sock, ip, port, buf, len); \
- } \
- ret; \
- })
+ extern struct v3_socket_hooks * sock_hooks; \
+ int ret = -1; \
+ if ((sock_hooks) && (sock_hooks)->recvfrom_ip) { \
+ ret = (sock_hooks)->recvfrom_ip(sock, ip, port, buf, len); \
+ } \
+ ret; \
+ })
-#endif
-
-struct v3_timeval {
- long tv_sec; /* seconds */
- long tv_usec; /* and microseconds */
-};
+#define V3_SOCK_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7)))
+#define V3_SOCK_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7)))
+#define V3_SOCK_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7)))
+#define V3_SOCK_ZERO(p) memset((void*)(p), 0, sizeof(*(p)))
-struct v3_sock_entry {
- V3_SOCK sock;
- unsigned int is_set;
- struct v3_sock_entry * next;
-};
-
-struct v3_sock_set {
- unsigned int num_socks;
- struct v3_sock_entry * socks;
-};
+#endif
-void v3_init_sock_set(struct v3_sock_set * sock_set);
-void v3_set_sock(struct v3_sock_set * sock_set, V3_SOCK sock); // adds socket to the sockset
-void v3_clr_sock(struct v3_sock_set * sock_set, V3_SOCK sock); // deletes socket from sockset
-int v3_isset_sock(struct v3_sock_set * sock_set, V3_SOCK sock); // checks is_set vairable
-void v3_zero_sockset(struct v3_sock_set * sock_set); // clears all is_set variables.
+struct v3_timeval {
+ long tv_sec; /* seconds */
+ long tv_usec; /* and microseconds */
+};
+#define V3_SOCK_SETSIZE 1000
-#define v3_foreach_sock(/* (struct v3_sock_set *) */ sock_set, /* (struct v3_sock_entry *) */ iter) \
- for (iter = sock_set->socks; iter != NULL; iter = iter->next)
+typedef struct v3_sock_set {
+ // This format needs to match the standard posix FD_SET format, so it can be cast
+ unsigned char fd_bits [(V3_SOCK_SETSIZE + 7) / 8];
+} v3_sock_set;
struct v3_socket_hooks {
- // Socket creation routines
- V3_SOCK (*tcp_socket)(const int bufsize, const int nodelay, const int nonblocking);
- V3_SOCK (*udp_socket)(const int bufsize, const int nonblocking);
+ // Socket creation routines
+ int (*tcp_socket)(const int bufsize, const int nodelay, const int nonblocking);
+ int (*udp_socket)(const int bufsize, const int nonblocking);
- // Socket Destruction
- void (*close)(V3_SOCK sock);
+ // Socket Destruction
+ void (*close)(int sock);
- // Network Server Calls
- int (*bind_socket)(const V3_SOCK sock, const int port);
+ // Network Server Calls
+ int (*bind_socket)(const int sock, const int port);
- int (*listen)(const V3_SOCK sock, int backlog);
+ int (*listen)(const int sock, int backlog);
- V3_SOCK (*accept)(const V3_SOCK sock, unsigned int * remote_ip, unsigned int * port);
- // This going to suck
- int (*select)(struct v3_sock_set * rset, \
- struct v3_sock_set * wset, \
- struct v3_sock_set * eset, \
- struct v3_timeval tv);
-
- // Connect calls
- int (*connect_to_ip)(const V3_SOCK sock, const int hostip, const int port);
- int (*connect_to_host)(const V3_SOCK sock, const char * hostname, const int port);
-
- // TCP Data Transfer
- int (*send)(const V3_SOCK sock, const char * buf, const int len);
- int (*recv)(const V3_SOCK sock, char * buf, const int len);
+ int (*accept)(const int sock, unsigned int * remote_ip, unsigned int * port);
+ // This going to suck
+ int (*select)(struct v3_sock_set * rset, \
+ struct v3_sock_set * wset, \
+ struct v3_sock_set * eset, \
+ struct v3_timeval tv);
+
+ // Connect calls
+ int (*connect_to_ip)(const int sock, const int hostip, const int port);
+ int (*connect_to_host)(const int sock, const char * hostname, const int port);
+
+ // TCP Data Transfer
+ int (*send)(const int sock, const char * buf, const int len);
+ int (*recv)(const int sock, char * buf, const int len);
- // UDP Data Transfer
- int (*sendto_host)(const V3_SOCK sock, const char * hostname, const int port,
- const char * buf, const int len);
- int (*sendto_ip)(const V3_SOCK sock, const int ip_addr, const int port,
- const char * buf, const int len);
+ // UDP Data Transfer
+ int (*sendto_host)(const int sock, const char * hostname, const int port,
+ const char * buf, const int len);
+ int (*sendto_ip)(const int sock, const int ip_addr, const int port,
+ const char * buf, const int len);
- int (*recvfrom_host)(const V3_SOCK sock, const char * hostname, const int port,
- char * buf, const int len);
- int (*recvfrom_ip)(const V3_SOCK sock, const int ip_addr, const int port,
+ int (*recvfrom_host)(const int sock, const char * hostname, const int port,
char * buf, const int len);
+ int (*recvfrom_ip)(const int sock, const int ip_addr, const int port,
+ char * buf, const int len);
};
struct guest_info;
struct vm_time {
- uint32_t cpu_freq; // in kHZ
+ uint32_t cpu_freq; // in kHZ
- // Total number of guest run time cycles
- ullong_t guest_tsc;
+ // Total number of guest run time cycles
+ ullong_t guest_tsc;
- // Cache value to help calculate the guest_tsc
- ullong_t cached_host_tsc;
+ // Cache value to help calculate the guest_tsc
+ ullong_t cached_host_tsc;
- // The number of cycles pending for notification to the timers
- //ullong_t pending_cycles;
+ // The number of cycles pending for notification to the timers
+ //ullong_t pending_cycles;
- // Installed Timers
- uint_t num_timers;
- struct list_head timers;
+ // Installed Timers
+ uint_t num_timers;
+ struct list_head timers;
};
struct vm_timer_ops {
- void (*update_time)(ullong_t cpu_cycles, ullong_t cpu_freq, void * priv_data);
+ void (*update_time)(ullong_t cpu_cycles, ullong_t cpu_freq, void * priv_data);
};
struct vm_timer {
- void * private_data;
- struct vm_timer_ops * ops;
+ void * private_data;
+ struct vm_timer_ops * ops;
- struct list_head timer_link;
+ struct list_head timer_link;
};
typedef union reg_ex {
- ullong_t r_reg;
- struct {
- uint_t low;
- uint_t high;
- } e_reg;
+ ullong_t r_reg;
+ struct {
+ uint_t low;
+ uint_t high;
+ } e_reg;
} reg_ex_t;
// These are the GPRs layed out according to 'pusha'
struct VMM_GPRs {
- uint_t edi;
- uint_t esi;
- uint_t ebp;
- uint_t esp;
- uint_t ebx;
- uint_t edx;
- uint_t ecx;
- uint_t eax;
+ uint_t edi;
+ uint_t esi;
+ uint_t ebp;
+ uint_t esp;
+ uint_t ebx;
+ uint_t edx;
+ uint_t ecx;
+ uint_t eax;
};
#define rdtsc(low,high) \
- __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
+ __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
#define rdtscl(low) \
- __asm__ __volatile__("rdtsc" : "=a" (low) : : "edx")
+ __asm__ __volatile__("rdtsc" : "=a" (low) : : "edx")
-#define rdtscll(val) \
- do { \
- uint64_t tsc; \
- uint32_t a, d; \
- asm volatile("rdtsc" : "=a" (a), "=d" (d)); \
- *(uint32_t *)&(tsc) = a; \
- *(uint32_t *)(((uchar_t *)&tsc) + 4) = d; \
- val = tsc; \
- } while (0)
+#define rdtscll(val) \
+ do { \
+ uint64_t tsc; \
+ uint32_t a, d; \
+ asm volatile("rdtsc" : "=a" (a), "=d" (d)); \
+ *(uint32_t *)&(tsc) = a; \
+ *(uint32_t *)(((uchar_t *)&tsc) + 4) = d; \
+ val = tsc; \
+ } while (0)
/*
-#if __V3_32BIT__
+ #if __V3_32BIT__
-#define rdtscll(val) \
- __asm__ __volatile__("rdtsc" : "=A" (val))
+ #define rdtscll(val) \
+ __asm__ __volatile__("rdtsc" : "=A" (val))
-#elif __V3_64BIT__
+ #elif __V3_64BIT__
-#define rdtscll(val) do { \
- unsigned int a,d; \
- asm volatile("rdtsc" : "=a" (a), "=d" (d)); \
- (val) = ((unsigned long)a) | (((unsigned long)d)<<32); \
+ #define rdtscll(val) do { \
+ unsigned int a,d; \
+ asm volatile("rdtsc" : "=a" (a), "=d" (d)); \
+ (val) = ((unsigned long)a) | (((unsigned long)d)<<32); \
} while(0)
-#endif
+ #endif
*/
#ifdef __V3_64BIT__
-#define do_divll(n, base) ({ \
- uint64_t __rem = 0; \
- uint64_t __num = 0; \
- while (n > base) { \
- __num++; \
- n -= base; \
- } \
- __rem = n; \
- n = __num; \
- __rem; \
- })
+#define do_divll(n, base) ({ \
+ uint64_t __rem = 0; \
+ uint64_t __num = 0; \
+ while (n > base) { \
+ __num++; \
+ n -= base; \
+ } \
+ __rem = n; \
+ n = __num; \
+ __rem; \
+ })
//#define do_divll do_div
* This ends up being the most efficient "calling
* convention" on x86.
*/
-#define do_div(n,base) ({ \
- unsigned long __upper, __low, __high, __mod, __base; \
- __base = (base); \
- asm("":"=a" (__low), "=d" (__high):"A" (n)); \
- __upper = __high; \
- if (__high) { \
- __upper = __high % (__base); \
- __high = __high / (__base); \
- } \
- asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); \
- asm("":"=A" (n):"a" (__low),"d" (__high)); \
- __mod; \
- })
+#define do_div(n,base) ({ \
+ unsigned long __upper, __low, __high, __mod, __base; \
+ __base = (base); \
+ asm("":"=a" (__low), "=d" (__high):"A" (n)); \
+ __upper = __high; \
+ if (__high) { \
+ __upper = __high % (__base); \
+ __high = __high / (__base); \
+ } \
+ asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); \
+ asm("":"=A" (n):"a" (__low),"d" (__high)); \
+ __mod; \
+ })
*
* NOTE: This absolutely sucks... there has to be a better way....
*/
-#define do_divll(n, base) ({ \
- ullong_t __rem = 0; \
- ullong_t __num = 0; \
- while (n > base) { \
- __num++; \
- n -= base; \
- } \
- __rem = n; \
- n = __num; \
- __rem; \
- })
+#define do_divll(n, base) ({ \
+ ullong_t __rem = 0; \
+ ullong_t __num = 0; \
+ while (n > base) { \
+ __num++; \
+ n -= base; \
+ } \
+ __rem = n; \
+ n = __num; \
+ __rem; \
+ })
#endif
struct dma_state {
- int tmp;
-
+ int tmp
};
static int dma_init(struct vm_device * dev) {
-
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = dma_init,
- .deinit = NULL,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = dma_init,
+ .deinit = NULL,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_dma() {
- struct dma_state * dma = NULL;
+ struct dma_state * dma = NULL;
- dma = (struct dma_state *)V3_Malloc(sizeof(struct dma_state));
- V3_ASSERT(dma != NULL);
+ dma = (struct dma_state *)V3_Malloc(sizeof(struct dma_state));
+ V3_ASSERT(dma != NULL);
- struct vm_device * dev = v3_create_device("DMA", &dev_ops, dma);
+ struct vm_device * dev = v3_create_device("DMA", &dev_ops, dma);
- return dma;
+ return dma;
}
struct channel {
- channel_access_mode_t access_mode;
- channel_access_state_t access_state;
- channel_run_state_t run_state;
+ channel_access_mode_t access_mode;
+ channel_access_state_t access_state;
+ channel_run_state_t run_state;
- channel_op_mode_t op_mode;
+ channel_op_mode_t op_mode;
- // Time til interrupt trigger
+ // Time til interrupt trigger
- ushort_t counter;
- ushort_t reload_value;
+ ushort_t counter;
+ ushort_t reload_value;
- ushort_t latched_value;
+ ushort_t latched_value;
- enum {NOTLATCHED, LATCHED} latch_state;
+ enum {NOTLATCHED, LATCHED} latch_state;
- enum {LSB, MSB} read_state;
+ enum {LSB, MSB} read_state;
- uint_t output_pin : 1;
- uint_t gate_input_pin : 1;
+ uint_t output_pin : 1;
+ uint_t gate_input_pin : 1;
};
struct pit {
- ullong_t pit_counter;
- ullong_t pit_reload;
+ ullong_t pit_counter;
+ ullong_t pit_reload;
- struct channel ch_0;
- struct channel ch_1;
- struct channel ch_2;
+ struct channel ch_0;
+ struct channel ch_1;
+ struct channel ch_2;
};
struct pit_cmd_word {
- uint_t bcd_mode : 1;
- uint_t op_mode : 3;
- uint_t access_mode : 2;
- uint_t channel : 2;
+ uint_t bcd_mode : 1;
+ uint_t op_mode : 3;
+ uint_t access_mode : 2;
+ uint_t channel : 2;
};
struct pit_rdb_cmd_word {
- uint_t rsvd : 1; // SBZ
- uint_t ch_0 : 1;
- uint_t ch_1 : 1;
- uint_t ch_2 : 1;
- uint_t latch_status : 1;
- uint_t latch_count : 1;
- uint_t readback_cmd : 2; // Must Be 0x3
+ uint_t rsvd : 1; // SBZ
+ uint_t ch_0 : 1;
+ uint_t ch_1 : 1;
+ uint_t ch_2 : 1;
+ uint_t latch_status : 1;
+ uint_t latch_count : 1;
+ uint_t readback_cmd : 2; // Must Be 0x3
};
struct pit_rdb_status_word {
- uint_t bcd_mode : 1;
- uint_t op_mode : 3;
- uint_t access_mode : 2;
- uint_t null_count : 1;
- uint_t pin_state : 1;
+ uint_t bcd_mode : 1;
+ uint_t op_mode : 3;
+ uint_t access_mode : 2;
+ uint_t null_count : 1;
+ uint_t pin_state : 1;
};
*/
// Returns true if the the output signal changed state
static int handle_crystal_tics(struct vm_device * dev, struct channel * ch, uint_t oscillations) {
- uint_t channel_cycles = 0;
- uint_t output_changed = 0;
+ uint_t channel_cycles = 0;
+ uint_t output_changed = 0;
- // PrintDebug("8254 PIT: %d crystal tics\n", oscillations);
- if (ch->run_state == PENDING) {
- oscillations--;
- ch->counter = ch->reload_value;
+ // PrintDebug("8254 PIT: %d crystal tics\n", oscillations);
+ if (ch->run_state == PENDING) {
+ oscillations--;
+ ch->counter = ch->reload_value;
- if (ch->op_mode == SQR_WAVE) {
- ch->counter -= ch->counter % 2;
- }
-
- ch->run_state = RUNNING;
- } else if (ch->run_state != RUNNING) {
- return output_changed;
- }
-
- /*
- PrintDebug("8254 PIT: Channel Run State = %d, counter=", ch->run_state);
- PrintTraceLL(ch->counter);
- PrintDebug("\n");
- */
- if (ch->op_mode == SQR_WAVE) {
- oscillations *= 2;
- }
-
- if (ch->counter > oscillations) {
- ch->counter -= oscillations;
- return output_changed;
- } else {
- ushort_t reload_val = ch->reload_value;
+ if (ch->op_mode == SQR_WAVE) {
+ ch->counter -= ch->counter % 2;
+ }
- // TODO: Check this....
- // Is this correct???
- if (reload_val == 0) {
- reload_val = 1;
+ ch->run_state = RUNNING;
+ } else if (ch->run_state != RUNNING) {
+ return output_changed;
}
- oscillations -= ch->counter;
- ch->counter = 0;
- channel_cycles = 1;
-
+ /*
+ PrintDebug("8254 PIT: Channel Run State = %d, counter=", ch->run_state);
+ PrintTraceLL(ch->counter);
+ PrintDebug("\n");
+ */
if (ch->op_mode == SQR_WAVE) {
- reload_val -= reload_val % 2;
+ oscillations *= 2;
}
- channel_cycles += oscillations / reload_val;
- oscillations = oscillations % reload_val;
+ if (ch->counter > oscillations) {
+ ch->counter -= oscillations;
+ return output_changed;
+ } else {
+ ushort_t reload_val = ch->reload_value;
- ch->counter = reload_val - oscillations;
- }
+ // TODO: Check this....
+ // Is this correct???
+ if (reload_val == 0) {
+ reload_val = 1;
+ }
- // PrintDebug("8254 PIT: Channel Cycles: %d\n", channel_cycles);
-
+ oscillations -= ch->counter;
+ ch->counter = 0;
+ channel_cycles = 1;
+ if (ch->op_mode == SQR_WAVE) {
+ reload_val -= reload_val % 2;
+ }
- switch (ch->op_mode) {
- case IRQ_ON_TERM_CNT:
- if ((channel_cycles > 0) && (ch->output_pin == 0)) {
- ch->output_pin = 1;
- output_changed = 1;
- }
- break;
- case ONE_SHOT:
- if ((channel_cycles > 0) && (ch->output_pin == 0)) {
- ch->output_pin = 1;
- output_changed = 1;
- }
- break;
- case RATE_GEN:
- // See the data sheet: we ignore the output pin cycle...
- if (channel_cycles > 0) {
- output_changed = 1;
+ channel_cycles += oscillations / reload_val;
+ oscillations = oscillations % reload_val;
+
+ ch->counter = reload_val - oscillations;
}
- break;
- case SQR_WAVE:
- ch->output_pin = (ch->output_pin + 1) % 2;
- if (ch->output_pin == 1) {
- output_changed = 1;
+ // PrintDebug("8254 PIT: Channel Cycles: %d\n", channel_cycles);
+
+
+
+ switch (ch->op_mode) {
+ case IRQ_ON_TERM_CNT:
+ if ((channel_cycles > 0) && (ch->output_pin == 0)) {
+ ch->output_pin = 1;
+ output_changed = 1;
+ }
+ break;
+ case ONE_SHOT:
+ if ((channel_cycles > 0) && (ch->output_pin == 0)) {
+ ch->output_pin = 1;
+ output_changed = 1;
+ }
+ break;
+ case RATE_GEN:
+ // See the data sheet: we ignore the output pin cycle...
+ if (channel_cycles > 0) {
+ output_changed = 1;
+ }
+ break;
+ case SQR_WAVE:
+ ch->output_pin = (ch->output_pin + 1) % 2;
+
+ if (ch->output_pin == 1) {
+ output_changed = 1;
+ }
+
+ break;
+ case SW_STROBE:
+ return -1;
+ break;
+ case HW_STROBE:
+ return -1;
+ break;
+ default:
+ break;
}
- break;
- case SW_STROBE:
- return -1;
- break;
- case HW_STROBE:
- return -1;
- break;
- default:
- break;
- }
-
- return output_changed;
+ return output_changed;
}
static void pit_update_time(ullong_t cpu_cycles, ullong_t cpu_freq, void * private_data) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct pit * state = (struct pit *)dev->private_data;
- // ullong_t tmp_ctr = state->pit_counter;
- ullong_t tmp_cycles;
- uint_t oscillations = 0;
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct pit * state = (struct pit *)dev->private_data;
+ // ullong_t tmp_ctr = state->pit_counter;
+ ullong_t tmp_cycles;
+ uint_t oscillations = 0;
- /*
- PrintDebug("updating cpu_cycles=");
- PrintTraceLL(cpu_cycles);
- PrintDebug("\n");
+ /*
+ PrintDebug("updating cpu_cycles=");
+ PrintTraceLL(cpu_cycles);
+ PrintDebug("\n");
- PrintDebug("pit_counter=");
- PrintTraceLL(state->pit_counter);
- PrintDebug("\n");
+ PrintDebug("pit_counter=");
+ PrintTraceLL(state->pit_counter);
+ PrintDebug("\n");
- PrintDebug("pit_reload=");
- PrintTraceLL(state->pit_reload);
- PrintDebug("\n");
- */
-
- if (state->pit_counter > cpu_cycles) {
- // Easy...
- state->pit_counter -= cpu_cycles;
- } else {
- ushort_t reload_val = state->pit_reload;
- // Take off the first part
- cpu_cycles -= state->pit_counter;
- state->pit_counter = 0;
- oscillations = 1;
+ PrintDebug("pit_reload=");
+ PrintTraceLL(state->pit_reload);
+ PrintDebug("\n");
+ */
+
+ if (state->pit_counter > cpu_cycles) {
+ // Easy...
+ state->pit_counter -= cpu_cycles;
+ } else {
+ ushort_t reload_val = state->pit_reload;
+ // Take off the first part
+ cpu_cycles -= state->pit_counter;
+ state->pit_counter = 0;
+ oscillations = 1;
- if (cpu_cycles > state->pit_reload) {
- // how many full oscillations
+ if (cpu_cycles > state->pit_reload) {
+ // how many full oscillations
- //PrintError("cpu_cycles = %p, reload = %p...\n",
- // (void *)(addr_t)cpu_cycles,
- // (void *)(addr_t)state->pit_reload);
+ //PrintError("cpu_cycles = %p, reload = %p...\n",
+ // (void *)(addr_t)cpu_cycles,
+ // (void *)(addr_t)state->pit_reload);
- // How do we check for a one shot....
- if (state->pit_reload == 0) {
- reload_val = 1;
- }
+ // How do we check for a one shot....
+ if (state->pit_reload == 0) {
+ reload_val = 1;
+ }
- tmp_cycles = cpu_cycles;
+ tmp_cycles = cpu_cycles;
#ifdef __V3_64BIT__
- cpu_cycles = tmp_cycles % state->pit_reload;
- tmp_cycles = tmp_cycles / state->pit_reload;
+ cpu_cycles = tmp_cycles % state->pit_reload;
+ tmp_cycles = tmp_cycles / state->pit_reload;
#else
- cpu_cycles = do_divll(tmp_cycles, state->pit_reload);
+ cpu_cycles = do_divll(tmp_cycles, state->pit_reload);
#endif
- oscillations += tmp_cycles;
- }
+ oscillations += tmp_cycles;
+ }
- // update counter with remainder (mod reload)
- state->pit_counter = state->pit_reload - cpu_cycles;
+ // update counter with remainder (mod reload)
+ state->pit_counter = state->pit_reload - cpu_cycles;
- //PrintDebug("8254 PIT: Handling %d crystal tics\n", oscillations);
- if (handle_crystal_tics(dev, &(state->ch_0), oscillations) == 1) {
- // raise interrupt
- PrintDebug("8254 PIT: Injecting Timer interrupt to guest\n");
- v3_raise_irq(dev->vm, 0);
- }
+ //PrintDebug("8254 PIT: Handling %d crystal tics\n", oscillations);
+ if (handle_crystal_tics(dev, &(state->ch_0), oscillations) == 1) {
+ // raise interrupt
+ PrintDebug("8254 PIT: Injecting Timer interrupt to guest\n");
+ v3_raise_irq(dev->vm, 0);
+ }
- //handle_crystal_tics(dev, &(state->ch_1), oscillations);
- //handle_crystal_tics(dev, &(state->ch_2), oscillations);
- }
+ //handle_crystal_tics(dev, &(state->ch_1), oscillations);
+ //handle_crystal_tics(dev, &(state->ch_2), oscillations);
+ }
- return;
+ return;
}
static int handle_channel_write(struct channel * ch, char val) {
switch (ch->access_state) {
- case WAITING_HIBYTE:
- {
- ushort_t tmp_val = ((ushort_t)val) << 8;
- ch->reload_value &= 0x00ff;
- ch->reload_value |= tmp_val;
+ case WAITING_HIBYTE:
+ {
+ ushort_t tmp_val = ((ushort_t)val) << 8;
+ ch->reload_value &= 0x00ff;
+ ch->reload_value |= tmp_val;
- if ((ch->op_mode != RATE_GEN) || (ch->run_state != RUNNING)){
- ch->run_state = PENDING;
- }
+ if ((ch->op_mode != RATE_GEN) || (ch->run_state != RUNNING)){
+ ch->run_state = PENDING;
+ }
- if (ch->access_mode == LOBYTE_HIBYTE) {
- ch->access_state = WAITING_LOBYTE;
- }
-
- PrintDebug("8254 PIT: updated channel counter: %d\n", ch->reload_value);
- PrintDebug("8254 PIT: Channel Run State=%d\n", ch->run_state);
- break;
- }
- case WAITING_LOBYTE:
- ch->reload_value &= 0xff00;
- ch->reload_value |= val;
+ if (ch->access_mode == LOBYTE_HIBYTE) {
+ ch->access_state = WAITING_LOBYTE;
+ }
+
+ PrintDebug("8254 PIT: updated channel counter: %d\n", ch->reload_value);
+ PrintDebug("8254 PIT: Channel Run State=%d\n", ch->run_state);
+ break;
+ }
+ case WAITING_LOBYTE:
+ ch->reload_value &= 0xff00;
+ ch->reload_value |= val;
- if (ch->access_mode == LOBYTE_HIBYTE) {
- ch->access_state = WAITING_HIBYTE;
- } else if ((ch->op_mode != RATE_GEN) || (ch->run_state != RUNNING)) {
- ch->run_state = PENDING;
- }
+ if (ch->access_mode == LOBYTE_HIBYTE) {
+ ch->access_state = WAITING_HIBYTE;
+ } else if ((ch->op_mode != RATE_GEN) || (ch->run_state != RUNNING)) {
+ ch->run_state = PENDING;
+ }
- PrintDebug("8254 PIT: updated channel counter: %d\n", ch->reload_value);
- PrintDebug("8254 PIT: Channel Run State=%d\n", ch->run_state);
- break;
- default:
- return -1;
+ PrintDebug("8254 PIT: updated channel counter: %d\n", ch->reload_value);
+ PrintDebug("8254 PIT: Channel Run State=%d\n", ch->run_state);
+ break;
+ default:
+ return -1;
}
switch (ch->op_mode) {
- case IRQ_ON_TERM_CNT:
- ch->output_pin = 0;
- break;
- case ONE_SHOT:
- ch->output_pin = 1;
- break;
- case RATE_GEN:
- ch->output_pin = 1;
- break;
- case SQR_WAVE:
- ch->output_pin = 1;
- break;
- default:
- return -1;
- break;
+ case IRQ_ON_TERM_CNT:
+ ch->output_pin = 0;
+ break;
+ case ONE_SHOT:
+ ch->output_pin = 1;
+ break;
+ case RATE_GEN:
+ ch->output_pin = 1;
+ break;
+ case SQR_WAVE:
+ ch->output_pin = 1;
+ break;
+ default:
+ return -1;
+ break;
}
- return 0;
+ return 0;
}
static int handle_channel_read(struct channel * ch, char * val) {
- ushort_t * myval;
+ ushort_t * myval;
- if (ch->latch_state == NOTLATCHED) {
- myval = &(ch->counter);
- } else {
- myval = &(ch->latched_value);
- }
+ if (ch->latch_state == NOTLATCHED) {
+ myval = &(ch->counter);
+ } else {
+ myval = &(ch->latched_value);
+ }
- if (ch->read_state == LSB) {
- *val = ((char*)myval)[0]; // little endian
- ch->read_state = MSB;
- } else {
- *val = ((char*)myval)[1];
- ch->read_state = LSB;
- if (ch->latch_state == LATCHED) {
- ch->latch_state = NOTLATCHED;
+ if (ch->read_state == LSB) {
+ *val = ((char*)myval)[0]; // little endian
+ ch->read_state = MSB;
+ } else {
+ *val = ((char*)myval)[1];
+ ch->read_state = LSB;
+ if (ch->latch_state == LATCHED) {
+ ch->latch_state = NOTLATCHED;
+ }
}
- }
- return 0;
+ return 0;
}
static int handle_channel_cmd(struct channel * ch, struct pit_cmd_word cmd) {
- ch->op_mode = cmd.op_mode;
- ch->access_mode = cmd.access_mode;
-
-
+ ch->op_mode = cmd.op_mode;
+ ch->access_mode = cmd.access_mode;
+
+
+
+
+ switch (cmd.access_mode) {
+ case LATCH_COUNT:
+ if (ch->latch_state == NOTLATCHED) {
+ ch->latched_value = ch->counter;
+ ch->latch_state = LATCHED;
+ }
+ break;
+ case HIBYTE_ONLY:
+ ch->access_state = WAITING_HIBYTE;
+ break;
+ case LOBYTE_ONLY:
+ case LOBYTE_HIBYTE:
+ ch->access_state = WAITING_LOBYTE;
+ break;
+ }
- switch (cmd.access_mode) {
- case LATCH_COUNT:
- if (ch->latch_state == NOTLATCHED) {
- ch->latched_value = ch->counter;
- ch->latch_state = LATCHED;
+ switch (cmd.op_mode) {
+ case IRQ_ON_TERM_CNT:
+ ch->output_pin = 0;
+ break;
+ case ONE_SHOT:
+ ch->output_pin = 1;
+ break;
+ case RATE_GEN:
+ ch->output_pin = 1;
+ break;
+ case SQR_WAVE:
+ ch->output_pin = 1;
+ break;
+ default:
+ return -1;
}
- break;
- case HIBYTE_ONLY:
- ch->access_state = WAITING_HIBYTE;
- break;
- case LOBYTE_ONLY:
- case LOBYTE_HIBYTE:
- ch->access_state = WAITING_LOBYTE;
- break;
- }
-
-
- switch (cmd.op_mode) {
- case IRQ_ON_TERM_CNT:
- ch->output_pin = 0;
- break;
- case ONE_SHOT:
- ch->output_pin = 1;
- break;
- case RATE_GEN:
- ch->output_pin = 1;
- break;
- case SQR_WAVE:
- ch->output_pin = 1;
- break;
- default:
- return -1;
- }
-
- return 0;
+
+ return 0;
}
static int pit_read_channel(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct pit * state = (struct pit *)dev->private_data;
- char * val = (char *)dst;
-
- if (length != 1) {
- PrintError("8254 PIT: Invalid Read Write length \n");
- return -1;
- }
+ struct pit * state = (struct pit *)dev->private_data;
+ char * val = (char *)dst;
- PrintDebug("8254 PIT: Read of PIT Channel %d\n", port - CHANNEL0_PORT);
-
- switch (port) {
- case CHANNEL0_PORT:
- if (handle_channel_read(&(state->ch_0), val) == -1) {
- return -1;
- }
- break;
- case CHANNEL1_PORT:
- if (handle_channel_read(&(state->ch_1), val) == -1) {
- return -1;
+ if (length != 1) {
+ PrintError("8254 PIT: Invalid Read Write length \n");
+ return -1;
}
- break;
- case CHANNEL2_PORT:
- if (handle_channel_read(&(state->ch_2), val) == -1) {
- return -1;
+
+ PrintDebug("8254 PIT: Read of PIT Channel %d\n", port - CHANNEL0_PORT);
+
+ switch (port) {
+ case CHANNEL0_PORT:
+ if (handle_channel_read(&(state->ch_0), val) == -1) {
+ return -1;
+ }
+ break;
+ case CHANNEL1_PORT:
+ if (handle_channel_read(&(state->ch_1), val) == -1) {
+ return -1;
+ }
+ break;
+ case CHANNEL2_PORT:
+ if (handle_channel_read(&(state->ch_2), val) == -1) {
+ return -1;
+ }
+ break;
+ default:
+ PrintError("8254 PIT: Read from invalid port (%d)\n", port);
+ return -1;
}
- break;
- default:
- PrintError("8254 PIT: Read from invalid port (%d)\n", port);
- return -1;
- }
- return length;
+ return length;
}
static int pit_write_channel(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct pit * state = (struct pit *)dev->private_data;
- char val = *(char *)src;
-
- if (length != 1) {
- PrintError("8254 PIT: Invalid Write Length\n");
- return -1;
- }
-
- PrintDebug("8254 PIT: Write to PIT Channel %d (%x)\n", port - CHANNEL0_PORT, *(char*)src);
-
-
- switch (port) {
- case CHANNEL0_PORT:
- if (handle_channel_write(&(state->ch_0), val) == -1) {
- return -1;
- }
- break;
- case CHANNEL1_PORT:
- if (handle_channel_write(&(state->ch_1), val) == -1) {
- return -1;
+ struct pit * state = (struct pit *)dev->private_data;
+ char val = *(char *)src;
+
+ if (length != 1) {
+ PrintError("8254 PIT: Invalid Write Length\n");
+ return -1;
}
- break;
- case CHANNEL2_PORT:
- if (handle_channel_write(&(state->ch_2), val) == -1) {
- return -1;
+
+ PrintDebug("8254 PIT: Write to PIT Channel %d (%x)\n", port - CHANNEL0_PORT, *(char*)src);
+
+
+ switch (port) {
+ case CHANNEL0_PORT:
+ if (handle_channel_write(&(state->ch_0), val) == -1) {
+ return -1;
+ }
+ break;
+ case CHANNEL1_PORT:
+ if (handle_channel_write(&(state->ch_1), val) == -1) {
+ return -1;
+ }
+ break;
+ case CHANNEL2_PORT:
+ if (handle_channel_write(&(state->ch_2), val) == -1) {
+ return -1;
+ }
+ break;
+ default:
+ PrintError("8254 PIT: Write to invalid port (%d)\n", port);
+ return -1;
}
- break;
- default:
- PrintError("8254 PIT: Write to invalid port (%d)\n", port);
- return -1;
- }
- return length;
+ return length;
}
static int pit_write_command(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct pit * state = (struct pit *)dev->private_data;
- struct pit_cmd_word * cmd = (struct pit_cmd_word *)src;
-
- PrintDebug("8254 PIT: Write to PIT Command port\n");
- PrintDebug("8254 PIT: Writing to channel %d (access_mode = %d, op_mode = %d)\n", cmd->channel, cmd->access_mode, cmd->op_mode);
- if (length != 1) {
- PrintError("8254 PIT: Write of Invalid length to command port\n");
- return -1;
- }
-
- switch (cmd->channel) {
- case 0:
- if (handle_channel_cmd(&(state->ch_0), *cmd) == -1) {
- return -1;
- }
- break;
- case 1:
- if (handle_channel_cmd(&(state->ch_1), *cmd) == -1) {
- return -1;
+ struct pit * state = (struct pit *)dev->private_data;
+ struct pit_cmd_word * cmd = (struct pit_cmd_word *)src;
+
+ PrintDebug("8254 PIT: Write to PIT Command port\n");
+ PrintDebug("8254 PIT: Writing to channel %d (access_mode = %d, op_mode = %d)\n", cmd->channel, cmd->access_mode, cmd->op_mode);
+ if (length != 1) {
+ PrintError("8254 PIT: Write of Invalid length to command port\n");
+ return -1;
}
- break;
- case 2:
- if (handle_channel_cmd(&(state->ch_2), *cmd) == -1) {
- return -1;
+
+ switch (cmd->channel) {
+ case 0:
+ if (handle_channel_cmd(&(state->ch_0), *cmd) == -1) {
+ return -1;
+ }
+ break;
+ case 1:
+ if (handle_channel_cmd(&(state->ch_1), *cmd) == -1) {
+ return -1;
+ }
+ break;
+ case 2:
+ if (handle_channel_cmd(&(state->ch_2), *cmd) == -1) {
+ return -1;
+ }
+ break;
+ case 3:
+ // Read Back command
+ return -1;
+ break;
+ default:
+ break;
}
- break;
- case 3:
- // Read Back command
- return -1;
- break;
- default:
- break;
- }
- return length;
+ return length;
}
static struct vm_timer_ops timer_ops = {
- .update_time = pit_update_time,
+ .update_time = pit_update_time,
};
static void init_channel(struct channel * ch) {
- ch->run_state = NOT_RUNNING;
- ch->access_state = NOT_WAITING;
- ch->access_mode = 0;
- ch->op_mode = 0;
+ ch->run_state = NOT_RUNNING;
+ ch->access_state = NOT_WAITING;
+ ch->access_mode = 0;
+ ch->op_mode = 0;
- ch->counter = 0;
- ch->reload_value = 0;
- ch->output_pin = 0;
- ch->gate_input_pin = 0;
+ ch->counter = 0;
+ ch->reload_value = 0;
+ ch->output_pin = 0;
+ ch->gate_input_pin = 0;
- ch->latched_value = 0;
- ch->latch_state = NOTLATCHED;
- ch->read_state = LSB;
+ ch->latched_value = 0;
+ ch->latch_state = NOTLATCHED;
+ ch->read_state = LSB;
- return;
+ return;
}
static int pit_init(struct vm_device * dev) {
- struct pit * state = (struct pit *)dev->private_data;
- uint_t cpu_khz = V3_CPU_KHZ();
- ullong_t reload_val = (ullong_t)cpu_khz * 1000;
+ struct pit * state = (struct pit *)dev->private_data;
+ uint_t cpu_khz = V3_CPU_KHZ();
+ ullong_t reload_val = (ullong_t)cpu_khz * 1000;
- v3_dev_hook_io(dev, CHANNEL0_PORT, &pit_read_channel, &pit_write_channel);
- v3_dev_hook_io(dev, CHANNEL1_PORT, &pit_read_channel, &pit_write_channel);
- v3_dev_hook_io(dev, CHANNEL2_PORT, &pit_read_channel, &pit_write_channel);
- v3_dev_hook_io(dev, COMMAND_PORT, NULL, &pit_write_command);
+ v3_dev_hook_io(dev, CHANNEL0_PORT, &pit_read_channel, &pit_write_channel);
+ v3_dev_hook_io(dev, CHANNEL1_PORT, &pit_read_channel, &pit_write_channel);
+ v3_dev_hook_io(dev, CHANNEL2_PORT, &pit_read_channel, &pit_write_channel);
+ v3_dev_hook_io(dev, COMMAND_PORT, NULL, &pit_write_command);
#ifdef DEBUG_PIT
- PrintDebug("8254 PIT: OSC_HZ=%d, reload_val=", OSC_HZ);
- PrintTraceLL(reload_val);
- PrintDebug("\n");
+ PrintDebug("8254 PIT: OSC_HZ=%d, reload_val=", OSC_HZ);
+ PrintTraceLL(reload_val);
+ PrintDebug("\n");
#endif
- v3_add_timer(dev->vm, &timer_ops, dev);
+ v3_add_timer(dev->vm, &timer_ops, dev);
- // Get cpu frequency and calculate the global pit oscilattor counter/cycle
+ // Get cpu frequency and calculate the global pit oscilattor counter/cycle
- do_divll(reload_val, OSC_HZ);
- state->pit_counter = reload_val;
- state->pit_reload = reload_val;
+ do_divll(reload_val, OSC_HZ);
+ state->pit_counter = reload_val;
+ state->pit_reload = reload_val;
- init_channel(&(state->ch_0));
- init_channel(&(state->ch_1));
- init_channel(&(state->ch_2));
+ init_channel(&(state->ch_0));
+ init_channel(&(state->ch_1));
+ init_channel(&(state->ch_2));
#ifdef DEBUG_PIT
- PrintDebug("8254 PIT: CPU MHZ=%d -- pit count=", cpu_khz / 1000);
- PrintTraceLL(state->pit_counter);
- PrintDebug("\n");
+ PrintDebug("8254 PIT: CPU MHZ=%d -- pit count=", cpu_khz / 1000);
+ PrintTraceLL(state->pit_counter);
+ PrintDebug("\n");
#endif
- return 0;
+ return 0;
}
static int pit_deinit(struct vm_device * dev) {
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = pit_init,
- .deinit = pit_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = pit_init,
+ .deinit = pit_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_pit() {
- struct pit * pit_state = NULL;
- pit_state = (struct pit *)V3_Malloc(sizeof(struct pit));
- V3_ASSERT(pit_state != NULL);
+ struct pit * pit_state = NULL;
+ pit_state = (struct pit *)V3_Malloc(sizeof(struct pit));
+ V3_ASSERT(pit_state != NULL);
- struct vm_device * dev = v3_create_device("PIT", &dev_ops, pit_state);
+ struct vm_device * dev = v3_create_device("PIT", &dev_ops, pit_state);
- return dev;
+ return dev;
}
struct icw1 {
- uint_t ic4 : 1; // ICW4 has to be read
- uint_t sngl : 1; // single (only one PIC)
- uint_t adi : 1; // call address interval
- uint_t ltim : 1; // level interrupt mode
- uint_t one : 1;
- uint_t rsvd : 3;
+ uint_t ic4 : 1; // ICW4 has to be read
+ uint_t sngl : 1; // single (only one PIC)
+ uint_t adi : 1; // call address interval
+ uint_t ltim : 1; // level interrupt mode
+ uint_t one : 1;
+ uint_t rsvd : 3;
};
struct icw2 {
- uint_t rsvd : 3;
- uint_t vector : 5;
+ uint_t rsvd : 3;
+ uint_t vector : 5;
};
// Each bit that is set indicates that the IR input has a slave
struct icw3_master {
- uint_t S0 : 1;
- uint_t S1 : 1;
- uint_t S2 : 1;
- uint_t S3 : 1;
- uint_t S4 : 1;
- uint_t S5 : 1;
- uint_t S6 : 1;
- uint_t S7 : 1;
+ uint_t S0 : 1;
+ uint_t S1 : 1;
+ uint_t S2 : 1;
+ uint_t S3 : 1;
+ uint_t S4 : 1;
+ uint_t S5 : 1;
+ uint_t S6 : 1;
+ uint_t S7 : 1;
};
// The ID is the Slave device ID
struct icw3_slave {
- uint_t id : 3;
- uint_t zeroes : 5;
+ uint_t id : 3;
+ uint_t zeroes : 5;
};
struct icw4 {
- uint_t uPM : 1; // 1=x86
- uint_t AEOI : 1; // Automatic End of Interrupt
- uint_t M_S : 1; // only if buffered 1=master,0=slave
- uint_t BUF : 1; // buffered mode
- uint_t SFNM : 1; // special fully nexted mode
- uint_t zeroes : 3;
+ uint_t uPM : 1; // 1=x86
+ uint_t AEOI : 1; // Automatic End of Interrupt
+ uint_t M_S : 1; // only if buffered 1=master,0=slave
+ uint_t BUF : 1; // buffered mode
+ uint_t SFNM : 1; // special fully nexted mode
+ uint_t zeroes : 3;
};
struct ocw1 {
- uint_t m0 : 1;
- uint_t m1 : 1;
- uint_t m2 : 1;
- uint_t m3 : 1;
- uint_t m4 : 1;
- uint_t m5 : 1;
- uint_t m6 : 1;
- uint_t m7 : 1;
+ uint_t m0 : 1;
+ uint_t m1 : 1;
+ uint_t m2 : 1;
+ uint_t m3 : 1;
+ uint_t m4 : 1;
+ uint_t m5 : 1;
+ uint_t m6 : 1;
+ uint_t m7 : 1;
};
struct ocw2 {
- uint_t level : 3;
- uint_t cw_code : 2; // should be 00
- uint_t EOI : 1;
- uint_t SL : 1;
- uint_t R : 1;
+ uint_t level : 3;
+ uint_t cw_code : 2; // should be 00
+ uint_t EOI : 1;
+ uint_t SL : 1;
+ uint_t R : 1;
};
struct ocw3 {
- uint_t RIS : 1;
- uint_t RR : 1;
- uint_t P : 1;
- uint_t cw_code : 2; // should be 01
- uint_t smm : 1;
- uint_t esmm : 1;
- uint_t zero2 : 1;
+ uint_t RIS : 1;
+ uint_t RR : 1;
+ uint_t P : 1;
+ uint_t cw_code : 2; // should be 01
+ uint_t smm : 1;
+ uint_t esmm : 1;
+ uint_t zero2 : 1;
};
struct pic_internal {
- uchar_t master_irr;
- uchar_t slave_irr;
+ uchar_t master_irr;
+ uchar_t slave_irr;
- uchar_t master_isr;
- uchar_t slave_isr;
+ uchar_t master_isr;
+ uchar_t slave_isr;
- uchar_t master_icw1;
- uchar_t master_icw2;
- uchar_t master_icw3;
- uchar_t master_icw4;
+ uchar_t master_icw1;
+ uchar_t master_icw2;
+ uchar_t master_icw3;
+ uchar_t master_icw4;
- uchar_t slave_icw1;
- uchar_t slave_icw2;
- uchar_t slave_icw3;
- uchar_t slave_icw4;
+ uchar_t slave_icw1;
+ uchar_t slave_icw2;
+ uchar_t slave_icw3;
+ uchar_t slave_icw4;
- uchar_t master_imr;
- uchar_t slave_imr;
- uchar_t master_ocw2;
- uchar_t master_ocw3;
- uchar_t slave_ocw2;
- uchar_t slave_ocw3;
+ uchar_t master_imr;
+ uchar_t slave_imr;
+ uchar_t master_ocw2;
+ uchar_t master_ocw3;
+ uchar_t slave_ocw2;
+ uchar_t slave_ocw3;
- pic_state_t master_state;
- pic_state_t slave_state;
+ pic_state_t master_state;
+ pic_state_t slave_state;
};
static void DumpPICState(struct pic_internal *p)
{
- PrintDebug("8259 PIC: master_state=0x%x\n",p->master_state);
- PrintDebug("8259 PIC: master_irr=0x%x\n",p->master_irr);
- PrintDebug("8259 PIC: master_isr=0x%x\n",p->master_isr);
- PrintDebug("8259 PIC: master_imr=0x%x\n",p->master_imr);
+ PrintDebug("8259 PIC: master_state=0x%x\n",p->master_state);
+ PrintDebug("8259 PIC: master_irr=0x%x\n",p->master_irr);
+ PrintDebug("8259 PIC: master_isr=0x%x\n",p->master_isr);
+ PrintDebug("8259 PIC: master_imr=0x%x\n",p->master_imr);
- PrintDebug("8259 PIC: master_ocw2=0x%x\n",p->master_ocw2);
- PrintDebug("8259 PIC: master_ocw3=0x%x\n",p->master_ocw3);
+ PrintDebug("8259 PIC: master_ocw2=0x%x\n",p->master_ocw2);
+ PrintDebug("8259 PIC: master_ocw3=0x%x\n",p->master_ocw3);
- PrintDebug("8259 PIC: master_icw1=0x%x\n",p->master_icw1);
- PrintDebug("8259 PIC: master_icw2=0x%x\n",p->master_icw2);
- PrintDebug("8259 PIC: master_icw3=0x%x\n",p->master_icw3);
- PrintDebug("8259 PIC: master_icw4=0x%x\n",p->master_icw4);
+ PrintDebug("8259 PIC: master_icw1=0x%x\n",p->master_icw1);
+ PrintDebug("8259 PIC: master_icw2=0x%x\n",p->master_icw2);
+ PrintDebug("8259 PIC: master_icw3=0x%x\n",p->master_icw3);
+ PrintDebug("8259 PIC: master_icw4=0x%x\n",p->master_icw4);
- PrintDebug("8259 PIC: slave_state=0x%x\n",p->slave_state);
- PrintDebug("8259 PIC: slave_irr=0x%x\n",p->slave_irr);
- PrintDebug("8259 PIC: slave_isr=0x%x\n",p->slave_isr);
- PrintDebug("8259 PIC: slave_imr=0x%x\n",p->slave_imr);
+ PrintDebug("8259 PIC: slave_state=0x%x\n",p->slave_state);
+ PrintDebug("8259 PIC: slave_irr=0x%x\n",p->slave_irr);
+ PrintDebug("8259 PIC: slave_isr=0x%x\n",p->slave_isr);
+ PrintDebug("8259 PIC: slave_imr=0x%x\n",p->slave_imr);
- PrintDebug("8259 PIC: slave_ocw2=0x%x\n",p->slave_ocw2);
- PrintDebug("8259 PIC: slave_ocw3=0x%x\n",p->slave_ocw3);
+ PrintDebug("8259 PIC: slave_ocw2=0x%x\n",p->slave_ocw2);
+ PrintDebug("8259 PIC: slave_ocw3=0x%x\n",p->slave_ocw3);
- PrintDebug("8259 PIC: slave_icw1=0x%x\n",p->slave_icw1);
- PrintDebug("8259 PIC: slave_icw2=0x%x\n",p->slave_icw2);
- PrintDebug("8259 PIC: slave_icw3=0x%x\n",p->slave_icw3);
- PrintDebug("8259 PIC: slave_icw4=0x%x\n",p->slave_icw4);
+ PrintDebug("8259 PIC: slave_icw1=0x%x\n",p->slave_icw1);
+ PrintDebug("8259 PIC: slave_icw2=0x%x\n",p->slave_icw2);
+ PrintDebug("8259 PIC: slave_icw3=0x%x\n",p->slave_icw3);
+ PrintDebug("8259 PIC: slave_icw4=0x%x\n",p->slave_icw4);
}
static int pic_raise_intr(void * private_data, int irq) {
- struct pic_internal * state = (struct pic_internal*)private_data;
+ struct pic_internal * state = (struct pic_internal*)private_data;
- if (irq == 2) {
- irq = 9;
- state->master_irr |= 0x04; // PAD
- }
+ if (irq == 2) {
+ irq = 9;
+ state->master_irr |= 0x04; // PAD
+ }
- PrintDebug("8259 PIC: Raising irq %d in the PIC\n", irq);
+ PrintDebug("8259 PIC: Raising irq %d in the PIC\n", irq);
- if (irq <= 7) {
- state->master_irr |= 0x01 << irq;
- } else if ((irq > 7) && (irq < 16)) {
- state->slave_irr |= 0x01 << (irq - 8); // PAD if -7 then irq 15=no irq
- } else {
- PrintError("8259 PIC: Invalid IRQ raised (%d)\n", irq);
- return -1;
- }
+ if (irq <= 7) {
+ state->master_irr |= 0x01 << irq;
+ } else if ((irq > 7) && (irq < 16)) {
+ state->slave_irr |= 0x01 << (irq - 8); // PAD if -7 then irq 15=no irq
+ } else {
+ PrintError("8259 PIC: Invalid IRQ raised (%d)\n", irq);
+ return -1;
+ }
- return 0;
+ return 0;
}
static int pic_lower_intr(void *private_data, int irq) {
- struct pic_internal *state = (struct pic_internal*)private_data;
+ struct pic_internal *state = (struct pic_internal*)private_data;
- PrintDebug("[pic_lower_intr] IRQ line %d now low\n", irq);
- if (irq <= 7) {
+ PrintDebug("[pic_lower_intr] IRQ line %d now low\n", irq);
+ if (irq <= 7) {
- state->master_irr &= ~(1 << irq);
- if ((state->master_irr & ~(state->master_imr)) == 0) {
- PrintDebug("\t\tFIXME: Master maybe should do sth\n");
- }
- } else if ((irq > 7) && (irq < 16)) {
+ state->master_irr &= ~(1 << irq);
+ if ((state->master_irr & ~(state->master_imr)) == 0) {
+ PrintDebug("\t\tFIXME: Master maybe should do sth\n");
+ }
+ } else if ((irq > 7) && (irq < 16)) {
- state->slave_irr &= ~(1 << (irq - 8));
- if ((state->slave_irr & (~(state->slave_imr))) == 0) {
- PrintDebug("\t\tFIXME: Slave maybe should do sth\n");
+ state->slave_irr &= ~(1 << (irq - 8));
+ if ((state->slave_irr & (~(state->slave_imr))) == 0) {
+ PrintDebug("\t\tFIXME: Slave maybe should do sth\n");
+ }
}
- }
- return 0;
+ return 0;
}
static int pic_intr_pending(void * private_data) {
- struct pic_internal * state = (struct pic_internal*)private_data;
+ struct pic_internal * state = (struct pic_internal*)private_data;
- if ((state->master_irr & ~(state->master_imr)) ||
- (state->slave_irr & ~(state->slave_imr))) {
- return 1;
- }
+ if ((state->master_irr & ~(state->master_imr)) ||
+ (state->slave_irr & ~(state->slave_imr))) {
+ return 1;
+ }
- return 0;
+ return 0;
}
static int pic_get_intr_number(void * private_data) {
- struct pic_internal * state = (struct pic_internal *)private_data;
- int i = 0;
- int irq = -1;
-
- PrintDebug("8259 PIC: getnum: master_irr: 0x%x master_imr: 0x%x\n", state->master_irr, state->master_imr);
- PrintDebug("8259 PIC: getnum: slave_irr: 0x%x slave_imr: 0x%x\n", state->slave_irr, state->slave_imr);
-
- for (i = 0; i < 16; i++) {
- if (i <= 7) {
- if (((state->master_irr & ~(state->master_imr)) >> i) == 0x01) {
- //state->master_isr |= (0x1 << i);
- // reset the irr
- //state->master_irr &= ~(0x1 << i);
- PrintDebug("8259 PIC: IRQ: %d, master_icw2: %x\n", i, state->master_icw2);
- irq= i + state->master_icw2;
- break;
- }
- } else {
- if (((state->slave_irr & ~(state->slave_imr)) >> (i - 8)) == 0x01) {
- //state->slave_isr |= (0x1 << (i - 8));
- //state->slave_irr &= ~(0x1 << (i - 8));
- PrintDebug("8259 PIC: IRQ: %d, slave_icw2: %x\n", i, state->slave_icw2);
- irq= (i - 8) + state->slave_icw2;
- break;
- }
+ struct pic_internal * state = (struct pic_internal *)private_data;
+ int i = 0;
+ int irq = -1;
+
+ PrintDebug("8259 PIC: getnum: master_irr: 0x%x master_imr: 0x%x\n", state->master_irr, state->master_imr);
+ PrintDebug("8259 PIC: getnum: slave_irr: 0x%x slave_imr: 0x%x\n", state->slave_irr, state->slave_imr);
+
+ for (i = 0; i < 16; i++) {
+ if (i <= 7) {
+ if (((state->master_irr & ~(state->master_imr)) >> i) == 0x01) {
+ //state->master_isr |= (0x1 << i);
+ // reset the irr
+ //state->master_irr &= ~(0x1 << i);
+ PrintDebug("8259 PIC: IRQ: %d, master_icw2: %x\n", i, state->master_icw2);
+ irq= i + state->master_icw2;
+ break;
+ }
+ } else {
+ if (((state->slave_irr & ~(state->slave_imr)) >> (i - 8)) == 0x01) {
+ //state->slave_isr |= (0x1 << (i - 8));
+ //state->slave_irr &= ~(0x1 << (i - 8));
+ PrintDebug("8259 PIC: IRQ: %d, slave_icw2: %x\n", i, state->slave_icw2);
+ irq= (i - 8) + state->slave_icw2;
+ break;
+ }
+ }
}
- }
- if ((i == 15) || (i == 6)) {
- DumpPICState(state);
- }
+ if ((i == 15) || (i == 6)) {
+ DumpPICState(state);
+ }
- if (i == 16) {
- return -1;
- } else {
- return irq;
- }
+ if (i == 16) {
+ return -1;
+ } else {
+ return irq;
+ }
}
/* The IRQ number is the number returned by pic_get_intr_number(), not the pin number */
static int pic_begin_irq(void * private_data, int irq) {
- struct pic_internal * state = (struct pic_internal*)private_data;
-
- if ((irq >= state->master_icw2) && (irq <= state->master_icw2 + 7)) {
- irq &= 0x7;
- } else if ((irq >= state->slave_icw2) && (irq <= state->slave_icw2 + 7)) {
- irq &= 0x7;
- irq += 8;
- } else {
- // PrintError("8259 PIC: Could not find IRQ (0x%x) to Begin\n",irq);
- return -1;
- }
+ struct pic_internal * state = (struct pic_internal*)private_data;
- if (irq <= 7) {
- if (((state->master_irr & ~(state->master_imr)) >> irq) == 0x01) {
- state->master_isr |= (0x1 << irq);
- state->master_irr &= ~(0x1 << irq);
+ if ((irq >= state->master_icw2) && (irq <= state->master_icw2 + 7)) {
+ irq &= 0x7;
+ } else if ((irq >= state->slave_icw2) && (irq <= state->slave_icw2 + 7)) {
+ irq &= 0x7;
+ irq += 8;
+ } else {
+ // PrintError("8259 PIC: Could not find IRQ (0x%x) to Begin\n",irq);
+ return -1;
}
- } else {
- state->slave_isr |= (0x1 << (irq - 8));
- state->slave_irr &= ~(0x1 << (irq - 8));
- }
- return 0;
+ if (irq <= 7) {
+ if (((state->master_irr & ~(state->master_imr)) >> irq) == 0x01) {
+ state->master_isr |= (0x1 << irq);
+ state->master_irr &= ~(0x1 << irq);
+ }
+ } else {
+ state->slave_isr |= (0x1 << (irq - 8));
+ state->slave_irr &= ~(0x1 << (irq - 8));
+ }
+
+ return 0;
}
/*
-static int pic_end_irq(void * private_data, int irq) {
+ static int pic_end_irq(void * private_data, int irq) {
return 0;
-}
+ }
*/
static struct intr_ctrl_ops intr_ops = {
- .intr_pending = pic_intr_pending,
- .get_intr_number = pic_get_intr_number,
- .raise_intr = pic_raise_intr,
- .begin_irq = pic_begin_irq,
- .lower_intr = pic_lower_intr,
+ .intr_pending = pic_intr_pending,
+ .get_intr_number = pic_get_intr_number,
+ .raise_intr = pic_raise_intr,
+ .begin_irq = pic_begin_irq,
+ .lower_intr = pic_lower_intr,
};
static int read_master_port1(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
- if (length != 1) {
- PrintError("8259 PIC: Invalid Read length (rd_Master1)\n");
- return -1;
- }
+ if (length != 1) {
+ PrintError("8259 PIC: Invalid Read length (rd_Master1)\n");
+ return -1;
+ }
- if ((state->master_ocw3 & 0x03) == 0x02) {
- *(uchar_t *)dst = state->master_irr;
- } else if ((state->master_ocw3 & 0x03) == 0x03) {
- *(uchar_t *)dst = state->master_isr;
- } else {
- *(uchar_t *)dst = 0;
- }
+ if ((state->master_ocw3 & 0x03) == 0x02) {
+ *(uchar_t *)dst = state->master_irr;
+ } else if ((state->master_ocw3 & 0x03) == 0x03) {
+ *(uchar_t *)dst = state->master_isr;
+ } else {
+ *(uchar_t *)dst = 0;
+ }
- return 1;
+ return 1;
}
static int read_master_port2(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
- if (length != 1) {
- PrintError("8259 PIC: Invalid Read length (rd_Master2)\n");
- return -1;
- }
+ if (length != 1) {
+ PrintError("8259 PIC: Invalid Read length (rd_Master2)\n");
+ return -1;
+ }
- *(uchar_t *)dst = state->master_imr;
+ *(uchar_t *)dst = state->master_imr;
- return 1;
+ return 1;
}
static int read_slave_port1(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
- if (length != 1) {
- PrintError("8259 PIC: Invalid Read length (rd_Slave1)\n");
- return -1;
- }
+ if (length != 1) {
+ PrintError("8259 PIC: Invalid Read length (rd_Slave1)\n");
+ return -1;
+ }
- if ((state->slave_ocw3 & 0x03) == 0x02) {
- *(uchar_t*)dst = state->slave_irr;
- } else if ((state->slave_ocw3 & 0x03) == 0x03) {
- *(uchar_t *)dst = state->slave_isr;
- } else {
- *(uchar_t *)dst = 0;
- }
+ if ((state->slave_ocw3 & 0x03) == 0x02) {
+ *(uchar_t*)dst = state->slave_irr;
+ } else if ((state->slave_ocw3 & 0x03) == 0x03) {
+ *(uchar_t *)dst = state->slave_isr;
+ } else {
+ *(uchar_t *)dst = 0;
+ }
- return 1;
+ return 1;
}
static int read_slave_port2(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
- if (length != 1) {
- PrintError("8259 PIC: Invalid Read length (rd_Slave2)\n");
- return -1;
- }
+ if (length != 1) {
+ PrintError("8259 PIC: Invalid Read length (rd_Slave2)\n");
+ return -1;
+ }
- *(uchar_t *)dst = state->slave_imr;
+ *(uchar_t *)dst = state->slave_imr;
- return 1;
+ return 1;
}
static int write_master_port1(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
- uchar_t cw = *(uchar_t *)src;
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
+ uchar_t cw = *(uchar_t *)src;
- PrintDebug("8259 PIC: Write master port 1 with 0x%x\n",cw);
+ PrintDebug("8259 PIC: Write master port 1 with 0x%x\n",cw);
- if (length != 1) {
- PrintError("8259 PIC: Invalid Write length (wr_Master1)\n");
- return -1;
- }
+ if (length != 1) {
+ PrintError("8259 PIC: Invalid Write length (wr_Master1)\n");
+ return -1;
+ }
- if (IS_ICW1(cw)) {
+ if (IS_ICW1(cw)) {
- PrintDebug("8259 PIC: Setting ICW1 = %x (wr_Master1)\n", cw);
+ PrintDebug("8259 PIC: Setting ICW1 = %x (wr_Master1)\n", cw);
- state->master_icw1 = cw;
- state->master_state = ICW2;
+ state->master_icw1 = cw;
+ state->master_state = ICW2;
- } else if (state->master_state == READY) {
- if (IS_OCW2(cw)) {
- // handle the EOI here
- struct ocw2 * cw2 = (struct ocw2*)&cw;
+ } else if (state->master_state == READY) {
+ if (IS_OCW2(cw)) {
+ // handle the EOI here
+ struct ocw2 * cw2 = (struct ocw2*)&cw;
- PrintDebug("8259 PIC: Handling OCW2 = %x (wr_Master1)\n", cw);
+ PrintDebug("8259 PIC: Handling OCW2 = %x (wr_Master1)\n", cw);
- if ((cw2->EOI) && (!cw2->R) && (cw2->SL)) {
- // specific EOI;
- state->master_isr &= ~(0x01 << cw2->level);
- } else if ((cw2->EOI) & (!cw2->R) && (!cw2->SL)) {
- int i;
- // Non-specific EOI
- PrintDebug("8259 PIC: Pre ISR = %x (wr_Master1)\n", state->master_isr);
- for (i = 0; i < 8; i++) {
- if (state->master_isr & (0x01 << i)) {
- state->master_isr &= ~(0x01 << i);
- break;
- }
- }
- PrintDebug("8259 PIC: Post ISR = %x (wr_Master1)\n", state->master_isr);
- } else {
- PrintError("8259 PIC: Command not handled, or in error (wr_Master1)\n");
- return -1;
- }
-
- state->master_ocw2 = cw;
- } else if (IS_OCW3(cw)) {
- PrintDebug("8259 PIC: Handling OCW3 = %x (wr_Master1)\n", cw);
- state->master_ocw3 = cw;
+ if ((cw2->EOI) && (!cw2->R) && (cw2->SL)) {
+ // specific EOI;
+ state->master_isr &= ~(0x01 << cw2->level);
+ } else if ((cw2->EOI) & (!cw2->R) && (!cw2->SL)) {
+ int i;
+ // Non-specific EOI
+ PrintDebug("8259 PIC: Pre ISR = %x (wr_Master1)\n", state->master_isr);
+ for (i = 0; i < 8; i++) {
+ if (state->master_isr & (0x01 << i)) {
+ state->master_isr &= ~(0x01 << i);
+ break;
+ }
+ }
+ PrintDebug("8259 PIC: Post ISR = %x (wr_Master1)\n", state->master_isr);
+ } else {
+ PrintError("8259 PIC: Command not handled, or in error (wr_Master1)\n");
+ return -1;
+ }
+
+ state->master_ocw2 = cw;
+ } else if (IS_OCW3(cw)) {
+ PrintDebug("8259 PIC: Handling OCW3 = %x (wr_Master1)\n", cw);
+ state->master_ocw3 = cw;
+ } else {
+ PrintError("8259 PIC: Invalid OCW to PIC (wr_Master1)\n");
+ PrintError("8259 PIC: CW=%x\n", cw);
+ return -1;
+ }
} else {
- PrintError("8259 PIC: Invalid OCW to PIC (wr_Master1)\n");
- PrintError("8259 PIC: CW=%x\n", cw);
- return -1;
+ PrintError("8259 PIC: Invalid PIC State (wr_Master1)\n");
+ PrintError("8259 PIC: CW=%x\n", cw);
+ return -1;
}
- } else {
- PrintError("8259 PIC: Invalid PIC State (wr_Master1)\n");
- PrintError("8259 PIC: CW=%x\n", cw);
- return -1;
- }
- return 1;
+ return 1;
}
static int write_master_port2(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
PrintDebug("8259 PIC: Write master port 2 with 0x%x\n",cw);
if (length != 1) {
- PrintError("8259 PIC: Invalid Write length (wr_Master2)\n");
- return -1;
+ PrintError("8259 PIC: Invalid Write length (wr_Master2)\n");
+ return -1;
}
if (state->master_state == ICW2) {
- struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
+ struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
- PrintDebug("8259 PIC: Setting ICW2 = %x (wr_Master2)\n", cw);
- state->master_icw2 = cw;
+ PrintDebug("8259 PIC: Setting ICW2 = %x (wr_Master2)\n", cw);
+ state->master_icw2 = cw;
- if (cw1->sngl == 0) {
- state->master_state = ICW3;
- } else if (cw1->ic4 == 1) {
- state->master_state = ICW4;
- } else {
- state->master_state = READY;
- }
+ if (cw1->sngl == 0) {
+ state->master_state = ICW3;
+ } else if (cw1->ic4 == 1) {
+ state->master_state = ICW4;
+ } else {
+ state->master_state = READY;
+ }
} else if (state->master_state == ICW3) {
- struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
+ struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
- PrintDebug("8259 PIC: Setting ICW3 = %x (wr_Master2)\n", cw);
+ PrintDebug("8259 PIC: Setting ICW3 = %x (wr_Master2)\n", cw);
- state->master_icw3 = cw;
+ state->master_icw3 = cw;
- if (cw1->ic4 == 1) {
- state->master_state = ICW4;
- } else {
- state->master_state = READY;
- }
+ if (cw1->ic4 == 1) {
+ state->master_state = ICW4;
+ } else {
+ state->master_state = READY;
+ }
} else if (state->master_state == ICW4) {
- PrintDebug("8259 PIC: Setting ICW4 = %x (wr_Master2)\n", cw);
- state->master_icw4 = cw;
- state->master_state = READY;
+ PrintDebug("8259 PIC: Setting ICW4 = %x (wr_Master2)\n", cw);
+ state->master_icw4 = cw;
+ state->master_state = READY;
} else if (state->master_state == READY) {
- PrintDebug("8259 PIC: Setting IMR = %x (wr_Master2)\n", cw);
- state->master_imr = cw;
+ PrintDebug("8259 PIC: Setting IMR = %x (wr_Master2)\n", cw);
+ state->master_imr = cw;
} else {
- // error
- PrintError("8259 PIC: Invalid master PIC State (wr_Master2)\n");
- return -1;
+ // error
+ PrintError("8259 PIC: Invalid master PIC State (wr_Master2)\n");
+ return -1;
}
return 1;
}
static int write_slave_port1(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
- uchar_t cw = *(uchar_t *)src;
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
+ uchar_t cw = *(uchar_t *)src;
- PrintDebug("8259 PIC: Write slave port 1 with 0x%x\n",cw);
+ PrintDebug("8259 PIC: Write slave port 1 with 0x%x\n",cw);
- if (length != 1) {
- // error
- PrintError("8259 PIC: Invalid Write length (wr_Slave1)\n");
- return -1;
- }
+ if (length != 1) {
+ // error
+ PrintError("8259 PIC: Invalid Write length (wr_Slave1)\n");
+ return -1;
+ }
- if (IS_ICW1(cw)) {
- PrintDebug("8259 PIC: Setting ICW1 = %x (wr_Slave1)\n", cw);
- state->slave_icw1 = cw;
- state->slave_state = ICW2;
- } else if (state->slave_state == READY) {
- if (IS_OCW2(cw)) {
- // handle the EOI here
- struct ocw2 * cw2 = (struct ocw2 *)&cw;
+ if (IS_ICW1(cw)) {
+ PrintDebug("8259 PIC: Setting ICW1 = %x (wr_Slave1)\n", cw);
+ state->slave_icw1 = cw;
+ state->slave_state = ICW2;
+ } else if (state->slave_state == READY) {
+ if (IS_OCW2(cw)) {
+ // handle the EOI here
+ struct ocw2 * cw2 = (struct ocw2 *)&cw;
- PrintDebug("8259 PIC: Setting OCW2 = %x (wr_Slave1)\n", cw);
+ PrintDebug("8259 PIC: Setting OCW2 = %x (wr_Slave1)\n", cw);
- if ((cw2->EOI) && (!cw2->R) && (cw2->SL)) {
- // specific EOI;
- state->slave_isr &= ~(0x01 << cw2->level);
- } else if ((cw2->EOI) & (!cw2->R) && (!cw2->SL)) {
- int i;
- // Non-specific EOI
- PrintDebug("8259 PIC: Pre ISR = %x (wr_Slave1)\n", state->slave_isr);
- for (i = 0; i < 8; i++) {
- if (state->slave_isr & (0x01 << i)) {
- state->slave_isr &= ~(0x01 << i);
- break;
- }
- }
- PrintDebug("8259 PIC: Post ISR = %x (wr_Slave1)\n", state->slave_isr);
- } else {
- PrintError("8259 PIC: Command not handled or invalid (wr_Slave1)\n");
- return -1;
- }
-
- state->slave_ocw2 = cw;
- } else if (IS_OCW3(cw)) {
- // Basically sets the IRR/ISR read flag
- PrintDebug("8259 PIC: Setting OCW3 = %x (wr_Slave1)\n", cw);
- state->slave_ocw3 = cw;
+ if ((cw2->EOI) && (!cw2->R) && (cw2->SL)) {
+ // specific EOI;
+ state->slave_isr &= ~(0x01 << cw2->level);
+ } else if ((cw2->EOI) & (!cw2->R) && (!cw2->SL)) {
+ int i;
+ // Non-specific EOI
+ PrintDebug("8259 PIC: Pre ISR = %x (wr_Slave1)\n", state->slave_isr);
+ for (i = 0; i < 8; i++) {
+ if (state->slave_isr & (0x01 << i)) {
+ state->slave_isr &= ~(0x01 << i);
+ break;
+ }
+ }
+ PrintDebug("8259 PIC: Post ISR = %x (wr_Slave1)\n", state->slave_isr);
+ } else {
+ PrintError("8259 PIC: Command not handled or invalid (wr_Slave1)\n");
+ return -1;
+ }
+
+ state->slave_ocw2 = cw;
+ } else if (IS_OCW3(cw)) {
+ // Basically sets the IRR/ISR read flag
+ PrintDebug("8259 PIC: Setting OCW3 = %x (wr_Slave1)\n", cw);
+ state->slave_ocw3 = cw;
+ } else {
+ PrintError("8259 PIC: Invalid command work (wr_Slave1)\n");
+ return -1;
+ }
} else {
- PrintError("8259 PIC: Invalid command work (wr_Slave1)\n");
- return -1;
+ PrintError("8259 PIC: Invalid State writing (wr_Slave1)\n");
+ return -1;
}
- } else {
- PrintError("8259 PIC: Invalid State writing (wr_Slave1)\n");
- return -1;
- }
- return 1;
+ return 1;
}
static int write_slave_port2(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
PrintDebug("8259 PIC: Write slave port 2 with 0x%x\n",cw);
if (length != 1) {
- PrintError("8259 PIC: Invalid write length (wr_Slave2)\n");
- return -1;
+ PrintError("8259 PIC: Invalid write length (wr_Slave2)\n");
+ return -1;
}
if (state->slave_state == ICW2) {
- struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
+ struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
- PrintDebug("8259 PIC: Setting ICW2 = %x (wr_Slave2)\n", cw);
+ PrintDebug("8259 PIC: Setting ICW2 = %x (wr_Slave2)\n", cw);
- state->slave_icw2 = cw;
+ state->slave_icw2 = cw;
- if (cw1->sngl == 0) {
- state->slave_state = ICW3;
- } else if (cw1->ic4 == 1) {
- state->slave_state = ICW4;
- } else {
- state->slave_state = READY;
- }
+ if (cw1->sngl == 0) {
+ state->slave_state = ICW3;
+ } else if (cw1->ic4 == 1) {
+ state->slave_state = ICW4;
+ } else {
+ state->slave_state = READY;
+ }
} else if (state->slave_state == ICW3) {
- struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
+ struct icw1 * cw1 = (struct icw1 *)&(state->master_icw1);
- PrintDebug("8259 PIC: Setting ICW3 = %x (wr_Slave2)\n", cw);
+ PrintDebug("8259 PIC: Setting ICW3 = %x (wr_Slave2)\n", cw);
- state->slave_icw3 = cw;
+ state->slave_icw3 = cw;
- if (cw1->ic4 == 1) {
- state->slave_state = ICW4;
- } else {
- state->slave_state = READY;
- }
+ if (cw1->ic4 == 1) {
+ state->slave_state = ICW4;
+ } else {
+ state->slave_state = READY;
+ }
} else if (state->slave_state == ICW4) {
- PrintDebug("8259 PIC: Setting ICW4 = %x (wr_Slave2)\n", cw);
- state->slave_icw4 = cw;
- state->slave_state = READY;
+ PrintDebug("8259 PIC: Setting ICW4 = %x (wr_Slave2)\n", cw);
+ state->slave_icw4 = cw;
+ state->slave_state = READY;
} else if (state->slave_state == READY) {
- PrintDebug("8259 PIC: Setting IMR = %x (wr_Slave2)\n", cw);
- state->slave_imr = cw;
+ PrintDebug("8259 PIC: Setting IMR = %x (wr_Slave2)\n", cw);
+ state->slave_imr = cw;
} else {
- PrintError("8259 PIC: Invalid State at write (wr_Slave2)\n");
- return -1;
+ PrintError("8259 PIC: Invalid State at write (wr_Slave2)\n");
+ return -1;
}
return 1;
static int pic_init(struct vm_device * dev) {
- struct pic_internal * state = (struct pic_internal*)dev->private_data;
-
- v3_register_intr_controller(dev->vm, &intr_ops, state);
-
- state->master_irr = 0;
- state->master_isr = 0;
- state->master_icw1 = 0;
- state->master_icw2 = 0;
- state->master_icw3 = 0;
- state->master_icw4 = 0;
- state->master_imr = 0;
- state->master_ocw2 = 0;
- state->master_ocw3 = 0x02;
- state->master_state = ICW1;
-
-
- state->slave_irr = 0;
- state->slave_isr = 0;
- state->slave_icw1 = 0;
- state->slave_icw2 = 0;
- state->slave_icw3 = 0;
- state->slave_icw4 = 0;
- state->slave_imr = 0;
- state->slave_ocw2 = 0;
- state->slave_ocw3 = 0x02;
- state->slave_state = ICW1;
-
-
- v3_dev_hook_io(dev, MASTER_PORT1, &read_master_port1, &write_master_port1);
- v3_dev_hook_io(dev, MASTER_PORT2, &read_master_port2, &write_master_port2);
- v3_dev_hook_io(dev, SLAVE_PORT1, &read_slave_port1, &write_slave_port1);
- v3_dev_hook_io(dev, SLAVE_PORT2, &read_slave_port2, &write_slave_port2);
+ struct pic_internal * state = (struct pic_internal*)dev->private_data;
- return 0;
+ v3_register_intr_controller(dev->vm, &intr_ops, state);
+
+ state->master_irr = 0;
+ state->master_isr = 0;
+ state->master_icw1 = 0;
+ state->master_icw2 = 0;
+ state->master_icw3 = 0;
+ state->master_icw4 = 0;
+ state->master_imr = 0;
+ state->master_ocw2 = 0;
+ state->master_ocw3 = 0x02;
+ state->master_state = ICW1;
+
+
+ state->slave_irr = 0;
+ state->slave_isr = 0;
+ state->slave_icw1 = 0;
+ state->slave_icw2 = 0;
+ state->slave_icw3 = 0;
+ state->slave_icw4 = 0;
+ state->slave_imr = 0;
+ state->slave_ocw2 = 0;
+ state->slave_ocw3 = 0x02;
+ state->slave_state = ICW1;
+
+
+ v3_dev_hook_io(dev, MASTER_PORT1, &read_master_port1, &write_master_port1);
+ v3_dev_hook_io(dev, MASTER_PORT2, &read_master_port2, &write_master_port2);
+ v3_dev_hook_io(dev, SLAVE_PORT1, &read_slave_port1, &write_slave_port1);
+ v3_dev_hook_io(dev, SLAVE_PORT2, &read_slave_port2, &write_slave_port2);
+
+ return 0;
}
static int pic_deinit(struct vm_device * dev) {
- v3_dev_unhook_io(dev, MASTER_PORT1);
- v3_dev_unhook_io(dev, MASTER_PORT2);
- v3_dev_unhook_io(dev, SLAVE_PORT1);
- v3_dev_unhook_io(dev, SLAVE_PORT2);
+ v3_dev_unhook_io(dev, MASTER_PORT1);
+ v3_dev_unhook_io(dev, MASTER_PORT2);
+ v3_dev_unhook_io(dev, SLAVE_PORT1);
+ v3_dev_unhook_io(dev, SLAVE_PORT2);
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = pic_init,
- .deinit = pic_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = pic_init,
+ .deinit = pic_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_pic() {
- struct pic_internal * state = NULL;
- state = (struct pic_internal *)V3_Malloc(sizeof(struct pic_internal));
- V3_ASSERT(state != NULL);
+ struct pic_internal * state = NULL;
+ state = (struct pic_internal *)V3_Malloc(sizeof(struct pic_internal));
+ V3_ASSERT(state != NULL);
- struct vm_device *device = v3_create_device("8259A", &dev_ops, state);
+ struct vm_device *device = v3_create_device("8259A", &dev_ops, state);
- return device;
+ return device;
}
-
-
-
-
struct apic_msr {
- union {
- uint64_t val;
- struct {
- uchar_t rsvd;
- uint_t bootstrap_cpu : 1;
- uint_t rsvd2 : 2;
- uint_t apic_enable : 1;
- ullong_t base_addr : 40;
- uint_t rsvd3 : 12;
+ union {
+ uint64_t val;
+ struct {
+ uchar_t rsvd;
+ uint_t bootstrap_cpu : 1;
+ uint_t rsvd2 : 2;
+ uint_t apic_enable : 1;
+ ullong_t base_addr : 40;
+ uint_t rsvd3 : 12;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct apic_state {
- addr_t base_addr;
-
- /* MSRs */
- v3_msr_t base_addr_msr;
-
-
- /* memory map registers */
-
- struct lapic_id_reg lapic_id;
- struct apic_ver_reg apic_ver;
- struct ext_apic_ctrl_reg ext_apic_ctrl;
- struct local_vec_tbl_reg local_vec_tbl;
- struct tmr_vec_tbl_reg tmr_vec_tbl;
- struct tmr_div_cfg_reg tmr_div_cfg;
- struct lint_vec_tbl_reg lint0_vec_tbl;
- struct lint_vec_tbl_reg lint1_vec_tbl;
- struct perf_ctr_loc_vec_tbl_reg perf_ctr_loc_vec_tbl;
- struct therm_loc_vec_tbl_reg therm_loc_vec_tbl;
- struct err_vec_tbl_reg err_vec_tbl;
- struct err_status_reg err_status;
- struct spurious_int_reg spurious_int;
- struct int_cmd_reg int_cmd;
- struct log_dst_reg log_dst;
- struct dst_fmt_reg dst_fmt;
- struct arb_prio_reg arb_prio;
- struct task_prio_reg task_prio;
- struct proc_prio_reg proc_prio;
- struct ext_apic_feature_reg ext_apic_feature;
- struct spec_eoi_reg spec_eoi;
+ addr_t base_addr;
+
+ /* MSRs */
+ v3_msr_t base_addr_msr;
+
+
+ /* memory map registers */
+
+ struct lapic_id_reg lapic_id;
+ struct apic_ver_reg apic_ver;
+ struct ext_apic_ctrl_reg ext_apic_ctrl;
+ struct local_vec_tbl_reg local_vec_tbl;
+ struct tmr_vec_tbl_reg tmr_vec_tbl;
+ struct tmr_div_cfg_reg tmr_div_cfg;
+ struct lint_vec_tbl_reg lint0_vec_tbl;
+ struct lint_vec_tbl_reg lint1_vec_tbl;
+ struct perf_ctr_loc_vec_tbl_reg perf_ctr_loc_vec_tbl;
+ struct therm_loc_vec_tbl_reg therm_loc_vec_tbl;
+ struct err_vec_tbl_reg err_vec_tbl;
+ struct err_status_reg err_status;
+ struct spurious_int_reg spurious_int;
+ struct int_cmd_reg int_cmd;
+ struct log_dst_reg log_dst;
+ struct dst_fmt_reg dst_fmt;
+ struct arb_prio_reg arb_prio;
+ struct task_prio_reg task_prio;
+ struct proc_prio_reg proc_prio;
+ struct ext_apic_feature_reg ext_apic_feature;
+ struct spec_eoi_reg spec_eoi;
- uint32_t tmr_cur_cnt;
- uint32_t tmr_init_cnt;
+ uint32_t tmr_cur_cnt;
+ uint32_t tmr_init_cnt;
- uint32_t rem_rd_data;
+ uint32_t rem_rd_data;
- uchar_t int_req_reg[32];
- uchar_t int_svc_reg[32];
- uchar_t int_en_reg[32];
- uchar_t trig_mode_reg[32];
+ uchar_t int_req_reg[32];
+ uchar_t int_svc_reg[32];
+ uchar_t int_en_reg[32];
+ uchar_t trig_mode_reg[32];
- uint32_t eoi;
+ uint32_t eoi;
};
static void init_apic_state(struct apic_state * apic) {
- apic->base_addr = DEFAULT_BASE_ADDR;
- apic->base_addr_msr.value = 0x0000000000000900LL;
- apic->base_addr_msr.value |= ((uint64_t)DEFAULT_BASE_ADDR);
-
- PrintDebug("Sizeof Interrupt Request Register %d, should be 32\n",
- (uint_t)sizeof(apic->int_req_reg));
-
- memset(apic->int_req_reg, 0, sizeof(apic->int_req_reg));
- memset(apic->int_svc_reg, 0, sizeof(apic->int_svc_reg));
- memset(apic->int_en_reg, 0xff, sizeof(apic->int_en_reg));
- memset(apic->trig_mode_reg, 0, sizeof(apic->trig_mode_reg));
-
- apic->eoi = 0x00000000;
- apic->rem_rd_data = 0x00000000;
- apic->tmr_init_cnt = 0x00000000;
- apic->tmr_cur_cnt = 0x00000000;
-
- // TODO:
- // We need to figure out what the APIC ID is....
- apic->lapic_id.val = 0x00000000;
-
- // The P6 has 6 LVT entries, so we set the value to (6-1)...
- apic->apic_ver.val = 0x80050010;
-
- apic->task_prio.val = 0x00000000;
- apic->arb_prio.val = 0x00000000;
- apic->proc_prio.val = 0x00000000;
- apic->log_dst.val = 0x00000000;
- apic->dst_fmt.val = 0xffffffff;
- apic->spurious_int.val = 0x000000ff;
- apic->err_status.val = 0x00000000;
- apic->int_cmd.val = 0x0000000000000000LL;
- apic->tmr_vec_tbl.val = 0x00010000;
- apic->therm_loc_vec_tbl.val = 0x00010000;
- apic->perf_ctr_loc_vec_tbl.val = 0x00010000;
- apic->lint0_vec_tbl.val = 0x00010000;
- apic->lint1_vec_tbl.val = 0x00010000;
- apic->err_vec_tbl.val = 0x00010000;
- apic->tmr_div_cfg.val = 0x00000000;
- apic->ext_apic_feature.val = 0x00040007;
- apic->ext_apic_ctrl.val = 0x00000000;
- apic->spec_eoi.val = 0x00000000;
+ apic->base_addr = DEFAULT_BASE_ADDR;
+ apic->base_addr_msr.value = 0x0000000000000900LL;
+ apic->base_addr_msr.value |= ((uint64_t)DEFAULT_BASE_ADDR);
+
+ PrintDebug("Sizeof Interrupt Request Register %d, should be 32\n",
+ (uint_t)sizeof(apic->int_req_reg));
+
+ memset(apic->int_req_reg, 0, sizeof(apic->int_req_reg));
+ memset(apic->int_svc_reg, 0, sizeof(apic->int_svc_reg));
+ memset(apic->int_en_reg, 0xff, sizeof(apic->int_en_reg));
+ memset(apic->trig_mode_reg, 0, sizeof(apic->trig_mode_reg));
+
+ apic->eoi = 0x00000000;
+ apic->rem_rd_data = 0x00000000;
+ apic->tmr_init_cnt = 0x00000000;
+ apic->tmr_cur_cnt = 0x00000000;
+
+ // TODO:
+ // We need to figure out what the APIC ID is....
+ apic->lapic_id.val = 0x00000000;
+
+ // The P6 has 6 LVT entries, so we set the value to (6-1)...
+ apic->apic_ver.val = 0x80050010;
+
+ apic->task_prio.val = 0x00000000;
+ apic->arb_prio.val = 0x00000000;
+ apic->proc_prio.val = 0x00000000;
+ apic->log_dst.val = 0x00000000;
+ apic->dst_fmt.val = 0xffffffff;
+ apic->spurious_int.val = 0x000000ff;
+ apic->err_status.val = 0x00000000;
+ apic->int_cmd.val = 0x0000000000000000LL;
+ apic->tmr_vec_tbl.val = 0x00010000;
+ apic->therm_loc_vec_tbl.val = 0x00010000;
+ apic->perf_ctr_loc_vec_tbl.val = 0x00010000;
+ apic->lint0_vec_tbl.val = 0x00010000;
+ apic->lint1_vec_tbl.val = 0x00010000;
+ apic->err_vec_tbl.val = 0x00010000;
+ apic->tmr_div_cfg.val = 0x00000000;
+ apic->ext_apic_feature.val = 0x00040007;
+ apic->ext_apic_ctrl.val = 0x00000000;
+ apic->spec_eoi.val = 0x00000000;
}
static int read_apic_msr(uint_t msr, v3_msr_t * dst, void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- PrintError("READING APIC BASE ADDR: HI=%x LO=%x\n", apic->base_addr_msr.hi, apic->base_addr_msr.lo);
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ PrintError("READING APIC BASE ADDR: HI=%x LO=%x\n", apic->base_addr_msr.hi, apic->base_addr_msr.lo);
- return -1;
+ return -1;
}
static int write_apic_msr(uint_t msr, v3_msr_t src, void * priv_data) {
- // struct vm_device * dev = (struct vm_device *)priv_data;
- // struct apic_state * apic = (struct apic_state *)dev->private_data;
+ // struct vm_device * dev = (struct vm_device *)priv_data;
+ // struct apic_state * apic = (struct apic_state *)dev->private_data;
- PrintError("WRITING APIC BASE ADDR: HI=%x LO=%x\n", src.hi, src.lo);
+ PrintError("WRITING APIC BASE ADDR: HI=%x LO=%x\n", src.hi, src.lo);
- return -1;
+ return -1;
}
// irq_num is the bit offset into a 256 bit buffer...
static int activate_apic_irq(struct apic_state * apic, uint32_t irq_num) {
- int major_offset = (irq_num & ~0x00000007) >> 3;
- int minor_offset = irq_num & 0x00000007;
- uchar_t * req_location = apic->int_req_reg + major_offset;
- uchar_t * en_location = apic->int_en_reg + major_offset;
- uchar_t flag = 0x1 << minor_offset;
-
- if (irq_num <= 15) {
- PrintError("Attempting to raise an invalid interrupt: %d\n", irq_num);
- return -1;
- }
+ int major_offset = (irq_num & ~0x00000007) >> 3;
+ int minor_offset = irq_num & 0x00000007;
+ uchar_t * req_location = apic->int_req_reg + major_offset;
+ uchar_t * en_location = apic->int_en_reg + major_offset;
+ uchar_t flag = 0x1 << minor_offset;
+
+ if (irq_num <= 15) {
+ PrintError("Attempting to raise an invalid interrupt: %d\n", irq_num);
+ return -1;
+ }
- PrintDebug("Raising APIC IRQ %d\n", irq_num);
+ PrintDebug("Raising APIC IRQ %d\n", irq_num);
- if (*en_location & flag) {
- *req_location |= flag;
- } else {
- PrintDebug("Interrupt not enabled... %.2x\n", *en_location);
- return 0;
- }
+ if (*en_location & flag) {
+ *req_location |= flag;
+ } else {
+ PrintDebug("Interrupt not enabled... %.2x\n", *en_location);
+ return 0;
+ }
- return 0;
+ return 0;
}
static int apic_do_eoi(struct apic_state * apic) {
- int i = 0, j = 0;
+ int i = 0, j = 0;
- // We iterate backwards to find the highest priority
- for (i = 31; i >= 0; i--) {
- uchar_t * svc_major = apic->int_svc_reg + i;
+ // We iterate backwards to find the highest priority
+ for (i = 31; i >= 0; i--) {
+ uchar_t * svc_major = apic->int_svc_reg + i;
- if ((*svc_major) & 0xff) {
- for (j = 7; j >= 0; j--) {
- uchar_t flag = 0x1 << j;
- if ((*svc_major) & flag) {
- *svc_major &= ~flag;
- return 0;
+ if ((*svc_major) & 0xff) {
+ for (j = 7; j >= 0; j--) {
+ uchar_t flag = 0x1 << j;
+ if ((*svc_major) & flag) {
+ *svc_major &= ~flag;
+ return 0;
+ }
+ }
}
- }
}
- }
- return 0;
+ return 0;
}
static int activate_internal_irq(struct apic_state * apic, apic_irq_type_t int_type) {
- uint32_t vec_num = 0;
- uint32_t del_mode = 0;
- int masked = 0;
-
-
- switch (int_type) {
- case APIC_TMR_INT:
- vec_num = apic->tmr_vec_tbl.vec;
- del_mode = APIC_FIXED_DELIVERY;
- masked = apic->tmr_vec_tbl.mask;
- break;
- case APIC_THERM_INT:
- vec_num = apic->therm_loc_vec_tbl.vec;
- del_mode = apic->therm_loc_vec_tbl.msg_type;
- masked = apic->therm_loc_vec_tbl.mask;
- break;
- case APIC_PERF_INT:
- vec_num = apic->perf_ctr_loc_vec_tbl.vec;
- del_mode = apic->perf_ctr_loc_vec_tbl.msg_type;
- masked = apic->perf_ctr_loc_vec_tbl.mask;
- break;
- case APIC_LINT0_INT:
- vec_num = apic->lint0_vec_tbl.vec;
- del_mode = apic->lint0_vec_tbl.msg_type;
- masked = apic->lint0_vec_tbl.mask;
- break;
- case APIC_LINT1_INT:
- vec_num = apic->lint1_vec_tbl.vec;
- del_mode = apic->lint1_vec_tbl.msg_type;
- masked = apic->lint1_vec_tbl.mask;
- break;
- case APIC_ERR_INT:
- vec_num = apic->err_vec_tbl.vec;
- del_mode = APIC_FIXED_DELIVERY;
- masked = apic->err_vec_tbl.mask;
- break;
- default:
- PrintError("Invalid APIC interrupt type\n");
- return -1;
- }
+ uint32_t vec_num = 0;
+ uint32_t del_mode = 0;
+ int masked = 0;
+
+
+ switch (int_type) {
+ case APIC_TMR_INT:
+ vec_num = apic->tmr_vec_tbl.vec;
+ del_mode = APIC_FIXED_DELIVERY;
+ masked = apic->tmr_vec_tbl.mask;
+ break;
+ case APIC_THERM_INT:
+ vec_num = apic->therm_loc_vec_tbl.vec;
+ del_mode = apic->therm_loc_vec_tbl.msg_type;
+ masked = apic->therm_loc_vec_tbl.mask;
+ break;
+ case APIC_PERF_INT:
+ vec_num = apic->perf_ctr_loc_vec_tbl.vec;
+ del_mode = apic->perf_ctr_loc_vec_tbl.msg_type;
+ masked = apic->perf_ctr_loc_vec_tbl.mask;
+ break;
+ case APIC_LINT0_INT:
+ vec_num = apic->lint0_vec_tbl.vec;
+ del_mode = apic->lint0_vec_tbl.msg_type;
+ masked = apic->lint0_vec_tbl.mask;
+ break;
+ case APIC_LINT1_INT:
+ vec_num = apic->lint1_vec_tbl.vec;
+ del_mode = apic->lint1_vec_tbl.msg_type;
+ masked = apic->lint1_vec_tbl.mask;
+ break;
+ case APIC_ERR_INT:
+ vec_num = apic->err_vec_tbl.vec;
+ del_mode = APIC_FIXED_DELIVERY;
+ masked = apic->err_vec_tbl.mask;
+ break;
+ default:
+ PrintError("Invalid APIC interrupt type\n");
+ return -1;
+ }
- // interrupt is masked, don't send
- if (masked == 1) {
- PrintDebug("Inerrupt is masked\n");
- return 0;
- }
+ // interrupt is masked, don't send
+ if (masked == 1) {
+ PrintDebug("Inerrupt is masked\n");
+ return 0;
+ }
- if (del_mode == APIC_FIXED_DELIVERY) {
- //PrintDebug("Activating internal APIC IRQ %d\n", vec_num);
- return activate_apic_irq(apic, vec_num);
- } else {
- PrintError("Unhandled Delivery Mode\n");
- return -1;
- }
+ if (del_mode == APIC_FIXED_DELIVERY) {
+ //PrintDebug("Activating internal APIC IRQ %d\n", vec_num);
+ return activate_apic_irq(apic, vec_num);
+ } else {
+ PrintError("Unhandled Delivery Mode\n");
+ return -1;
+ }
}
static int apic_read(addr_t guest_addr, void * dst, uint_t length, void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- addr_t reg_addr = guest_addr - apic->base_addr;
- struct apic_msr * msr = (struct apic_msr *)&(apic->base_addr_msr.value);
- uint32_t val = 0;
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ addr_t reg_addr = guest_addr - apic->base_addr;
+ struct apic_msr * msr = (struct apic_msr *)&(apic->base_addr_msr.value);
+ uint32_t val = 0;
- PrintDebug("Read apic address space (%p)\n",
- (void *)guest_addr);
+ PrintDebug("Read apic address space (%p)\n",
+ (void *)guest_addr);
- if (msr->apic_enable == 0) {
- PrintError("Write to APIC address space with disabled APIC\n");
- return -1;
- }
-
-
- /* Because "May not be supported" doesn't matter to Linux developers... */
- /* if (length != 4) { */
- /* PrintError("Invalid apic read length (%d)\n", length); */
- /* return -1; */
- /* } */
-
- switch (reg_addr & ~0x3) {
- case EOI_OFFSET:
- // Well, only an idiot would read from a architectural write only register
- // Oh, Hello Linux.
- // PrintError("Attempting to read from write only register\n");
- // return -1;
- break;
-
- // data registers
- case APIC_ID_OFFSET:
- val = apic->lapic_id.val;
- break;
- case APIC_VERSION_OFFSET:
- val = apic->apic_ver.val;
- break;
- case TPR_OFFSET:
- val = apic->task_prio.val;
- break;
- case APR_OFFSET:
- val = apic->arb_prio.val;
- break;
- case PPR_OFFSET:
- val = apic->proc_prio.val;
- break;
- case REMOTE_READ_OFFSET:
- val = apic->rem_rd_data;
- break;
- case LDR_OFFSET:
- val = apic->log_dst.val;
- break;
- case DFR_OFFSET:
- val = apic->dst_fmt.val;
- break;
- case SPURIOUS_INT_VEC_OFFSET:
- val = apic->spurious_int.val;
- break;
- case ESR_OFFSET:
- val = apic->err_status.val;
- break;
- case TMR_LOC_VEC_TBL_OFFSET:
- val = apic->tmr_vec_tbl.val;
- break;
- case LINT0_VEC_TBL_OFFSET:
- val = apic->lint0_vec_tbl.val;
- break;
- case LINT1_VEC_TBL_OFFSET:
- val = apic->lint1_vec_tbl.val;
- break;
- case ERR_VEC_TBL_OFFSET:
- val = apic->err_vec_tbl.val;
- break;
- case TMR_INIT_CNT_OFFSET:
- val = apic->tmr_init_cnt;
- break;
- case TMR_DIV_CFG_OFFSET:
- val = apic->tmr_div_cfg.val;
- break;
-
- case IER_OFFSET0:
- val = *(uint32_t *)(apic->int_en_reg);
- break;
- case IER_OFFSET1:
- val = *(uint32_t *)(apic->int_en_reg + 4);
- break;
- case IER_OFFSET2:
- val = *(uint32_t *)(apic->int_en_reg + 8);
- break;
- case IER_OFFSET3:
- val = *(uint32_t *)(apic->int_en_reg + 12);
- break;
- case IER_OFFSET4:
- val = *(uint32_t *)(apic->int_en_reg + 16);
- break;
- case IER_OFFSET5:
- val = *(uint32_t *)(apic->int_en_reg + 20);
- break;
- case IER_OFFSET6:
- val = *(uint32_t *)(apic->int_en_reg + 24);
- break;
- case IER_OFFSET7:
- val = *(uint32_t *)(apic->int_en_reg + 28);
- break;
-
- case ISR_OFFSET0:
- val = *(uint32_t *)(apic->int_svc_reg);
- break;
- case ISR_OFFSET1:
- val = *(uint32_t *)(apic->int_svc_reg + 4);
- break;
- case ISR_OFFSET2:
- val = *(uint32_t *)(apic->int_svc_reg + 8);
- break;
- case ISR_OFFSET3:
- val = *(uint32_t *)(apic->int_svc_reg + 12);
- break;
- case ISR_OFFSET4:
- val = *(uint32_t *)(apic->int_svc_reg + 16);
- break;
- case ISR_OFFSET5:
- val = *(uint32_t *)(apic->int_svc_reg + 20);
- break;
- case ISR_OFFSET6:
- val = *(uint32_t *)(apic->int_svc_reg + 24);
- break;
- case ISR_OFFSET7:
- val = *(uint32_t *)(apic->int_svc_reg + 28);
- break;
+ if (msr->apic_enable == 0) {
+ PrintError("Write to APIC address space with disabled APIC\n");
+ return -1;
+ }
+
+
+ /* Because "May not be supported" doesn't matter to Linux developers... */
+ /* if (length != 4) { */
+ /* PrintError("Invalid apic read length (%d)\n", length); */
+ /* return -1; */
+ /* } */
+
+ switch (reg_addr & ~0x3) {
+ case EOI_OFFSET:
+ // Well, only an idiot would read from a architectural write only register
+ // Oh, Hello Linux.
+ // PrintError("Attempting to read from write only register\n");
+ // return -1;
+ break;
+
+ // data registers
+ case APIC_ID_OFFSET:
+ val = apic->lapic_id.val;
+ break;
+ case APIC_VERSION_OFFSET:
+ val = apic->apic_ver.val;
+ break;
+ case TPR_OFFSET:
+ val = apic->task_prio.val;
+ break;
+ case APR_OFFSET:
+ val = apic->arb_prio.val;
+ break;
+ case PPR_OFFSET:
+ val = apic->proc_prio.val;
+ break;
+ case REMOTE_READ_OFFSET:
+ val = apic->rem_rd_data;
+ break;
+ case LDR_OFFSET:
+ val = apic->log_dst.val;
+ break;
+ case DFR_OFFSET:
+ val = apic->dst_fmt.val;
+ break;
+ case SPURIOUS_INT_VEC_OFFSET:
+ val = apic->spurious_int.val;
+ break;
+ case ESR_OFFSET:
+ val = apic->err_status.val;
+ break;
+ case TMR_LOC_VEC_TBL_OFFSET:
+ val = apic->tmr_vec_tbl.val;
+ break;
+ case LINT0_VEC_TBL_OFFSET:
+ val = apic->lint0_vec_tbl.val;
+ break;
+ case LINT1_VEC_TBL_OFFSET:
+ val = apic->lint1_vec_tbl.val;
+ break;
+ case ERR_VEC_TBL_OFFSET:
+ val = apic->err_vec_tbl.val;
+ break;
+ case TMR_INIT_CNT_OFFSET:
+ val = apic->tmr_init_cnt;
+ break;
+ case TMR_DIV_CFG_OFFSET:
+ val = apic->tmr_div_cfg.val;
+ break;
+
+ case IER_OFFSET0:
+ val = *(uint32_t *)(apic->int_en_reg);
+ break;
+ case IER_OFFSET1:
+ val = *(uint32_t *)(apic->int_en_reg + 4);
+ break;
+ case IER_OFFSET2:
+ val = *(uint32_t *)(apic->int_en_reg + 8);
+ break;
+ case IER_OFFSET3:
+ val = *(uint32_t *)(apic->int_en_reg + 12);
+ break;
+ case IER_OFFSET4:
+ val = *(uint32_t *)(apic->int_en_reg + 16);
+ break;
+ case IER_OFFSET5:
+ val = *(uint32_t *)(apic->int_en_reg + 20);
+ break;
+ case IER_OFFSET6:
+ val = *(uint32_t *)(apic->int_en_reg + 24);
+ break;
+ case IER_OFFSET7:
+ val = *(uint32_t *)(apic->int_en_reg + 28);
+ break;
+
+ case ISR_OFFSET0:
+ val = *(uint32_t *)(apic->int_svc_reg);
+ break;
+ case ISR_OFFSET1:
+ val = *(uint32_t *)(apic->int_svc_reg + 4);
+ break;
+ case ISR_OFFSET2:
+ val = *(uint32_t *)(apic->int_svc_reg + 8);
+ break;
+ case ISR_OFFSET3:
+ val = *(uint32_t *)(apic->int_svc_reg + 12);
+ break;
+ case ISR_OFFSET4:
+ val = *(uint32_t *)(apic->int_svc_reg + 16);
+ break;
+ case ISR_OFFSET5:
+ val = *(uint32_t *)(apic->int_svc_reg + 20);
+ break;
+ case ISR_OFFSET6:
+ val = *(uint32_t *)(apic->int_svc_reg + 24);
+ break;
+ case ISR_OFFSET7:
+ val = *(uint32_t *)(apic->int_svc_reg + 28);
+ break;
- case TRIG_OFFSET0:
- val = *(uint32_t *)(apic->trig_mode_reg);
- break;
- case TRIG_OFFSET1:
- val = *(uint32_t *)(apic->trig_mode_reg + 4);
- break;
- case TRIG_OFFSET2:
- val = *(uint32_t *)(apic->trig_mode_reg + 8);
- break;
- case TRIG_OFFSET3:
- val = *(uint32_t *)(apic->trig_mode_reg + 12);
- break;
- case TRIG_OFFSET4:
- val = *(uint32_t *)(apic->trig_mode_reg + 16);
- break;
- case TRIG_OFFSET5:
- val = *(uint32_t *)(apic->trig_mode_reg + 20);
- break;
- case TRIG_OFFSET6:
- val = *(uint32_t *)(apic->trig_mode_reg + 24);
- break;
- case TRIG_OFFSET7:
- val = *(uint32_t *)(apic->trig_mode_reg + 28);
- break;
-
- case IRR_OFFSET0:
- val = *(uint32_t *)(apic->int_req_reg);
- break;
- case IRR_OFFSET1:
- val = *(uint32_t *)(apic->int_req_reg + 4);
- break;
- case IRR_OFFSET2:
- val = *(uint32_t *)(apic->int_req_reg + 8);
- break;
- case IRR_OFFSET3:
- val = *(uint32_t *)(apic->int_req_reg + 12);
- break;
- case IRR_OFFSET4:
- val = *(uint32_t *)(apic->int_req_reg + 16);
- break;
- case IRR_OFFSET5:
- val = *(uint32_t *)(apic->int_req_reg + 20);
- break;
- case IRR_OFFSET6:
- val = *(uint32_t *)(apic->int_req_reg + 24);
- break;
- case IRR_OFFSET7:
- val = *(uint32_t *)(apic->int_req_reg + 28);
- break;
- case TMR_CUR_CNT_OFFSET:
- val = apic->tmr_cur_cnt;
- break;
-
- // We are not going to implement these....
- case THERM_LOC_VEC_TBL_OFFSET:
- val = apic->therm_loc_vec_tbl.val;
- break;
- case PERF_CTR_LOC_VEC_TBL_OFFSET:
- val = apic->perf_ctr_loc_vec_tbl.val;
- break;
+ case TRIG_OFFSET0:
+ val = *(uint32_t *)(apic->trig_mode_reg);
+ break;
+ case TRIG_OFFSET1:
+ val = *(uint32_t *)(apic->trig_mode_reg + 4);
+ break;
+ case TRIG_OFFSET2:
+ val = *(uint32_t *)(apic->trig_mode_reg + 8);
+ break;
+ case TRIG_OFFSET3:
+ val = *(uint32_t *)(apic->trig_mode_reg + 12);
+ break;
+ case TRIG_OFFSET4:
+ val = *(uint32_t *)(apic->trig_mode_reg + 16);
+ break;
+ case TRIG_OFFSET5:
+ val = *(uint32_t *)(apic->trig_mode_reg + 20);
+ break;
+ case TRIG_OFFSET6:
+ val = *(uint32_t *)(apic->trig_mode_reg + 24);
+ break;
+ case TRIG_OFFSET7:
+ val = *(uint32_t *)(apic->trig_mode_reg + 28);
+ break;
+
+ case IRR_OFFSET0:
+ val = *(uint32_t *)(apic->int_req_reg);
+ break;
+ case IRR_OFFSET1:
+ val = *(uint32_t *)(apic->int_req_reg + 4);
+ break;
+ case IRR_OFFSET2:
+ val = *(uint32_t *)(apic->int_req_reg + 8);
+ break;
+ case IRR_OFFSET3:
+ val = *(uint32_t *)(apic->int_req_reg + 12);
+ break;
+ case IRR_OFFSET4:
+ val = *(uint32_t *)(apic->int_req_reg + 16);
+ break;
+ case IRR_OFFSET5:
+ val = *(uint32_t *)(apic->int_req_reg + 20);
+ break;
+ case IRR_OFFSET6:
+ val = *(uint32_t *)(apic->int_req_reg + 24);
+ break;
+ case IRR_OFFSET7:
+ val = *(uint32_t *)(apic->int_req_reg + 28);
+ break;
+ case TMR_CUR_CNT_OFFSET:
+ val = apic->tmr_cur_cnt;
+ break;
+
+ // We are not going to implement these....
+ case THERM_LOC_VEC_TBL_OFFSET:
+ val = apic->therm_loc_vec_tbl.val;
+ break;
+ case PERF_CTR_LOC_VEC_TBL_OFFSET:
+ val = apic->perf_ctr_loc_vec_tbl.val;
+ break;
- // handled registers
- case INT_CMD_LO_OFFSET:
- val = apic->int_cmd.lo;
- break;
- case INT_CMD_HI_OFFSET:
- val = apic->int_cmd.hi;
- break;
-
- // handle current timer count
-
- // Unhandled Registers
- case EXT_INT_LOC_VEC_TBL_OFFSET0:
- case EXT_INT_LOC_VEC_TBL_OFFSET1:
- case EXT_INT_LOC_VEC_TBL_OFFSET2:
- case EXT_INT_LOC_VEC_TBL_OFFSET3:
- case EXT_APIC_FEATURE_OFFSET:
- case EXT_APIC_CMD_OFFSET:
- case SEOI_OFFSET:
-
- default:
- PrintError("Read from Unhandled APIC Register: %x\n", (uint32_t)reg_addr);
- return -1;
- }
+ // handled registers
+ case INT_CMD_LO_OFFSET:
+ val = apic->int_cmd.lo;
+ break;
+ case INT_CMD_HI_OFFSET:
+ val = apic->int_cmd.hi;
+ break;
+
+ // handle current timer count
+
+ // Unhandled Registers
+ case EXT_INT_LOC_VEC_TBL_OFFSET0:
+ case EXT_INT_LOC_VEC_TBL_OFFSET1:
+ case EXT_INT_LOC_VEC_TBL_OFFSET2:
+ case EXT_INT_LOC_VEC_TBL_OFFSET3:
+ case EXT_APIC_FEATURE_OFFSET:
+ case EXT_APIC_CMD_OFFSET:
+ case SEOI_OFFSET:
+
+ default:
+ PrintError("Read from Unhandled APIC Register: %x\n", (uint32_t)reg_addr);
+ return -1;
+ }
- if (length == 1) {
- uint_t byte_addr = reg_addr & 0x3;
- uint8_t * val_ptr = (uint8_t *)dst;
+ if (length == 1) {
+ uint_t byte_addr = reg_addr & 0x3;
+ uint8_t * val_ptr = (uint8_t *)dst;
- *val_ptr = *(((uint8_t *)&val) + byte_addr);
+ *val_ptr = *(((uint8_t *)&val) + byte_addr);
- } else if ((length == 2) &&
- ((reg_addr & 0x3) == 0x3)) {
- uint_t byte_addr = reg_addr & 0x3;
- uint16_t * val_ptr = (uint16_t *)dst;
- *val_ptr = *(((uint16_t *)&val) + byte_addr);
+ } else if ((length == 2) &&
+ ((reg_addr & 0x3) == 0x3)) {
+ uint_t byte_addr = reg_addr & 0x3;
+ uint16_t * val_ptr = (uint16_t *)dst;
+ *val_ptr = *(((uint16_t *)&val) + byte_addr);
- } else if (length == 4) {
- uint32_t * val_ptr = (uint32_t *)dst;
- *val_ptr = val;
+ } else if (length == 4) {
+ uint32_t * val_ptr = (uint32_t *)dst;
+ *val_ptr = val;
- } else {
- PrintError("Invalid apic read length (%d)\n", length);
- return -1;
- }
+ } else {
+ PrintError("Invalid apic read length (%d)\n", length);
+ return -1;
+ }
- PrintDebug("Read finished (val=%x)\n", *(uint32_t *)dst);
+ PrintDebug("Read finished (val=%x)\n", *(uint32_t *)dst);
- return length;
+ return length;
}
static int apic_write(addr_t guest_addr, void * src, uint_t length, void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- addr_t reg_addr = guest_addr - apic->base_addr;
- struct apic_msr * msr = (struct apic_msr *)&(apic->base_addr_msr.value);
- uint32_t op_val = *(uint32_t *)src;
-
- PrintDebug("Write to apic address space (%p) (val=%x)\n",
- (void *)guest_addr, *(uint32_t *)src);
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ addr_t reg_addr = guest_addr - apic->base_addr;
+ struct apic_msr * msr = (struct apic_msr *)&(apic->base_addr_msr.value);
+ uint32_t op_val = *(uint32_t *)src;
+
+ PrintDebug("Write to apic address space (%p) (val=%x)\n",
+ (void *)guest_addr, *(uint32_t *)src);
+
+ if (msr->apic_enable == 0) {
+ PrintError("Write to APIC address space with disabled APIC\n");
+ return -1;
+ }
- if (msr->apic_enable == 0) {
- PrintError("Write to APIC address space with disabled APIC\n");
- return -1;
- }
+ if (length != 4) {
+ PrintError("Invalid apic write length (%d)\n", length);
+ return -1;
+ }
- if (length != 4) {
- PrintError("Invalid apic write length (%d)\n", length);
- return -1;
- }
-
- switch (reg_addr) {
- case REMOTE_READ_OFFSET:
- case APIC_VERSION_OFFSET:
- case APR_OFFSET:
- case IRR_OFFSET0:
- case IRR_OFFSET1:
- case IRR_OFFSET2:
- case IRR_OFFSET3:
- case IRR_OFFSET4:
- case IRR_OFFSET5:
- case IRR_OFFSET6:
- case IRR_OFFSET7:
- case ISR_OFFSET0:
- case ISR_OFFSET1:
- case ISR_OFFSET2:
- case ISR_OFFSET3:
- case ISR_OFFSET4:
- case ISR_OFFSET5:
- case ISR_OFFSET6:
- case ISR_OFFSET7:
- case TRIG_OFFSET0:
- case TRIG_OFFSET1:
- case TRIG_OFFSET2:
- case TRIG_OFFSET3:
- case TRIG_OFFSET4:
- case TRIG_OFFSET5:
- case TRIG_OFFSET6:
- case TRIG_OFFSET7:
- case PPR_OFFSET:
- case EXT_APIC_FEATURE_OFFSET:
+ switch (reg_addr) {
+ case REMOTE_READ_OFFSET:
+ case APIC_VERSION_OFFSET:
+ case APR_OFFSET:
+ case IRR_OFFSET0:
+ case IRR_OFFSET1:
+ case IRR_OFFSET2:
+ case IRR_OFFSET3:
+ case IRR_OFFSET4:
+ case IRR_OFFSET5:
+ case IRR_OFFSET6:
+ case IRR_OFFSET7:
+ case ISR_OFFSET0:
+ case ISR_OFFSET1:
+ case ISR_OFFSET2:
+ case ISR_OFFSET3:
+ case ISR_OFFSET4:
+ case ISR_OFFSET5:
+ case ISR_OFFSET6:
+ case ISR_OFFSET7:
+ case TRIG_OFFSET0:
+ case TRIG_OFFSET1:
+ case TRIG_OFFSET2:
+ case TRIG_OFFSET3:
+ case TRIG_OFFSET4:
+ case TRIG_OFFSET5:
+ case TRIG_OFFSET6:
+ case TRIG_OFFSET7:
+ case PPR_OFFSET:
+ case EXT_APIC_FEATURE_OFFSET:
#if 1
- PrintError("Attempting to write to read only register %p (ignored)\n", (void *)reg_addr);
+ PrintError("Attempting to write to read only register %p (ignored)\n", (void *)reg_addr);
#else
- PrintError("Attempting to write to read only register %p (error)\n", (void *)reg_addr);
- return -1;
+ PrintError("Attempting to write to read only register %p (error)\n", (void *)reg_addr);
+ return -1;
#endif
- break;
-
- // Data registers
- case APIC_ID_OFFSET:
- apic->lapic_id.val = op_val;
- break;
- case TPR_OFFSET:
- apic->task_prio.val = op_val;
- break;
- case LDR_OFFSET:
- apic->log_dst.val = op_val;
- break;
- case DFR_OFFSET:
- apic->dst_fmt.val = op_val;
- break;
- case SPURIOUS_INT_VEC_OFFSET:
- apic->spurious_int.val = op_val;
- break;
- case ESR_OFFSET:
- apic->err_status.val = op_val;
- break;
- case TMR_LOC_VEC_TBL_OFFSET:
- apic->tmr_vec_tbl.val = op_val;
- break;
- case THERM_LOC_VEC_TBL_OFFSET:
- apic->therm_loc_vec_tbl.val = op_val;
- break;
- case PERF_CTR_LOC_VEC_TBL_OFFSET:
- apic->perf_ctr_loc_vec_tbl.val = op_val;
- break;
- case LINT0_VEC_TBL_OFFSET:
- apic->lint0_vec_tbl.val = op_val;
- break;
- case LINT1_VEC_TBL_OFFSET:
- apic->lint1_vec_tbl.val = op_val;
- break;
- case ERR_VEC_TBL_OFFSET:
- apic->err_vec_tbl.val = op_val;
- break;
- case TMR_INIT_CNT_OFFSET:
- apic->tmr_init_cnt = op_val;
- apic->tmr_cur_cnt = op_val;
- break;
- case TMR_CUR_CNT_OFFSET:
- apic->tmr_cur_cnt = op_val;
- break;
- case TMR_DIV_CFG_OFFSET:
- apic->tmr_div_cfg.val = op_val;
- break;
-
-
- // Enable mask (256 bits)
- case IER_OFFSET0:
- *(uint32_t *)(apic->int_en_reg) = op_val;
- break;
- case IER_OFFSET1:
- *(uint32_t *)(apic->int_en_reg + 4) = op_val;
- break;
- case IER_OFFSET2:
- *(uint32_t *)(apic->int_en_reg + 8) = op_val;
- break;
- case IER_OFFSET3:
- *(uint32_t *)(apic->int_en_reg + 12) = op_val;
- break;
- case IER_OFFSET4:
- *(uint32_t *)(apic->int_en_reg + 16) = op_val;
- break;
- case IER_OFFSET5:
- *(uint32_t *)(apic->int_en_reg + 20) = op_val;
- break;
- case IER_OFFSET6:
- *(uint32_t *)(apic->int_en_reg + 24) = op_val;
- break;
- case IER_OFFSET7:
- *(uint32_t *)(apic->int_en_reg + 28) = op_val;
- break;
+ break;
+
+ // Data registers
+ case APIC_ID_OFFSET:
+ apic->lapic_id.val = op_val;
+ break;
+ case TPR_OFFSET:
+ apic->task_prio.val = op_val;
+ break;
+ case LDR_OFFSET:
+ apic->log_dst.val = op_val;
+ break;
+ case DFR_OFFSET:
+ apic->dst_fmt.val = op_val;
+ break;
+ case SPURIOUS_INT_VEC_OFFSET:
+ apic->spurious_int.val = op_val;
+ break;
+ case ESR_OFFSET:
+ apic->err_status.val = op_val;
+ break;
+ case TMR_LOC_VEC_TBL_OFFSET:
+ apic->tmr_vec_tbl.val = op_val;
+ break;
+ case THERM_LOC_VEC_TBL_OFFSET:
+ apic->therm_loc_vec_tbl.val = op_val;
+ break;
+ case PERF_CTR_LOC_VEC_TBL_OFFSET:
+ apic->perf_ctr_loc_vec_tbl.val = op_val;
+ break;
+ case LINT0_VEC_TBL_OFFSET:
+ apic->lint0_vec_tbl.val = op_val;
+ break;
+ case LINT1_VEC_TBL_OFFSET:
+ apic->lint1_vec_tbl.val = op_val;
+ break;
+ case ERR_VEC_TBL_OFFSET:
+ apic->err_vec_tbl.val = op_val;
+ break;
+ case TMR_INIT_CNT_OFFSET:
+ apic->tmr_init_cnt = op_val;
+ apic->tmr_cur_cnt = op_val;
+ break;
+ case TMR_CUR_CNT_OFFSET:
+ apic->tmr_cur_cnt = op_val;
+ break;
+ case TMR_DIV_CFG_OFFSET:
+ apic->tmr_div_cfg.val = op_val;
+ break;
+
+
+ // Enable mask (256 bits)
+ case IER_OFFSET0:
+ *(uint32_t *)(apic->int_en_reg) = op_val;
+ break;
+ case IER_OFFSET1:
+ *(uint32_t *)(apic->int_en_reg + 4) = op_val;
+ break;
+ case IER_OFFSET2:
+ *(uint32_t *)(apic->int_en_reg + 8) = op_val;
+ break;
+ case IER_OFFSET3:
+ *(uint32_t *)(apic->int_en_reg + 12) = op_val;
+ break;
+ case IER_OFFSET4:
+ *(uint32_t *)(apic->int_en_reg + 16) = op_val;
+ break;
+ case IER_OFFSET5:
+ *(uint32_t *)(apic->int_en_reg + 20) = op_val;
+ break;
+ case IER_OFFSET6:
+ *(uint32_t *)(apic->int_en_reg + 24) = op_val;
+ break;
+ case IER_OFFSET7:
+ *(uint32_t *)(apic->int_en_reg + 28) = op_val;
+ break;
- // Action Registers
- case INT_CMD_LO_OFFSET:
- case INT_CMD_HI_OFFSET:
- case EOI_OFFSET:
- {
- // do eoi
- apic_do_eoi(apic);
- break;
-
+ // Action Registers
+ case INT_CMD_LO_OFFSET:
+ case INT_CMD_HI_OFFSET:
+ case EOI_OFFSET:
+ {
+ // do eoi
+ apic_do_eoi(apic);
+ break;
+ }
+ // Unhandled Registers
+ case EXT_INT_LOC_VEC_TBL_OFFSET0:
+ case EXT_INT_LOC_VEC_TBL_OFFSET1:
+ case EXT_INT_LOC_VEC_TBL_OFFSET2:
+ case EXT_INT_LOC_VEC_TBL_OFFSET3:
+ case EXT_APIC_CMD_OFFSET:
+ case SEOI_OFFSET:
+ default:
+ PrintError("Write to Unhandled APIC Register: %x\n", (uint32_t)reg_addr);
+ return -1;
}
- // Unhandled Registers
- case EXT_INT_LOC_VEC_TBL_OFFSET0:
- case EXT_INT_LOC_VEC_TBL_OFFSET1:
- case EXT_INT_LOC_VEC_TBL_OFFSET2:
- case EXT_INT_LOC_VEC_TBL_OFFSET3:
- case EXT_APIC_CMD_OFFSET:
- case SEOI_OFFSET:
- default:
- PrintError("Write to Unhandled APIC Register: %x\n", (uint32_t)reg_addr);
- return -1;
- }
- PrintDebug("Write finished\n");
+ PrintDebug("Write finished\n");
- return length;
+ return length;
}
/* Interrupt Controller Functions */
static int apic_intr_pending(void * private_data) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- int i = 0;
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ int i = 0;
- // just scan the request register looking for any set bit
- // we should probably just do this with uint64 casts
- for (i = 0; i < 32; i++) {
- if (apic->int_req_reg[i] & 0xff) {
- return 1;
+ // just scan the request register looking for any set bit
+ // we should probably just do this with uint64 casts
+ for (i = 0; i < 32; i++) {
+ if (apic->int_req_reg[i] & 0xff) {
+ return 1;
+ }
}
- }
- return 0;
+ return 0;
}
static int apic_get_intr_number(void * private_data) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- int i = 0, j = 0;
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ int i = 0, j = 0;
- // We iterate backwards to find the highest priority
- for (i = 31; i >= 0; i--) {
- uchar_t req_major = apic->int_req_reg[i];
+ // We iterate backwards to find the highest priority
+ for (i = 31; i >= 0; i--) {
+ uchar_t req_major = apic->int_req_reg[i];
- if (req_major & 0xff) {
- for (j = 7; j >= 0; j--) {
- if ((req_major >> j) == 0x1) {
- return (i * 8) + j;
+ if (req_major & 0xff) {
+ for (j = 7; j >= 0; j--) {
+ if ((req_major >> j) == 0x1) {
+ return (i * 8) + j;
+ }
+ }
}
- }
}
- }
- return -1;
+ return -1;
}
static int apic_raise_intr(void * private_data, int irq) {
- return 0;
+ return 0;
}
static int apic_lower_intr(void * private_data, int irq) {
- return 0;
+ return 0;
}
static int apic_begin_irq(void * private_data, int irq) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- int major_offset = (irq & ~0x00000007) >> 3;
- int minor_offset = irq & 0x00000007;
- uchar_t * req_location = apic->int_req_reg + major_offset;
- uchar_t * svc_location = apic->int_svc_reg + major_offset;
- uchar_t flag = 0x01 << minor_offset;
-
- *svc_location |= flag;
- *req_location &= ~flag;
-
- return 0;
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ int major_offset = (irq & ~0x00000007) >> 3;
+ int minor_offset = irq & 0x00000007;
+ uchar_t * req_location = apic->int_req_reg + major_offset;
+ uchar_t * svc_location = apic->int_svc_reg + major_offset;
+ uchar_t flag = 0x01 << minor_offset;
+
+ *svc_location |= flag;
+ *req_location &= ~flag;
+
+ return 0;
}
int v3_apic_raise_intr(struct vm_device * apic_dev, int intr_num) {
- struct apic_state * apic = (struct apic_state *)apic_dev->private_data;
- return activate_apic_irq(apic, intr_num);
+ struct apic_state * apic = (struct apic_state *)apic_dev->private_data;
+ return activate_apic_irq(apic, intr_num);
}
/* Timer Functions */
static void apic_update_time(ullong_t cpu_cycles, ullong_t cpu_freq, void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
- struct apic_state * apic = (struct apic_state *)dev->private_data;
- // The 32 bit GCC runtime is a pile of shit
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ // The 32 bit GCC runtime is a pile of shit
#ifdef __V3_64BIT__
- uint64_t tmr_ticks = 0;
+ uint64_t tmr_ticks = 0;
#else
- uint32_t tmr_ticks = 0;
+ uint32_t tmr_ticks = 0;
#endif
- uchar_t tmr_div = *(uchar_t *)&(apic->tmr_div_cfg.val);
- uint_t shift_num = 0;
-
-
- // Check whether this is true:
- // -> If the Init count is zero then the timer is disabled
- // and doesn't just blitz interrupts to the CPU
- if ((apic->tmr_init_cnt == 0) ||
- ( (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_ONESHOT) &&
- (apic->tmr_cur_cnt == 0))) {
- //PrintDebug("APIC timer not yet initialized\n");
- return;
- }
-
-
- switch (tmr_div) {
- case APIC_TMR_DIV1:
- shift_num = 0;
- break;
- case APIC_TMR_DIV2:
- shift_num = 1;
- break;
- case APIC_TMR_DIV4:
- shift_num = 2;
- break;
- case APIC_TMR_DIV8:
- shift_num = 3;
- break;
- case APIC_TMR_DIV16:
- shift_num = 4;
- break;
- case APIC_TMR_DIV32:
- shift_num = 5;
- break;
- case APIC_TMR_DIV64:
- shift_num = 6;
- break;
- case APIC_TMR_DIV128:
- shift_num = 7;
- break;
- default:
- PrintError("Invalid Timer Divider configuration\n");
- return;
- }
-
- tmr_ticks = cpu_cycles >> shift_num;
- // PrintDebug("Timer Ticks: %p\n", (void *)tmr_ticks);
-
- if (tmr_ticks < apic->tmr_cur_cnt) {
- apic->tmr_cur_cnt -= tmr_ticks;
- } else {
- tmr_ticks -= apic->tmr_cur_cnt;
- apic->tmr_cur_cnt = 0;
-
- // raise irq
- PrintDebug("Raising APIC Timer interrupt (periodic=%d) (icnt=%d) (div=%d)\n",
- apic->tmr_vec_tbl.tmr_mode, apic->tmr_init_cnt, shift_num);
- if (activate_internal_irq(apic, APIC_TMR_INT) == -1) {
- PrintError("Could not raise Timer interrupt\n");
+ uchar_t tmr_div = *(uchar_t *)&(apic->tmr_div_cfg.val);
+ uint_t shift_num = 0;
+
+
+ // Check whether this is true:
+ // -> If the Init count is zero then the timer is disabled
+ // and doesn't just blitz interrupts to the CPU
+ if ((apic->tmr_init_cnt == 0) ||
+ ( (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_ONESHOT) &&
+ (apic->tmr_cur_cnt == 0))) {
+ //PrintDebug("APIC timer not yet initialized\n");
+ return;
+ }
+
+
+ switch (tmr_div) {
+ case APIC_TMR_DIV1:
+ shift_num = 0;
+ break;
+ case APIC_TMR_DIV2:
+ shift_num = 1;
+ break;
+ case APIC_TMR_DIV4:
+ shift_num = 2;
+ break;
+ case APIC_TMR_DIV8:
+ shift_num = 3;
+ break;
+ case APIC_TMR_DIV16:
+ shift_num = 4;
+ break;
+ case APIC_TMR_DIV32:
+ shift_num = 5;
+ break;
+ case APIC_TMR_DIV64:
+ shift_num = 6;
+ break;
+ case APIC_TMR_DIV128:
+ shift_num = 7;
+ break;
+ default:
+ PrintError("Invalid Timer Divider configuration\n");
+ return;
}
+
+ tmr_ticks = cpu_cycles >> shift_num;
+ // PrintDebug("Timer Ticks: %p\n", (void *)tmr_ticks);
+
+ if (tmr_ticks < apic->tmr_cur_cnt) {
+ apic->tmr_cur_cnt -= tmr_ticks;
+ } else {
+ tmr_ticks -= apic->tmr_cur_cnt;
+ apic->tmr_cur_cnt = 0;
+
+ // raise irq
+ PrintDebug("Raising APIC Timer interrupt (periodic=%d) (icnt=%d) (div=%d)\n",
+ apic->tmr_vec_tbl.tmr_mode, apic->tmr_init_cnt, shift_num);
+ if (activate_internal_irq(apic, APIC_TMR_INT) == -1) {
+ PrintError("Could not raise Timer interrupt\n");
+ }
- if (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_PERIODIC) {
- tmr_ticks = tmr_ticks % apic->tmr_init_cnt;
- apic->tmr_cur_cnt = apic->tmr_init_cnt - tmr_ticks;
+ if (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_PERIODIC) {
+ tmr_ticks = tmr_ticks % apic->tmr_init_cnt;
+ apic->tmr_cur_cnt = apic->tmr_init_cnt - tmr_ticks;
+ }
}
- }
}
static struct intr_ctrl_ops intr_ops = {
- .intr_pending = apic_intr_pending,
- .get_intr_number = apic_get_intr_number,
- .raise_intr = apic_raise_intr,
- .begin_irq = apic_begin_irq,
- .lower_intr = apic_lower_intr,
+ .intr_pending = apic_intr_pending,
+ .get_intr_number = apic_get_intr_number,
+ .raise_intr = apic_raise_intr,
+ .begin_irq = apic_begin_irq,
+ .lower_intr = apic_lower_intr,
};
static struct vm_timer_ops timer_ops = {
- .update_time = apic_update_time,
+ .update_time = apic_update_time,
};
static int apic_init(struct vm_device * dev) {
- struct guest_info * info = dev->vm;
- struct apic_state * apic = (struct apic_state *)(dev->private_data);
+ struct guest_info * info = dev->vm;
+ struct apic_state * apic = (struct apic_state *)(dev->private_data);
- v3_register_intr_controller(dev->vm, &intr_ops, dev);
- v3_add_timer(dev->vm, &timer_ops, dev);
+ v3_register_intr_controller(dev->vm, &intr_ops, dev);
+ v3_add_timer(dev->vm, &timer_ops, dev);
- init_apic_state(apic);
+ init_apic_state(apic);
- v3_hook_msr(info, BASE_ADDR_MSR, read_apic_msr, write_apic_msr, dev);
+ v3_hook_msr(info, BASE_ADDR_MSR, read_apic_msr, write_apic_msr, dev);
- v3_hook_full_mem(info, apic->base_addr, apic->base_addr + PAGE_SIZE_4KB, apic_read, apic_write, dev);
+ v3_hook_full_mem(info, apic->base_addr, apic->base_addr + PAGE_SIZE_4KB, apic_read, apic_write, dev);
- return 0;
+ return 0;
}
static int apic_deinit(struct vm_device * dev) {
- struct guest_info * info = dev->vm;
+ struct guest_info * info = dev->vm;
- v3_unhook_msr(info, BASE_ADDR_MSR);
+ v3_unhook_msr(info, BASE_ADDR_MSR);
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = apic_init,
- .deinit = apic_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = apic_init,
+ .deinit = apic_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_apic() {
- PrintDebug("Creating APIC\n");
+ PrintDebug("Creating APIC\n");
- struct apic_state * apic = (struct apic_state *)V3_Malloc(sizeof(struct apic_state));
+ struct apic_state * apic = (struct apic_state *)V3_Malloc(sizeof(struct apic_state));
- struct vm_device * device = v3_create_device("APIC", &dev_ops, apic);
+ struct vm_device * device = v3_create_device("APIC", &dev_ops, apic);
- return device;
+ return device;
}
struct debug_state {
- char debug_buf[BUF_SIZE];
- uint_t debug_offset;
+ char debug_buf[BUF_SIZE];
+ uint_t debug_offset;
- char info_buf[BUF_SIZE];
- uint_t info_offset;
+ char info_buf[BUF_SIZE];
+ uint_t info_offset;
};
static int handle_info_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct debug_state * state = (struct debug_state *)dev->private_data;
+ struct debug_state * state = (struct debug_state *)dev->private_data;
- state->info_buf[state->info_offset++] = *(char*)src;
+ state->info_buf[state->info_offset++] = *(char*)src;
- if ((*(char*)src == 0xa) || (state->info_offset == (BUF_SIZE - 1))) {
- PrintDebug("BOCHSINFO>%s", state->info_buf);
- memset(state->info_buf, 0, BUF_SIZE);
- state->info_offset = 0;
- }
+ if ((*(char*)src == 0xa) || (state->info_offset == (BUF_SIZE - 1))) {
+ PrintDebug("BOCHSINFO>%s", state->info_buf);
+ memset(state->info_buf, 0, BUF_SIZE);
+ state->info_offset = 0;
+ }
- return length;
+ return length;
}
static int handle_debug_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct debug_state * state = (struct debug_state *)dev->private_data;
+ struct debug_state * state = (struct debug_state *)dev->private_data;
- state->debug_buf[state->debug_offset++] = *(char*)src;
+ state->debug_buf[state->debug_offset++] = *(char*)src;
- if ((*(char*)src == 0xa) || (state->debug_offset == (BUF_SIZE - 1))) {
- PrintDebug("BOCHSDEBUG>%s", state->debug_buf);
- memset(state->debug_buf, 0, BUF_SIZE);
- state->debug_offset = 0;
- }
+ if ((*(char*)src == 0xa) || (state->debug_offset == (BUF_SIZE - 1))) {
+ PrintDebug("BOCHSDEBUG>%s", state->debug_buf);
+ memset(state->debug_buf, 0, BUF_SIZE);
+ state->debug_offset = 0;
+ }
- return length;
+ return length;
}
static int handle_gen_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- switch (length) {
- case 1:
- PrintDebug(">0x%.2x\n", *(uchar_t*)src);
- break;
- case 2:
- PrintDebug(">0x%.4x\n", *(ushort_t*)src);
- break;
- case 4:
- PrintDebug(">0x%.8x\n", *(uint_t*)src);
- break;
- default:
- PrintError("Invalid length in handle_gen_write\n");
- return -1;
- break;
- }
-
- return length;
+ switch (length) {
+ case 1:
+ PrintDebug(">0x%.2x\n", *(uchar_t*)src);
+ break;
+ case 2:
+ PrintDebug(">0x%.4x\n", *(ushort_t*)src);
+ break;
+ case 4:
+ PrintDebug(">0x%.8x\n", *(uint_t*)src);
+ break;
+ default:
+ PrintError("Invalid length in handle_gen_write\n");
+ return -1;
+ break;
+ }
+
+ return length;
}
static int debug_init(struct vm_device * dev) {
- struct debug_state * state = (struct debug_state *)dev->private_data;
+ struct debug_state * state = (struct debug_state *)dev->private_data;
- state->debug_offset = 0;
- state->info_offset = 0;
- memset(state->debug_buf, 0, BUF_SIZE);
- memset(state->info_buf, 0, BUF_SIZE);
+ state->debug_offset = 0;
+ state->info_offset = 0;
+ memset(state->debug_buf, 0, BUF_SIZE);
+ memset(state->info_buf, 0, BUF_SIZE);
- v3_dev_hook_io(dev, BOCHS_PORT1, NULL, &handle_gen_write);
- v3_dev_hook_io(dev, BOCHS_PORT2, NULL, &handle_gen_write);
- v3_dev_hook_io(dev, BOCHS_INFO_PORT, NULL, &handle_info_write);
- v3_dev_hook_io(dev, BOCHS_DEBUG_PORT, NULL, &handle_debug_write);
+ v3_dev_hook_io(dev, BOCHS_PORT1, NULL, &handle_gen_write);
+ v3_dev_hook_io(dev, BOCHS_PORT2, NULL, &handle_gen_write);
+ v3_dev_hook_io(dev, BOCHS_INFO_PORT, NULL, &handle_info_write);
+ v3_dev_hook_io(dev, BOCHS_DEBUG_PORT, NULL, &handle_debug_write);
- return 0;
+ return 0;
}
static int debug_deinit(struct vm_device * dev) {
- v3_dev_unhook_io(dev, BOCHS_PORT1);
- v3_dev_unhook_io(dev, BOCHS_PORT2);
- v3_dev_unhook_io(dev, BOCHS_INFO_PORT);
- v3_dev_unhook_io(dev, BOCHS_DEBUG_PORT);
+ v3_dev_unhook_io(dev, BOCHS_PORT1);
+ v3_dev_unhook_io(dev, BOCHS_PORT2);
+ v3_dev_unhook_io(dev, BOCHS_INFO_PORT);
+ v3_dev_unhook_io(dev, BOCHS_DEBUG_PORT);
- return 0;
+ return 0;
};
static struct vm_device_ops dev_ops = {
- .init = debug_init,
- .deinit = debug_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = debug_init,
+ .deinit = debug_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_bochs_debug() {
- struct debug_state * state = NULL;
+ struct debug_state * state = NULL;
- state = (struct debug_state *)V3_Malloc(sizeof(struct debug_state));
+ state = (struct debug_state *)V3_Malloc(sizeof(struct debug_state));
- V3_ASSERT(state != NULL);
+ V3_ASSERT(state != NULL);
- PrintDebug("Creating Bochs Debug Device\n");
- struct vm_device * device = v3_create_device("BOCHS Debug", &dev_ops, state);
+ PrintDebug("Creating Bochs Debug Device\n");
+ struct vm_device * device = v3_create_device("BOCHS Debug", &dev_ops, state);
- return device;
+ return device;
}
struct cdrom_state {
- uchar_t * image_addr; //memory address
- ulong_t capacity_in_bytes;
- ulong_t head; //current position
+ uchar_t * image_addr; //memory address
+ ulong_t capacity_in_bytes;
+ ulong_t head; //current position
- struct vm_device * ide_dev;
+ struct vm_device * ide_dev;
- uchar_t lba;
+ uchar_t lba;
};
*/
static rd_bool cdrom_insert(void * private_data) {
- PrintDebug("[cdrom_insert]\n");
- return 1;
+ PrintDebug("[cdrom_insert]\n");
+ return 1;
}
/*
* Logically eject the CD.
*/
static void cdrom_eject(void * private_data) {
- PrintDebug("[cdrom_eject]\n");
- return;
+ PrintDebug("[cdrom_eject]\n");
+ return;
}
/*
*/
static rd_bool cdrom_read_toc(void * private_data, uint8_t* buf, int* length, rd_bool msf, int start_track)
{
- *length = 4;
- PrintDebug("[cdrom_read_toc]\n");
- return 1;
+ *length = 4;
+ PrintDebug("[cdrom_read_toc]\n");
+ return 1;
}
/*
* Return CD-ROM capacity (in 2048 byte frames)
*/
static uint32_t cdrom_capacity(void * private_data) {
- struct cdrom_state * cdrom = (struct cdrom_state *)private_data;
-
- PrintDebug("[cdrom_capacity] s_ramdiskSize = %d\n", cdrom->capacity_in_bytes);
-
- if (cdrom->lba) {
- if (cdrom->capacity_in_bytes % 2048) {
- PrintDebug("\t\t capacity in LBA is %d\n", (cdrom->capacity_in_bytes / 2048) + 1);
- return (cdrom->capacity_in_bytes / 2048) + 1;
+ struct cdrom_state * cdrom = (struct cdrom_state *)private_data;
+
+ PrintDebug("[cdrom_capacity] s_ramdiskSize = %d\n", cdrom->capacity_in_bytes);
+
+ if (cdrom->lba) {
+ if (cdrom->capacity_in_bytes % 2048) {
+ PrintDebug("\t\t capacity in LBA is %d\n", (cdrom->capacity_in_bytes / 2048) + 1);
+ return (cdrom->capacity_in_bytes / 2048) + 1;
+ } else {
+ PrintDebug("\t\t capacity in LBA is %d\n", cdrom->capacity_in_bytes / 2048);
+ return cdrom->capacity_in_bytes / 2048;
+ }
} else {
- PrintDebug("\t\t capacity in LBA is %d\n", cdrom->capacity_in_bytes / 2048);
- return cdrom->capacity_in_bytes / 2048;
+ PrintError("Unsupported CDROM mode in capacity query\n");
+ //FIXME CHS mode
+ return 0;
}
- } else {
- PrintError("Unsupported CDROM mode in capacity query\n");
- //FIXME CHS mode
- return 0;
- }
}
/*
* Read a single block from the CD
*/
static void cdrom_read_block(void * private_data, uint8_t * buf, int lba)/* __attribute__(regparm(2)); */ {
- struct cdrom_state * cdrom = (struct cdrom_state *)private_data;
+ struct cdrom_state * cdrom = (struct cdrom_state *)private_data;
- V3_ASSERT(lba != 0);
+ V3_ASSERT(lba != 0);
- PrintDebug("[cdrom_read_block] lba = %d (cdrom_image_start=%x)\n", lba, cdrom->image_addr);
- memcpy(buf, (uchar_t *)(cdrom->image_addr + lba * 2048), 2048);
- //PrintDebug("Returning from read block\n");
- return;
+ PrintDebug("[cdrom_read_block] lba = %d (cdrom_image_start=%x)\n", lba, cdrom->image_addr);
+ memcpy(buf, (uchar_t *)(cdrom->image_addr + lba * 2048), 2048);
+ //PrintDebug("Returning from read block\n");
+ return;
}
static void set_LBA(void * private_data, uchar_t lba) {
- struct cdrom_state * cdrom = (struct cdrom_state *)private_data;
- cdrom->lba = lba;
+ struct cdrom_state * cdrom = (struct cdrom_state *)private_data;
+ cdrom->lba = lba;
}
* Start (spin up) the CD.
*/
static int cdrom_start(void * private_data) {
- PrintDebug("[cdrom_start]\n");
- return 1;
+ PrintDebug("[cdrom_start]\n");
+ return 1;
}
static struct cdrom_ops cd_ops = {
- .insert_cdrom = cdrom_insert,
- .eject_cdrom = cdrom_eject,
- .read_toc = cdrom_read_toc,
- .capacity = cdrom_capacity,
- .read_block = cdrom_read_block,
- .start_cdrom = cdrom_start,
- .set_LBA = set_LBA,
+ .insert_cdrom = cdrom_insert,
+ .eject_cdrom = cdrom_eject,
+ .read_toc = cdrom_read_toc,
+ .capacity = cdrom_capacity,
+ .read_block = cdrom_read_block,
+ .start_cdrom = cdrom_start,
+ .set_LBA = set_LBA,
};
static int cdrom_device_init(struct vm_device * dev) {
- struct cdrom_state * cdrom = (struct cdrom_state *)dev->private_data;
- PrintDebug("[cdrom_init]\n");
- PrintDebug("CDIMAGE located at: %x\n", cdrom->image_addr);
+ struct cdrom_state * cdrom = (struct cdrom_state *)dev->private_data;
+ PrintDebug("[cdrom_init]\n");
+ PrintDebug("CDIMAGE located at: %x\n", cdrom->image_addr);
- //FIXME:lba
- cdrom->lba = 1;
+ //FIXME:lba
+ cdrom->lba = 1;
- v3_ramdisk_register_cdrom(cdrom->ide_dev, 1, 0, &cd_ops, cdrom);
+ v3_ramdisk_register_cdrom(cdrom->ide_dev, 1, 0, &cd_ops, cdrom);
- return 0;
+ return 0;
}
static int cdrom_device_deinit(struct vm_device * dev) {
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = cdrom_device_init,
- .deinit = cdrom_device_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = cdrom_device_init,
+ .deinit = cdrom_device_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_cdrom(struct vm_device * ramdisk_dev, void * ramdisk, uint_t ramdisk_size){
- struct cdrom_state * cd = (struct cdrom_state *)V3_Malloc(sizeof(struct cdrom_state));
- V3_ASSERT(cd != NULL);
+ struct cdrom_state * cd = (struct cdrom_state *)V3_Malloc(sizeof(struct cdrom_state));
+ V3_ASSERT(cd != NULL);
- memset(cd, 0, sizeof(struct cdrom_state));
+ memset(cd, 0, sizeof(struct cdrom_state));
- cd->image_addr = (uchar_t *)V3_VAddr(ramdisk);
- cd->capacity_in_bytes = ramdisk_size;
- cd->ide_dev = ramdisk_dev;
+ cd->image_addr = (uchar_t *)V3_VAddr(ramdisk);
+ cd->capacity_in_bytes = ramdisk_size;
+ cd->ide_dev = ramdisk_dev;
- PrintDebug("Creating RamDISK CDROM\n");
+ PrintDebug("Creating RamDISK CDROM\n");
- struct vm_device * cd_dev = v3_create_device("Ram Based CD", &dev_ops, cd);
+ struct vm_device * cd_dev = v3_create_device("Ram Based CD", &dev_ops, cd);
- return cd_dev;
+ return cd_dev;
}
-
-
struct generic_internal {
- struct list_head port_list;
- uint_t num_port_ranges;
- struct list_head mem_list;
- uint_t num_mem_ranges;
- struct list_head irq_list;
- uint_t num_irq_ranges;
+ struct list_head port_list;
+ uint_t num_port_ranges;
+ struct list_head mem_list;
+ uint_t num_mem_ranges;
+ struct list_head irq_list;
+ uint_t num_irq_ranges;
};
struct port_range {
- uint_t start;
- uint_t end;
- uint_t type;
- struct list_head range_link;
+ uint_t start;
+ uint_t end;
+ uint_t type;
+ struct list_head range_link;
};
struct mem_range {
- void * start;
- void * end;
- uint_t type;
- struct list_head range_link;
+ void * start;
+ void * end;
+ uint_t type;
+ struct list_head range_link;
};
struct irq_range {
- uint_t start;
- uint_t end;
- uint_t type;
- struct list_head range_link;
+ uint_t start;
+ uint_t end;
+ uint_t type;
+ struct list_head range_link;
};
static int generic_reset_device(struct vm_device * dev) {
- PrintDebug("generic: reset device\n");
- return 0;
+ PrintDebug("generic: reset device\n");
+ return 0;
}
static int generic_start_device(struct vm_device * dev) {
- PrintDebug("generic: start device\n");
- return 0;
+ PrintDebug("generic: start device\n");
+ return 0;
}
static int generic_stop_device(struct vm_device * dev) {
- PrintDebug("generic: stop device\n");
- return 0;
+ PrintDebug("generic: stop device\n");
+ return 0;
}
void * src,
uint_t length,
struct vm_device * dev) {
- uint_t i;
+ uint_t i;
- PrintDebug("generic: writing 0x");
+ PrintDebug("generic: writing 0x");
- for (i = 0; i < length; i++) {
- PrintDebug("%x", ((uchar_t*)src)[i]);
- }
-
- PrintDebug(" to port 0x%x ... ", port);
-
-
- switch (length) {
- case 1:
- v3_outb(port,((uchar_t*)src)[0]);
- break;
- case 2:
- v3_outw(port,((ushort_t*)src)[0]);
- break;
- case 4:
- v3_outdw(port,((uint_t*)src)[0]);
- break;
- default:
for (i = 0; i < length; i++) {
- v3_outb(port, ((uchar_t*)src)[i]);
+ PrintDebug("%x", ((uchar_t*)src)[i]);
}
- } //switch length
+
+ PrintDebug(" to port 0x%x ... ", port);
- PrintDebug(" done\n");
+ switch (length) {
+ case 1:
+ v3_outb(port,((uchar_t*)src)[0]);
+ break;
+ case 2:
+ v3_outw(port,((ushort_t*)src)[0]);
+ break;
+ case 4:
+ v3_outdw(port,((uint_t*)src)[0]);
+ break;
+ default:
+ for (i = 0; i < length; i++) {
+ v3_outb(port, ((uchar_t*)src)[i]);
+ }
+ } //switch length
+
+
+ PrintDebug(" done\n");
- return length;
+ return length;
}
static int generic_read_port_passthrough(ushort_t port,
void * src,
uint_t length,
struct vm_device * dev) {
- uint_t i;
+ uint_t i;
- PrintDebug("generic: reading 0x%x bytes from port 0x%x ...", length, port);
+ PrintDebug("generic: reading 0x%x bytes from port 0x%x ...", length, port);
switch (length) {
- case 1:
- ((uchar_t*)src)[0] = v3_inb(port);
- break;
- case 2:
- ((ushort_t*)src)[0] = v3_inw(port);
- break;
- case 4:
- ((uint_t*)src)[0] = v3_indw(port);
- break;
- default:
- for (i = 0; i < length; i++) {
- ((uchar_t*)src)[i] = v3_inb(port);
- }
+ case 1:
+ ((uchar_t*)src)[0] = v3_inb(port);
+ break;
+ case 2:
+ ((ushort_t*)src)[0] = v3_inw(port);
+ break;
+ case 4:
+ ((uint_t*)src)[0] = v3_indw(port);
+ break;
+ default:
+ for (i = 0; i < length; i++) {
+ ((uchar_t*)src)[i] = v3_inb(port);
+ }
}//switch length
- PrintDebug(" done ... read 0x");
+ PrintDebug(" done ... read 0x");
- for (i = 0; i < length; i++) {
- PrintDebug("%x", ((uchar_t*)src)[i]);
- }
+ for (i = 0; i < length; i++) {
+ PrintDebug("%x", ((uchar_t*)src)[i]);
+ }
- PrintDebug("\n");
+ PrintDebug("\n");
- return length;
+ return length;
}
static int generic_write_port_ignore(ushort_t port,
void * src,
uint_t length,
struct vm_device * dev) {
- uint_t i;
+ uint_t i;
- PrintDebug("generic: writing 0x");
+ PrintDebug("generic: writing 0x");
- for (i = 0; i < length; i++) {
- PrintDebug("%x", ((uchar_t*)src)[i]);
- }
+ for (i = 0; i < length; i++) {
+ PrintDebug("%x", ((uchar_t*)src)[i]);
+ }
- PrintDebug(" to port 0x%x ... ignored\n", port);
+ PrintDebug(" to port 0x%x ... ignored\n", port);
- return length;
+ return length;
}
static int generic_read_port_ignore(ushort_t port,
uint_t length,
struct vm_device * dev) {
- PrintDebug("generic: reading 0x%x bytes from port 0x%x ...", length, port);
+ PrintDebug("generic: reading 0x%x bytes from port 0x%x ...", length, port);
- memset((char*)src, 0, length);
- PrintDebug(" ignored (return zeroed buffer)\n");
+ memset((char*)src, 0, length);
+ PrintDebug(" ignored (return zeroed buffer)\n");
- return length;
+ return length;
}
static int generic_interrupt(uint_t irq, struct vm_device * dev) {
- PrintDebug("generic: interrupt 0x%x - injecting into VM\n", irq);
+ PrintDebug("generic: interrupt 0x%x - injecting into VM\n", irq);
- v3_raise_irq(dev->vm, irq);
+ v3_raise_irq(dev->vm, irq);
- return 0;
+ return 0;
}
static int generic_init_device(struct vm_device * dev) {
- struct generic_internal * state = (struct generic_internal *)(dev->private_data);
+ struct generic_internal * state = (struct generic_internal *)(dev->private_data);
- PrintDebug("generic: init_device\n");
- generic_reset_device(dev);
+ PrintDebug("generic: init_device\n");
+ generic_reset_device(dev);
- if (PORT_HOOKS) { // This is a runtime conditional on a #define
- struct port_range * tmp = NULL;
+ if (PORT_HOOKS) { // This is a runtime conditional on a #define
+ struct port_range * tmp = NULL;
- list_for_each_entry(tmp, &(state->port_list), range_link) {
- uint_t i = 0;
+ list_for_each_entry(tmp, &(state->port_list), range_link) {
+ uint_t i = 0;
- PrintDebug("generic: hooking ports 0x%x to 0x%x as %x\n",
- tmp->start, tmp->end,
- (tmp->type == GENERIC_PRINT_AND_PASSTHROUGH) ? "print-and-passthrough" : "print-and-ignore");
+ PrintDebug("generic: hooking ports 0x%x to 0x%x as %x\n",
+ tmp->start, tmp->end,
+ (tmp->type == GENERIC_PRINT_AND_PASSTHROUGH) ? "print-and-passthrough" : "print-and-ignore");
- for (i = tmp->start; i <= tmp->end; i++) {
- if (tmp->type == GENERIC_PRINT_AND_PASSTHROUGH) {
+ for (i = tmp->start; i <= tmp->end; i++) {
+ if (tmp->type == GENERIC_PRINT_AND_PASSTHROUGH) {
- if (v3_dev_hook_io(dev, i, &generic_read_port_passthrough, &generic_write_port_passthrough)) {
- PrintDebug("generic: can't hook port 0x%x (already hooked?)\n", i);
- }
+ if (v3_dev_hook_io(dev, i, &generic_read_port_passthrough, &generic_write_port_passthrough)) {
+ PrintDebug("generic: can't hook port 0x%x (already hooked?)\n", i);
+ }
- } else if (tmp->type == GENERIC_PRINT_AND_IGNORE) {
+ } else if (tmp->type == GENERIC_PRINT_AND_IGNORE) {
- if (v3_dev_hook_io(dev, i, &generic_read_port_ignore, &generic_write_port_ignore)) {
- PrintDebug("generic: can't hook port 0x%x (already hooked?)\n", i);
- }
- }
- }
+ if (v3_dev_hook_io(dev, i, &generic_read_port_ignore, &generic_write_port_ignore)) {
+ PrintDebug("generic: can't hook port 0x%x (already hooked?)\n", i);
+ }
+ }
+ }
+ }
+ } else {
+ PrintDebug("generic: hooking ports not supported\n");
}
- } else {
- PrintDebug("generic: hooking ports not supported\n");
- }
- if (MEM_HOOKS) { // This is a runtime conditional on a #define
- struct mem_range * tmp;
+ if (MEM_HOOKS) { // This is a runtime conditional on a #define
+ struct mem_range * tmp;
- list_for_each_entry(tmp, &(state->mem_list), range_link) {
+ list_for_each_entry(tmp, &(state->mem_list), range_link) {
- PrintDebug("generic: hooking addresses 0x%x to 0x%x\n",
- tmp->start, tmp->end);
+ PrintDebug("generic: hooking addresses 0x%x to 0x%x\n",
+ tmp->start, tmp->end);
- if (v3_dev_hook_mem(dev, tmp->start, tmp->end)) {
- PrintDebug("generic: Can't hook addresses 0x%x to 0x%x (already hooked?)\n",
- tmp->start, tmp->end);
- }
+ if (v3_dev_hook_mem(dev, tmp->start, tmp->end)) {
+ PrintDebug("generic: Can't hook addresses 0x%x to 0x%x (already hooked?)\n",
+ tmp->start, tmp->end);
+ }
+ }
+ } else {
+ PrintDebug("generic: hooking addresses not supported\n");
}
- } else {
- PrintDebug("generic: hooking addresses not supported\n");
- }
- if (IRQ_HOOKS) { // This is a runtime conditional on a #define
- struct irq_range * tmp;
+ if (IRQ_HOOKS) { // This is a runtime conditional on a #define
+ struct irq_range * tmp;
- list_for_each_entry(tmp, &(state->irq_list), range_link) {
- uint_t i;
+ list_for_each_entry(tmp, &(state->irq_list), range_link) {
+ uint_t i;
- PrintDebug("generic: hooking irqs 0x%x to 0x%x\n",
- tmp->start, tmp->end);
+ PrintDebug("generic: hooking irqs 0x%x to 0x%x\n",
+ tmp->start, tmp->end);
- for (i = tmp->start; i <= tmp->end; i++) {
- if (v3_dev_hook_irq(dev, i, &generic_interrupt)) {
- PrintDebug("generic: can't hook irq 0x%x (already hooked?)\n", i);
- }
- }
+ for (i = tmp->start; i <= tmp->end; i++) {
+ if (v3_dev_hook_irq(dev, i, &generic_interrupt)) {
+ PrintDebug("generic: can't hook irq 0x%x (already hooked?)\n", i);
+ }
+ }
+ }
+ } else {
+ PrintDebug("generic: hooking irqs not supported\n");
}
- } else {
- PrintDebug("generic: hooking irqs not supported\n");
- }
- return 0;
+ return 0;
}
static int generic_deinit_device(struct vm_device * dev) {
- struct generic_internal * state = (struct generic_internal *)(dev->private_data);
+ struct generic_internal * state = (struct generic_internal *)(dev->private_data);
- PrintDebug("generic: deinit_device\n");
+ PrintDebug("generic: deinit_device\n");
- if (IRQ_HOOKS) { // This is a runtime conditional on a #define
- struct irq_range * tmp;
- struct irq_range * cur;
+ if (IRQ_HOOKS) { // This is a runtime conditional on a #define
+ struct irq_range * tmp;
+ struct irq_range * cur;
- list_for_each_entry_safe(cur, tmp, &(state->irq_list), range_link) {
- uint_t i;
+ list_for_each_entry_safe(cur, tmp, &(state->irq_list), range_link) {
+ uint_t i;
- PrintDebug("generic: unhooking irqs 0x%x to 0x%x\n",
- cur->start, cur->end);
+ PrintDebug("generic: unhooking irqs 0x%x to 0x%x\n",
+ cur->start, cur->end);
- for (i = cur->start; i <= cur->end; i++) {
- if (v3_dev_unhook_irq(dev, i)) {
- PrintDebug("generic: can't unhook irq 0x%x (already unhooked?)\n", i);
- }
- }
+ for (i = cur->start; i <= cur->end; i++) {
+ if (v3_dev_unhook_irq(dev, i)) {
+ PrintDebug("generic: can't unhook irq 0x%x (already unhooked?)\n", i);
+ }
+ }
- list_del(&(cur->range_link));
- state->num_irq_ranges--;
- V3_Free(cur);
+ list_del(&(cur->range_link));
+ state->num_irq_ranges--;
+ V3_Free(cur);
+ }
+ } else {
+ PrintDebug("generic: unhooking irqs not supported\n");
}
- } else {
- PrintDebug("generic: unhooking irqs not supported\n");
- }
- if (MEM_HOOKS) {
- struct mem_range * tmp;
- struct mem_range * cur;
+ if (MEM_HOOKS) {
+ struct mem_range * tmp;
+ struct mem_range * cur;
- list_for_each_entry_safe(cur, tmp, &(state->mem_list), range_link) {
+ list_for_each_entry_safe(cur, tmp, &(state->mem_list), range_link) {
- PrintDebug("generic: unhooking addresses 0x%x to 0x%x\n",
- cur->start, cur->end);
+ PrintDebug("generic: unhooking addresses 0x%x to 0x%x\n",
+ cur->start, cur->end);
- if (v3_dev_unhook_mem(dev, cur->start, cur->end)) {
- PrintDebug("generic: Can't unhook addresses 0x%x to 0x%x (already unhooked?)\n",
- cur->start, cur->end);
- }
+ if (v3_dev_unhook_mem(dev, cur->start, cur->end)) {
+ PrintDebug("generic: Can't unhook addresses 0x%x to 0x%x (already unhooked?)\n",
+ cur->start, cur->end);
+ }
- list_del(&(cur->range_link));
- state->num_mem_ranges--;
- V3_Free(cur);
+ list_del(&(cur->range_link));
+ state->num_mem_ranges--;
+ V3_Free(cur);
+ }
+ } else {
+ PrintDebug("generic: unhooking addresses not supported\n");
}
- } else {
- PrintDebug("generic: unhooking addresses not supported\n");
- }
- if (PORT_HOOKS) {
- struct port_range * tmp;
- struct port_range * cur;
+ if (PORT_HOOKS) {
+ struct port_range * tmp;
+ struct port_range * cur;
- list_for_each_entry_safe(cur, tmp, &(state->port_list), range_link) {
- uint_t i;
+ list_for_each_entry_safe(cur, tmp, &(state->port_list), range_link) {
+ uint_t i;
- PrintDebug("generic: unhooking ports 0x%x to 0x%x\n",
- cur->start, cur->end);
+ PrintDebug("generic: unhooking ports 0x%x to 0x%x\n",
+ cur->start, cur->end);
- for (i = cur->start; i <= cur->end; i++) {
- if (v3_dev_unhook_io(dev, i)) {
- PrintDebug("generic: can't unhook port 0x%x (already unhooked?)\n", i);
+ for (i = cur->start; i <= cur->end; i++) {
+ if (v3_dev_unhook_io(dev, i)) {
+ PrintDebug("generic: can't unhook port 0x%x (already unhooked?)\n", i);
+ }
+ }
+
+ list_del(&(cur->range_link));
+ state->num_port_ranges--;
+ V3_Free(cur);
}
- }
-
- list_del(&(cur->range_link));
- state->num_port_ranges--;
- V3_Free(cur);
+ } else {
+ PrintDebug("generic: unhooking ports not supported\n");
}
- } else {
- PrintDebug("generic: unhooking ports not supported\n");
- }
- generic_reset_device(dev);
- return 0;
+ generic_reset_device(dev);
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = generic_init_device,
- .deinit = generic_deinit_device,
- .reset = generic_reset_device,
- .start = generic_start_device,
- .stop = generic_stop_device,
+ .init = generic_init_device,
+ .deinit = generic_deinit_device,
+ .reset = generic_reset_device,
+ .start = generic_start_device,
+ .stop = generic_stop_device,
};
int v3_generic_add_port_range(struct vm_device * dev, uint_t start, uint_t end, uint_t type) {
- if (PORT_HOOKS) {
- struct generic_internal * state = (struct generic_internal *)(dev->private_data);
+ if (PORT_HOOKS) {
+ struct generic_internal * state = (struct generic_internal *)(dev->private_data);
- struct port_range * range = (struct port_range *)V3_Malloc(sizeof(struct port_range));
- range->start = start;
- range->end = end;
- range->type = type;
+ struct port_range * range = (struct port_range *)V3_Malloc(sizeof(struct port_range));
+ range->start = start;
+ range->end = end;
+ range->type = type;
- PrintDebug("generic: Adding Port Range: 0x%x to 0x%x as %x\n",
- range->start, range->end,
- (range->type == GENERIC_PRINT_AND_PASSTHROUGH) ? "print-and-passthrough" : "print-and-ignore");
+ PrintDebug("generic: Adding Port Range: 0x%x to 0x%x as %x\n",
+ range->start, range->end,
+ (range->type == GENERIC_PRINT_AND_PASSTHROUGH) ? "print-and-passthrough" : "print-and-ignore");
- list_add(&(range->range_link), &(state->port_list));
- state->num_port_ranges++;
- } else {
- PrintDebug("generic: hooking IO ports not supported\n");
- return -1;
- }
-
- return 0;
+ list_add(&(range->range_link), &(state->port_list));
+ state->num_port_ranges++;
+ } else {
+ PrintDebug("generic: hooking IO ports not supported\n");
+ return -1;
+ }
+
+ return 0;
}
int v3_generic_add_mem_range(struct vm_device * dev, void * start, void * end, uint_t type) {
- if (MEM_HOOKS) {
- struct generic_internal * state = (struct generic_internal *)(dev->private_data);
+ if (MEM_HOOKS) {
+ struct generic_internal * state = (struct generic_internal *)(dev->private_data);
- struct mem_range * range = (struct mem_range *)V3_Malloc(sizeof(struct mem_range));
- range->start = start;
- range->end = end;
- range->type = type;
+ struct mem_range * range = (struct mem_range *)V3_Malloc(sizeof(struct mem_range));
+ range->start = start;
+ range->end = end;
+ range->type = type;
- list_add(&(range->range_link), &(state->port_list));
- state->num_mem_ranges++;
- } else {
- PrintDebug("generic: hooking memory not supported\n");
- return -1;
- }
-
- return 0;
+ list_add(&(range->range_link), &(state->port_list));
+ state->num_mem_ranges++;
+ } else {
+ PrintDebug("generic: hooking memory not supported\n");
+ return -1;
+ }
+
+ return 0;
}
int v3_generic_add_irq_range(struct vm_device * dev, uint_t start, uint_t end, uint_t type) {
- if (IRQ_HOOKS) {
- struct generic_internal * state = (struct generic_internal *)(dev->private_data);
+ if (IRQ_HOOKS) {
+ struct generic_internal * state = (struct generic_internal *)(dev->private_data);
- struct irq_range * range = (struct irq_range *)V3_Malloc(sizeof(struct irq_range));
- range->start = start;
- range->end = end;
- range->type = type;
+ struct irq_range * range = (struct irq_range *)V3_Malloc(sizeof(struct irq_range));
+ range->start = start;
+ range->end = end;
+ range->type = type;
- list_add(&(range->range_link), &(state->port_list));
- state->num_irq_ranges++;
- } else {
- PrintDebug("generic: hooking IRQs not supported\n");
- return -1;
- }
-
- return 0;
+ list_add(&(range->range_link), &(state->port_list));
+ state->num_irq_ranges++;
+ } else {
+ PrintDebug("generic: hooking IRQs not supported\n");
+ return -1;
+ }
+
+ return 0;
}
struct vm_device * v3_create_generic() {
- struct generic_internal * generic_state = (struct generic_internal *)V3_Malloc(sizeof(struct generic_internal));
+ struct generic_internal * generic_state = (struct generic_internal *)V3_Malloc(sizeof(struct generic_internal));
- generic_state->num_port_ranges = 0;
- generic_state->num_mem_ranges = 0;
- generic_state->num_irq_ranges = 0;
+ generic_state->num_port_ranges = 0;
+ generic_state->num_mem_ranges = 0;
+ generic_state->num_irq_ranges = 0;
- INIT_LIST_HEAD(&(generic_state->port_list));
- INIT_LIST_HEAD(&(generic_state->mem_list));
- INIT_LIST_HEAD(&(generic_state->irq_list));
+ INIT_LIST_HEAD(&(generic_state->port_list));
+ INIT_LIST_HEAD(&(generic_state->mem_list));
+ INIT_LIST_HEAD(&(generic_state->irq_list));
- struct vm_device * device = v3_create_device("GENERIC", &dev_ops, generic_state);
+ struct vm_device * device = v3_create_device("GENERIC", &dev_ops, generic_state);
- return device;
+ return device;
}
#include <devices/apic.h>
/*
-#ifndef DEBUG_IO_APIC
-#undef PrintDebug
-#define PrintDebug(fmt, args...)
-#endif
+ #ifndef DEBUG_IO_APIC
+ #undef PrintDebug
+ #define PrintDebug(fmt, args...)
+ #endif
*/
#define REDIR_LO_MASK ~0x00005000
struct ioapic_reg_sel {
- union {
- uint32_t val;
- struct {
- uint_t reg_addr : 8;
- uint_t rsvd : 24;
+ union {
+ uint32_t val;
+ struct {
+ uint_t reg_addr : 8;
+ uint_t rsvd : 24;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct ioapic_id_reg {
- union {
- uint32_t val;
- struct {
- uint_t rsvd1 : 24;
- uint_t id : 4;
- uint_t rsvd2 : 4;
+ union {
+ uint32_t val;
+ struct {
+ uint_t rsvd1 : 24;
+ uint_t id : 4;
+ uint_t rsvd2 : 4;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct ioapic_ver_reg {
- union {
- uint32_t val;
- struct {
- uint_t version : 8;
- uint_t rsvd1 : 8;
- uint_t max_redir : 8;
- uint_t rsvd2 : 8;
+ union {
+ uint32_t val;
+ struct {
+ uint_t version : 8;
+ uint_t rsvd1 : 8;
+ uint_t max_redir : 8;
+ uint_t rsvd2 : 8;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct ioapic_arb_reg {
- union {
- uint32_t val;
- struct {
- uint_t rsvd1 : 24;
- uint_t max_redir : 4;
- uint_t rsvd2 : 4;
+ union {
+ uint32_t val;
+ struct {
+ uint_t rsvd1 : 24;
+ uint_t max_redir : 4;
+ uint_t rsvd2 : 4;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct redir_tbl_entry {
- union {
- uint64_t val;
- struct {
- uint32_t lo;
- uint32_t hi;
- } __attribute__((packed));
- struct {
- uint_t vec : 8;
+ union {
+ uint64_t val;
+ struct {
+ uint32_t lo;
+ uint32_t hi;
+ } __attribute__((packed));
+ struct {
+ uint_t vec : 8;
#define FIXED 0x0
#define LOWEST_PRIOR 0x1
#define NMI 0x4
#define INIT 0x5
#define EXTINT 0x7
- uint_t del_mode : 3;
+ uint_t del_mode : 3;
#define PHSYICAL_DST_MODE 0
#define LOGICAL_DST_MODE 1
- uint_t dst_mode : 1;
- uint_t del_status : 1;
+ uint_t dst_mode : 1;
+ uint_t del_status : 1;
#define HIGH_ACTIVE 0
#define LOW_ACTIVE 1
- uint_t intr_pol : 1;
- uint_t rem_irr : 1;
- uint_t trig_mode : 1;
- uint_t mask : 1;
- uint64_t rsvd : 39;
- uint_t dst_field : 8;
+ uint_t intr_pol : 1;
+ uint_t rem_irr : 1;
+ uint_t trig_mode : 1;
+ uint_t mask : 1;
+ uint64_t rsvd : 39;
+ uint_t dst_field : 8;
+ } __attribute__((packed));
} __attribute__((packed));
- } __attribute__((packed));
} __attribute__((packed));
struct io_apic_state {
- addr_t base_addr;
+ addr_t base_addr;
- uint32_t index_reg;
+ uint32_t index_reg;
- struct ioapic_id_reg ioapic_id;
- struct ioapic_ver_reg ioapic_ver;
- struct ioapic_arb_reg ioapic_arb_id;
+ struct ioapic_id_reg ioapic_id;
+ struct ioapic_ver_reg ioapic_ver;
+ struct ioapic_arb_reg ioapic_arb_id;
- struct redir_tbl_entry redir_tbl[24];
+ struct redir_tbl_entry redir_tbl[24];
- // This is a temporary method of communication between the IOAPIC and the LAPIC
- struct vm_device * apic;
+ // This is a temporary method of communication between the IOAPIC and the LAPIC
+ struct vm_device * apic;
};
static void init_ioapic_state(struct io_apic_state * ioapic) {
- int i = 0;
- ioapic->base_addr = IO_APIC_BASE_ADDR;
- ioapic->index_reg = 0;
-
- ioapic->ioapic_id.val = 0x00000000;
- ioapic->ioapic_ver.val = 0x00170011;
- ioapic->ioapic_arb_id.val = 0x00000000;
-
- for (i = 0; i < 24; i++) {
- ioapic->redir_tbl[i].val = 0x0001000000000000LL;
- // Mask all interrupts until they are enabled....
- ioapic->redir_tbl[i].mask = 1;
- }
+ int i = 0;
+ ioapic->base_addr = IO_APIC_BASE_ADDR;
+ ioapic->index_reg = 0;
+
+ ioapic->ioapic_id.val = 0x00000000;
+ ioapic->ioapic_ver.val = 0x00170011;
+ ioapic->ioapic_arb_id.val = 0x00000000;
+
+ for (i = 0; i < 24; i++) {
+ ioapic->redir_tbl[i].val = 0x0001000000000000LL;
+ // Mask all interrupts until they are enabled....
+ ioapic->redir_tbl[i].mask = 1;
+ }
}
static int ioapic_read(addr_t guest_addr, void * dst, uint_t length, void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
- struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
- uint32_t reg_tgt = guest_addr - ioapic->base_addr;
- uint32_t * op_val = (uint32_t *)dst;
-
- PrintDebug("IOAPIC Read at %p\n", (void *)guest_addr);
-
- if (reg_tgt == 0x00) {
- *op_val = ioapic->index_reg;
- } else if (reg_tgt == 0x10) {
- // IOWIN register
- switch (ioapic->index_reg) {
- case IOAPIC_ID_REG:
- *op_val = ioapic->ioapic_id.val;
- break;
- case IOAPIC_VER_REG:
- *op_val = ioapic->ioapic_ver.val;
- break;
- case IOAPIC_ARB_REG:
- *op_val = ioapic->ioapic_arb_id.val;
- break;
- default:
- {
- uint_t redir_index = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) & 0xfffffffe;
- uint_t hi_val = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) % 1;
-
- if (redir_index > 0x3f) {
- PrintError("Invalid redirection table entry %x\n", (uint32_t)redir_index);
- return -1;
- }
- if (hi_val) {
- *op_val = ioapic->redir_tbl[redir_index].hi;
- } else {
- *op_val = ioapic->redir_tbl[redir_index].lo;
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
+ uint32_t reg_tgt = guest_addr - ioapic->base_addr;
+ uint32_t * op_val = (uint32_t *)dst;
+
+ PrintDebug("IOAPIC Read at %p\n", (void *)guest_addr);
+
+ if (reg_tgt == 0x00) {
+ *op_val = ioapic->index_reg;
+ } else if (reg_tgt == 0x10) {
+ // IOWIN register
+ switch (ioapic->index_reg) {
+ case IOAPIC_ID_REG:
+ *op_val = ioapic->ioapic_id.val;
+ break;
+ case IOAPIC_VER_REG:
+ *op_val = ioapic->ioapic_ver.val;
+ break;
+ case IOAPIC_ARB_REG:
+ *op_val = ioapic->ioapic_arb_id.val;
+ break;
+ default:
+ {
+ uint_t redir_index = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) & 0xfffffffe;
+ uint_t hi_val = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) % 1;
+
+ if (redir_index > 0x3f) {
+ PrintError("Invalid redirection table entry %x\n", (uint32_t)redir_index);
+ return -1;
+ }
+ if (hi_val) {
+ *op_val = ioapic->redir_tbl[redir_index].hi;
+ } else {
+ *op_val = ioapic->redir_tbl[redir_index].lo;
+ }
+ }
}
- }
}
- }
- return length;
+ return length;
}
static int ioapic_write(addr_t guest_addr, void * src, uint_t length, void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
- struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
- uint32_t reg_tgt = guest_addr - ioapic->base_addr;
- uint32_t op_val = *(uint32_t *)src;
-
- PrintDebug("IOAPIC Write at %p (val = %d)\n", (void *)guest_addr, *(uint32_t *)src);
-
- if (reg_tgt == 0x00) {
- ioapic->index_reg = op_val;
- } else if (reg_tgt == 0x10) {
- // IOWIN register
- switch (ioapic->index_reg) {
- case IOAPIC_ID_REG:
- ioapic->ioapic_id.val = op_val;
- break;
- case IOAPIC_VER_REG:
- // GPF/PageFault/Ignore?
- PrintError("Writing to read only IOAPIC register\n");
- return -1;
- case IOAPIC_ARB_REG:
- ioapic->ioapic_arb_id.val = op_val;
- break;
- default:
- {
- uint_t redir_index = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) & 0xfffffffe;
- uint_t hi_val = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) % 1;
-
-
-
-
- if (redir_index > 0x3f) {
- PrintError("Invalid redirection table entry %x\n", (uint32_t)redir_index);
- return -1;
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
+ uint32_t reg_tgt = guest_addr - ioapic->base_addr;
+ uint32_t op_val = *(uint32_t *)src;
+
+ PrintDebug("IOAPIC Write at %p (val = %d)\n", (void *)guest_addr, *(uint32_t *)src);
+
+ if (reg_tgt == 0x00) {
+ ioapic->index_reg = op_val;
+ } else if (reg_tgt == 0x10) {
+ // IOWIN register
+ switch (ioapic->index_reg) {
+ case IOAPIC_ID_REG:
+ ioapic->ioapic_id.val = op_val;
+ break;
+ case IOAPIC_VER_REG:
+ // GPF/PageFault/Ignore?
+ PrintError("Writing to read only IOAPIC register\n");
+ return -1;
+ case IOAPIC_ARB_REG:
+ ioapic->ioapic_arb_id.val = op_val;
+ break;
+ default:
+ {
+ uint_t redir_index = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) & 0xfffffffe;
+ uint_t hi_val = (ioapic->index_reg - IOAPIC_REDIR_BASE_REG) % 1;
+
+
+
+
+ if (redir_index > 0x3f) {
+ PrintError("Invalid redirection table entry %x\n", (uint32_t)redir_index);
+ return -1;
+ }
+ if (hi_val) {
+ PrintDebug("Writing to hi of pin %d\n", redir_index);
+ ioapic->redir_tbl[redir_index].hi = op_val;
+ } else {
+ PrintDebug("Writing to lo of pin %d\n", redir_index);
+ op_val &= REDIR_LO_MASK;
+ ioapic->redir_tbl[redir_index].lo &= ~REDIR_LO_MASK;
+ ioapic->redir_tbl[redir_index].lo |= op_val;
+ }
+ }
}
- if (hi_val) {
- PrintDebug("Writing to hi of pin %d\n", redir_index);
- ioapic->redir_tbl[redir_index].hi = op_val;
- } else {
- PrintDebug("Writing to lo of pin %d\n", redir_index);
- op_val &= REDIR_LO_MASK;
- ioapic->redir_tbl[redir_index].lo &= ~REDIR_LO_MASK;
- ioapic->redir_tbl[redir_index].lo |= op_val;
- }
- }
}
- }
- return length;
+ return length;
}
/* Interrupt controller functions */
static int ioapic_intr_pending(void * private_data) {
- return 0;
+ return 0;
}
static int ioapic_get_intr_number(void * private_data) {
- return 0;
+ return 0;
}
static int ioapic_begin_irq(void * private_data, int irq) {
- return 0;
+ return 0;
}
static int ioapic_raise_irq(void * private_data, int irq) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
- struct redir_tbl_entry * irq_entry = NULL;
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
+ struct redir_tbl_entry * irq_entry = NULL;
- if (irq > 24) {
- PrintError("IRQ out of range of IO APIC\n");
- return -1;
- }
+ if (irq > 24) {
+ PrintError("IRQ out of range of IO APIC\n");
+ return -1;
+ }
- irq_entry = &(ioapic->redir_tbl[irq]);
+ irq_entry = &(ioapic->redir_tbl[irq]);
- if (irq_entry->mask == 0) {
- PrintDebug("IOAPIC Signalling APIC to raise INTR %d\n", irq_entry->vec);
- v3_apic_raise_intr(ioapic->apic, irq_entry->vec);
- }
+ if (irq_entry->mask == 0) {
+ PrintDebug("IOAPIC Signalling APIC to raise INTR %d\n", irq_entry->vec);
+ v3_apic_raise_intr(ioapic->apic, irq_entry->vec);
+ }
- return 0;
+ return 0;
}
/* I don't know if we can do anything here.... */
static int ioapic_lower_irq(void * private_data, int irq) {
- return 0;
+ return 0;
}
static struct intr_ctrl_ops intr_ops = {
- .intr_pending = ioapic_intr_pending,
- .get_intr_number = ioapic_get_intr_number,
- .raise_intr = ioapic_raise_irq,
- .begin_irq = ioapic_begin_irq,
- .lower_intr = ioapic_lower_irq,
+ .intr_pending = ioapic_intr_pending,
+ .get_intr_number = ioapic_get_intr_number,
+ .raise_intr = ioapic_raise_irq,
+ .begin_irq = ioapic_begin_irq,
+ .lower_intr = ioapic_lower_irq,
};
static int io_apic_init(struct vm_device * dev) {
- struct guest_info * info = dev->vm;
- struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
+ struct guest_info * info = dev->vm;
+ struct io_apic_state * ioapic = (struct io_apic_state *)(dev->private_data);
- v3_register_intr_controller(dev->vm, &intr_ops, dev);
- init_ioapic_state(ioapic);
+ v3_register_intr_controller(dev->vm, &intr_ops, dev);
+ init_ioapic_state(ioapic);
- v3_hook_full_mem(info, ioapic->base_addr, ioapic->base_addr + PAGE_SIZE_4KB,
- ioapic_read, ioapic_write, dev);
+ v3_hook_full_mem(info, ioapic->base_addr, ioapic->base_addr + PAGE_SIZE_4KB,
+ ioapic_read, ioapic_write, dev);
- return 0;
+ return 0;
}
static int io_apic_deinit(struct vm_device * dev) {
- // struct guest_info * info = dev->vm;
+ // struct guest_info * info = dev->vm;
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = io_apic_init,
- .deinit = io_apic_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = io_apic_init,
+ .deinit = io_apic_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_io_apic(struct vm_device * apic) {
- PrintDebug("Creating IO APIC\n");
+ PrintDebug("Creating IO APIC\n");
- struct io_apic_state * ioapic = (struct io_apic_state *)V3_Malloc(sizeof(struct io_apic_state));
- ioapic->apic = apic;
+ struct io_apic_state * ioapic = (struct io_apic_state *)V3_Malloc(sizeof(struct io_apic_state));
+ ioapic->apic = apic;
- struct vm_device * device = v3_create_device("IOAPIC", &dev_ops, ioapic);
+ struct vm_device * device = v3_create_device("IOAPIC", &dev_ops, ioapic);
- return device;
+ return device;
}
struct keyboard_internal {
- //
- // 0x60 is the port for the keyboard microcontroller
- // writes are commands
- // reads from it usually return scancodes
- // however, it can also return other data
- // depending on the state of the onboard microcontroller
- //
- // 0x64 is the port for the onboard microcontroller
- // writes are commands
- // reads are status
- //
-
- // state of the onboard microcontroller
- // this is needed because sometimes 0x60 reads come
- // from the onboard microcontroller
- enum {// Normal mode measn we deliver keys
+ //
+ // 0x60 is the port for the keyboard microcontroller
+ // writes are commands
+ // reads from it usually return scancodes
+ // however, it can also return other data
+ // depending on the state of the onboard microcontroller
+ //
+ // 0x64 is the port for the onboard microcontroller
+ // writes are commands
+ // reads are status
+ //
+
+ // state of the onboard microcontroller
+ // this is needed because sometimes 0x60 reads come
+ // from the onboard microcontroller
+ enum {// Normal mode measn we deliver keys
// to the vm and accept commands from it
NORMAL,
// after receiving cmd 0x60
// we wait for a new output byte on 60
// then send it to the mouse
IN_MOUSE,
- } state;
-
-
- enum {
- // after receiving a mouse command 0f 0xff
- // we return the ack and then the next thing will be the
- // bat code (aa - success)
- RESET1,
- // followed by the device id (00 - mouse)
- RESET2,
- // Then it goes into stream mode
- STREAM1, //
- STREAM2, //
- STREAM3, // for each of the following bytes in mouse_packet
- // this is used for setting sample rate
- SAMPLE1,
- // this is used for getting device id
- DEVICE1,
- // just like the stream moes
- REMOTE1,
- REMOTE2,
- REMOTE3,
- // For getting status info
- STATUS1,
- STATUS2,
- STATUS3,
- // set resolution
- SETRES1,
- } mouse_state;
-
-
- uchar_t wrap;
- uchar_t mouse_packet[3]; // byte 1: y over, xover, y sign, x sign, 1, middle, right, left
- // byte 2: x movement
- // byte 3: y movement
-
- uchar_t mouse_needs_ack; //
- uchar_t mouse_done_after_ack;
-
- uchar_t cmd_byte; // for keyboard uC - read/written
- // via read/write cmd byte command
- uchar_t status_byte; // for on-board uC - read via 64h
-
- uchar_t output_byte; // output port of onboard uC (e.g. A20)
-
- uchar_t input_byte; // input port of onboard uC
-
- // Data for 8042
- uchar_t input_queue; //
- uint_t input_queue_len; //
- //uint_t input_queue_read;
- //uint_t input_queue_write;
- // Data for system
- uchar_t output_queue; //
- uint_t output_queue_len; //
- //uint_t output_queue_read;
- //uint_t output_queue_write;
+ } state;
+
+
+ enum {
+ // after receiving a mouse command 0f 0xff
+ // we return the ack and then the next thing will be the
+ // bat code (aa - success)
+ RESET1,
+ // followed by the device id (00 - mouse)
+ RESET2,
+ // Then it goes into stream mode
+ STREAM1, //
+ STREAM2, //
+ STREAM3, // for each of the following bytes in mouse_packet
+ // this is used for setting sample rate
+ SAMPLE1,
+ // this is used for getting device id
+ DEVICE1,
+ // just like the stream moes
+ REMOTE1,
+ REMOTE2,
+ REMOTE3,
+ // For getting status info
+ STATUS1,
+ STATUS2,
+ STATUS3,
+ // set resolution
+ SETRES1,
+ } mouse_state;
+
+
+ uchar_t wrap;
+ uchar_t mouse_packet[3]; // byte 1: y over, xover, y sign, x sign, 1, middle, right, left
+ // byte 2: x movement
+ // byte 3: y movement
+
+ uchar_t mouse_needs_ack; //
+ uchar_t mouse_done_after_ack;
+
+ uchar_t cmd_byte; // for keyboard uC - read/written
+ // via read/write cmd byte command
+ uchar_t status_byte; // for on-board uC - read via 64h
+
+ uchar_t output_byte; // output port of onboard uC (e.g. A20)
+
+ uchar_t input_byte; // input port of onboard uC
+
+ // Data for 8042
+ uchar_t input_queue; //
+ uint_t input_queue_len; //
+ //uint_t input_queue_read;
+ //uint_t input_queue_write;
+ // Data for system
+ uchar_t output_queue; //
+ uint_t output_queue_len; //
+ //uint_t output_queue_read;
+ //uint_t output_queue_write;
};
//
static int PushToOutputQueue(struct vm_device * dev, uchar_t value, uchar_t overwrite, uchar_t cmd, uchar_t mouse)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if ((state->output_queue_len == 0) || overwrite) {
+ if ((state->output_queue_len == 0) || overwrite) {
- state->output_queue = value;
- state->output_queue_len = 1;
+ state->output_queue = value;
+ state->output_queue_len = 1;
- if (cmd) {
- state->status_byte |= STATUS_COMMAND_DATA_AVAIL;
- } else {
- state->status_byte &= ~STATUS_COMMAND_DATA_AVAIL;
- }
+ if (cmd) {
+ state->status_byte |= STATUS_COMMAND_DATA_AVAIL;
+ } else {
+ state->status_byte &= ~STATUS_COMMAND_DATA_AVAIL;
+ }
- if (mouse) {
- state->status_byte |= STATUS_MOUSE_BUFFER_FULL;
- }
+ if (mouse) {
+ state->status_byte |= STATUS_MOUSE_BUFFER_FULL;
+ }
- {
- state->status_byte |= STATUS_OUTPUT_BUFFER_FULL;
- }
+ {
+ state->status_byte |= STATUS_OUTPUT_BUFFER_FULL;
+ }
- return 0;
+ return 0;
- } else {
- PrintError("keyboard: PushToOutputQueue Failed - Queue Full\n");
- return -1;
- }
+ } else {
+ PrintError("keyboard: PushToOutputQueue Failed - Queue Full\n");
+ return -1;
+ }
}
#if 1
//
static int PullFromOutputQueue(struct vm_device * dev, uchar_t * value)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if (1 || (state->output_queue_len == 1)) {
+ if (1 || (state->output_queue_len == 1)) {
- *value = state->output_queue;
- state->output_queue_len = 0;
+ *value = state->output_queue;
+ state->output_queue_len = 0;
- if (state->status_byte & STATUS_OUTPUT_BUFFER_FULL) {
- state->status_byte &= ~STATUS_OUTPUT_BUFFER_FULL;
- }
+ if (state->status_byte & STATUS_OUTPUT_BUFFER_FULL) {
+ state->status_byte &= ~STATUS_OUTPUT_BUFFER_FULL;
+ }
- if (state->status_byte & STATUS_MOUSE_BUFFER_FULL) {
- state->status_byte &= ~STATUS_MOUSE_BUFFER_FULL;
- }
+ if (state->status_byte & STATUS_MOUSE_BUFFER_FULL) {
+ state->status_byte &= ~STATUS_MOUSE_BUFFER_FULL;
+ }
- if (state->status_byte & STATUS_COMMAND_DATA_AVAIL) {
- state->status_byte &= ~STATUS_COMMAND_DATA_AVAIL;
- } // reset to data
+ if (state->status_byte & STATUS_COMMAND_DATA_AVAIL) {
+ state->status_byte &= ~STATUS_COMMAND_DATA_AVAIL;
+ } // reset to data
- return 0;
- } else {
- PrintError("keyboard: PullFromOutputQueue Failed - Queue Empty\n");
- return -1;
- }
+ return 0;
+ } else {
+ PrintError("keyboard: PullFromOutputQueue Failed - Queue Empty\n");
+ return -1;
+ }
}
#endif
//
static int PushToInputQueue(struct vm_device * dev, uchar_t value, uchar_t overwrite)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if ((state->input_queue_len == 0) || overwrite) {
+ if ((state->input_queue_len == 0) || overwrite) {
- state->input_queue = value;
- state->input_queue_len = 1;
- state->status_byte |= STATUS_INPUT_BUFFER_FULL;
+ state->input_queue = value;
+ state->input_queue_len = 1;
+ state->status_byte |= STATUS_INPUT_BUFFER_FULL;
- return 0;
- } else {
- PrintError("keyboard: PushToOutputQueue Failed - Queue Full\n");
- return -1;
- }
+ return 0;
+ } else {
+ PrintError("keyboard: PushToOutputQueue Failed - Queue Full\n");
+ return -1;
+ }
}
//
//
static int PullFromInputQueue(struct vm_device *dev, uchar_t *value)
{
- struct keyboard_internal * state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal * state = (struct keyboard_internal *)(dev->private_data);
- if (state->input_queue_len == 1) {
+ if (state->input_queue_len == 1) {
- *value = state->input_queue;
- state->input_queue_len = 0;
- state->status_byte &= ~STATUS_INPUT_BUFFER_FULL;
+ *value = state->input_queue;
+ state->input_queue_len = 0;
+ state->status_byte &= ~STATUS_INPUT_BUFFER_FULL;
- return 0;
- } else {
- PrintError("keyboard: PullFromInputQueue Failed - Queue Empty\n");
- return -1;
- }
+ return 0;
+ } else {
+ PrintError("keyboard: PullFromInputQueue Failed - Queue Empty\n");
+ return -1;
+ }
}
#endif
static int keyboard_interrupt(struct vm_device * dev, uint_t irq) {
- PrintDebug("keyboard: interrupt 0x%x\n", irq);
+ PrintDebug("keyboard: interrupt 0x%x\n", irq);
- v3_raise_irq(dev->vm, irq);
+ v3_raise_irq(dev->vm, irq);
- return 0;
+ return 0;
}
static int key_event_handler(struct guest_info * info,
struct v3_keyboard_event * evt,
void * private_data) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- PrintDebug("keyboard: injected status 0x%x, and scancode 0x%x\n", evt->status, evt->scan_code);
+ PrintDebug("keyboard: injected status 0x%x, and scancode 0x%x\n", evt->status, evt->scan_code);
- if ( (state->status_byte & STATUS_ENABLED) // onboard is enabled
- && (!(state->cmd_byte & CMD_DISABLE)) ) { // keyboard is enabled
+ if ( (state->status_byte & STATUS_ENABLED) // onboard is enabled
+ && (!(state->cmd_byte & CMD_DISABLE)) ) { // keyboard is enabled
- PushToOutputQueue(dev, evt->scan_code, OVERWRITE, DATA, KEYBOARD);
+ PushToOutputQueue(dev, evt->scan_code, OVERWRITE, DATA, KEYBOARD);
- if (state->cmd_byte & CMD_INTR) {
- keyboard_interrupt(dev, KEYBOARD_IRQ);
+ if (state->cmd_byte & CMD_INTR) {
+ keyboard_interrupt(dev, KEYBOARD_IRQ);
+ }
}
- }
- return 0;
+ return 0;
}
static int mouse_event_handler(struct guest_info * info,
struct v3_mouse_event * evt,
void * private_data) {
- struct vm_device * dev = (struct vm_device *)private_data;
- struct keyboard_internal * state = (struct keyboard_internal *)(dev->private_data);
+ struct vm_device * dev = (struct vm_device *)private_data;
+ struct keyboard_internal * state = (struct keyboard_internal *)(dev->private_data);
- PrintDebug("keyboard: injected mouse packet 0x %x %x %x\n",
- evt->data[0], evt->data[1], evt->data[2]);
+ PrintDebug("keyboard: injected mouse packet 0x %x %x %x\n",
+ evt->data[0], evt->data[1], evt->data[2]);
- memcpy(state->mouse_packet, evt->data, 3);
+ memcpy(state->mouse_packet, evt->data, 3);
- state->status_byte |= STATUS_MOUSE_BUFFER_FULL;
+ state->status_byte |= STATUS_MOUSE_BUFFER_FULL;
- switch (state->mouse_state) {
- case STREAM1:
- case STREAM2:
- case STREAM3:
- if (!(state->cmd_byte & CMD_MOUSE_DISABLE)) {
- keyboard_interrupt(dev, MOUSE_IRQ);
+ switch (state->mouse_state) {
+ case STREAM1:
+ case STREAM2:
+ case STREAM3:
+ if (!(state->cmd_byte & CMD_MOUSE_DISABLE)) {
+ keyboard_interrupt(dev, MOUSE_IRQ);
+ }
+ break;
+ default:
+ return -1;
+ break;
}
- break;
- default:
- return -1;
- break;
- }
- return 0;
+ return 0;
}
static int keyboard_reset_device(struct vm_device * dev)
{
- struct keyboard_internal *data = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *data = (struct keyboard_internal *)(dev->private_data);
- memset(data, 0, sizeof(struct keyboard_internal));
+ memset(data, 0, sizeof(struct keyboard_internal));
- data->state = NORMAL;
- data->mouse_state = STREAM1;
+ data->state = NORMAL;
+ data->mouse_state = STREAM1;
- data->cmd_byte =
- CMD_INTR // interrupts on
- | CMD_MOUSE_INTR // mouse interupts on
- | CMD_SYSTEM ; // self test passed
- // PS2, keyboard+mouse enabled, generic translation
+ data->cmd_byte =
+ CMD_INTR // interrupts on
+ | CMD_MOUSE_INTR // mouse interupts on
+ | CMD_SYSTEM ; // self test passed
+ // PS2, keyboard+mouse enabled, generic translation
- data->status_byte =
- STATUS_SYSTEM // self-tests passed
- | STATUS_ENABLED ; // keyboard ready
- // buffers empty, no errors
+ data->status_byte =
+ STATUS_SYSTEM // self-tests passed
+ | STATUS_ENABLED ; // keyboard ready
+ // buffers empty, no errors
- data->output_byte = 0; // ?
+ data->output_byte = 0; // ?
- data->input_byte = INPUT_RAM; // we have some
- // also display=color, jumper 0, keyboard enabled
+ data->input_byte = INPUT_RAM; // we have some
+ // also display=color, jumper 0, keyboard enabled
- PrintDebug("keyboard: reset device\n");
+ PrintDebug("keyboard: reset device\n");
- return 0;
+ return 0;
}
static int keyboard_start_device(struct vm_device *dev)
{
- PrintDebug("keyboard: start device\n");
- return 0;
+ PrintDebug("keyboard: start device\n");
+ return 0;
}
static int keyboard_stop_device(struct vm_device *dev)
{
- PrintDebug("keyboard: stop device\n");
- return 0;
+ PrintDebug("keyboard: stop device\n");
+ return 0;
}
static int mouse_read_input(struct vm_device *dev)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if (state->mouse_needs_ack) {
- state->mouse_needs_ack = 0;
+ if (state->mouse_needs_ack) {
+ state->mouse_needs_ack = 0;
- // the ack has been stuffed previously
- if (state->mouse_done_after_ack) {
- return 1;
- } else {
- return 0;
+ // the ack has been stuffed previously
+ if (state->mouse_done_after_ack) {
+ return 1;
+ } else {
+ return 0;
+ }
}
- }
- switch (state->mouse_state) {
+ switch (state->mouse_state) {
- case RESET1: // requesting the BAT code
- PushToOutputQueue(dev, 0xaa, OVERWRITE, DATA, MOUSE) ; // BAT successful
- PrintDebug(" mouse sent BAT code (sucesssful) ");
- state->mouse_state = RESET2;
+ case RESET1: // requesting the BAT code
+ PushToOutputQueue(dev, 0xaa, OVERWRITE, DATA, MOUSE) ; // BAT successful
+ PrintDebug(" mouse sent BAT code (sucesssful) ");
+ state->mouse_state = RESET2;
- return 0; // not done with mouse processing yet
- break;
+ return 0; // not done with mouse processing yet
+ break;
- case RESET2: // requesting the device id
- PushToOutputQueue(dev, 0x00, OVERWRITE, DATA, MOUSE) ; // normal mouse type
- PrintDebug(" mouse sent device id ");
- state->mouse_state = STREAM1;
+ case RESET2: // requesting the device id
+ PushToOutputQueue(dev, 0x00, OVERWRITE, DATA, MOUSE) ; // normal mouse type
+ PrintDebug(" mouse sent device id ");
+ state->mouse_state = STREAM1;
- return 1; // done with mouse processing
- break;
+ return 1; // done with mouse processing
+ break;
- case STREAM1: // send data
- PushToOutputQueue(dev, state->mouse_packet[0], OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent stream data1 ");
- state->mouse_state = STREAM2;
+ case STREAM1: // send data
+ PushToOutputQueue(dev, state->mouse_packet[0], OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent stream data1 ");
+ state->mouse_state = STREAM2;
- return 0;
- break;
+ return 0;
+ break;
- case STREAM2: // send data
- PushToOutputQueue(dev, state->mouse_packet[1], OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent stream data2 ");
- state->mouse_state = STREAM3;
+ case STREAM2: // send data
+ PushToOutputQueue(dev, state->mouse_packet[1], OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent stream data2 ");
+ state->mouse_state = STREAM3;
- return 0;
- break;
+ return 0;
+ break;
- case STREAM3: // send data
- PushToOutputQueue(dev, state->mouse_packet[2], OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent stream data3 ");
- state->mouse_state = STREAM1;
+ case STREAM3: // send data
+ PushToOutputQueue(dev, state->mouse_packet[2], OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent stream data3 ");
+ state->mouse_state = STREAM1;
- return 1; // now done
- break;
+ return 1; // now done
+ break;
- case REMOTE1: // send data
- PushToOutputQueue(dev, state->mouse_packet[0], OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent remote data1 ");
- state->mouse_state = REMOTE2;
+ case REMOTE1: // send data
+ PushToOutputQueue(dev, state->mouse_packet[0], OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent remote data1 ");
+ state->mouse_state = REMOTE2;
- return 0;
- break;
+ return 0;
+ break;
- case REMOTE2: // send data
- PushToOutputQueue(dev, state->mouse_packet[1], OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent remote data2 ");
- state->mouse_state = REMOTE3;
+ case REMOTE2: // send data
+ PushToOutputQueue(dev, state->mouse_packet[1], OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent remote data2 ");
+ state->mouse_state = REMOTE3;
- return 0;
- break;
+ return 0;
+ break;
- case REMOTE3: // send data
- PushToOutputQueue(dev, state->mouse_packet[2], OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent remote data3 ");
- state->mouse_state = REMOTE1;
+ case REMOTE3: // send data
+ PushToOutputQueue(dev, state->mouse_packet[2], OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent remote data3 ");
+ state->mouse_state = REMOTE1;
- return 1; // now done
- break;
+ return 1; // now done
+ break;
- case STATUS1: // send data
- PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent status data1 ");
- state->mouse_state = STATUS2;
+ case STATUS1: // send data
+ PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent status data1 ");
+ state->mouse_state = STATUS2;
- return 0;
- break;
+ return 0;
+ break;
- case STATUS2: // send data
- PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent status data2 ");
- state->mouse_state = STATUS3;
+ case STATUS2: // send data
+ PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent status data2 ");
+ state->mouse_state = STATUS3;
- return 0;
- break;
+ return 0;
+ break;
- case STATUS3: // send data
- PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent status data3 ");
- state->mouse_state = STREAM1;
+ case STATUS3: // send data
+ PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent status data3 ");
+ state->mouse_state = STREAM1;
- return 1; // now done
- break;
+ return 1; // now done
+ break;
- case DEVICE1: // send device id
- PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
- PrintDebug(" mouse sent device id ");
- state->mouse_state = STREAM1;
+ case DEVICE1: // send device id
+ PushToOutputQueue(dev, 0x0, OVERWRITE, DATA, MOUSE);
+ PrintDebug(" mouse sent device id ");
+ state->mouse_state = STREAM1;
- return 1; // now done
- break;
+ return 1; // now done
+ break;
- default:
- PrintDebug(" mouse has no data ");
- return 1; // done
- break;
- }
+ default:
+ PrintDebug(" mouse has no data ");
+ return 1; // done
+ break;
+ }
}
static int mouse_write_output(struct vm_device * dev, uchar_t data)
{
- struct keyboard_internal * state = (struct keyboard_internal *)(dev->private_data);
-
- switch (state->mouse_state) {
- case STREAM1:
- case STREAM2:
- case STREAM3:
- case REMOTE1:
- case REMOTE2:
- case REMOTE3:
- switch (data) {
-
- case 0xff: //reset
- PushToOutputQueue(dev, 0xfe, OVERWRITE, DATA, MOUSE) ; // no mouse!
- PrintDebug(" mouse reset begins (no mouse) ");
-
- return 1; // not done;
- break;
-
- /*
- case 0xff: //reset
- PushToOutputQueue(dev,0xfa,OVERWRITE,DATA,MOUSE) ;
- PrintDebug(" mouse reset begins ");
- state->mouse_done_after_ack=0;
- state->mouse_needs_ack=1;
- state->mouse_state=RESET1;
- return 0; // not done;
- break;
- */
- case 0xfe: //resend
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- PrintDebug(" mouse resend begins ");
- state->mouse_done_after_ack = 0;
- state->mouse_needs_ack = 0;
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
+ struct keyboard_internal * state = (struct keyboard_internal *)(dev->private_data);
+
+ switch (state->mouse_state) {
+ case STREAM1:
+ case STREAM2:
+ case STREAM3:
+ case REMOTE1:
+ case REMOTE2:
+ case REMOTE3:
+ switch (data) {
+
+ case 0xff: //reset
+ PushToOutputQueue(dev, 0xfe, OVERWRITE, DATA, MOUSE) ; // no mouse!
+ PrintDebug(" mouse reset begins (no mouse) ");
+
+ return 1; // not done;
+ break;
+
+ /*
+ case 0xff: //reset
+ PushToOutputQueue(dev,0xfa,OVERWRITE,DATA,MOUSE) ;
+ PrintDebug(" mouse reset begins ");
+ state->mouse_done_after_ack=0;
+ state->mouse_needs_ack=1;
+ state->mouse_state=RESET1;
+ return 0; // not done;
+ break;
+ */
+ case 0xfe: //resend
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ PrintDebug(" mouse resend begins ");
+ state->mouse_done_after_ack = 0;
+ state->mouse_needs_ack = 0;
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
- case 0xf6: // set defaults
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- PrintDebug(" mouse set defaults ");
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
+ case 0xf6: // set defaults
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ PrintDebug(" mouse set defaults ");
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
- case 0xf5: // disable data reporting
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse disable data reporting ");
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
+ case 0xf5: // disable data reporting
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse disable data reporting ");
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
- case 0xf4: // enable data reporting
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse enable data reporting ");
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
+ case 0xf4: // enable data reporting
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse enable data reporting ");
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
- case 0xf3: // set sample rate
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 0;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set sample rate begins ");
- state->mouse_state = SAMPLE1;
- return 0; // not done
- break;
+ case 0xf3: // set sample rate
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 0;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set sample rate begins ");
+ state->mouse_state = SAMPLE1;
+ return 0; // not done
+ break;
- case 0xf2: // get device id
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 0;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse get device id begins ");
- state->mouse_state = DEVICE1;
- return 0; // not done
- break;
+ case 0xf2: // get device id
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 0;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse get device id begins ");
+ state->mouse_state = DEVICE1;
+ return 0; // not done
+ break;
- case 0xf0: // set remote mode
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set remote mode ");
- state->mouse_state = REMOTE1;
- return 0; // not done
- break;
-
- case 0xee: // set wrap mode
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set wrap mode (ignored) ");
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
-
- case 0xec: // reset wrap mode
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse reset wrap mode (ignored) ");
- state->mouse_state = STREAM1;
- return 0; // done
- break;
-
- case 0xeb: // read data
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 0;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse switch to wrap mode (ignored) ");
- state->mouse_state = REMOTE1;
- return 0; // not done
- break;
+ case 0xf0: // set remote mode
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set remote mode ");
+ state->mouse_state = REMOTE1;
+ return 0; // not done
+ break;
+
+ case 0xee: // set wrap mode
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set wrap mode (ignored) ");
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
+
+ case 0xec: // reset wrap mode
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse reset wrap mode (ignored) ");
+ state->mouse_state = STREAM1;
+ return 0; // done
+ break;
+
+ case 0xeb: // read data
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 0;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse switch to wrap mode (ignored) ");
+ state->mouse_state = REMOTE1;
+ return 0; // not done
+ break;
- case 0xea: // set stream mode
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set stream mode ");
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
-
- case 0xe9: // status request
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 0;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse status request begins ");
- state->mouse_state = STATUS1;
- return 0; // notdone
- break;
-
- case 0xe8: // set resolution
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 0;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set resolution begins ");
- state->mouse_state = SETRES1;
- return 0; // notdone
- break;
-
- case 0xe7: // set scaling 2:1
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set scaling 2:1 ");
- state->mouse_state = STREAM1;
- return 0; // not done
- break;
-
- case 0xe6: // set scaling 1:1
- PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
- state->mouse_done_after_ack = 1;
- state->mouse_needs_ack = 1;
- PrintDebug(" mouse set scaling 1:1 ");
- state->mouse_state = STREAM1;
- return 0; // done
- break;
+ case 0xea: // set stream mode
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set stream mode ");
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
+
+ case 0xe9: // status request
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 0;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse status request begins ");
+ state->mouse_state = STATUS1;
+ return 0; // notdone
+ break;
+
+ case 0xe8: // set resolution
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 0;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set resolution begins ");
+ state->mouse_state = SETRES1;
+ return 0; // notdone
+ break;
+
+ case 0xe7: // set scaling 2:1
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set scaling 2:1 ");
+ state->mouse_state = STREAM1;
+ return 0; // not done
+ break;
+
+ case 0xe6: // set scaling 1:1
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, DATA, MOUSE) ;
+ state->mouse_done_after_ack = 1;
+ state->mouse_needs_ack = 1;
+ PrintDebug(" mouse set scaling 1:1 ");
+ state->mouse_state = STREAM1;
+ return 0; // done
+ break;
- default:
- PrintDebug(" receiving unknown mouse command (0x%x) in acceptable state ", data);
- return 1; // done
- break;
+ default:
+ PrintDebug(" receiving unknown mouse command (0x%x) in acceptable state ", data);
+ return 1; // done
+ break;
- }
+ }
- default:
- PrintDebug(" receiving mouse output in unhandled state (0x%x) ", state->mouse_state);
- break;
- return 1; // done?
- break;
- }
-
- PrintDebug(" HUH? ");
- return 1; // done
+ default:
+ PrintDebug(" receiving mouse output in unhandled state (0x%x) ", state->mouse_state);
+ break;
+ return 1; // done?
+ break;
+ }
+
+ PrintDebug(" HUH? ");
+ return 1; // done
}
#if KEYBOARD_DEBUG_80H
static int keyboard_write_delay(ushort_t port,
- void * src,
- uint_t length,
- struct vm_device * dev)
+ void * src,
+ uint_t length,
+ struct vm_device * dev)
{
- if (length == 1) {
- PrintDebug("keyboard: write of 0x%x to 80h\n", *((uchar_t*)src));
+ if (length == 1) {
+ PrintDebug("keyboard: write of 0x%x to 80h\n", *((uchar_t*)src));
- return 1;
- } else {
- PrintDebug("keyboard: write of >1 byte to 80h\n", *((uchar_t*)src));
+ return 1;
+ } else {
+ PrintDebug("keyboard: write of >1 byte to 80h\n", *((uchar_t*)src));
- return length;
- }
+ return length;
+ }
}
static int keyboard_read_delay(ushort_t port,
- void * dest,
- uint_t length,
- struct vm_device * dev)
+ void * dest,
+ uint_t length,
+ struct vm_device * dev)
{
- if (length == 1) {
- *((uchar_t*)dest) = v3_inb(port);
+ if (length == 1) {
+ *((uchar_t*)dest) = v3_inb(port);
- PrintDebug("keyboard: read of 0x%x from 80h\n", *((uchar_t*)dest));
+ PrintDebug("keyboard: read of 0x%x from 80h\n", *((uchar_t*)dest));
- return 1;
- } else {
- PrintDebug("keyboard: read of >1 byte from 80h\n");
+ return 1;
+ } else {
+ PrintDebug("keyboard: read of >1 byte from 80h\n");
- return length;
- }
+ return length;
+ }
}
#endif
uint_t length,
struct vm_device * dev)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- uchar_t cmd;
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ uchar_t cmd;
- // Should always be single byte write
+ // Should always be single byte write
- if (length != 1) {
- PrintError("keyboard: write of >1 bytes (%d) to 64h\n", length);
- return -1;
- }
+ if (length != 1) {
+ PrintError("keyboard: write of >1 bytes (%d) to 64h\n", length);
+ return -1;
+ }
- cmd = *((uchar_t*)src);
+ cmd = *((uchar_t*)src);
- if (state->state != NORMAL) {
- PrintDebug("keyboard: warning - receiving command on 64h but state != NORMAL\n");
- }
+ if (state->state != NORMAL) {
+ PrintDebug("keyboard: warning - receiving command on 64h but state != NORMAL\n");
+ }
- PrintDebug("keyboard: command 0x%x on 64h\n", cmd);
-
- switch (cmd) {
-
- case 0x20: // READ COMMAND BYTE (returned in 60h)
- PushToOutputQueue(dev, state->cmd_byte, OVERWRITE, COMMAND,KEYBOARD);
- state->state = NORMAL; // the next read on 0x60 will get the right data
- PrintDebug("keyboard: command byte 0x%x returned\n", state->cmd_byte);
- break;
-
- case 0x60: // WRITE COMMAND BYTE (read from 60h)
- state->state = WRITING_CMD_BYTE; // we need to make sure we send the next 0x60 byte appropriately
- PrintDebug("keyboard: prepare to write command byte\n");
- break;
-
- // case 0x90-9f - write to output port (?)
-
- case 0xa1: // Get version number
- PushToOutputQueue(dev, 0, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug("keyboard: version number 0x0 returned\n");
- break;
-
- case 0xa4: // is password installed? send result to 0x60
- // we don't support passwords
- PushToOutputQueue(dev, 0xf1, OVERWRITE, COMMAND, KEYBOARD);
- PrintDebug("keyboard: password not installed\n");
- state->state = NORMAL;
- break;
-
- case 0xa5: // new password will arrive on 0x60
- state->state = TRANSMIT_PASSWD;
- PrintDebug("keyboard: pepare to transmit password\n");
- break;
-
- case 0xa6: // check passwd;
- // since we do not support passwords, we will simply ignore this
- // the implication is that any password check immediately succeeds
- // with a blank password
- state->state = NORMAL;
- PrintDebug("keyboard: password check succeeded\n");
- break;
-
- case 0xa7: // disable mouse
- state->cmd_byte |= CMD_MOUSE_DISABLE;
- state->state = NORMAL;
- PrintDebug("keyboard: mouse disabled\n");
- break;
-
- case 0xa8: // enable mouse
- state->cmd_byte &= ~CMD_MOUSE_DISABLE;
- state->state = NORMAL;
- PrintDebug("keyboard: mouse enabled\n");
- break;
-
- case 0xa9: // mouse interface test (always succeeds)
- PushToOutputQueue(dev, 0, OVERWRITE, COMMAND, KEYBOARD);
- PrintDebug("keyboard: mouse interface test succeeded\n");
- state->state = NORMAL;
- break;
-
- case 0xaa: // controller self test (always succeeds)
- PushToOutputQueue(dev, 0x55, OVERWRITE, COMMAND, KEYBOARD);
- PrintDebug("keyboard: controller self test succeeded\n");
- state->state = NORMAL;
- break;
-
- case 0xab: // keyboard interface test (always succeeds)
- PushToOutputQueue(dev, 0, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug("keyboard: keyboard interface test succeeded\n");
- break;
-
- case 0xad: // disable keyboard
- state->cmd_byte |= CMD_DISABLE;
- state->state = NORMAL;
- PrintDebug("keyboard: keyboard disabled\n");
- break;
-
- case 0xae: // enable keyboard
- state->cmd_byte &= ~CMD_DISABLE;
- state->state = NORMAL;
- PrintDebug("keyboard: keyboard enabled\n");
- break;
-
- case 0xaf: // get version
- PushToOutputQueue(dev, 0x00, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug("keyboard: version 0 returned \n");
- break;
-
- case 0xd0: // return microcontroller output on 60h
- PushToOutputQueue(dev, state->output_byte, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug("keyboard: output byte 0x%x returned\n", state->output_byte);
- break;
-
- case 0xd1: // request to write next byte on 60h to the microcontroller output port
- state->state = WRITING_OUTPUT_PORT;
- PrintDebug("keyboard: prepare to write output byte\n");
- break;
-
- case 0xd2: // write keyboard buffer (inject key)
- state->state = INJECTING_KEY;
- PrintDebug("keyboard: prepare to inject key\n");
- break;
-
- case 0xd3: // write mouse buffer (inject mouse)
- state->state = INJECTING_MOUSE;
- PrintDebug("keyboard: prepare to inject mouse\n");
- break;
-
- case 0xd4: // write mouse device (command to mouse?)
- state->state = IN_MOUSE;
- PrintDebug("keyboard: prepare to inject mouse command\n");
- break;
-
- case 0xc0: // read input port
- PushToOutputQueue(dev, state->input_byte, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug("keyboard: input byte 0x%x returned\n", state->input_byte);
- break;
-
- case 0xc1: //copy input port lsn to status msn
- state->status_byte &= 0x0f;
- state->status_byte |= (state->input_byte & 0xf) << 4;
- state->state = NORMAL;
- PrintDebug("keyboard: copied input byte lsn to status msn\n");
- break;
-
- case 0xc2: // copy input port msn to status msn
- state->status_byte &= 0x0f;
- state->status_byte |= (state->input_byte & 0xf0);
- state->state = NORMAL;
- PrintDebug("keyboard: copied input byte msn to status msn\n");
- break;
+ PrintDebug("keyboard: command 0x%x on 64h\n", cmd);
+
+ switch (cmd) {
+
+ case 0x20: // READ COMMAND BYTE (returned in 60h)
+ PushToOutputQueue(dev, state->cmd_byte, OVERWRITE, COMMAND,KEYBOARD);
+ state->state = NORMAL; // the next read on 0x60 will get the right data
+ PrintDebug("keyboard: command byte 0x%x returned\n", state->cmd_byte);
+ break;
+
+ case 0x60: // WRITE COMMAND BYTE (read from 60h)
+ state->state = WRITING_CMD_BYTE; // we need to make sure we send the next 0x60 byte appropriately
+ PrintDebug("keyboard: prepare to write command byte\n");
+ break;
+
+ // case 0x90-9f - write to output port (?)
+
+ case 0xa1: // Get version number
+ PushToOutputQueue(dev, 0, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug("keyboard: version number 0x0 returned\n");
+ break;
+
+ case 0xa4: // is password installed? send result to 0x60
+ // we don't support passwords
+ PushToOutputQueue(dev, 0xf1, OVERWRITE, COMMAND, KEYBOARD);
+ PrintDebug("keyboard: password not installed\n");
+ state->state = NORMAL;
+ break;
+
+ case 0xa5: // new password will arrive on 0x60
+ state->state = TRANSMIT_PASSWD;
+ PrintDebug("keyboard: pepare to transmit password\n");
+ break;
+
+ case 0xa6: // check passwd;
+ // since we do not support passwords, we will simply ignore this
+ // the implication is that any password check immediately succeeds
+ // with a blank password
+ state->state = NORMAL;
+ PrintDebug("keyboard: password check succeeded\n");
+ break;
+
+ case 0xa7: // disable mouse
+ state->cmd_byte |= CMD_MOUSE_DISABLE;
+ state->state = NORMAL;
+ PrintDebug("keyboard: mouse disabled\n");
+ break;
+
+ case 0xa8: // enable mouse
+ state->cmd_byte &= ~CMD_MOUSE_DISABLE;
+ state->state = NORMAL;
+ PrintDebug("keyboard: mouse enabled\n");
+ break;
+
+ case 0xa9: // mouse interface test (always succeeds)
+ PushToOutputQueue(dev, 0, OVERWRITE, COMMAND, KEYBOARD);
+ PrintDebug("keyboard: mouse interface test succeeded\n");
+ state->state = NORMAL;
+ break;
+
+ case 0xaa: // controller self test (always succeeds)
+ PushToOutputQueue(dev, 0x55, OVERWRITE, COMMAND, KEYBOARD);
+ PrintDebug("keyboard: controller self test succeeded\n");
+ state->state = NORMAL;
+ break;
+
+ case 0xab: // keyboard interface test (always succeeds)
+ PushToOutputQueue(dev, 0, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug("keyboard: keyboard interface test succeeded\n");
+ break;
+
+ case 0xad: // disable keyboard
+ state->cmd_byte |= CMD_DISABLE;
+ state->state = NORMAL;
+ PrintDebug("keyboard: keyboard disabled\n");
+ break;
+
+ case 0xae: // enable keyboard
+ state->cmd_byte &= ~CMD_DISABLE;
+ state->state = NORMAL;
+ PrintDebug("keyboard: keyboard enabled\n");
+ break;
+
+ case 0xaf: // get version
+ PushToOutputQueue(dev, 0x00, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug("keyboard: version 0 returned \n");
+ break;
+
+ case 0xd0: // return microcontroller output on 60h
+ PushToOutputQueue(dev, state->output_byte, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug("keyboard: output byte 0x%x returned\n", state->output_byte);
+ break;
+
+ case 0xd1: // request to write next byte on 60h to the microcontroller output port
+ state->state = WRITING_OUTPUT_PORT;
+ PrintDebug("keyboard: prepare to write output byte\n");
+ break;
+
+ case 0xd2: // write keyboard buffer (inject key)
+ state->state = INJECTING_KEY;
+ PrintDebug("keyboard: prepare to inject key\n");
+ break;
+
+ case 0xd3: // write mouse buffer (inject mouse)
+ state->state = INJECTING_MOUSE;
+ PrintDebug("keyboard: prepare to inject mouse\n");
+ break;
+
+ case 0xd4: // write mouse device (command to mouse?)
+ state->state = IN_MOUSE;
+ PrintDebug("keyboard: prepare to inject mouse command\n");
+ break;
+
+ case 0xc0: // read input port
+ PushToOutputQueue(dev, state->input_byte, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug("keyboard: input byte 0x%x returned\n", state->input_byte);
+ break;
+
+ case 0xc1: //copy input port lsn to status msn
+ state->status_byte &= 0x0f;
+ state->status_byte |= (state->input_byte & 0xf) << 4;
+ state->state = NORMAL;
+ PrintDebug("keyboard: copied input byte lsn to status msn\n");
+ break;
+
+ case 0xc2: // copy input port msn to status msn
+ state->status_byte &= 0x0f;
+ state->status_byte |= (state->input_byte & 0xf0);
+ state->state = NORMAL;
+ PrintDebug("keyboard: copied input byte msn to status msn\n");
+ break;
- case 0xe0: // read test port
- PushToOutputQueue(dev, state->output_byte >> 6, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug("keyboard: read 0x%x from test port\n", state->output_byte >> 6);
- break;
+ case 0xe0: // read test port
+ PushToOutputQueue(dev, state->output_byte >> 6, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug("keyboard: read 0x%x from test port\n", state->output_byte >> 6);
+ break;
- case 0xf0: // pulse output port
- case 0xf1: // this should pulse 0..3 of cmd_byte on output port
- case 0xf2: // instead of what is currently in output_byte (I think)
- case 0xf3: // main effect is taht if bit zero is zero
- case 0xf4: // should cause reset
- case 0xf5: // I doubt anything more recent than a 286 running
- case 0xf6: // OS2 with the penalty box will care
- case 0xf7:
- case 0xf8:
- case 0xf9:
- case 0xfa:
- case 0xfb:
- case 0xfc:
- case 0xfd:
- case 0xfe:
- case 0xff:
+ case 0xf0: // pulse output port
+ case 0xf1: // this should pulse 0..3 of cmd_byte on output port
+ case 0xf2: // instead of what is currently in output_byte (I think)
+ case 0xf3: // main effect is taht if bit zero is zero
+ case 0xf4: // should cause reset
+ case 0xf5: // I doubt anything more recent than a 286 running
+ case 0xf6: // OS2 with the penalty box will care
+ case 0xf7:
+ case 0xf8:
+ case 0xf9:
+ case 0xfa:
+ case 0xfb:
+ case 0xfc:
+ case 0xfd:
+ case 0xfe:
+ case 0xff:
- PrintDebug("keyboard: ignoring pulse of 0x%x (low=pulsed) on output port\n", (cmd & 0xf));
- state->state = NORMAL;
- break;
+ PrintDebug("keyboard: ignoring pulse of 0x%x (low=pulsed) on output port\n", (cmd & 0xf));
+ state->state = NORMAL;
+ break;
- // case ac diagonstic - returns 16 bytes from keyboard microcontroler on 60h
- default:
- PrintDebug("keyboard: ignoring command (unimplemented)\n");
- state->state = NORMAL;
- break;
- }
+ // case ac diagonstic - returns 16 bytes from keyboard microcontroler on 60h
+ default:
+ PrintDebug("keyboard: ignoring command (unimplemented)\n");
+ state->state = NORMAL;
+ break;
+ }
- return 1;
+ return 1;
}
uint_t length,
struct vm_device * dev)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if (length == 1) {
+ if (length == 1) {
- PrintDebug("keyboard: read status (64h): ");
+ PrintDebug("keyboard: read status (64h): ");
- *((uchar_t*)dest) = state->status_byte;
+ *((uchar_t*)dest) = state->status_byte;
- PrintDebug("0x%x\n", *((uchar_t*)dest));
+ PrintDebug("0x%x\n", *((uchar_t*)dest));
- return 1;
- } else {
- PrintError("keyboard: >1 byte read for status (64h)\n");
- return -1;
- }
+ return 1;
+ } else {
+ PrintError("keyboard: >1 byte read for status (64h)\n");
+ return -1;
+ }
}
static int keyboard_write_output(ushort_t port,
uint_t length,
struct vm_device * dev)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if (length != 1) {
- PrintError("keyboard: write of 60h with >1 byte\n");
- return -1;
- }
+ if (length != 1) {
+ PrintError("keyboard: write of 60h with >1 byte\n");
+ return -1;
+ }
- uchar_t data = *((uchar_t*)src);
+ uchar_t data = *((uchar_t*)src);
- PrintDebug("keyboard: output 0x%x on 60h\n", data);
-
- switch (state->state) {
- case WRITING_CMD_BYTE:
- state->cmd_byte = data;
- state->state = NORMAL;
- PrintDebug("keyboard: wrote new command byte 0x%x\n", state->cmd_byte);
- break;
- case WRITING_OUTPUT_PORT:
- state->output_byte = data;
- state->state = NORMAL;
- PrintDebug("keyboard: wrote new output byte 0x%x\n", state->output_byte);
- break;
- case INJECTING_KEY:
- PushToOutputQueue(dev, data, OVERWRITE, COMMAND, KEYBOARD); // probably should be a call to deliver_key_to_vmm()
- state->state = NORMAL;
- PrintDebug("keyboard: injected key 0x%x\n", data);
- break;
- case INJECTING_MOUSE:
- PrintDebug("keyboard: ignoring injected mouse event 0x%x\n", data);
- state->state = NORMAL;
- break;
- case IN_MOUSE:
- PrintDebug("keyboard: mouse action: ");
- if (mouse_write_output(dev, data)) {
- state->state = NORMAL;
- }
- PrintDebug("\n");
- break;
- case TRANSMIT_PASSWD:
- if (data) {
- //ignore passwd
- PrintDebug("keyboard: ignoring password character 0x%x\n",data);
- } else {
- // end of password
- state->state = NORMAL;
- PrintDebug("keyboard: done with password\n");
+ PrintDebug("keyboard: output 0x%x on 60h\n", data);
+
+ switch (state->state) {
+ case WRITING_CMD_BYTE:
+ state->cmd_byte = data;
+ state->state = NORMAL;
+ PrintDebug("keyboard: wrote new command byte 0x%x\n", state->cmd_byte);
+ break;
+ case WRITING_OUTPUT_PORT:
+ state->output_byte = data;
+ state->state = NORMAL;
+ PrintDebug("keyboard: wrote new output byte 0x%x\n", state->output_byte);
+ break;
+ case INJECTING_KEY:
+ PushToOutputQueue(dev, data, OVERWRITE, COMMAND, KEYBOARD); // probably should be a call to deliver_key_to_vmm()
+ state->state = NORMAL;
+ PrintDebug("keyboard: injected key 0x%x\n", data);
+ break;
+ case INJECTING_MOUSE:
+ PrintDebug("keyboard: ignoring injected mouse event 0x%x\n", data);
+ state->state = NORMAL;
+ break;
+ case IN_MOUSE:
+ PrintDebug("keyboard: mouse action: ");
+ if (mouse_write_output(dev, data)) {
+ state->state = NORMAL;
+ }
+ PrintDebug("\n");
+ break;
+ case TRANSMIT_PASSWD:
+ if (data) {
+ //ignore passwd
+ PrintDebug("keyboard: ignoring password character 0x%x\n",data);
+ } else {
+ // end of password
+ state->state = NORMAL;
+ PrintDebug("keyboard: done with password\n");
+ }
+ break;
+ case NORMAL:
+ {
+ // command is being sent to keyboard controller
+ switch (data) {
+ case 0xff: // reset
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, COMMAND, KEYBOARD); // ack
+ state->state = RESET;
+ PrintDebug("keyboard: reset complete and acked\n");
+ break;
+ case 0xf5: // disable scanning
+ case 0xf4: // enable scanning
+ // ack
+ PushToOutputQueue(dev, 0xfa, OVERWRITE, COMMAND, KEYBOARD);
+ // should do something here... PAD
+ state->state = NORMAL;
+ PrintDebug("keyboard: %s scanning done and acked\n",data==0xf5 ? "disable" : "enable");
+ break;
+ case 0xfe: // resend
+ case 0xfd: // set key type make
+ case 0xfc: // set key typ make/break
+ case 0xfb: // set key type typematic
+ case 0xfa: // set all typematic make/break/typematic
+ case 0xf9: // set all make
+ case 0xf8: // set all make/break
+ case 0xf7: // set all typemaktic
+ case 0xf6: // set defaults
+ case 0xf3: // set typematic delay/rate
+ PrintDebug("keyboard: unhandled known command 0x%x on output buffer (60h)\n", data);
+ break;
+ default:
+ PrintDebug("keyboard: unhandled unknown command 0x%x on output buffer (60h)\n", data);
+ state->status_byte |= 0x1;
+ break;
+ }
+ break;
+ }
+ default:
+ PrintDebug("keyboard: unknown state %x on command 0x%x on output buffer (60h)\n", state->state, data);
}
- break;
- case NORMAL:
- {
- // command is being sent to keyboard controller
- switch (data) {
- case 0xff: // reset
- PushToOutputQueue(dev, 0xfa, OVERWRITE, COMMAND, KEYBOARD); // ack
- state->state = RESET;
- PrintDebug("keyboard: reset complete and acked\n");
- break;
- case 0xf5: // disable scanning
- case 0xf4: // enable scanning
- // ack
- PushToOutputQueue(dev, 0xfa, OVERWRITE, COMMAND, KEYBOARD);
- // should do something here... PAD
- state->state = NORMAL;
- PrintDebug("keyboard: %s scanning done and acked\n",data==0xf5 ? "disable" : "enable");
- break;
- case 0xfe: // resend
- case 0xfd: // set key type make
- case 0xfc: // set key typ make/break
- case 0xfb: // set key type typematic
- case 0xfa: // set all typematic make/break/typematic
- case 0xf9: // set all make
- case 0xf8: // set all make/break
- case 0xf7: // set all typemaktic
- case 0xf6: // set defaults
- case 0xf3: // set typematic delay/rate
- PrintDebug("keyboard: unhandled known command 0x%x on output buffer (60h)\n", data);
- break;
- default:
- PrintDebug("keyboard: unhandled unknown command 0x%x on output buffer (60h)\n", data);
- state->status_byte |= 0x1;
- break;
- }
- break;
- }
- default:
- PrintDebug("keyboard: unknown state %x on command 0x%x on output buffer (60h)\n", state->state, data);
- }
- return 1;
+ return 1;
}
static int keyboard_read_input(ushort_t port,
uint_t length,
struct vm_device * dev)
{
- struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
+ struct keyboard_internal *state = (struct keyboard_internal *)(dev->private_data);
- if (length == 1) {
- uchar_t data;
- int done_mouse;
+ if (length == 1) {
+ uchar_t data;
+ int done_mouse;
- PrintDebug("keyboard: read from input (60h): ");
+ PrintDebug("keyboard: read from input (60h): ");
- if (state->state == IN_MOUSE) {
- done_mouse = mouse_read_input(dev);
- if (done_mouse) {
- state->state = NORMAL;
- }
- }
+ if (state->state == IN_MOUSE) {
+ done_mouse = mouse_read_input(dev);
+ if (done_mouse) {
+ state->state = NORMAL;
+ }
+ }
- PullFromOutputQueue(dev, &data);
+ PullFromOutputQueue(dev, &data);
- if (state->state == RESET) {
- // We just delivered the ack for the reset
- // now we will ready ourselves to deliver the BAT code (success)
- PushToOutputQueue(dev, 0xaa, OVERWRITE, COMMAND, KEYBOARD);
- state->state = NORMAL;
- PrintDebug(" (in reset, pushing BAT test code 0xaa) ");
- }
+ if (state->state == RESET) {
+ // We just delivered the ack for the reset
+ // now we will ready ourselves to deliver the BAT code (success)
+ PushToOutputQueue(dev, 0xaa, OVERWRITE, COMMAND, KEYBOARD);
+ state->state = NORMAL;
+ PrintDebug(" (in reset, pushing BAT test code 0xaa) ");
+ }
- PrintDebug("0x%x\n", data);
+ PrintDebug("0x%x\n", data);
- *((uchar_t*)dest) = data;
+ *((uchar_t*)dest) = data;
- return 1;
- } else {
- PrintError("keyboard: unknown size read from input (60h)\n");
- return -1;
- }
+ return 1;
+ } else {
+ PrintError("keyboard: unknown size read from input (60h)\n");
+ return -1;
+ }
}
static int keyboard_init_device(struct vm_device * dev)
{
- // struct keyboard_internal *data = (struct keyboard_internal *) dev->private_data;
+ // struct keyboard_internal *data = (struct keyboard_internal *) dev->private_data;
- PrintDebug("keyboard: init_device\n");
+ PrintDebug("keyboard: init_device\n");
- // Would read state here
+ // Would read state here
- keyboard_reset_device(dev);
+ keyboard_reset_device(dev);
- // hook ports
- v3_dev_hook_io(dev, KEYBOARD_64H, &keyboard_read_status, &keyboard_write_command);
- v3_dev_hook_io(dev, KEYBOARD_60H, &keyboard_read_input, &keyboard_write_output);
+ // hook ports
+ v3_dev_hook_io(dev, KEYBOARD_64H, &keyboard_read_status, &keyboard_write_command);
+ v3_dev_hook_io(dev, KEYBOARD_60H, &keyboard_read_input, &keyboard_write_output);
- v3_hook_host_event(dev->vm, HOST_KEYBOARD_EVT, V3_HOST_EVENT_HANDLER(key_event_handler), dev);
- v3_hook_host_event(dev->vm, HOST_MOUSE_EVT, V3_HOST_EVENT_HANDLER(mouse_event_handler), dev);
+ v3_hook_host_event(dev->vm, HOST_KEYBOARD_EVT, V3_HOST_EVENT_HANDLER(key_event_handler), dev);
+ v3_hook_host_event(dev->vm, HOST_MOUSE_EVT, V3_HOST_EVENT_HANDLER(mouse_event_handler), dev);
#if KEYBOARD_DEBUG_80H
- v3_dev_hook_io(dev, KEYBOARD_DELAY_80H, &keyboard_read_delay, &keyboard_write_delay);
+ v3_dev_hook_io(dev, KEYBOARD_DELAY_80H, &keyboard_read_delay, &keyboard_write_delay);
#endif
- //
- // We do not hook the IRQ here. Instead, the underlying device driver
- // is responsible to call us back
- //
+ //
+ // We do not hook the IRQ here. Instead, the underlying device driver
+ // is responsible to call us back
+ //
- return 0;
+ return 0;
}
static int keyboard_deinit_device(struct vm_device *dev)
{
- v3_dev_unhook_io(dev, KEYBOARD_60H);
- v3_dev_unhook_io(dev, KEYBOARD_64H);
+ v3_dev_unhook_io(dev, KEYBOARD_60H);
+ v3_dev_unhook_io(dev, KEYBOARD_64H);
#if KEYBOARD_DEBUG_80H
- v3_dev_unhook_io(dev, KEYBOARD_DELAY_80H);
+ v3_dev_unhook_io(dev, KEYBOARD_DELAY_80H);
#endif
- keyboard_reset_device(dev);
- return 0;
+ keyboard_reset_device(dev);
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = keyboard_init_device,
- .deinit = keyboard_deinit_device,
- .reset = keyboard_reset_device,
- .start = keyboard_start_device,
- .stop = keyboard_stop_device,
+ .init = keyboard_init_device,
+ .deinit = keyboard_deinit_device,
+ .reset = keyboard_reset_device,
+ .start = keyboard_start_device,
+ .stop = keyboard_stop_device,
};
struct vm_device * v3_create_keyboard() {
- struct keyboard_internal * keyboard_state = NULL;
+ struct keyboard_internal * keyboard_state = NULL;
- keyboard_state = (struct keyboard_internal *)V3_Malloc(sizeof(struct keyboard_internal));
+ keyboard_state = (struct keyboard_internal *)V3_Malloc(sizeof(struct keyboard_internal));
- struct vm_device *device = v3_create_device("KEYBOARD", &dev_ops, keyboard_state);
+ struct vm_device *device = v3_create_device("KEYBOARD", &dev_ops, keyboard_state);
- return device;
+ return device;
}
struct nvram_internal {
- nvram_state_t dev_state;
- uchar_t thereg;
- uchar_t mem_state[NVRAM_REG_MAX];
+ nvram_state_t dev_state;
+ uchar_t thereg;
+ uchar_t mem_state[NVRAM_REG_MAX];
- uint_t us; //microseconds - for clock update - zeroed every second
- uint_t pus; //microseconds - for periodic interrupt - cleared every period
+ uint_t us; //microseconds - for clock update - zeroed every second
+ uint_t pus; //microseconds - for periodic interrupt - cleared every period
};
struct rtc_stata {
- uint_t rate: 4; // clock rate = 65536Hz / 2 rate (0110=1024 Hz)
- uint_t basis: 3; // time base, 010 = 32,768 Hz
- uint_t uip: 1; // 1=update in progress
+ uint_t rate: 4; // clock rate = 65536Hz / 2 rate (0110=1024 Hz)
+ uint_t basis: 3; // time base, 010 = 32,768 Hz
+ uint_t uip: 1; // 1=update in progress
} __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
struct rtc_statb {
- uint_t sum: 1; // 1=summer (daylight savings)
- uint_t h24: 1; // 1=24h clock
- uint_t dm: 1; // 1=date/time is in bcd, 0=binary
- uint_t rec: 1; // 1=rectangular signal
- uint_t ui: 1; // 1=update interrupt
- uint_t ai: 1; // 1=alarm interrupt
- uint_t pi: 1; // 1=periodic interrupt
- uint_t set: 1; // 1=blocked update
+ uint_t sum: 1; // 1=summer (daylight savings)
+ uint_t h24: 1; // 1=24h clock
+ uint_t dm: 1; // 1=date/time is in bcd, 0=binary
+ uint_t rec: 1; // 1=rectangular signal
+ uint_t ui: 1; // 1=update interrupt
+ uint_t ai: 1; // 1=alarm interrupt
+ uint_t pi: 1; // 1=periodic interrupt
+ uint_t set: 1; // 1=blocked update
} __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
struct rtc_statc {
- uint_t res: 4; // reserved
- uint_t uf: 1; // 1=source of interrupt is update
- uint_t af: 1; // 1=source of interrupt is alarm interrupt
- uint_t pf: 1; // 1=source of interrupt is periodic interrupt
- uint_t irq: 1; // 1=interrupt requested
+ uint_t res: 4; // reserved
+ uint_t uf: 1; // 1=source of interrupt is update
+ uint_t af: 1; // 1=source of interrupt is alarm interrupt
+ uint_t pf: 1; // 1=source of interrupt is periodic interrupt
+ uint_t irq: 1; // 1=interrupt requested
} __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
struct rtc_statd {
- uint_t res: 7; // reserved
- uint_t val: 1; // 1=cmos ram data is OK
+ uint_t res: 7; // reserved
+ uint_t val: 1; // 1=cmos ram data is OK
} __attribute__((__packed__)) __attribute__((__aligned__ (1))) ;
struct bcd_num {
- uchar_t bot : 4;
- uchar_t top : 4;
+ uchar_t bot : 4;
+ uchar_t top : 4;
};
static uchar_t add_to(uchar_t * left, uchar_t * right, uchar_t bcd) {
- uchar_t temp;
+ uchar_t temp;
- if (bcd) {
- struct bcd_num * bl = (struct bcd_num *)left;
- struct bcd_num * br = (struct bcd_num *)right;
- uchar_t carry = 0;
-
- bl->bot += br->bot;
- carry = bl->bot / 0xa;
- bl->bot %= 0xa;
+ if (bcd) {
+ struct bcd_num * bl = (struct bcd_num *)left;
+ struct bcd_num * br = (struct bcd_num *)right;
+ uchar_t carry = 0;
- bl->top += carry + br->top;
- carry = bl->top / 0xa;
- bl->top %= 0xa;
+ bl->bot += br->bot;
+ carry = bl->bot / 0xa;
+ bl->bot %= 0xa;
- return carry;
- } else {
- temp = *left;
- *left += *right;
+ bl->top += carry + br->top;
+ carry = bl->top / 0xa;
+ bl->top %= 0xa;
- if (*left < temp) {
- return 1;
+ return carry;
} else {
- return 0;
+ temp = *left;
+ *left += *right;
+
+ if (*left < temp) {
+ return 1;
+ } else {
+ return 0;
+ }
}
- }
}
static uchar_t days_in_month(struct vm_device * dev, uchar_t month, uchar_t bcd) {
- // This completely ignores Julian / Gregorian stuff right now
-
- if (bcd) {
-
- switch (month)
- {
- case 0x1: //jan
- case 0x3: //march
- case 0x5: //may
- case 0x7: //july
- case 0x8: //aug
- case 0x10: //oct
- case 0x12: //dec
- return 0x31;
- break;
- case 0x4: //april
- case 0x6: //june
- case 0x9: //sept
- case 0x11: //nov
- return 0x30;
- break;
- case 0x2: //feb
- return 0x28;
- break;
- default:
- return 0x30;
- }
+ // This completely ignores Julian / Gregorian stuff right now
+
+ if (bcd) {
+
+ switch (month)
+ {
+ case 0x1: //jan
+ case 0x3: //march
+ case 0x5: //may
+ case 0x7: //july
+ case 0x8: //aug
+ case 0x10: //oct
+ case 0x12: //dec
+ return 0x31;
+ break;
+ case 0x4: //april
+ case 0x6: //june
+ case 0x9: //sept
+ case 0x11: //nov
+ return 0x30;
+ break;
+ case 0x2: //feb
+ return 0x28;
+ break;
+ default:
+ return 0x30;
+ }
- } else {
-
- switch (month)
- {
- case 1: //jan
- case 3: //march
- case 5: //may
- case 7: //july
- case 8: //aug
- case 10: //oct
- case 12: //dec
- return 31;
- break;
- case 4: //april
- case 6: //june
- case 9: //sept
- case 11: //nov
- return 30;
- break;
- case 2: //feb
- return 28;
- break;
- default:
- return 30;
- }
- }
-}
-
+ } else {
-static void update_time(struct vm_device * dev, uint_t period_us) {
- struct nvram_internal * data = (struct nvram_internal *) (dev->private_data);
- struct rtc_stata * stata = (struct rtc_stata *) &((data->mem_state[NVRAM_REG_STAT_A]));
- struct rtc_statb * statb = (struct rtc_statb *) &((data->mem_state[NVRAM_REG_STAT_B]));
- struct rtc_statc * statc = (struct rtc_statc *) &((data->mem_state[NVRAM_REG_STAT_C]));
- //struct rtc_statd *statd = (struct rtc_statd *) &((data->mem_state[NVRAM_REG_STAT_D]));
- uchar_t * sec = (uchar_t *) &(data->mem_state[NVRAM_REG_SEC]);
- uchar_t * min = (uchar_t *) &(data->mem_state[NVRAM_REG_MIN]);
- uchar_t * hour = (uchar_t *) &(data->mem_state[NVRAM_REG_HOUR]);
- uchar_t * weekday = (uchar_t *) &(data->mem_state[NVRAM_REG_WEEK_DAY]);
- uchar_t * monthday = (uchar_t *) &(data->mem_state[NVRAM_REG_MONTH_DAY]);
- uchar_t * month = (uchar_t *) &(data->mem_state[NVRAM_REG_MONTH]);
- uchar_t * year = (uchar_t *) &(data->mem_state[NVRAM_REG_YEAR]);
- uchar_t * cent = (uchar_t *) &(data->mem_state[NVRAM_REG_IBM_CENTURY_BYTE]);
- uchar_t * seca = (uchar_t *) &(data->mem_state[NVRAM_REG_SEC_ALARM]);
- uchar_t * mina = (uchar_t *) &(data->mem_state[NVRAM_REG_MIN_ALARM]);
- uchar_t * houra = (uchar_t *) &(data->mem_state[NVRAM_REG_HOUR_ALARM]);
- uchar_t hour24;
-
- uchar_t bcd = (statb->dm == 1);
- uchar_t carry = 0;
- uchar_t nextday = 0;
- uint_t periodic_period;
-
- //PrintDebug("nvram: sizeof(struct rtc_stata)=%d\n", sizeof(struct rtc_stata));
-
-
- //PrintDebug("nvram: update_time\n",statb->pi);
-
- // We will set these flags on exit
- statc->irq = 0;
- statc->pf = 0;
- statc->af = 0;
- statc->uf = 0;
-
- // We will reset us after one second
- data->us += period_us;
- // We will reset pus after one periodic_period
- data->pus += period_us;
-
- if (data->us > 1000000) {
- carry = 1;
- carry = add_to(sec, &carry, bcd);
-
- if (carry) {
- PrintDebug("nvram: somehow managed to get a carry in second update\n");
+ switch (month)
+ {
+ case 1: //jan
+ case 3: //march
+ case 5: //may
+ case 7: //july
+ case 8: //aug
+ case 10: //oct
+ case 12: //dec
+ return 31;
+ break;
+ case 4: //april
+ case 6: //june
+ case 9: //sept
+ case 11: //nov
+ return 30;
+ break;
+ case 2: //feb
+ return 28;
+ break;
+ default:
+ return 30;
+ }
}
+}
- if ( (bcd && (*sec == 0x60)) ||
- ((!bcd) && (*sec == 60))) {
-
- *sec = 0;
-
- carry = 1;
- carry = add_to(min, &carry, bcd);
- if (carry) {
- PrintDebug("nvram: somehow managed to get a carry in minute update\n");
- }
-
- if ( (bcd && (*min == 0x60)) ||
- ((!bcd) && (*min == 60))) {
- *min = 0;
- hour24 = *hour;
+static void update_time(struct vm_device * dev, uint_t period_us) {
+ struct nvram_internal * data = (struct nvram_internal *) (dev->private_data);
+ struct rtc_stata * stata = (struct rtc_stata *) &((data->mem_state[NVRAM_REG_STAT_A]));
+ struct rtc_statb * statb = (struct rtc_statb *) &((data->mem_state[NVRAM_REG_STAT_B]));
+ struct rtc_statc * statc = (struct rtc_statc *) &((data->mem_state[NVRAM_REG_STAT_C]));
+ //struct rtc_statd *statd = (struct rtc_statd *) &((data->mem_state[NVRAM_REG_STAT_D]));
+ uchar_t * sec = (uchar_t *) &(data->mem_state[NVRAM_REG_SEC]);
+ uchar_t * min = (uchar_t *) &(data->mem_state[NVRAM_REG_MIN]);
+ uchar_t * hour = (uchar_t *) &(data->mem_state[NVRAM_REG_HOUR]);
+ uchar_t * weekday = (uchar_t *) &(data->mem_state[NVRAM_REG_WEEK_DAY]);
+ uchar_t * monthday = (uchar_t *) &(data->mem_state[NVRAM_REG_MONTH_DAY]);
+ uchar_t * month = (uchar_t *) &(data->mem_state[NVRAM_REG_MONTH]);
+ uchar_t * year = (uchar_t *) &(data->mem_state[NVRAM_REG_YEAR]);
+ uchar_t * cent = (uchar_t *) &(data->mem_state[NVRAM_REG_IBM_CENTURY_BYTE]);
+ uchar_t * seca = (uchar_t *) &(data->mem_state[NVRAM_REG_SEC_ALARM]);
+ uchar_t * mina = (uchar_t *) &(data->mem_state[NVRAM_REG_MIN_ALARM]);
+ uchar_t * houra = (uchar_t *) &(data->mem_state[NVRAM_REG_HOUR_ALARM]);
+ uchar_t hour24;
+
+ uchar_t bcd = (statb->dm == 1);
+ uchar_t carry = 0;
+ uchar_t nextday = 0;
+ uint_t periodic_period;
- if (!(statb->h24)) {
+ //PrintDebug("nvram: sizeof(struct rtc_stata)=%d\n", sizeof(struct rtc_stata));
- if (hour24 & 0x80) {
- hour24 &= 0x8f;
- uchar_t temp = ((bcd) ? 0x12 : 12);
- add_to(&hour24, &temp, bcd);
- }
- }
+ //PrintDebug("nvram: update_time\n",statb->pi);
+
+ // We will set these flags on exit
+ statc->irq = 0;
+ statc->pf = 0;
+ statc->af = 0;
+ statc->uf = 0;
+
+ // We will reset us after one second
+ data->us += period_us;
+ // We will reset pus after one periodic_period
+ data->pus += period_us;
+
+ if (data->us > 1000000) {
carry = 1;
- carry = add_to(&hour24, &carry, bcd);
+ carry = add_to(sec, &carry, bcd);
+
if (carry) {
- PrintDebug("nvram: somehow managed to get a carry in hour update\n");
+ PrintDebug("nvram: somehow managed to get a carry in second update\n");
}
- if ( (bcd && (hour24 == 0x24)) ||
- ((!bcd) && (hour24 == 24))) {
- carry = 1;
- nextday = 1;
- hour24 = 0;
- } else {
- carry = 0;
- }
+ if ( (bcd && (*sec == 0x60)) ||
+ ((!bcd) && (*sec == 60))) {
+
+ *sec = 0;
+ carry = 1;
+ carry = add_to(min, &carry, bcd);
+ if (carry) {
+ PrintDebug("nvram: somehow managed to get a carry in minute update\n");
+ }
- if (statb->h24) {
- *hour = hour24;
- } else {
- if ( (bcd && (hour24 < 0x12)) ||
- ((!bcd) && (hour24 < 12))) {
- *hour = hour24;
+ if ( (bcd && (*min == 0x60)) ||
+ ((!bcd) && (*min == 60))) {
- } else {
+ *min = 0;
+ hour24 = *hour;
- if (!bcd) {
- *hour = (hour24 - 12) | 0x80;
- } else {
- *hour = hour24;
- struct bcd_num * n = (struct bcd_num *)hour;
+ if (!(statb->h24)) {
- if (n->bot < 0x2) {
- n->top--;
- n->bot += 0xa;
- }
+ if (hour24 & 0x80) {
+ hour24 &= 0x8f;
+ uchar_t temp = ((bcd) ? 0x12 : 12);
+ add_to(&hour24, &temp, bcd);
+ }
+ }
- n->bot -= 0x2;
- n->top -= 0x1;
+ carry = 1;
+ carry = add_to(&hour24, &carry, bcd);
+ if (carry) {
+ PrintDebug("nvram: somehow managed to get a carry in hour update\n");
+ }
+
+ if ( (bcd && (hour24 == 0x24)) ||
+ ((!bcd) && (hour24 == 24))) {
+ carry = 1;
+ nextday = 1;
+ hour24 = 0;
+ } else {
+ carry = 0;
+ }
+
+
+ if (statb->h24) {
+ *hour = hour24;
+ } else {
+ if ( (bcd && (hour24 < 0x12)) ||
+ ((!bcd) && (hour24 < 12))) {
+ *hour = hour24;
+
+ } else {
+
+ if (!bcd) {
+ *hour = (hour24 - 12) | 0x80;
+ } else {
+ *hour = hour24;
+ struct bcd_num * n = (struct bcd_num *)hour;
+
+ if (n->bot < 0x2) {
+ n->top--;
+ n->bot += 0xa;
+ }
+
+ n->bot -= 0x2;
+ n->top -= 0x1;
+ }
+ }
+ }
+
+ // now see if we need to carry into the days and further
+ if (nextday) {
+ carry = 1;
+ add_to(weekday, &carry, bcd);
+
+ *weekday %= 0x7; // same regardless of bcd
+
+ if ((*monthday) != days_in_month(dev, *month, bcd)) {
+ add_to(monthday, &carry, bcd);
+ } else {
+ *monthday = 0x1;
+
+ carry = 1;
+ add_to(month, &carry, bcd);
+
+ if ( (bcd && (*month == 0x13)) ||
+ ((!bcd) && (*month == 13))) {
+ *month = 1; // same for both
+
+ carry = 1;
+ carry = add_to(year, &carry, bcd);
+
+ if ( (bcd && carry) ||
+ ((!bcd) && (*year == 100))) {
+ *year = 0;
+ carry = 1;
+ add_to(cent, &carry, bcd);
+ }
+ }
+ }
+ }
}
- }
}
- // now see if we need to carry into the days and further
- if (nextday) {
- carry = 1;
- add_to(weekday, &carry, bcd);
-
- *weekday %= 0x7; // same regardless of bcd
-
- if ((*monthday) != days_in_month(dev, *month, bcd)) {
- add_to(monthday, &carry, bcd);
- } else {
- *monthday = 0x1;
-
- carry = 1;
- add_to(month, &carry, bcd);
-
- if ( (bcd && (*month == 0x13)) ||
- ((!bcd) && (*month == 13))) {
- *month = 1; // same for both
- carry = 1;
- carry = add_to(year, &carry, bcd);
-
- if ( (bcd && carry) ||
- ((!bcd) && (*year == 100))) {
- *year = 0;
- carry = 1;
- add_to(cent, &carry, bcd);
- }
+ data->us -= 1000000;
+ // OK, now check for the alarm, if it is set to interrupt
+ if (statb->ai) {
+ if ((*sec == *seca) && (*min == *mina) && (*hour == *houra)) {
+ statc->af = 1;
+ PrintDebug("nvram: interrupt on alarm\n");
}
- }
}
- }
}
-
- data->us -= 1000000;
- // OK, now check for the alarm, if it is set to interrupt
- if (statb->ai) {
- if ((*sec == *seca) && (*min == *mina) && (*hour == *houra)) {
- statc->af = 1;
- PrintDebug("nvram: interrupt on alarm\n");
- }
- }
- }
-
- if (statb->pi) {
- periodic_period = 1000000 / (65536 / (0x1 << stata->rate));
- if (data->pus >= periodic_period) {
- statc->pf = 1;
- data->pus -= periodic_period;
- PrintDebug("nvram: interrupt on periodic\n");
+ if (statb->pi) {
+ periodic_period = 1000000 / (65536 / (0x1 << stata->rate));
+ if (data->pus >= periodic_period) {
+ statc->pf = 1;
+ data->pus -= periodic_period;
+ PrintDebug("nvram: interrupt on periodic\n");
+ }
}
- }
- if (statb->ui) {
- statc->uf = 1;
- PrintDebug("nvram: interrupt on update\n");
- }
+ if (statb->ui) {
+ statc->uf = 1;
+ PrintDebug("nvram: interrupt on update\n");
+ }
- statc->irq = (statc->pf || statc->af || statc->uf);
+ statc->irq = (statc->pf || statc->af || statc->uf);
- //PrintDebug("nvram: time is now: YMDHMS: 0x%x:0x%x:0x%x:0x%x:0x%x,0x%x bcd=%d\n", *year, *month, *monthday, *hour, *min, *sec,bcd);
+ //PrintDebug("nvram: time is now: YMDHMS: 0x%x:0x%x:0x%x:0x%x:0x%x,0x%x bcd=%d\n", *year, *month, *monthday, *hour, *min, *sec,bcd);
- // Interrupt associated VM, if needed
- if (statc->irq) {
- PrintDebug("nvram: injecting interrupt\n");
- v3_raise_irq(dev->vm, NVRAM_RTC_IRQ);
- }
+ // Interrupt associated VM, if needed
+ if (statc->irq) {
+ PrintDebug("nvram: injecting interrupt\n");
+ v3_raise_irq(dev->vm, NVRAM_RTC_IRQ);
+ }
}
static int handle_timer_event(struct guest_info * info,
- struct v3_timer_event * evt,
- void * priv_data) {
+ struct v3_timer_event * evt,
+ void * priv_data) {
- struct vm_device * dev = (struct vm_device *)priv_data;
+ struct vm_device * dev = (struct vm_device *)priv_data;
- if (dev) {
- update_time(dev, evt->period_us);
- }
+ if (dev) {
+ update_time(dev, evt->period_us);
+ }
- return 0;
+ return 0;
}
static void set_memory_size(struct nvram_internal * nvram, addr_t bytes) {
- // 1. Conventional Mem: 0-640k in K
- // 2. Extended Mem: 0-16MB in K
- // 3. Big Mem: 0-4G in 64K
-
- if (bytes > 640 * 1024) {
- nvram->mem_state[NVRAM_REG_BASE_MEMORY_HIGH] = 0x02;
- nvram->mem_state[NVRAM_REG_BASE_MEMORY_LOW] = 0x80;
- } else {
- uint16_t memk = bytes * 1024;
- nvram->mem_state[NVRAM_REG_BASE_MEMORY_HIGH] = (memk >> 8) & 0x00ff;
- nvram->mem_state[NVRAM_REG_BASE_MEMORY_LOW] = memk & 0x00ff;
+ // 1. Conventional Mem: 0-640k in K
+ // 2. Extended Mem: 0-16MB in K
+ // 3. Big Mem: 0-4G in 64K
- return;
- }
-
- if (bytes > (16 * 1024 * 1024)) {
- // Set extended memory to 15 MB
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_HIGH] = 0x3C;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_LOW] = 0x00;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_HIGH]= 0x3C;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= 0x00;
- } else {
- uint16_t memk = bytes * 1024;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_HIGH] = (memk >> 8) & 0x00ff;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_LOW] = memk & 0x00ff;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_HIGH]= (memk >> 8) & 0x00ff;
- nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= memk & 0x00ff;
+ if (bytes > 640 * 1024) {
+ nvram->mem_state[NVRAM_REG_BASE_MEMORY_HIGH] = 0x02;
+ nvram->mem_state[NVRAM_REG_BASE_MEMORY_LOW] = 0x80;
+ } else {
+ uint16_t memk = bytes * 1024;
+ nvram->mem_state[NVRAM_REG_BASE_MEMORY_HIGH] = (memk >> 8) & 0x00ff;
+ nvram->mem_state[NVRAM_REG_BASE_MEMORY_LOW] = memk & 0x00ff;
- return;
- }
+ return;
+ }
- {
- // Set the extended memory beyond 16 MB in 64k chunks
- uint16_t mem_chunks = (bytes - (1024 * 1024 * 16)) / (1024 * 64);
- nvram->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH] = (mem_chunks >> 8) & 0x00ff;
- nvram->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW] = mem_chunks & 0x00ff;
- }
+ if (bytes > (16 * 1024 * 1024)) {
+ // Set extended memory to 15 MB
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_HIGH] = 0x3C;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_LOW] = 0x00;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_HIGH]= 0x3C;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= 0x00;
+ } else {
+ uint16_t memk = bytes * 1024;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_HIGH] = (memk >> 8) & 0x00ff;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_LOW] = memk & 0x00ff;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_HIGH]= (memk >> 8) & 0x00ff;
+ nvram->mem_state[NVRAM_REG_EXT_MEMORY_2ND_LOW]= memk & 0x00ff;
- return;
+ return;
+ }
+
+ {
+ // Set the extended memory beyond 16 MB in 64k chunks
+ uint16_t mem_chunks = (bytes - (1024 * 1024 * 16)) / (1024 * 64);
+ nvram->mem_state[NVRAM_REG_AMI_BIG_MEMORY_HIGH] = (mem_chunks >> 8) & 0x00ff;
+ nvram->mem_state[NVRAM_REG_AMI_BIG_MEMORY_LOW] = mem_chunks & 0x00ff;
+ }
+
+ return;
}
static int init_nvram_state(struct vm_device * dev) {
- struct guest_info * info = dev->vm;
- struct nvram_internal * nvram_state = (struct nvram_internal *)dev->private_data;
+ struct guest_info * info = dev->vm;
+ struct nvram_internal * nvram_state = (struct nvram_internal *)dev->private_data;
- memset(nvram_state->mem_state, 0, NVRAM_REG_MAX);
+ memset(nvram_state->mem_state, 0, NVRAM_REG_MAX);
- //
- // 2 1.44 MB floppy drives
- //
+ //
+ // 2 1.44 MB floppy drives
+ //
#if 1
- nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x44;
+ nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x44;
#else
- nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x00;
+ nvram_state->mem_state[NVRAM_REG_FLOPPY_TYPE] = 0x00;
#endif
- //
- // For old boot sequence style, do floppy first
- //
- nvram_state->mem_state[NVRAM_REG_BOOTSEQ_OLD] = 0x10;
+ //
+ // For old boot sequence style, do floppy first
+ //
+ nvram_state->mem_state[NVRAM_REG_BOOTSEQ_OLD] = 0x10;
#if 0
- // For new boot sequence style, do floppy, cd, then hd
- nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_FIRST] = 0x31;
- nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_SECOND] = 0x20;
+ // For new boot sequence style, do floppy, cd, then hd
+ nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_FIRST] = 0x31;
+ nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_SECOND] = 0x20;
#endif
- // For new boot sequence style, do cd, hd, floppy
- nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_FIRST] = 0x23;
- nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_SECOND] = 0x10;
+ // For new boot sequence style, do cd, hd, floppy
+ nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_FIRST] = 0x23;
+ nvram_state->mem_state[NVRAM_REG_BOOTSEQ_NEW_SECOND] = 0x10;
- // Set equipment byte to note 2 floppies, vga display, keyboard,math,floppy
- nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0x4f;
- // nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0xf;
+ // Set equipment byte to note 2 floppies, vga display, keyboard,math,floppy
+ nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0x4f;
+ // nvram_state->mem_state[NVRAM_REG_EQUIPMENT_BYTE] = 0xf;
- // This is the harddisk type.... Set accordingly...
- nvram_state->mem_state[NVRAM_IBM_HD_DATA] = 0x20;
+ // This is the harddisk type.... Set accordingly...
+ nvram_state->mem_state[NVRAM_IBM_HD_DATA] = 0x20;
- // Set the shutdown status gently
- // soft reset
- nvram_state->mem_state[NVRAM_REG_SHUTDOWN_STATUS] = 0x0;
+ // Set the shutdown status gently
+ // soft reset
+ nvram_state->mem_state[NVRAM_REG_SHUTDOWN_STATUS] = 0x0;
- // RTC status A
- // 00100110 = no update in progress, base=32768 Hz, rate = 1024 Hz
- nvram_state->mem_state[NVRAM_REG_STAT_A] = 0x26;
+ // RTC status A
+ // 00100110 = no update in progress, base=32768 Hz, rate = 1024 Hz
+ nvram_state->mem_state[NVRAM_REG_STAT_A] = 0x26;
- // RTC status B
- // 00000100 = not setting, no interrupts, blocked rect signal, bcd mode, 24 hour, normal time
- nvram_state->mem_state[NVRAM_REG_STAT_B] = 0x06;
+ // RTC status B
+ // 00000100 = not setting, no interrupts, blocked rect signal, bcd mode, 24 hour, normal time
+ nvram_state->mem_state[NVRAM_REG_STAT_B] = 0x06;
- // RTC status C
- // No IRQ requested, result not do to any source
- nvram_state->mem_state[NVRAM_REG_STAT_C] = 0x00;
+ // RTC status C
+ // No IRQ requested, result not do to any source
+ nvram_state->mem_state[NVRAM_REG_STAT_C] = 0x00;
- // RTC status D
- // Battery is OK
- nvram_state->mem_state[NVRAM_REG_STAT_D] = 0x80;
+ // RTC status D
+ // Battery is OK
+ nvram_state->mem_state[NVRAM_REG_STAT_D] = 0x80;
- // january 1, 2008, 00:00:00
- nvram_state->mem_state[NVRAM_REG_MONTH] = 0x1;
- nvram_state->mem_state[NVRAM_REG_MONTH_DAY] = 0x1;
- nvram_state->mem_state[NVRAM_REG_WEEK_DAY] = 0x1;
- nvram_state->mem_state[NVRAM_REG_YEAR] = 0x08;
+ // january 1, 2008, 00:00:00
+ nvram_state->mem_state[NVRAM_REG_MONTH] = 0x1;
+ nvram_state->mem_state[NVRAM_REG_MONTH_DAY] = 0x1;
+ nvram_state->mem_state[NVRAM_REG_WEEK_DAY] = 0x1;
+ nvram_state->mem_state[NVRAM_REG_YEAR] = 0x08;
- nvram_state->us = 0;
- nvram_state->pus = 0;
+ nvram_state->us = 0;
+ nvram_state->pus = 0;
- set_memory_size(nvram_state, info->mem_size);
+ set_memory_size(nvram_state, info->mem_size);
- nvram_state->dev_state = NVRAM_READY;
- nvram_state->thereg = 0;
+ nvram_state->dev_state = NVRAM_READY;
+ nvram_state->thereg = 0;
- return 0;
+ return 0;
}
static int nvram_reset_device(struct vm_device * dev) {
- return 0;
+ return 0;
}
static int nvram_start_device(struct vm_device * dev) {
- PrintDebug("nvram: start device\n");
- return 0;
+ PrintDebug("nvram: start device\n");
+ return 0;
}
static int nvram_stop_device(struct vm_device * dev) {
- PrintDebug("nvram: stop device\n");
- return 0;
+ PrintDebug("nvram: stop device\n");
+ return 0;
}
void * src,
uint_t length,
struct vm_device * dev) {
- struct nvram_internal * data = (struct nvram_internal *)dev->private_data;
+ struct nvram_internal * data = (struct nvram_internal *)dev->private_data;
- memcpy(&(data->thereg), src, 1);
- PrintDebug("Writing To NVRAM reg: 0x%x\n", data->thereg);
+ memcpy(&(data->thereg), src, 1);
+ PrintDebug("Writing To NVRAM reg: 0x%x\n", data->thereg);
- return 1;
+ return 1;
}
static int nvram_read_data_port(ushort_t port,
void * dst,
uint_t length,
struct vm_device * dev) {
- struct nvram_internal * data = (struct nvram_internal *)dev->private_data;
+ struct nvram_internal * data = (struct nvram_internal *)dev->private_data;
- memcpy(dst, &(data->mem_state[data->thereg]), 1);
+ memcpy(dst, &(data->mem_state[data->thereg]), 1);
- PrintDebug("nvram_read_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]);
+ PrintDebug("nvram_read_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]);
- // hack
- if (data->thereg == NVRAM_REG_STAT_A) {
- data->mem_state[data->thereg] ^= 0x80; // toggle Update in progess
- }
+ // hack
+ if (data->thereg == NVRAM_REG_STAT_A) {
+ data->mem_state[data->thereg] ^= 0x80; // toggle Update in progess
+ }
- return 1;
+ return 1;
}
static int nvram_write_data_port(ushort_t port,
void * src,
uint_t length,
struct vm_device * dev) {
- struct nvram_internal * data = (struct nvram_internal *)dev->private_data;
+ struct nvram_internal * data = (struct nvram_internal *)dev->private_data;
- memcpy(&(data->mem_state[data->thereg]), src, 1);
+ memcpy(&(data->mem_state[data->thereg]), src, 1);
- PrintDebug("nvram_write_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]);
+ PrintDebug("nvram_write_data_port(0x%x)=0x%x\n", data->thereg, data->mem_state[data->thereg]);
- return 1;
+ return 1;
}
static int nvram_init_device(struct vm_device * dev) {
- PrintDebug("nvram: init_device\n");
+ PrintDebug("nvram: init_device\n");
- init_nvram_state(dev);
+ init_nvram_state(dev);
- // hook ports
- v3_dev_hook_io(dev, NVRAM_REG_PORT, NULL, &nvram_write_reg_port);
- v3_dev_hook_io(dev, NVRAM_DATA_PORT, &nvram_read_data_port, &nvram_write_data_port);
+ // hook ports
+ v3_dev_hook_io(dev, NVRAM_REG_PORT, NULL, &nvram_write_reg_port);
+ v3_dev_hook_io(dev, NVRAM_DATA_PORT, &nvram_read_data_port, &nvram_write_data_port);
- v3_hook_host_event(dev->vm, HOST_TIMER_EVT, V3_HOST_EVENT_HANDLER(handle_timer_event), dev);
+ v3_hook_host_event(dev->vm, HOST_TIMER_EVT, V3_HOST_EVENT_HANDLER(handle_timer_event), dev);
- return 0;
+ return 0;
}
static int nvram_deinit_device(struct vm_device * dev) {
- v3_dev_unhook_io(dev, NVRAM_REG_PORT);
- v3_dev_unhook_io(dev, NVRAM_DATA_PORT);
+ v3_dev_unhook_io(dev, NVRAM_REG_PORT);
+ v3_dev_unhook_io(dev, NVRAM_DATA_PORT);
- nvram_reset_device(dev);
- return 0;
+ nvram_reset_device(dev);
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = nvram_init_device,
- .deinit = nvram_deinit_device,
- .reset = nvram_reset_device,
- .start = nvram_start_device,
- .stop = nvram_stop_device,
+ .init = nvram_init_device,
+ .deinit = nvram_deinit_device,
+ .reset = nvram_reset_device,
+ .start = nvram_start_device,
+ .stop = nvram_stop_device,
};
struct vm_device * v3_create_nvram() {
- struct nvram_internal * nvram_state = NULL;
+ struct nvram_internal * nvram_state = NULL;
- nvram_state = (struct nvram_internal *)V3_Malloc(sizeof(struct nvram_internal) + 1000);
+ nvram_state = (struct nvram_internal *)V3_Malloc(sizeof(struct nvram_internal) + 1000);
- PrintDebug("nvram: internal at %p\n", (void *)nvram_state);
+ PrintDebug("nvram: internal at %p\n", (void *)nvram_state);
- struct vm_device * device = v3_create_device("NVRAM", &dev_ops, nvram_state);
+ struct vm_device * device = v3_create_device("NVRAM", &dev_ops, nvram_state);
- return device;
+ return device;
}
struct debug_state {
- char debug_buf[BUF_SIZE];
- uint_t debug_offset;
+ char debug_buf[BUF_SIZE];
+ uint_t debug_offset;
};
static int handle_gen_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct debug_state * state = (struct debug_state *)dev->private_data;
+ struct debug_state * state = (struct debug_state *)dev->private_data;
- state->debug_buf[state->debug_offset++] = *(char*)src;
+ state->debug_buf[state->debug_offset++] = *(char*)src;
- if ((*(char*)src == 0xa) || (state->debug_offset == (BUF_SIZE - 1))) {
- PrintDebug("VM_CONSOLE>%s", state->debug_buf);
- memset(state->debug_buf, 0, BUF_SIZE);
- state->debug_offset = 0;
- }
+ if ((*(char*)src == 0xa) || (state->debug_offset == (BUF_SIZE - 1))) {
+ PrintDebug("VM_CONSOLE>%s", state->debug_buf);
+ memset(state->debug_buf, 0, BUF_SIZE);
+ state->debug_offset = 0;
+ }
- return length;
+ return length;
}
static int debug_init(struct vm_device * dev) {
- struct debug_state * state = (struct debug_state *)dev->private_data;
+ struct debug_state * state = (struct debug_state *)dev->private_data;
- v3_dev_hook_io(dev, DEBUG_PORT1, NULL, &handle_gen_write);
+ v3_dev_hook_io(dev, DEBUG_PORT1, NULL, &handle_gen_write);
- state->debug_offset = 0;
- memset(state->debug_buf, 0, BUF_SIZE);
+ state->debug_offset = 0;
+ memset(state->debug_buf, 0, BUF_SIZE);
- return 0;
+ return 0;
}
static int debug_deinit(struct vm_device * dev) {
- v3_dev_unhook_io(dev, DEBUG_PORT1);
+ v3_dev_unhook_io(dev, DEBUG_PORT1);
- return 0;
+ return 0;
};
static struct vm_device_ops dev_ops = {
- .init = debug_init,
- .deinit = debug_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = debug_init,
+ .deinit = debug_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_os_debug() {
- struct debug_state * state = NULL;
+ struct debug_state * state = NULL;
- state = (struct debug_state *)V3_Malloc(sizeof(struct debug_state));
+ state = (struct debug_state *)V3_Malloc(sizeof(struct debug_state));
- PrintDebug("Creating OS Debug Device\n");
- struct vm_device * device = v3_create_device("OS Debug", &dev_ops, state);
+ PrintDebug("Creating OS Debug Device\n");
+ struct vm_device * device = v3_create_device("OS Debug", &dev_ops, state);
- return device;
+ return device;
}
static inline const char * device_type_to_str(device_type_t type) {
- switch (type) {
- case IDE_DISK:
- return harddisk_str;
- case IDE_CDROM:
- return cdrom_str;
- case IDE_NONE:
- return none_str;
- default:
- return NULL;
- }
+ switch (type) {
+ case IDE_DISK:
+ return harddisk_str;
+ case IDE_CDROM:
+ return cdrom_str;
+ case IDE_NONE:
+ return none_str;
+ default:
+ return NULL;
+ }
}
static inline void write_features(struct channel_t * channel, uchar_t value) {
- channel->drives[0].controller.features = value;
- channel->drives[1].controller.features = value;
+ channel->drives[0].controller.features = value;
+ channel->drives[1].controller.features = value;
}
static inline void write_sector_count(struct channel_t * channel, uchar_t value) {
- channel->drives[0].controller.sector_count = value;
- channel->drives[1].controller.sector_count = value;
+ channel->drives[0].controller.sector_count = value;
+ channel->drives[1].controller.sector_count = value;
}
static inline void write_sector_number(struct channel_t * channel, uchar_t value) {
- channel->drives[0].controller.sector_no = value;
- channel->drives[1].controller.sector_no = value;
+ channel->drives[0].controller.sector_no = value;
+ channel->drives[1].controller.sector_no = value;
}
static inline void write_cylinder_low(struct channel_t * channel, uchar_t value) {
- channel->drives[0].controller.cylinder_no &= 0xff00;
- channel->drives[0].controller.cylinder_no |= value;
- channel->drives[1].controller.cylinder_no &= 0xff00;
- channel->drives[1].controller.cylinder_no |= value;
+ channel->drives[0].controller.cylinder_no &= 0xff00;
+ channel->drives[0].controller.cylinder_no |= value;
+ channel->drives[1].controller.cylinder_no &= 0xff00;
+ channel->drives[1].controller.cylinder_no |= value;
}
static inline void write_cylinder_high(struct channel_t * channel, uchar_t value) {
- ushort_t val2 = value;
- val2 = val2 << 8;
- channel->drives[0].controller.cylinder_no &= 0x00ff;
- channel->drives[0].controller.cylinder_no |= (val2 & 0xff00);
+ ushort_t val2 = value;
+ val2 = val2 << 8;
+ channel->drives[0].controller.cylinder_no &= 0x00ff;
+ channel->drives[0].controller.cylinder_no |= (val2 & 0xff00);
- channel->drives[1].controller.cylinder_no &= 0x00ff;
- channel->drives[1].controller.cylinder_no |= (val2 & 0xff00);
+ channel->drives[1].controller.cylinder_no &= 0x00ff;
+ channel->drives[1].controller.cylinder_no |= (val2 & 0xff00);
}
static inline void write_head_no(struct channel_t * channel, uchar_t value) {
- channel->drives[0].controller.head_no = value;
- channel->drives[1].controller.head_no = value;
+ channel->drives[0].controller.head_no = value;
+ channel->drives[1].controller.head_no = value;
}
static inline void write_lba_mode(struct channel_t * channel, uchar_t value) {
- channel->drives[0].controller.lba_mode = value;
- channel->drives[1].controller.lba_mode = value;
+ channel->drives[0].controller.lba_mode = value;
+ channel->drives[1].controller.lba_mode = value;
}
static inline uint_t get_channel_no(struct ramdisk_t * ramdisk, struct channel_t * channel) {
- return (((uchar_t *)channel - (uchar_t *)(ramdisk->channels)) / sizeof(struct channel_t));
+ return (((uchar_t *)channel - (uchar_t *)(ramdisk->channels)) / sizeof(struct channel_t));
}
static inline uint_t get_drive_no(struct channel_t * channel, struct drive_t * drive) {
- return (((uchar_t *)drive - (uchar_t*)(channel->drives)) / sizeof(struct drive_t));
+ return (((uchar_t *)drive - (uchar_t*)(channel->drives)) / sizeof(struct drive_t));
}
static inline struct drive_t * get_selected_drive(struct channel_t * channel) {
- return &(channel->drives[channel->drive_select]);
+ return &(channel->drives[channel->drive_select]);
}
static inline int is_primary_port(struct ramdisk_t * ramdisk, ushort_t port) {
- switch(port)
- {
- case PRI_DATA_PORT:
- case PRI_FEATURES_PORT:
- case PRI_SECT_CNT_PORT:
- case PRI_SECT_ADDR1_PORT:
- case PRI_SECT_ADDR2_PORT:
- case PRI_SECT_ADDR3_PORT:
- case PRI_DRV_SEL_PORT:
- case PRI_CMD_PORT:
- case PRI_CTRL_PORT:
- return 1;
- default:
- return 0;
- }
+ switch(port)
+ {
+ case PRI_DATA_PORT:
+ case PRI_FEATURES_PORT:
+ case PRI_SECT_CNT_PORT:
+ case PRI_SECT_ADDR1_PORT:
+ case PRI_SECT_ADDR2_PORT:
+ case PRI_SECT_ADDR3_PORT:
+ case PRI_DRV_SEL_PORT:
+ case PRI_CMD_PORT:
+ case PRI_CTRL_PORT:
+ return 1;
+ default:
+ return 0;
+ }
}
static inline int is_secondary_port(struct ramdisk_t * ramdisk, ushort_t port) {
- switch(port)
- {
- case SEC_DATA_PORT:
- case SEC_FEATURES_PORT:
- case SEC_SECT_CNT_PORT:
- case SEC_SECT_ADDR1_PORT:
- case SEC_SECT_ADDR2_PORT:
- case SEC_SECT_ADDR3_PORT:
- case SEC_DRV_SEL_PORT:
- case SEC_CMD_PORT:
- case SEC_CTRL_PORT:
- return 1;
- default:
- return 0;
- }
+ switch(port)
+ {
+ case SEC_DATA_PORT:
+ case SEC_FEATURES_PORT:
+ case SEC_SECT_CNT_PORT:
+ case SEC_SECT_ADDR1_PORT:
+ case SEC_SECT_ADDR2_PORT:
+ case SEC_SECT_ADDR3_PORT:
+ case SEC_DRV_SEL_PORT:
+ case SEC_CMD_PORT:
+ case SEC_CTRL_PORT:
+ return 1;
+ default:
+ return 0;
+ }
}
static inline int num_drives_on_channel(struct channel_t * channel) {
- if ((channel->drives[0].device_type == IDE_NONE) &&
- (channel->drives[1].device_type == IDE_NONE)) {
- return 0;
- } else if ((channel->drives[0].device_type != IDE_NONE) &&
- (channel->drives[1].device_type != IDE_NONE)) {
- return 2;
- } else {
- return 1;
- }
+ if ((channel->drives[0].device_type == IDE_NONE) &&
+ (channel->drives[1].device_type == IDE_NONE)) {
+ return 0;
+ } else if ((channel->drives[0].device_type != IDE_NONE) &&
+ (channel->drives[1].device_type != IDE_NONE)) {
+ return 2;
+ } else {
+ return 1;
+ }
}
static inline uchar_t extract_bits(uchar_t * buf, uint_t buf_offset, uint_t bit_offset, uint_t num_bits) {
- uchar_t val = buf[buf_offset];
- val = val >> bit_offset;
- val &= ((1 << num_bits) -1);
- return val;
+ uchar_t val = buf[buf_offset];
+ val = val >> bit_offset;
+ val &= ((1 << num_bits) -1);
+ return val;
}
static inline uchar_t get_packet_field(struct channel_t * channel, uint_t packet_offset, uint_t bit_offset, uint_t num_bits) {
- struct drive_t * drive = get_selected_drive(channel);
- return extract_bits(drive->controller.buffer, packet_offset, bit_offset, num_bits);
+ struct drive_t * drive = get_selected_drive(channel);
+ return extract_bits(drive->controller.buffer, packet_offset, bit_offset, num_bits);
}
static inline uchar_t get_packet_byte(struct channel_t * channel, uint_t offset) {
- struct drive_t * drive = get_selected_drive(channel);
- return drive->controller.buffer[offset];
+ struct drive_t * drive = get_selected_drive(channel);
+ return drive->controller.buffer[offset];
}
static inline uint16_t get_packet_word(struct channel_t * channel, uint_t offset) {
- struct drive_t * drive = get_selected_drive(channel);
- uint16_t val = drive->controller.buffer[offset];
- val = val << 8;
- val |= drive->controller.buffer[offset + 1];
- return val;
+ struct drive_t * drive = get_selected_drive(channel);
+ uint16_t val = drive->controller.buffer[offset];
+ val = val << 8;
+ val |= drive->controller.buffer[offset + 1];
+ return val;
}
static inline uint16_t rd_read_16bit(const uint8_t* buf) {
- return (buf[0] << 8) | buf[1];
+ return (buf[0] << 8) | buf[1];
}
static inline uint32_t rd_read_32bit(const uint8_t* buf) {
- return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
+ return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
}
////////////////////////////////////////////////////////////////////////////
int v3_ramdisk_register_cdrom(struct vm_device * dev, uint_t busID, uint_t driveID, struct cdrom_ops* cd, void * private_data) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = &(ramdisk->channels[busID]);
- struct drive_t * drive = &(channel->drives[driveID]);
- struct controller_t * controller = &(drive->controller);
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = &(ramdisk->channels[busID]);
+ struct drive_t * drive = &(channel->drives[driveID]);
+ struct controller_t * controller = &(drive->controller);
- if (drive->device_type != IDE_NONE) {
- PrintError("Device already registered at this location\n");
- return -1;
- }
+ if (drive->device_type != IDE_NONE) {
+ PrintError("Device already registered at this location\n");
+ return -1;
+ }
- channel->irq = 15;
+ channel->irq = 15;
- // Make model string
- strncpy((char*)(drive->model_no), "V3VEE Ramdisk", 40);
+ // Make model string
+ strncpy((char*)(drive->model_no), "V3VEE Ramdisk", 40);
- while (strlen((char *)(drive->model_no)) < 40) {
- strcat ((char*)(drive->model_no), " ");
- }
+ while (strlen((char *)(drive->model_no)) < 40) {
+ strcat ((char*)(drive->model_no), " ");
+ }
- PrintDebug("CDROM on target %d/%d\n", busID, driveID);
+ PrintDebug("CDROM on target %d/%d\n", busID, driveID);
- drive->device_type = IDE_CDROM;
- drive->cdrom.locked = 0;
- drive->sense.sense_key = SENSE_NONE;
- drive->sense.asc = 0;
- drive->sense.ascq = 0;
+ drive->device_type = IDE_CDROM;
+ drive->cdrom.locked = 0;
+ drive->sense.sense_key = SENSE_NONE;
+ drive->sense.asc = 0;
+ drive->sense.ascq = 0;
- drive->private_data = private_data;
+ drive->private_data = private_data;
#ifdef DEBUG_RAMDISK
- if (check_bit_fields(controller) == INTR_REASON_BIT_ERR) {
- PrintError("interrupt reason: bit field error\n");
- return INTR_REASON_BIT_ERR;
- }
+ if (check_bit_fields(controller) == INTR_REASON_BIT_ERR) {
+ PrintError("interrupt reason: bit field error\n");
+ return INTR_REASON_BIT_ERR;
+ }
#endif
- controller->sector_count = 0;
+ controller->sector_count = 0;
- drive->cdrom.cd = cd;
+ drive->cdrom.cd = cd;
- PrintDebug("\t\tCD on ata%d-%d: '%s'\n",
- busID,
- driveID, "");
+ PrintDebug("\t\tCD on ata%d-%d: '%s'\n",
+ busID,
+ driveID, "");
- if(drive->cdrom.cd->insert_cdrom(drive->private_data)) {
- PrintDebug("\t\tMedia present in CD-ROM drive\n");
- drive->cdrom.ready = 1;
- drive->cdrom.capacity = drive->cdrom.cd->capacity(drive->private_data);
- PrintDebug("\t\tCDROM capacity is %d\n", drive->cdrom.capacity);
- } else {
- PrintDebug("\t\tCould not locate CD-ROM, continuing with media not present\n");
- drive->cdrom.ready = 0;
- }
+ if(drive->cdrom.cd->insert_cdrom(drive->private_data)) {
+ PrintDebug("\t\tMedia present in CD-ROM drive\n");
+ drive->cdrom.ready = 1;
+ drive->cdrom.capacity = drive->cdrom.cd->capacity(drive->private_data);
+ PrintDebug("\t\tCDROM capacity is %d\n", drive->cdrom.capacity);
+ } else {
+ PrintDebug("\t\tCould not locate CD-ROM, continuing with media not present\n");
+ drive->cdrom.ready = 0;
+ }
- return 0;
+ return 0;
}
static Bit32u rd_init_hardware(struct ramdisk_t *ramdisk) {
- uint_t channel_num;
- uint_t device;
- struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
+ uint_t channel_num;
+ uint_t device;
+ struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
- PrintDebug("[rd_init_harddrive]\n");
+ PrintDebug("[rd_init_harddrive]\n");
- for (channel_num = 0; channel_num < MAX_ATA_CHANNEL; channel_num++) {
- memset((char *)(channels + channel_num), 0, sizeof(struct channel_t));
- }
+ for (channel_num = 0; channel_num < MAX_ATA_CHANNEL; channel_num++) {
+ memset((char *)(channels + channel_num), 0, sizeof(struct channel_t));
+ }
- for (channel_num = 0; channel_num < MAX_ATA_CHANNEL; channel_num++){
- struct channel_t * channel = &(channels[channel_num]);
-
- channel->ioaddr1 = 0x0;
- channel->ioaddr2 = 0x0;
- channel->irq = 0;
-
- for (device = 0; device < 2; device++){
- struct drive_t * drive = &(channel->drives[device]);
- struct controller_t * controller = &(drive->controller);
-
- controller->status.busy = 0;
- controller->status.drive_ready = 1;
- controller->status.write_fault = 0;
- controller->status.seek_complete = 1;
- controller->status.drq = 0;
- controller->status.corrected_data = 0;
- controller->status.index_pulse = 0;
- controller->status.index_pulse_count = 0;
- controller->status.err = 0;
-
- controller->error_register = 0x01; // diagnostic code: no error
- controller->head_no = 0;
- controller->sector_count = 1;
- controller->sector_no = 1;
- controller->cylinder_no = 0;
- controller->current_command = 0x00;
- controller->buffer_index = 0;
-
- controller->control.reset = 0;
- controller->control.disable_irq = 0;
- controller->reset_in_progress = 0;
-
- controller->sectors_per_block = 0x80;
- controller->lba_mode = 0;
+ for (channel_num = 0; channel_num < MAX_ATA_CHANNEL; channel_num++){
+ struct channel_t * channel = &(channels[channel_num]);
+
+ channel->ioaddr1 = 0x0;
+ channel->ioaddr2 = 0x0;
+ channel->irq = 0;
+
+ for (device = 0; device < 2; device++){
+ struct drive_t * drive = &(channel->drives[device]);
+ struct controller_t * controller = &(drive->controller);
+
+ controller->status.busy = 0;
+ controller->status.drive_ready = 1;
+ controller->status.write_fault = 0;
+ controller->status.seek_complete = 1;
+ controller->status.drq = 0;
+ controller->status.corrected_data = 0;
+ controller->status.index_pulse = 0;
+ controller->status.index_pulse_count = 0;
+ controller->status.err = 0;
+
+ controller->error_register = 0x01; // diagnostic code: no error
+ controller->head_no = 0;
+ controller->sector_count = 1;
+ controller->sector_no = 1;
+ controller->cylinder_no = 0;
+ controller->current_command = 0x00;
+ controller->buffer_index = 0;
+
+ controller->control.reset = 0;
+ controller->control.disable_irq = 0;
+ controller->reset_in_progress = 0;
+
+ controller->sectors_per_block = 0x80;
+ controller->lba_mode = 0;
- controller->features = 0;
+ controller->features = 0;
- // If not present
- drive->device_type = IDE_NONE;
+ // If not present
+ drive->device_type = IDE_NONE;
- // Make model string
- strncpy((char*)(drive->model_no), "", 40);
- while(strlen((char *)(drive->model_no)) < 40) {
- strcat ((char*)(drive->model_no), " ");
- }
+ // Make model string
+ strncpy((char*)(drive->model_no), "", 40);
+ while(strlen((char *)(drive->model_no)) < 40) {
+ strcat ((char*)(drive->model_no), " ");
+ }
- }//for device
- }//for channel
+ }//for device
+ }//for channel
#ifdef DEBUG_RAMDISK
- rd_print_state(ramdisk);
+ rd_print_state(ramdisk);
#endif
- return 0;
+ return 0;
}
*/
static void rd_close_harddrive(struct ramdisk_t *ramdisk) {
- return;
+ return;
}
static int read_data_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * drive = NULL;
- struct controller_t * controller = NULL;
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * drive = NULL;
+ struct controller_t * controller = NULL;
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- drive = get_selected_drive(channel);
- controller = &(drive->controller);
+ drive = get_selected_drive(channel);
+ controller = &(drive->controller);
- PrintTrace("[read_data_handler] IO Read at 0x%x, on drive %d/%d current cmd=0x%x\n",
- port,
- get_channel_no(ramdisk, channel),
- get_drive_no(channel, drive),
- controller->current_command);
+ PrintTrace("[read_data_handler] IO Read at 0x%x, on drive %d/%d current cmd=0x%x\n",
+ port,
+ get_channel_no(ramdisk, channel),
+ get_drive_no(channel, drive),
+ controller->current_command);
- switch (controller->current_command) {
- case 0xec: // IDENTIFY DEVICE
- case 0xa1:
- {
+ switch (controller->current_command) {
+ case 0xec: // IDENTIFY DEVICE
+ case 0xa1:
+ {
- controller->status.busy = 0;
- controller->status.drive_ready = 1;
- controller->status.write_fault = 0;
- controller->status.seek_complete = 1;
- controller->status.corrected_data = 0;
- controller->status.err = 0;
+ controller->status.busy = 0;
+ controller->status.drive_ready = 1;
+ controller->status.write_fault = 0;
+ controller->status.seek_complete = 1;
+ controller->status.corrected_data = 0;
+ controller->status.err = 0;
- /*
- value32 = controller->buffer[index];
- index++;
+ /*
+ value32 = controller->buffer[index];
+ index++;
- if (io_len >= 2) {
- value32 |= (controller->buffer[index] << 8);
- index++;
- }
+ if (io_len >= 2) {
+ value32 |= (controller->buffer[index] << 8);
+ index++;
+ }
- if (io_len == 4) {
- value32 |= (controller->buffer[index] << 16);
- value32 |= (controller->buffer[index+1] << 24);
- index += 2;
- }
+ if (io_len == 4) {
+ value32 |= (controller->buffer[index] << 16);
+ value32 |= (controller->buffer[index+1] << 24);
+ index += 2;
+ }
- controller->buffer_index = index;
- */
- /* JRL */
- memcpy(dst, controller->buffer + controller->buffer_index, length);
- controller->buffer_index += length;
+ controller->buffer_index = index;
+ */
+ /* JRL */
+ memcpy(dst, controller->buffer + controller->buffer_index, length);
+ controller->buffer_index += length;
- if (controller->buffer_index >= 512) {
- controller->status.drq = 0;
- }
+ if (controller->buffer_index >= 512) {
+ controller->status.drq = 0;
+ }
- return length;
- }
- case 0xa0: //send packet cmd
- {
- uint_t index = controller->buffer_index;
+ return length;
+ }
+ case 0xa0: //send packet cmd
+ {
+ uint_t index = controller->buffer_index;
- PrintTrace("\t\tatapi.command(%02x), index(%d), cdrom.remaining_blocks(%d)\n",
- drive->atapi.command,
- index,
- drive->cdrom.remaining_blocks);
+ PrintTrace("\t\tatapi.command(%02x), index(%d), cdrom.remaining_blocks(%d)\n",
+ drive->atapi.command,
+ index,
+ drive->cdrom.remaining_blocks);
- // Load block if necessary
- if (index >= 2048) {
+ // Load block if necessary
+ if (index >= 2048) {
- if (index > 2048) {
- PrintError("\t\tindex > 2048 : 0x%x\n", index);
- return -1;
- }
+ if (index > 2048) {
+ PrintError("\t\tindex > 2048 : 0x%x\n", index);
+ return -1;
+ }
- switch (drive->atapi.command) {
- case 0x28: // read (10)
- case 0xa8: // read (12)
- {
+ switch (drive->atapi.command) {
+ case 0x28: // read (10)
+ case 0xa8: // read (12)
+ {
- if (!(drive->cdrom.ready)) {
- PrintError("\t\tRead with CDROM not ready\n");
- return -1;
- }
+ if (!(drive->cdrom.ready)) {
+ PrintError("\t\tRead with CDROM not ready\n");
+ return -1;
+ }
- drive->cdrom.cd->read_block(drive->private_data, controller->buffer,
- drive->cdrom.next_lba);
- drive->cdrom.next_lba++;
- drive->cdrom.remaining_blocks--;
+ drive->cdrom.cd->read_block(drive->private_data, controller->buffer,
+ drive->cdrom.next_lba);
+ drive->cdrom.next_lba++;
+ drive->cdrom.remaining_blocks--;
- if (!(drive->cdrom.remaining_blocks)) {
- PrintDebug("\t\tLast READ block loaded {CDROM}\n");
- } else {
- PrintDebug("\t\tREAD block loaded (%d remaining) {CDROM}\n",
- drive->cdrom.remaining_blocks);
- }
+ if (!(drive->cdrom.remaining_blocks)) {
+ PrintDebug("\t\tLast READ block loaded {CDROM}\n");
+ } else {
+ PrintDebug("\t\tREAD block loaded (%d remaining) {CDROM}\n",
+ drive->cdrom.remaining_blocks);
+ }
- // one block transfered, start at beginning
- index = 0;
- break;
- }
- default: // no need to load a new block
- break;
- }
- }
+ // one block transfered, start at beginning
+ index = 0;
+ break;
+ }
+ default: // no need to load a new block
+ break;
+ }
+ }
- /*
- increment = 0;
- value32 = controller->buffer[index + increment];
- increment++;
+ /*
+ increment = 0;
+ value32 = controller->buffer[index + increment];
+ increment++;
- if (io_len >= 2) {
- value32 |= (controller->buffer[index + increment] << 8);
- increment++;
- }
+ if (io_len >= 2) {
+ value32 |= (controller->buffer[index + increment] << 8);
+ increment++;
+ }
- if (io_len == 4) {
- value32 |= (controller->buffer[index + increment] << 16);
- value32 |= (controller->buffer[index + increment + 1] << 24);
- increment += 2;
- }
-
- controller->buffer_index = index + increment;
- controller->drq_index += increment;
-
- */
- /* JRL: CHECK THAT there is enough data in the buffer to copy.... */
- {
- memcpy(dst, controller->buffer + index, length);
+ if (io_len == 4) {
+ value32 |= (controller->buffer[index + increment] << 16);
+ value32 |= (controller->buffer[index + increment + 1] << 24);
+ increment += 2;
+ }
+
+ controller->buffer_index = index + increment;
+ controller->drq_index += increment;
+
+ */
+ /* JRL: CHECK THAT there is enough data in the buffer to copy.... */
+ {
+ memcpy(dst, controller->buffer + index, length);
- controller->buffer_index = index + length;
- controller->drq_index += length;
- }
+ controller->buffer_index = index + length;
+ controller->drq_index += length;
+ }
- /* *** */
+ /* *** */
- if (controller->drq_index >= (unsigned)drive->atapi.drq_bytes) {
- controller->status.drq = 0;
- controller->drq_index = 0;
+ if (controller->drq_index >= (unsigned)drive->atapi.drq_bytes) {
+ controller->status.drq = 0;
+ controller->drq_index = 0;
- drive->atapi.total_bytes_remaining -= drive->atapi.drq_bytes;
+ drive->atapi.total_bytes_remaining -= drive->atapi.drq_bytes;
- if (drive->atapi.total_bytes_remaining > 0) {
- // one or more blocks remaining (works only for single block commands)
+ if (drive->atapi.total_bytes_remaining > 0) {
+ // one or more blocks remaining (works only for single block commands)
- PrintDebug("\t\tPACKET drq bytes read\n");
- controller->interrupt_reason.i_o = 1;
- controller->status.busy = 0;
- controller->status.drq = 1;
- controller->interrupt_reason.c_d = 0;
+ PrintDebug("\t\tPACKET drq bytes read\n");
+ controller->interrupt_reason.i_o = 1;
+ controller->status.busy = 0;
+ controller->status.drq = 1;
+ controller->interrupt_reason.c_d = 0;
- // set new byte count if last block
- if (drive->atapi.total_bytes_remaining < controller->byte_count) {
- controller->byte_count = drive->atapi.total_bytes_remaining;
- }
- drive->atapi.drq_bytes = controller->byte_count;
+ // set new byte count if last block
+ if (drive->atapi.total_bytes_remaining < controller->byte_count) {
+ controller->byte_count = drive->atapi.total_bytes_remaining;
+ }
+ drive->atapi.drq_bytes = controller->byte_count;
- rd_raise_interrupt(dev, channel);
- } else {
- // all bytes read
- PrintDebug("\t\tPACKET all bytes read\n");
+ rd_raise_interrupt(dev, channel);
+ } else {
+ // all bytes read
+ PrintDebug("\t\tPACKET all bytes read\n");
- controller->interrupt_reason.i_o = 1;
- controller->interrupt_reason.c_d = 1;
- controller->status.drive_ready = 1;
- controller->interrupt_reason.rel = 0;
- controller->status.busy = 0;
- controller->status.drq = 0;
- controller->status.err = 0;
+ controller->interrupt_reason.i_o = 1;
+ controller->interrupt_reason.c_d = 1;
+ controller->status.drive_ready = 1;
+ controller->interrupt_reason.rel = 0;
+ controller->status.busy = 0;
+ controller->status.drq = 0;
+ controller->status.err = 0;
- rd_raise_interrupt(dev, channel);
- }
- }
- return length;
- break;
- }
+ rd_raise_interrupt(dev, channel);
+ }
+ }
+ return length;
+ break;
+ }
- default:
- PrintError("\t\tunsupported command: %02x\n", controller->current_command);
- break;
- }
+ default:
+ PrintError("\t\tunsupported command: %02x\n", controller->current_command);
+ break;
+ }
- return -1;
+ return -1;
}
static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * drive = NULL;
- struct controller_t * controller = NULL;
-
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * drive = NULL;
+ struct controller_t * controller = NULL;
+
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- drive = get_selected_drive(channel);
- controller = &(drive->controller);
+ drive = get_selected_drive(channel);
+ controller = &(drive->controller);
- PrintDebug("[write_data_handler] IO write at 0x%x, current_cmd = 0x%02x\n",
- port, controller->current_command);
+ PrintDebug("[write_data_handler] IO write at 0x%x, current_cmd = 0x%02x\n",
+ port, controller->current_command);
- //PrintDebug("[write_data_handler]\n");
- switch (controller->current_command) {
- case 0x30: // WRITE SECTORS
- PrintError("\t\tneed to implement 0x30(write sector) to port 0x%x\n", port);
- return -1;
+ //PrintDebug("[write_data_handler]\n");
+ switch (controller->current_command) {
+ case 0x30: // WRITE SECTORS
+ PrintError("\t\tneed to implement 0x30(write sector) to port 0x%x\n", port);
+ return -1;
- case 0xa0: // PACKET
+ case 0xa0: // PACKET
- if (handle_atapi_packet_command(dev, channel, *(ushort_t *)src) == -1) {
- PrintError("Error sending atapi packet command in PACKET write to data port\n");
- return -1;
- }
+ if (handle_atapi_packet_command(dev, channel, *(ushort_t *)src) == -1) {
+ PrintError("Error sending atapi packet command in PACKET write to data port\n");
+ return -1;
+ }
- return length;
+ return length;
- default:
- PrintError("\t\tIO write(0x%x): current command is %02xh\n",
- port, controller->current_command);
+ default:
+ PrintError("\t\tIO write(0x%x): current command is %02xh\n",
+ port, controller->current_command);
- return -1;
- }
+ return -1;
+ }
- return -1;
+ return -1;
}
static int read_status_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * drive = NULL;
- struct controller_t * controller = NULL;
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * drive = NULL;
+ struct controller_t * controller = NULL;
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- drive = get_selected_drive(channel);
- controller = &(drive->controller);
+ drive = get_selected_drive(channel);
+ controller = &(drive->controller);
- PrintDebug("[read_status_handler] IO read at 0x%x, on drive %d/%d\n",
- port, get_channel_no(ramdisk, channel),
- channel->drive_select);
+ PrintDebug("[read_status_handler] IO read at 0x%x, on drive %d/%d\n",
+ port, get_channel_no(ramdisk, channel),
+ channel->drive_select);
- if (num_drives_on_channel(channel) == 0) {
- PrintDebug("Setting value to zero because 0 devices on channel\n");
- // (mch) Just return zero for these registers
- memset(dst, 0, length);
+ if (num_drives_on_channel(channel) == 0) {
+ PrintDebug("Setting value to zero because 0 devices on channel\n");
+ // (mch) Just return zero for these registers
+ memset(dst, 0, length);
- } else {
- uchar_t val = (
- (controller->status.busy << 7) |
- (controller->status.drive_ready << 6) |
- (controller->status.write_fault << 5) |
- (controller->status.seek_complete << 4) |
- (controller->status.drq << 3) |
- (controller->status.corrected_data << 2) |
- (controller->status.index_pulse << 1) |
- (controller->status.err) );
+ } else {
+ uchar_t val = (
+ (controller->status.busy << 7) |
+ (controller->status.drive_ready << 6) |
+ (controller->status.write_fault << 5) |
+ (controller->status.seek_complete << 4) |
+ (controller->status.drq << 3) |
+ (controller->status.corrected_data << 2) |
+ (controller->status.index_pulse << 1) |
+ (controller->status.err) );
- memcpy(dst, &val, length);
+ memcpy(dst, &val, length);
- controller->status.index_pulse_count++;
- controller->status.index_pulse = 0;
+ controller->status.index_pulse_count++;
+ controller->status.index_pulse = 0;
- if (controller->status.index_pulse_count >= INDEX_PULSE_CYCLE) {
- controller->status.index_pulse = 1;
- controller->status.index_pulse_count = 0;
+ if (controller->status.index_pulse_count >= INDEX_PULSE_CYCLE) {
+ controller->status.index_pulse = 1;
+ controller->status.index_pulse_count = 0;
+ }
}
- }
- if ((port == SEC_CMD_PORT) || (port == PRI_CMD_PORT)) {
- rd_lower_irq(dev, channel);
- }
+ if ((port == SEC_CMD_PORT) || (port == PRI_CMD_PORT)) {
+ rd_lower_irq(dev, channel);
+ }
- PrintDebug("\t\tRead STATUS = 0x%x\n", *(uchar_t *)dst);
+ PrintDebug("\t\tRead STATUS = 0x%x\n", *(uchar_t *)dst);
- return length;
+ return length;
}
static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * drive = NULL;
- struct controller_t * controller = NULL;
- uchar_t value = *(uchar_t *)src;
-
- if (length != 1) {
- PrintError("Invalid Command port write length: %d (port=%d)\n", length, port);
- return -1;
- }
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * drive = NULL;
+ struct controller_t * controller = NULL;
+ uchar_t value = *(uchar_t *)src;
+
+ if (length != 1) {
+ PrintError("Invalid Command port write length: %d (port=%d)\n", length, port);
+ return -1;
+ }
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- drive = get_selected_drive(channel);
- controller = &(drive->controller);
+ drive = get_selected_drive(channel);
+ controller = &(drive->controller);
- PrintDebug("[write_command_handler] IO write at 0x%x, on drive %d/%d (val = 0x%x)\n",
- port, get_channel_no(ramdisk, channel),
- get_drive_no(channel, drive),
- value);
+ PrintDebug("[write_command_handler] IO write at 0x%x, on drive %d/%d (val = 0x%x)\n",
+ port, get_channel_no(ramdisk, channel),
+ get_drive_no(channel, drive),
+ value);
- switch (value) {
+ switch (value) {
#if 0
- case 0xec: // IDENTIFY DEVICE
- {
-
- if (drive->device_type == IDE_NONE) {
- PrintError("\t\tError: disk ata%d-%d not present, aborting\n",
- get_channel_no(ramdisk, channel),
- get_drive_no(channel, drive));
- rd_command_aborted(dev, channel, value);
- break;
- } else if (drive->device_type == IDE_CDROM) {
- PrintDebug("Identifying CDROM...Going to abort????\n");
- controller->head_no = 0;
- controller->sector_count = 1;
- controller->sector_no = 1;
- controller->cylinder_no = 0xeb14;
- rd_command_aborted(dev, channel, 0xec);
- } else {
- PrintError("\t\tError: Want to identify HDD!!\n");
- /*
- SELECTED_CONTROLLER(channel).current_command = value;
- SELECTED_CONTROLLER(channel).error_register = 0;
+ case 0xec: // IDENTIFY DEVICE
+ {
+
+ if (drive->device_type == IDE_NONE) {
+ PrintError("\t\tError: disk ata%d-%d not present, aborting\n",
+ get_channel_no(ramdisk, channel),
+ get_drive_no(channel, drive));
+ rd_command_aborted(dev, channel, value);
+ break;
+ } else if (drive->device_type == IDE_CDROM) {
+ PrintDebug("Identifying CDROM...Going to abort????\n");
+ controller->head_no = 0;
+ controller->sector_count = 1;
+ controller->sector_no = 1;
+ controller->cylinder_no = 0xeb14;
+ rd_command_aborted(dev, channel, 0xec);
+ } else {
+ PrintError("\t\tError: Want to identify HDD!!\n");
+ /*
+ SELECTED_CONTROLLER(channel).current_command = value;
+ SELECTED_CONTROLLER(channel).error_register = 0;
- // See ATA/ATAPI-4, 8.12
- SELECTED_CONTROLLER(channel).status.busy = 0;
- SELECTED_CONTROLLER(channel).status.drive_ready = 1;
- SELECTED_CONTROLLER(channel).status.write_fault = 0;
- SELECTED_CONTROLLER(channel).status.drq = 1;
- SELECTED_CONTROLLER(channel).status.err = 0;
+ // See ATA/ATAPI-4, 8.12
+ SELECTED_CONTROLLER(channel).status.busy = 0;
+ SELECTED_CONTROLLER(channel).status.drive_ready = 1;
+ SELECTED_CONTROLLER(channel).status.write_fault = 0;
+ SELECTED_CONTROLLER(channel).status.drq = 1;
+ SELECTED_CONTROLLER(channel).status.err = 0;
- SELECTED_CONTROLLER(channel).status.seek_complete = 1;
- SELECTED_CONTROLLER(channel).status.corrected_data = 0;
+ SELECTED_CONTROLLER(channel).status.seek_complete = 1;
+ SELECTED_CONTROLLER(channel).status.corrected_data = 0;
- SELECTED_CONTROLLER(channel).buffer_index = 0;
- raise_interrupt(channel);
- identify_drive(channel);
- */
- }
+ SELECTED_CONTROLLER(channel).buffer_index = 0;
+ raise_interrupt(channel);
+ identify_drive(channel);
+ */
+ }
- break;
- }
+ break;
+ }
#endif
- // ATAPI commands
- case 0xa1: // IDENTIFY PACKET DEVICE
- {
- if (drive->device_type == IDE_CDROM) {
- controller->current_command = value;
- controller->error_register = 0;
+ // ATAPI commands
+ case 0xa1: // IDENTIFY PACKET DEVICE
+ {
+ if (drive->device_type == IDE_CDROM) {
+ controller->current_command = value;
+ controller->error_register = 0;
- controller->status.busy = 0;
- controller->status.drive_ready = 1;
- controller->status.write_fault = 0;
- controller->status.drq = 1;
- controller->status.err = 0;
+ controller->status.busy = 0;
+ controller->status.drive_ready = 1;
+ controller->status.write_fault = 0;
+ controller->status.drq = 1;
+ controller->status.err = 0;
- controller->status.seek_complete = 1;
- controller->status.corrected_data = 0;
+ controller->status.seek_complete = 1;
+ controller->status.corrected_data = 0;
- controller->buffer_index = 0;
- rd_raise_interrupt(dev, channel);
- rd_identify_ATAPI_drive(dev, channel);
- } else {
- PrintError("Identifying non cdrom device not supported - ata %d/%d\n",
- get_channel_no(ramdisk, channel),
- get_drive_no(channel, drive));
- rd_command_aborted(dev, channel, 0xa1);
- }
- break;
- }
- case 0xa0: // SEND PACKET (atapi)
- {
- if (drive->device_type == IDE_CDROM) {
- // PACKET
+ controller->buffer_index = 0;
+ rd_raise_interrupt(dev, channel);
+ rd_identify_ATAPI_drive(dev, channel);
+ } else {
+ PrintError("Identifying non cdrom device not supported - ata %d/%d\n",
+ get_channel_no(ramdisk, channel),
+ get_drive_no(channel, drive));
+ rd_command_aborted(dev, channel, 0xa1);
+ }
+ break;
+ }
+ case 0xa0: // SEND PACKET (atapi)
+ {
+ if (drive->device_type == IDE_CDROM) {
+ // PACKET
- if (controller->features & (1 << 0)) {
- PrintError("\t\tPACKET-DMA not supported");
- return -1;
- }
+ if (controller->features & (1 << 0)) {
+ PrintError("\t\tPACKET-DMA not supported");
+ return -1;
+ }
- if (controller->features & (1 << 1)) {
- PrintError("\t\tPACKET-overlapped not supported");
- return -1;
- }
+ if (controller->features & (1 << 1)) {
+ PrintError("\t\tPACKET-overlapped not supported");
+ return -1;
+ }
- // We're already ready!
- controller->sector_count = 1;
- controller->status.busy = 0;
- controller->status.write_fault = 0;
-
- // serv bit??
- controller->status.drq = 1;
- controller->status.err = 0;
+ // We're already ready!
+ controller->sector_count = 1;
+ controller->status.busy = 0;
+ controller->status.write_fault = 0;
+
+ // serv bit??
+ controller->status.drq = 1;
+ controller->status.err = 0;
- // NOTE: no interrupt here
- controller->current_command = value;
- controller->buffer_index = 0;
- } else {
- PrintError("Sending packet to non cdrom device not supported\n");
- rd_command_aborted (dev, channel, 0xa0);
- }
- break;
+ // NOTE: no interrupt here
+ controller->current_command = value;
+ controller->buffer_index = 0;
+ } else {
+ PrintError("Sending packet to non cdrom device not supported\n");
+ rd_command_aborted (dev, channel, 0xa0);
+ }
+ break;
+ }
+ default:
+ PrintError("\t\tneed translate command %2x - ata %d\%d\n", value,
+ get_channel_no(ramdisk, channel),
+ get_drive_no(channel, drive));
+ //return -1;
+ /* JRL THIS NEEDS TO CHANGE */
+ return length;
+
}
- default:
- PrintError("\t\tneed translate command %2x - ata %d\%d\n", value,
- get_channel_no(ramdisk, channel),
- get_drive_no(channel, drive));
- //return -1;
- /* JRL THIS NEEDS TO CHANGE */
return length;
-
- }
- return length;
}
static int write_ctrl_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * master_drive = NULL;
- struct drive_t * slave_drive = NULL;
- struct controller_t * controller = NULL;
- uchar_t value = *(uchar_t *)src;
- rd_bool prev_control_reset;
-
- if (length != 1) {
- PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
- return -1;
- }
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * master_drive = NULL;
+ struct drive_t * slave_drive = NULL;
+ struct controller_t * controller = NULL;
+ uchar_t value = *(uchar_t *)src;
+ rd_bool prev_control_reset;
+
+ if (length != 1) {
+ PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
+ return -1;
+ }
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- master_drive = &(channel->drives[0]);
- slave_drive = &(channel->drives[1]);
+ master_drive = &(channel->drives[0]);
+ slave_drive = &(channel->drives[1]);
- controller = &(get_selected_drive(channel)->controller);
+ controller = &(get_selected_drive(channel)->controller);
- PrintDebug("[write_control_handler] IO write at 0x%x, on drive %d/%d (val = 0x%x)\n",
- port, get_channel_no(ramdisk, channel),
- channel->drive_select,
- value);
+ PrintDebug("[write_control_handler] IO write at 0x%x, on drive %d/%d (val = 0x%x)\n",
+ port, get_channel_no(ramdisk, channel),
+ channel->drive_select,
+ value);
- // (mch) Even if device 1 was selected, a write to this register
- // goes to device 0 (if device 1 is absent)
+ // (mch) Even if device 1 was selected, a write to this register
+ // goes to device 0 (if device 1 is absent)
- prev_control_reset = controller->control.reset;
+ prev_control_reset = controller->control.reset;
- if (value & 0x04) {
- PrintDebug("RESET Signaled\n");
- }
+ if (value & 0x04) {
+ PrintDebug("RESET Signaled\n");
+ }
- master_drive->controller.control.reset = value & 0x04;
- slave_drive->controller.control.reset = value & 0x04;
+ master_drive->controller.control.reset = value & 0x04;
+ slave_drive->controller.control.reset = value & 0x04;
- // CGS: was: SELECTED_CONTROLLER(channel).control.disable_irq = value & 0x02;
- master_drive->controller.control.disable_irq = value & 0x02;
- slave_drive->controller.control.disable_irq = value & 0x02;
+ // CGS: was: SELECTED_CONTROLLER(channel).control.disable_irq = value & 0x02;
+ master_drive->controller.control.disable_irq = value & 0x02;
+ slave_drive->controller.control.disable_irq = value & 0x02;
- PrintDebug("\t\tadpater control reg: reset controller = %d\n",
- (unsigned) (controller->control.reset) ? 1 : 0);
- PrintDebug("\t\tadpater control reg: disable_irq(X) = %d\n",
- (unsigned) (controller->control.disable_irq) ? 1 : 0);
+ PrintDebug("\t\tadpater control reg: reset controller = %d\n",
+ (unsigned) (controller->control.reset) ? 1 : 0);
+ PrintDebug("\t\tadpater control reg: disable_irq(X) = %d\n",
+ (unsigned) (controller->control.disable_irq) ? 1 : 0);
- if ((!prev_control_reset) && (controller->control.reset)) {
- uint_t id = 0;
+ if ((!prev_control_reset) && (controller->control.reset)) {
+ uint_t id = 0;
- // transition from 0 to 1 causes all drives to reset
- PrintDebug("\t\thard drive: RESET\n");
+ // transition from 0 to 1 causes all drives to reset
+ PrintDebug("\t\thard drive: RESET\n");
- // (mch) Set BSY, drive not ready
- for (id = 0; id < 2; id++) {
- struct controller_t * ctrl = NULL;
-
- if (id == 0) {
- ctrl = &(master_drive->controller);
- } else if (id == 1) {
- ctrl = &(slave_drive->controller);
- }
+ // (mch) Set BSY, drive not ready
+ for (id = 0; id < 2; id++) {
+ struct controller_t * ctrl = NULL;
+
+ if (id == 0) {
+ ctrl = &(master_drive->controller);
+ } else if (id == 1) {
+ ctrl = &(slave_drive->controller);
+ }
- ctrl->status.busy = 1;
- ctrl->status.drive_ready = 0;
- ctrl->reset_in_progress = 1;
+ ctrl->status.busy = 1;
+ ctrl->status.drive_ready = 0;
+ ctrl->reset_in_progress = 1;
- ctrl->status.write_fault = 0;
- ctrl->status.seek_complete = 1;
- ctrl->status.drq = 0;
- ctrl->status.corrected_data = 0;
- ctrl->status.err = 0;
+ ctrl->status.write_fault = 0;
+ ctrl->status.seek_complete = 1;
+ ctrl->status.drq = 0;
+ ctrl->status.corrected_data = 0;
+ ctrl->status.err = 0;
- ctrl->error_register = 0x01; // diagnostic code: no error
+ ctrl->error_register = 0x01; // diagnostic code: no error
- ctrl->current_command = 0x00;
- ctrl->buffer_index = 0;
+ ctrl->current_command = 0x00;
+ ctrl->buffer_index = 0;
- ctrl->sectors_per_block = 0x80;
- ctrl->lba_mode = 0;
+ ctrl->sectors_per_block = 0x80;
+ ctrl->lba_mode = 0;
- ctrl->control.disable_irq = 0;
- }
+ ctrl->control.disable_irq = 0;
+ }
- rd_lower_irq(dev, channel);
+ rd_lower_irq(dev, channel);
- } else if ((controller->reset_in_progress) &&
- (!controller->control.reset)) {
- uint_t id;
- // Clear BSY and DRDY
- PrintDebug("\t\tReset complete {%s}\n", device_type_to_str(get_selected_drive(channel)->device_type));
+ } else if ((controller->reset_in_progress) &&
+ (!controller->control.reset)) {
+ uint_t id;
+ // Clear BSY and DRDY
+ PrintDebug("\t\tReset complete {%s}\n", device_type_to_str(get_selected_drive(channel)->device_type));
- for (id = 0; id < 2; id++) {
- struct controller_t * ctrl = NULL;
- struct drive_t * drv = NULL;
+ for (id = 0; id < 2; id++) {
+ struct controller_t * ctrl = NULL;
+ struct drive_t * drv = NULL;
- if (id == 0) {
- ctrl = &(master_drive->controller);
- drv = master_drive;
- } else if (id == 1) {
- ctrl = &(slave_drive->controller);
- drv = slave_drive;
- }
+ if (id == 0) {
+ ctrl = &(master_drive->controller);
+ drv = master_drive;
+ } else if (id == 1) {
+ ctrl = &(slave_drive->controller);
+ drv = slave_drive;
+ }
- ctrl->status.busy = 0;
- ctrl->status.drive_ready = 1;
- ctrl->reset_in_progress = 0;
+ ctrl->status.busy = 0;
+ ctrl->status.drive_ready = 1;
+ ctrl->reset_in_progress = 0;
- // Device signature
- if (drv->device_type == IDE_DISK) {
- PrintDebug("\t\tdrive %d/%d is harddrive\n", get_channel_no(ramdisk, channel), id);
- ctrl->head_no = 0;
- ctrl->sector_count = 1;
- ctrl->sector_no = 1;
- ctrl->cylinder_no = 0;
- } else {
- ctrl->head_no = 0;
- ctrl->sector_count = 1;
- ctrl->sector_no = 1;
- ctrl->cylinder_no = 0xeb14;
- }
+ // Device signature
+ if (drv->device_type == IDE_DISK) {
+ PrintDebug("\t\tdrive %d/%d is harddrive\n", get_channel_no(ramdisk, channel), id);
+ ctrl->head_no = 0;
+ ctrl->sector_count = 1;
+ ctrl->sector_no = 1;
+ ctrl->cylinder_no = 0;
+ } else {
+ ctrl->head_no = 0;
+ ctrl->sector_count = 1;
+ ctrl->sector_no = 1;
+ ctrl->cylinder_no = 0xeb14;
+ }
+ }
}
- }
- PrintDebug("\t\ts[0].controller.control.disable_irq = %02x\n",
- master_drive->controller.control.disable_irq);
- PrintDebug("\t\ts[1].controller.control.disable_irq = %02x\n",
- slave_drive->controller.control.disable_irq);
- return length;
+ PrintDebug("\t\ts[0].controller.control.disable_irq = %02x\n",
+ master_drive->controller.control.disable_irq);
+ PrintDebug("\t\ts[1].controller.control.disable_irq = %02x\n",
+ slave_drive->controller.control.disable_irq);
+ return length;
}
static int read_general_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * drive = NULL;
- struct controller_t * controller = NULL;
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * drive = NULL;
+ struct controller_t * controller = NULL;
- if (length != 1) {
- PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
- return -1;
- }
+ if (length != 1) {
+ PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
+ return -1;
+ }
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- drive = get_selected_drive(channel);
- controller = &(drive->controller);
+ drive = get_selected_drive(channel);
+ controller = &(drive->controller);
- PrintDebug("[read_general_handler] IO read addr at %x, on drive %d/%d, curcmd = %02x\n",
- port, get_channel_no(ramdisk, channel),
- channel->drive_select,
- controller->current_command);
+ PrintDebug("[read_general_handler] IO read addr at %x, on drive %d/%d, curcmd = %02x\n",
+ port, get_channel_no(ramdisk, channel),
+ channel->drive_select,
+ controller->current_command);
- switch (port) {
- case PRI_FEATURES_PORT:
- case SEC_FEATURES_PORT: // hard disk error register 0x1f1
- {
- uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->error_register;
+ switch (port) {
+ case PRI_FEATURES_PORT:
+ case SEC_FEATURES_PORT: // hard disk error register 0x1f1
+ {
+ uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->error_register;
- controller->status.err = 0;
+ controller->status.err = 0;
- PrintDebug("\t\tRead FEATURES = 0x%x\n", val);
+ PrintDebug("\t\tRead FEATURES = 0x%x\n", val);
- *(uchar_t *)dst = val;
- return length;
+ *(uchar_t *)dst = val;
+ return length;
- break;
- }
+ break;
+ }
- case PRI_SECT_CNT_PORT:
- case SEC_SECT_CNT_PORT: // hard disk sector count / interrupt reason 0x1f2
- {
- uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->sector_count;
- PrintDebug("\t\tRead SECTOR COUNT = 0x%x\n", val);
- *(uchar_t *)dst = val;
- return length;
+ case PRI_SECT_CNT_PORT:
+ case SEC_SECT_CNT_PORT: // hard disk sector count / interrupt reason 0x1f2
+ {
+ uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->sector_count;
+ PrintDebug("\t\tRead SECTOR COUNT = 0x%x\n", val);
+ *(uchar_t *)dst = val;
+ return length;
- break;
- }
- case PRI_SECT_ADDR1_PORT:
- case SEC_SECT_ADDR1_PORT: // sector number 0x1f3
- {
- uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->sector_no;
+ break;
+ }
+ case PRI_SECT_ADDR1_PORT:
+ case SEC_SECT_ADDR1_PORT: // sector number 0x1f3
+ {
+ uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->sector_no;
- PrintDebug("\t\tRead SECTOR ADDR1 = 0x%x\n", val);
+ PrintDebug("\t\tRead SECTOR ADDR1 = 0x%x\n", val);
- *(uchar_t *)dst = val;
- return length;
+ *(uchar_t *)dst = val;
+ return length;
- break;
- }
+ break;
+ }
- case PRI_SECT_ADDR2_PORT:
- case SEC_SECT_ADDR2_PORT: // cylinder low 0x1f4
- {
- // -- WARNING : On real hardware the controller registers are shared between drives.
- // So we must respond even if the select device is not present. Some OS uses this fact
- // to detect the disks.... minix2 for example
- uchar_t val = (num_drives_on_channel(channel) == 0) ? 0 : (controller->cylinder_no & 0x00ff);
+ case PRI_SECT_ADDR2_PORT:
+ case SEC_SECT_ADDR2_PORT: // cylinder low 0x1f4
+ {
+ // -- WARNING : On real hardware the controller registers are shared between drives.
+ // So we must respond even if the select device is not present. Some OS uses this fact
+ // to detect the disks.... minix2 for example
+ uchar_t val = (num_drives_on_channel(channel) == 0) ? 0 : (controller->cylinder_no & 0x00ff);
- PrintDebug("\t\tRead SECTOR ADDR2 = 0x%x\n", val);
+ PrintDebug("\t\tRead SECTOR ADDR2 = 0x%x\n", val);
- *(uchar_t *)dst = val;
- return length;
+ *(uchar_t *)dst = val;
+ return length;
- break;
- }
+ break;
+ }
- case PRI_SECT_ADDR3_PORT:
- case SEC_SECT_ADDR3_PORT: // cylinder high 0x1f5
- {
- // -- WARNING : On real hardware the controller registers are shared between drives.
- // So we must respond even if the select device is not present. Some OS uses this fact
- // to detect the disks.... minix2 for example
- uchar_t val = (num_drives_on_channel(channel) == 0) ? 0 : (controller->cylinder_no >> 8);
+ case PRI_SECT_ADDR3_PORT:
+ case SEC_SECT_ADDR3_PORT: // cylinder high 0x1f5
+ {
+ // -- WARNING : On real hardware the controller registers are shared between drives.
+ // So we must respond even if the select device is not present. Some OS uses this fact
+ // to detect the disks.... minix2 for example
+ uchar_t val = (num_drives_on_channel(channel) == 0) ? 0 : (controller->cylinder_no >> 8);
- PrintDebug("\t\tRead SECTOR ADDR3 = 0x%x\n", val);
+ PrintDebug("\t\tRead SECTOR ADDR3 = 0x%x\n", val);
- *(uchar_t *)dst = val;
- return length;
+ *(uchar_t *)dst = val;
+ return length;
- break;
- }
- case PRI_DRV_SEL_PORT:
- case SEC_DRV_SEL_PORT: // hard disk drive and head register 0x1f6
- {
- // b7 Extended data field for ECC
- // b6/b5: Used to be sector size. 00=256,01=512,10=1024,11=128
- // Since 512 was always used, bit 6 was taken to mean LBA mode:
- // b6 1=LBA mode, 0=CHS mode
- // b5 1
- // b4: DRV
- // b3..0 HD3..HD0
- uchar_t val = ((1 << 7) |
- ((controller->lba_mode > 0) << 6) |
- (1 << 5) | // 01b = 512 sector size
- (channel->drive_select << 4) |
- (controller->head_no << 0));
+ break;
+ }
+ case PRI_DRV_SEL_PORT:
+ case SEC_DRV_SEL_PORT: // hard disk drive and head register 0x1f6
+ {
+ // b7 Extended data field for ECC
+ // b6/b5: Used to be sector size. 00=256,01=512,10=1024,11=128
+ // Since 512 was always used, bit 6 was taken to mean LBA mode:
+ // b6 1=LBA mode, 0=CHS mode
+ // b5 1
+ // b4: DRV
+ // b3..0 HD3..HD0
+ uchar_t val = ((1 << 7) |
+ ((controller->lba_mode > 0) << 6) |
+ (1 << 5) | // 01b = 512 sector size
+ (channel->drive_select << 4) |
+ (controller->head_no << 0));
- PrintDebug("\t\tRead DRIVE SELECT = 0x%x\n", val);
- *(uchar_t *)dst = val;
- return length;
+ PrintDebug("\t\tRead DRIVE SELECT = 0x%x\n", val);
+ *(uchar_t *)dst = val;
+ return length;
- break;
- }
- case PRI_ADDR_REG_PORT:
- case SEC_ADDR_REG_PORT: // Hard Disk Address Register 0x3f7
- {
- // Obsolete and unsupported register. Not driven by hard
- // disk controller. Report all 1's. If floppy controller
- // is handling this address, it will call this function
- // set/clear D7 (the only bit it handles), then return
- // the combined value
- *(uchar_t *)dst = 0xff;
- return length;
- }
+ break;
+ }
+ case PRI_ADDR_REG_PORT:
+ case SEC_ADDR_REG_PORT: // Hard Disk Address Register 0x3f7
+ {
+ // Obsolete and unsupported register. Not driven by hard
+ // disk controller. Report all 1's. If floppy controller
+ // is handling this address, it will call this function
+ // set/clear D7 (the only bit it handles), then return
+ // the combined value
+ *(uchar_t *)dst = 0xff;
+ return length;
+ }
- default:
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ default:
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
}
static int write_general_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct channel_t * channel = NULL;
- struct drive_t * drive = NULL;
- struct controller_t * controller = NULL;
- uchar_t value = *(uchar_t *)src;
-
- if (length != 1) {
- PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
- return -1;
- }
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct channel_t * channel = NULL;
+ struct drive_t * drive = NULL;
+ struct controller_t * controller = NULL;
+ uchar_t value = *(uchar_t *)src;
+
+ if (length != 1) {
+ PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
+ return -1;
+ }
- if (is_primary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[0]);
- } else if (is_secondary_port(ramdisk, port)) {
- channel = &(ramdisk->channels[1]);
- } else {
- PrintError("Invalid Port: %d\n", port);
- return -1;
- }
+ if (is_primary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[0]);
+ } else if (is_secondary_port(ramdisk, port)) {
+ channel = &(ramdisk->channels[1]);
+ } else {
+ PrintError("Invalid Port: %d\n", port);
+ return -1;
+ }
- drive = get_selected_drive(channel);
- controller = &(drive->controller);
+ drive = get_selected_drive(channel);
+ controller = &(drive->controller);
- PrintDebug("[write_general_handler] IO write to port %x (val=0x%02x), channel = %d\n",
- port, value, get_channel_no(ramdisk, channel));
+ PrintDebug("[write_general_handler] IO write to port %x (val=0x%02x), channel = %d\n",
+ port, value, get_channel_no(ramdisk, channel));
- switch (port) {
+ switch (port) {
- case PRI_FEATURES_PORT:
- case SEC_FEATURES_PORT: // hard disk write precompensation 0x1f1
- {
- write_features(channel, value);
- break;
- }
- case PRI_SECT_CNT_PORT:
- case SEC_SECT_CNT_PORT: // hard disk sector count 0x1f2
- {
- write_sector_count(channel, value);
- break;
- }
- case PRI_SECT_ADDR1_PORT:
- case SEC_SECT_ADDR1_PORT: // hard disk sector number 0x1f3
- {
- write_sector_number(channel, value);
- break;
- }
- case PRI_SECT_ADDR2_PORT:
- case SEC_SECT_ADDR2_PORT: // hard disk cylinder low 0x1f4
- {
- write_cylinder_low(channel, value);
- break;
- }
- case PRI_SECT_ADDR3_PORT:
- case SEC_SECT_ADDR3_PORT: // hard disk cylinder high 0x1f5
- {
- write_cylinder_high(channel, value);
- break;
- }
- case PRI_DRV_SEL_PORT:
- case SEC_DRV_SEL_PORT: // hard disk drive and head register 0x1f6
- {
- // b7 Extended data field for ECC
- // b6/b5: Used to be sector size. 00=256,01=512,10=1024,11=128
- // Since 512 was always used, bit 6 was taken to mean LBA mode:
- // b6 1=LBA mode, 0=CHS mode
- // b5 1
- // b4: DRV
- // b3..0 HD3..HD0
-
- // 1x1xxxxx
-
- PrintDebug("\tDrive Select value=%x\n", value);
-
- if ((value & 0xa0) != 0xa0) {
- PrintDebug("\t\tIO write 0x%x (%02x): not 1x1xxxxxb\n", port, (unsigned) value);
- }
+ case PRI_FEATURES_PORT:
+ case SEC_FEATURES_PORT: // hard disk write precompensation 0x1f1
+ {
+ write_features(channel, value);
+ break;
+ }
+ case PRI_SECT_CNT_PORT:
+ case SEC_SECT_CNT_PORT: // hard disk sector count 0x1f2
+ {
+ write_sector_count(channel, value);
+ break;
+ }
+ case PRI_SECT_ADDR1_PORT:
+ case SEC_SECT_ADDR1_PORT: // hard disk sector number 0x1f3
+ {
+ write_sector_number(channel, value);
+ break;
+ }
+ case PRI_SECT_ADDR2_PORT:
+ case SEC_SECT_ADDR2_PORT: // hard disk cylinder low 0x1f4
+ {
+ write_cylinder_low(channel, value);
+ break;
+ }
+ case PRI_SECT_ADDR3_PORT:
+ case SEC_SECT_ADDR3_PORT: // hard disk cylinder high 0x1f5
+ {
+ write_cylinder_high(channel, value);
+ break;
+ }
+ case PRI_DRV_SEL_PORT:
+ case SEC_DRV_SEL_PORT: // hard disk drive and head register 0x1f6
+ {
+ // b7 Extended data field for ECC
+ // b6/b5: Used to be sector size. 00=256,01=512,10=1024,11=128
+ // Since 512 was always used, bit 6 was taken to mean LBA mode:
+ // b6 1=LBA mode, 0=CHS mode
+ // b5 1
+ // b4: DRV
+ // b3..0 HD3..HD0
+
+ // 1x1xxxxx
+
+ PrintDebug("\tDrive Select value=%x\n", value);
+
+ if ((value & 0xa0) != 0xa0) {
+ PrintDebug("\t\tIO write 0x%x (%02x): not 1x1xxxxxb\n", port, (unsigned) value);
+ }
- write_head_no(channel, value & 0xf);
- if ((controller->lba_mode == 0) && (((value >> 6) & 1) == 1)) {
- PrintDebug("\t\tenabling LBA mode\n");
- }
+ write_head_no(channel, value & 0xf);
+ if ((controller->lba_mode == 0) && (((value >> 6) & 1) == 1)) {
+ PrintDebug("\t\tenabling LBA mode\n");
+ }
- write_lba_mode(channel, (value >> 6) & 1);
+ write_lba_mode(channel, (value >> 6) & 1);
- if (drive->cdrom.cd) {
- PrintDebug("\t\tSetting LBA on CDROM: %d\n", (value >> 6) & 1);
- drive->cdrom.cd->set_LBA(drive->private_data, (value >> 6) & 1);
- }
+ if (drive->cdrom.cd) {
+ PrintDebug("\t\tSetting LBA on CDROM: %d\n", (value >> 6) & 1);
+ drive->cdrom.cd->set_LBA(drive->private_data, (value >> 6) & 1);
+ }
- channel->drive_select = (value >> 4) & 0x01;
- drive = get_selected_drive(channel);
+ channel->drive_select = (value >> 4) & 0x01;
+ drive = get_selected_drive(channel);
- if (drive->device_type == IDE_NONE) {
- PrintError("\t\tError: device set to %d which does not exist! channel = 0x%x\n",
- channel->drive_select, get_channel_no(ramdisk, channel));
+ if (drive->device_type == IDE_NONE) {
+ PrintError("\t\tError: device set to %d which does not exist! channel = 0x%x\n",
+ channel->drive_select, get_channel_no(ramdisk, channel));
- controller->error_register = 0x04; // aborted
- controller->status.err = 1;
- }
+ controller->error_register = 0x04; // aborted
+ controller->status.err = 1;
+ }
- break;
+ break;
+ }
+ default:
+ PrintError("\t\thard drive: io write to unhandled port 0x%x (value = %c)\n", port, value);
+ //return -1;
}
- default:
- PrintError("\t\thard drive: io write to unhandled port 0x%x (value = %c)\n", port, value);
- //return -1;
- }
- return length;
+ return length;
}
static void rd_raise_interrupt(struct vm_device * dev, struct channel_t * channel) {
- // struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct drive_t * drive = get_selected_drive(channel);
- struct controller_t * controller = &(drive->controller);
+ // struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct drive_t * drive = get_selected_drive(channel);
+ struct controller_t * controller = &(drive->controller);
- PrintDebug("[raise_interrupt] disable_irq = 0x%02x\n", controller->control.disable_irq);
+ PrintDebug("[raise_interrupt] disable_irq = 0x%02x\n", controller->control.disable_irq);
- if (!(controller->control.disable_irq)) {
+ if (!(controller->control.disable_irq)) {
- PrintDebug("\t\tRaising interrupt %d {%s}\n\n", channel->irq, device_type_to_str(drive->device_type));
+ PrintDebug("\t\tRaising interrupt %d {%s}\n\n", channel->irq, device_type_to_str(drive->device_type));
- v3_raise_irq(dev->vm, channel->irq);
- } else {
- PrintDebug("\t\tRaising irq but irq is disabled\n");
- }
+ v3_raise_irq(dev->vm, channel->irq);
+ } else {
+ PrintDebug("\t\tRaising irq but irq is disabled\n");
+ }
- return;
+ return;
}
static void rd_lower_irq(struct vm_device *dev, struct channel_t * channel) {
- PrintDebug("[lower_irq] irq = %d\n", channel->irq);
- v3_lower_irq(dev->vm, channel->irq);
+ PrintDebug("[lower_irq] irq = %d\n", channel->irq);
+ v3_lower_irq(dev->vm, channel->irq);
}
int handle_atapi_packet_command(struct vm_device * dev, struct channel_t * channel, ushort_t value) {
- struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
- struct drive_t * drive = get_selected_drive(channel);
- struct controller_t * controller = &(drive->controller);
-
- if (controller->buffer_index >= PACKET_SIZE) {
- PrintError("ATAPI packet exceeded maximum length: buffer_index (%d) >= PACKET_SIZE\n",
- controller->buffer_index);
- return -1;
- }
+ struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
+ struct drive_t * drive = get_selected_drive(channel);
+ struct controller_t * controller = &(drive->controller);
+
+ if (controller->buffer_index >= PACKET_SIZE) {
+ PrintError("ATAPI packet exceeded maximum length: buffer_index (%d) >= PACKET_SIZE\n",
+ controller->buffer_index);
+ return -1;
+ }
- controller->buffer[controller->buffer_index] = value;
- controller->buffer[controller->buffer_index + 1] = (value >> 8);
- controller->buffer_index += 2;
+ controller->buffer[controller->buffer_index] = value;
+ controller->buffer[controller->buffer_index + 1] = (value >> 8);
+ controller->buffer_index += 2;
- /* if packet completely writtten */
- if (controller->buffer_index >= PACKET_SIZE) {
- // complete command received
- Bit8u atapi_command = controller->buffer[0];
+ /* if packet completely writtten */
+ if (controller->buffer_index >= PACKET_SIZE) {
+ // complete command received
+ Bit8u atapi_command = controller->buffer[0];
- PrintDebug("\t\tcdrom: ATAPI command 0x%x started\n", atapi_command);
+ PrintDebug("\t\tcdrom: ATAPI command 0x%x started\n", atapi_command);
- switch (atapi_command) {
- case 0x00: // test unit ready
- {
- PrintDebug("Testing unit ready\n");
- if (drive->cdrom.ready) {
- rd_atapi_cmd_nop(dev, channel);
- } else {
- PrintError("CDROM not ready in test unit ready\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- }
+ switch (atapi_command) {
+ case 0x00: // test unit ready
+ {
+ PrintDebug("Testing unit ready\n");
+ if (drive->cdrom.ready) {
+ rd_atapi_cmd_nop(dev, channel);
+ } else {
+ PrintError("CDROM not ready in test unit ready\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ }
- rd_raise_interrupt(dev, channel);
+ rd_raise_interrupt(dev, channel);
- break;
- }
- case 0x03: // request sense
- {
- int alloc_length = controller->buffer[4];
-
- if (rd_init_send_atapi_command(dev, channel, atapi_command, 18, alloc_length, false) == -1) {
- PrintError("Error sending atapi command in Request Sense\n");
- return -1;
- }
+ break;
+ }
+ case 0x03: // request sense
+ {
+ int alloc_length = controller->buffer[4];
+
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, 18, alloc_length, false) == -1) {
+ PrintError("Error sending atapi command in Request Sense\n");
+ return -1;
+ }
- // sense data
- controller->buffer[0] = 0x70 | (1 << 7);
- controller->buffer[1] = 0;
- controller->buffer[2] = drive->sense.sense_key;
- controller->buffer[3] = drive->sense.information.arr[0];
- controller->buffer[4] = drive->sense.information.arr[1];
- controller->buffer[5] = drive->sense.information.arr[2];
- controller->buffer[6] = drive->sense.information.arr[3];
- controller->buffer[7] = 17 - 7;
- controller->buffer[8] = drive->sense.specific_inf.arr[0];
- controller->buffer[9] = drive->sense.specific_inf.arr[1];
- controller->buffer[10] = drive->sense.specific_inf.arr[2];
- controller->buffer[11] = drive->sense.specific_inf.arr[3];
- controller->buffer[12] = drive->sense.asc;
- controller->buffer[13] = drive->sense.ascq;
- controller->buffer[14] = drive->sense.fruc;
- controller->buffer[15] = drive->sense.key_spec.arr[0];
- controller->buffer[16] = drive->sense.key_spec.arr[1];
- controller->buffer[17] = drive->sense.key_spec.arr[2];
+ // sense data
+ controller->buffer[0] = 0x70 | (1 << 7);
+ controller->buffer[1] = 0;
+ controller->buffer[2] = drive->sense.sense_key;
+ controller->buffer[3] = drive->sense.information.arr[0];
+ controller->buffer[4] = drive->sense.information.arr[1];
+ controller->buffer[5] = drive->sense.information.arr[2];
+ controller->buffer[6] = drive->sense.information.arr[3];
+ controller->buffer[7] = 17 - 7;
+ controller->buffer[8] = drive->sense.specific_inf.arr[0];
+ controller->buffer[9] = drive->sense.specific_inf.arr[1];
+ controller->buffer[10] = drive->sense.specific_inf.arr[2];
+ controller->buffer[11] = drive->sense.specific_inf.arr[3];
+ controller->buffer[12] = drive->sense.asc;
+ controller->buffer[13] = drive->sense.ascq;
+ controller->buffer[14] = drive->sense.fruc;
+ controller->buffer[15] = drive->sense.key_spec.arr[0];
+ controller->buffer[16] = drive->sense.key_spec.arr[1];
+ controller->buffer[17] = drive->sense.key_spec.arr[2];
- rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 0x1b: // start stop unit
- {
- //bx_bool Immed = (controller->buffer[1] >> 0) & 1;
- rd_bool LoEj = (controller->buffer[4] >> 1) & 1;
- rd_bool Start = (controller->buffer[4] >> 0) & 1;
+ rd_ready_to_send_atapi(dev, channel);
+ break;
+ }
+ case 0x1b: // start stop unit
+ {
+ //bx_bool Immed = (controller->buffer[1] >> 0) & 1;
+ rd_bool LoEj = (controller->buffer[4] >> 1) & 1;
+ rd_bool Start = (controller->buffer[4] >> 0) & 1;
- // stop the disc
- if ((!LoEj) && (!Start)) {
- PrintError("FIXME: Stop disc not implemented\n");
+ // stop the disc
+ if ((!LoEj) && (!Start)) {
+ PrintError("FIXME: Stop disc not implemented\n");
- rd_atapi_cmd_nop(dev, channel);
- rd_raise_interrupt(dev, channel);
+ rd_atapi_cmd_nop(dev, channel);
+ rd_raise_interrupt(dev, channel);
- } else if (!LoEj && Start) { // start (spin up) the disc
+ } else if (!LoEj && Start) { // start (spin up) the disc
- drive->cdrom.cd->start_cdrom(drive->private_data);
+ drive->cdrom.cd->start_cdrom(drive->private_data);
- PrintError("FIXME: ATAPI start disc not reading TOC\n");
- rd_atapi_cmd_nop(dev, channel);
- rd_raise_interrupt(dev, channel);
-
- } else if (LoEj && !Start) { // Eject the disc
- rd_atapi_cmd_nop(dev, channel);
- PrintDebug("Ejecting Disk\n");
- if (drive->cdrom.ready) {
+ PrintError("FIXME: ATAPI start disc not reading TOC\n");
+ rd_atapi_cmd_nop(dev, channel);
+ rd_raise_interrupt(dev, channel);
+
+ } else if (LoEj && !Start) { // Eject the disc
+ rd_atapi_cmd_nop(dev, channel);
+ PrintDebug("Ejecting Disk\n");
+ if (drive->cdrom.ready) {
- drive->cdrom.cd->eject_cdrom(drive->private_data);
+ drive->cdrom.cd->eject_cdrom(drive->private_data);
- drive->cdrom.ready = 0;
- //bx_options.atadevice[channel][SLAVE_SELECTED(channel)].Ostatus->set(EJECTED);
- //bx_gui->update_drive_status_buttons();
- }
- rd_raise_interrupt(dev, channel);
-
- } else { // Load the disc
- // My guess is that this command only closes the tray, that's a no-op for us
- rd_atapi_cmd_nop(dev, channel);
- rd_raise_interrupt(dev, channel);
- }
- break;
- }
- case 0xbd: // mechanism status
- {
- uint16_t alloc_length = rd_read_16bit(controller->buffer + 8);
+ drive->cdrom.ready = 0;
+ //bx_options.atadevice[channel][SLAVE_SELECTED(channel)].Ostatus->set(EJECTED);
+ //bx_gui->update_drive_status_buttons();
+ }
+ rd_raise_interrupt(dev, channel);
+
+ } else { // Load the disc
+ // My guess is that this command only closes the tray, that's a no-op for us
+ rd_atapi_cmd_nop(dev, channel);
+ rd_raise_interrupt(dev, channel);
+ }
+ break;
+ }
+ case 0xbd: // mechanism status
+ {
+ uint16_t alloc_length = rd_read_16bit(controller->buffer + 8);
- if (alloc_length == 0) {
- PrintError("Zero allocation length to MECHANISM STATUS not impl.\n");
- return -1;
- }
+ if (alloc_length == 0) {
+ PrintError("Zero allocation length to MECHANISM STATUS not impl.\n");
+ return -1;
+ }
- if (rd_init_send_atapi_command(dev, channel, atapi_command, 8, alloc_length, false) == -1) {
- PrintError("Error sending atapi command in mechanism status\n");
- return -1;
- }
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, 8, alloc_length, false) == -1) {
+ PrintError("Error sending atapi command in mechanism status\n");
+ return -1;
+ }
- controller->buffer[0] = 0; // reserved for non changers
- controller->buffer[1] = 0; // reserved for non changers
+ controller->buffer[0] = 0; // reserved for non changers
+ controller->buffer[1] = 0; // reserved for non changers
- controller->buffer[2] = 0; // Current LBA (TODO!)
- controller->buffer[3] = 0; // Current LBA (TODO!)
- controller->buffer[4] = 0; // Current LBA (TODO!)
+ controller->buffer[2] = 0; // Current LBA (TODO!)
+ controller->buffer[3] = 0; // Current LBA (TODO!)
+ controller->buffer[4] = 0; // Current LBA (TODO!)
- controller->buffer[5] = 1; // one slot
+ controller->buffer[5] = 1; // one slot
- controller->buffer[6] = 0; // slot table length
- controller->buffer[7] = 0; // slot table length
+ controller->buffer[6] = 0; // slot table length
+ controller->buffer[7] = 0; // slot table length
- rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 0x5a: // mode sense
- {
- uint16_t alloc_length = rd_read_16bit(controller->buffer + 7);
+ rd_ready_to_send_atapi(dev, channel);
+ break;
+ }
+ case 0x5a: // mode sense
+ {
+ uint16_t alloc_length = rd_read_16bit(controller->buffer + 7);
- Bit8u PC = controller->buffer[2] >> 6;
- Bit8u PageCode = controller->buffer[2] & 0x3f;
+ Bit8u PC = controller->buffer[2] >> 6;
+ Bit8u PageCode = controller->buffer[2] & 0x3f;
- switch (PC) {
- case 0x0: // current values
- {
- switch (PageCode) {
- case 0x01: // error recovery
- {
+ switch (PC) {
+ case 0x0: // current values
+ {
+ switch (PageCode) {
+ case 0x01: // error recovery
+ {
- if (rd_init_send_atapi_command(dev, channel, atapi_command, sizeof(struct error_recovery_t) + 8, alloc_length, false) == -1) {
- PrintError("Error sending atapi command in mode sense error recovery\n");
- return -1;
- }
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, sizeof(struct error_recovery_t) + 8, alloc_length, false) == -1) {
+ PrintError("Error sending atapi command in mode sense error recovery\n");
+ return -1;
+ }
- rd_init_mode_sense_single(dev, channel, &(drive->cdrom.current.error_recovery),
- sizeof(struct error_recovery_t));
- rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 0x2a: // CD-ROM capabilities & mech. status
- {
-
- if (rd_init_send_atapi_command(dev, channel, atapi_command, 28, alloc_length, false) == -1) {
- PrintError("Error sending atapi command in CDROM caps/mech mode-sense\n");
- return -1;
- }
-
- rd_init_mode_sense_single(dev, channel, &(controller->buffer[8]), 28);
+ rd_init_mode_sense_single(dev, channel, &(drive->cdrom.current.error_recovery),
+ sizeof(struct error_recovery_t));
+ rd_ready_to_send_atapi(dev, channel);
+ break;
+ }
+ case 0x2a: // CD-ROM capabilities & mech. status
+ {
+
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, 28, alloc_length, false) == -1) {
+ PrintError("Error sending atapi command in CDROM caps/mech mode-sense\n");
+ return -1;
+ }
+
+ rd_init_mode_sense_single(dev, channel, &(controller->buffer[8]), 28);
- controller->buffer[8] = 0x2a;
- controller->buffer[9] = 0x12;
- controller->buffer[10] = 0x00;
- controller->buffer[11] = 0x00;
- // Multisession, Mode 2 Form 2, Mode 2 Form 1
- controller->buffer[12] = 0x70;
- controller->buffer[13] = (3 << 5);
- controller->buffer[14] = (unsigned char) (1 |
- (drive->cdrom.locked ? (1 << 1) : 0) |
- (1 << 3) |
- (1 << 5));
- controller->buffer[15] = 0x00;
- controller->buffer[16] = (706 >> 8) & 0xff;
- controller->buffer[17] = 706 & 0xff;
- controller->buffer[18] = 0;
- controller->buffer[19] = 2;
- controller->buffer[20] = (512 >> 8) & 0xff;
- controller->buffer[21] = 512 & 0xff;
- controller->buffer[22] = (706 >> 8) & 0xff;
- controller->buffer[23] = 706 & 0xff;
- controller->buffer[24] = 0;
- controller->buffer[25] = 0;
- controller->buffer[26] = 0;
- controller->buffer[27] = 0;
- rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 0x0d: // CD-ROM
- case 0x0e: // CD-ROM audio control
- case 0x3f: // all
- {
- PrintError("Ramdisk: cdrom: MODE SENSE (curr), code=%x not implemented yet\n",
- PageCode);
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
- default:
- {
- // not implemeted by this device
- PrintError("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
- PC, PageCode);
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
- }
- break;
- }
- case 0x1: // changeable values
- {
- switch (PageCode) {
- case 0x01: // error recovery
- case 0x0d: // CD-ROM
- case 0x0e: // CD-ROM audio control
- case 0x2a: // CD-ROM capabilities & mech. status
- case 0x3f: // all
- {
- PrintError("cdrom: MODE SENSE (chg), code=%x not implemented yet\n",
- PageCode);
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
- default:
- {
- // not implemeted by this device
- PrintError("Changeable values of mode sense not supported by cdrom\n");
- PrintDebug("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
- PC, PageCode);
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
- }
- break;
- }
- case 0x2: // default values
- {
- switch (PageCode) {
- case 0x01: // error recovery
- case 0x0d: // CD-ROM
- case 0x0e: // CD-ROM audio control
- case 0x2a: // CD-ROM capabilities & mech. status
- case 0x3f: // all
- PrintError("Default values of mode sense not supported by cdrom\n");
- PrintDebug("cdrom: MODE SENSE (dflt), code=%x\n",
- PageCode);
- return -1;
+ controller->buffer[8] = 0x2a;
+ controller->buffer[9] = 0x12;
+ controller->buffer[10] = 0x00;
+ controller->buffer[11] = 0x00;
+ // Multisession, Mode 2 Form 2, Mode 2 Form 1
+ controller->buffer[12] = 0x70;
+ controller->buffer[13] = (3 << 5);
+ controller->buffer[14] = (unsigned char) (1 |
+ (drive->cdrom.locked ? (1 << 1) : 0) |
+ (1 << 3) |
+ (1 << 5));
+ controller->buffer[15] = 0x00;
+ controller->buffer[16] = (706 >> 8) & 0xff;
+ controller->buffer[17] = 706 & 0xff;
+ controller->buffer[18] = 0;
+ controller->buffer[19] = 2;
+ controller->buffer[20] = (512 >> 8) & 0xff;
+ controller->buffer[21] = 512 & 0xff;
+ controller->buffer[22] = (706 >> 8) & 0xff;
+ controller->buffer[23] = 706 & 0xff;
+ controller->buffer[24] = 0;
+ controller->buffer[25] = 0;
+ controller->buffer[26] = 0;
+ controller->buffer[27] = 0;
+ rd_ready_to_send_atapi(dev, channel);
+ break;
+ }
+ case 0x0d: // CD-ROM
+ case 0x0e: // CD-ROM audio control
+ case 0x3f: // all
+ {
+ PrintError("Ramdisk: cdrom: MODE SENSE (curr), code=%x not implemented yet\n",
+ PageCode);
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ default:
+ {
+ // not implemeted by this device
+ PrintError("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
+ PC, PageCode);
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ }
+ break;
+ }
+ case 0x1: // changeable values
+ {
+ switch (PageCode) {
+ case 0x01: // error recovery
+ case 0x0d: // CD-ROM
+ case 0x0e: // CD-ROM audio control
+ case 0x2a: // CD-ROM capabilities & mech. status
+ case 0x3f: // all
+ {
+ PrintError("cdrom: MODE SENSE (chg), code=%x not implemented yet\n",
+ PageCode);
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ default:
+ {
+ // not implemeted by this device
+ PrintError("Changeable values of mode sense not supported by cdrom\n");
+ PrintDebug("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
+ PC, PageCode);
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ }
+ break;
+ }
+ case 0x2: // default values
+ {
+ switch (PageCode) {
+ case 0x01: // error recovery
+ case 0x0d: // CD-ROM
+ case 0x0e: // CD-ROM audio control
+ case 0x2a: // CD-ROM capabilities & mech. status
+ case 0x3f: // all
+ PrintError("Default values of mode sense not supported by cdrom\n");
+ PrintDebug("cdrom: MODE SENSE (dflt), code=%x\n",
+ PageCode);
+ return -1;
- default:
- {
- PrintError("Default values of mode sense not implemented in cdrom\n");
- // not implemeted by this device
- PrintDebug("cdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
- PC, PageCode);
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
- }
- break;
- }
- case 0x3: // saved values not implemented
- {
- PrintError("\t\tSaved values not implemented in mode sense\n");
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
- rd_raise_interrupt(dev, channel);
- break;
- }
- default:
- {
- PrintError("Unsupported Mode sense value\n");
- return -1;
- break;
- }
- }
- break;
- }
- case 0x12: // inquiry
- {
- uint8_t alloc_length = controller->buffer[4];
+ default:
+ {
+ PrintError("Default values of mode sense not implemented in cdrom\n");
+ // not implemeted by this device
+ PrintDebug("cdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
+ PC, PageCode);
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ }
+ break;
+ }
+ case 0x3: // saved values not implemented
+ {
+ PrintError("\t\tSaved values not implemented in mode sense\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ default:
+ {
+ PrintError("Unsupported Mode sense value\n");
+ return -1;
+ break;
+ }
+ }
+ break;
+ }
+ case 0x12: // inquiry
+ {
+ uint8_t alloc_length = controller->buffer[4];
- if (rd_init_send_atapi_command(dev, channel, atapi_command, 36, alloc_length, false) == -1) {
- PrintError("Error sending atapi command in inquiry\n");
- return -1;
- }
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, 36, alloc_length, false) == -1) {
+ PrintError("Error sending atapi command in inquiry\n");
+ return -1;
+ }
- controller->buffer[0] = 0x05; // CD-ROM
- controller->buffer[1] = 0x80; // Removable
- controller->buffer[2] = 0x00; // ISO, ECMA, ANSI version
- controller->buffer[3] = 0x21; // ATAPI-2, as specified
- controller->buffer[4] = 31; // additional length (total 36)
- controller->buffer[5] = 0x00; // reserved
- controller->buffer[6] = 0x00; // reserved
- controller->buffer[7] = 0x00; // reserved
+ controller->buffer[0] = 0x05; // CD-ROM
+ controller->buffer[1] = 0x80; // Removable
+ controller->buffer[2] = 0x00; // ISO, ECMA, ANSI version
+ controller->buffer[3] = 0x21; // ATAPI-2, as specified
+ controller->buffer[4] = 31; // additional length (total 36)
+ controller->buffer[5] = 0x00; // reserved
+ controller->buffer[6] = 0x00; // reserved
+ controller->buffer[7] = 0x00; // reserved
- // Vendor ID
- const char* vendor_id = "VTAB ";
- int i;
- for (i = 0; i < 8; i++) {
- controller->buffer[8+i] = vendor_id[i];
- }
-
- // Product ID
- const char* product_id = "Turbo CD-ROM ";
- for (i = 0; i < 16; i++) {
- controller->buffer[16+i] = product_id[i];
- }
-
- // Product Revision level
- const char* rev_level = "1.0 ";
- for (i = 0; i < 4; i++) {
- controller->buffer[32 + i] = rev_level[i];
- }
-
- rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 0x25: // read cd-rom capacity
- {
- // no allocation length???
- if (rd_init_send_atapi_command(dev, channel, atapi_command, 8, 8, false) == -1) {
- PrintError("Error sending atapi command in read cdrom capacity\n");
- return -1;
- }
+ // Vendor ID
+ const char* vendor_id = "VTAB ";
+ int i;
+ for (i = 0; i < 8; i++) {
+ controller->buffer[8+i] = vendor_id[i];
+ }
+
+ // Product ID
+ const char* product_id = "Turbo CD-ROM ";
+ for (i = 0; i < 16; i++) {
+ controller->buffer[16+i] = product_id[i];
+ }
+
+ // Product Revision level
+ const char* rev_level = "1.0 ";
+ for (i = 0; i < 4; i++) {
+ controller->buffer[32 + i] = rev_level[i];
+ }
+
+ rd_ready_to_send_atapi(dev, channel);
+ break;
+ }
+ case 0x25: // read cd-rom capacity
+ {
+ // no allocation length???
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, 8, 8, false) == -1) {
+ PrintError("Error sending atapi command in read cdrom capacity\n");
+ return -1;
+ }
- if (drive->cdrom.ready) {
- uint32_t capacity = drive->cdrom.capacity;
-
- PrintDebug("\t\tCapacity is %d sectors (%d bytes)\n", capacity, capacity * 2048);
-
- controller->buffer[0] = (capacity >> 24) & 0xff;
- controller->buffer[1] = (capacity >> 16) & 0xff;
- controller->buffer[2] = (capacity >> 8) & 0xff;
- controller->buffer[3] = (capacity >> 0) & 0xff;
- controller->buffer[4] = (2048 >> 24) & 0xff;
- controller->buffer[5] = (2048 >> 16) & 0xff;
- controller->buffer[6] = (2048 >> 8) & 0xff;
- controller->buffer[7] = (2048 >> 0) & 0xff;
-
- rd_ready_to_send_atapi(dev, channel);
- } else {
- PrintError("CDROM not ready in read cdrom capacity\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- rd_raise_interrupt(dev, channel);
- }
- break;
- }
+ if (drive->cdrom.ready) {
+ uint32_t capacity = drive->cdrom.capacity;
+
+ PrintDebug("\t\tCapacity is %d sectors (%d bytes)\n", capacity, capacity * 2048);
+
+ controller->buffer[0] = (capacity >> 24) & 0xff;
+ controller->buffer[1] = (capacity >> 16) & 0xff;
+ controller->buffer[2] = (capacity >> 8) & 0xff;
+ controller->buffer[3] = (capacity >> 0) & 0xff;
+ controller->buffer[4] = (2048 >> 24) & 0xff;
+ controller->buffer[5] = (2048 >> 16) & 0xff;
+ controller->buffer[6] = (2048 >> 8) & 0xff;
+ controller->buffer[7] = (2048 >> 0) & 0xff;
+
+ rd_ready_to_send_atapi(dev, channel);
+ } else {
+ PrintError("CDROM not ready in read cdrom capacity\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ rd_raise_interrupt(dev, channel);
+ }
+ break;
+ }
- case 0xbe: // read cd
- {
- if (drive->cdrom.ready) {
- PrintError("Read CD with CD present not implemented\n");
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- } else {
- PrintError("Drive not ready in read cd with CD present\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- rd_raise_interrupt(dev, channel);
- }
- break;
- }
- case 0x43: // read toc
- {
- if (drive->cdrom.ready) {
- int toc_length = 0;
- bool msf = (controller->buffer[1] >> 1) & 1;
- uint8_t starting_track = controller->buffer[6];
+ case 0xbe: // read cd
+ {
+ if (drive->cdrom.ready) {
+ PrintError("Read CD with CD present not implemented\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ } else {
+ PrintError("Drive not ready in read cd with CD present\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ rd_raise_interrupt(dev, channel);
+ }
+ break;
+ }
+ case 0x43: // read toc
+ {
+ if (drive->cdrom.ready) {
+ int toc_length = 0;
+ bool msf = (controller->buffer[1] >> 1) & 1;
+ uint8_t starting_track = controller->buffer[6];
- uint16_t alloc_length = rd_read_16bit(controller->buffer + 7);
+ uint16_t alloc_length = rd_read_16bit(controller->buffer + 7);
- uint8_t format = (controller->buffer[9] >> 6);
- int i;
-
- PrintDebug("Reading CDROM TOC: Format=%d (byte count=%d) (toc length:%d)\n",
- format, controller->byte_count, toc_length);
-
- switch (format) {
- case 0:
- {
- if (!(drive->cdrom.cd->read_toc(drive->private_data, controller->buffer,
- &toc_length, msf, starting_track))) {
- PrintError("CDROM: Reading Table of Contents Failed\n");
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
+ uint8_t format = (controller->buffer[9] >> 6);
+ int i;
+
+ PrintDebug("Reading CDROM TOC: Format=%d (byte count=%d) (toc length:%d)\n",
+ format, controller->byte_count, toc_length);
+
+ switch (format) {
+ case 0:
+ if (!(drive->cdrom.cd->read_toc(drive->private_data, controller->buffer,
+ &toc_length, msf, starting_track))) {
+ PrintError("CDROM: Reading Table of Contents Failed\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
- if (rd_init_send_atapi_command(dev, channel, atapi_command, toc_length, alloc_length, false) == -1) {
- PrintError("Failed to init send atapi command in read toc (fmt=%d)\n", format);
- return -1;
- }
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, toc_length, alloc_length, false) == -1) {
+ PrintError("Failed to init send atapi command in read toc (fmt=%d)\n", format);
+ return -1;
+ }
- rd_ready_to_send_atapi(dev, channel);
+ rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 1:
- // multi session stuff. we ignore this and emulate a single session only
+ break;
- if (rd_init_send_atapi_command(dev, channel, atapi_command, 12, alloc_length, false) == -1) {
- PrintError("Failed to init send atapi command in read toc (fmt=%d)\n", format);
- return -1;
- }
+ case 1:
+ // multi session stuff. we ignore this and emulate a single session only
+
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, 12, alloc_length, false) == -1) {
+ PrintError("Failed to init send atapi command in read toc (fmt=%d)\n", format);
+ return -1;
+ }
- controller->buffer[0] = 0;
- controller->buffer[1] = 0x0a;
- controller->buffer[2] = 1;
- controller->buffer[3] = 1;
+ controller->buffer[0] = 0;
+ controller->buffer[1] = 0x0a;
+ controller->buffer[2] = 1;
+ controller->buffer[3] = 1;
- for (i = 0; i < 8; i++) {
- controller->buffer[4 + i] = 0;
- }
+ for (i = 0; i < 8; i++) {
+ controller->buffer[4 + i] = 0;
+ }
- rd_ready_to_send_atapi(dev, channel);
- break;
+ rd_ready_to_send_atapi(dev, channel);
+ break;
- case 2:
- default:
- PrintError("(READ TOC) Format %d not supported\n", format);
- return -1;
- }
- } else {
- PrintError("CDROM not ready in read toc\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- rd_raise_interrupt(dev, channel);
- }
- break;
- }
- case 0x28: // read (10)
- case 0xa8: // read (12)
- {
+ case 2:
+ default:
+ PrintError("(READ TOC) Format %d not supported\n", format);
+ return -1;
+ }
+ } else {
+ PrintError("CDROM not ready in read toc\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ rd_raise_interrupt(dev, channel);
+ }
+ break;
+ }
+ case 0x28: // read (10)
+ case 0xa8: // read (12)
+ {
- uint32_t transfer_length;
- if (atapi_command == 0x28) {
- transfer_length = rd_read_16bit(controller->buffer + 7);
- } else {
- transfer_length = rd_read_32bit(controller->buffer + 6);
- }
-
- uint32_t lba = rd_read_32bit(controller->buffer + 2);
+ uint32_t transfer_length;
+ if (atapi_command == 0x28) {
+ transfer_length = rd_read_16bit(controller->buffer + 7);
+ } else {
+ transfer_length = rd_read_32bit(controller->buffer + 6);
+ }
+
+ uint32_t lba = rd_read_32bit(controller->buffer + 2);
- if (!(drive->cdrom.ready)) {
- PrintError("CDROM Error: Not Ready (ATA%d/%d)\n",
- get_channel_no(ramdisk, channel), get_drive_no(channel, drive));
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- rd_raise_interrupt(dev, channel);
- break;
- }
+ if (!(drive->cdrom.ready)) {
+ PrintError("CDROM Error: Not Ready (ATA%d/%d)\n",
+ get_channel_no(ramdisk, channel), get_drive_no(channel, drive));
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
- if (transfer_length == 0) {
- PrintError("READ(%d) with transfer length 0, ok\n",
- (atapi_command == 0x28) ? 10 : 12);
- rd_atapi_cmd_nop(dev, channel);
- rd_raise_interrupt(dev, channel);
- break;
- }
+ if (transfer_length == 0) {
+ PrintError("READ(%d) with transfer length 0, ok\n",
+ (atapi_command == 0x28) ? 10 : 12);
+ rd_atapi_cmd_nop(dev, channel);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
- if (lba + transfer_length > drive->cdrom.capacity) {
- PrintError("CDROM Error: Capacity exceeded [capacity=%d] (ATA%d/%d)\n",
- drive->cdrom.capacity,
- get_channel_no(ramdisk, channel), get_drive_no(channel, drive));
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
- rd_raise_interrupt(dev, channel);
- break;
- }
+ if (lba + transfer_length > drive->cdrom.capacity) {
+ PrintError("CDROM Error: Capacity exceeded [capacity=%d] (ATA%d/%d)\n",
+ drive->cdrom.capacity,
+ get_channel_no(ramdisk, channel), get_drive_no(channel, drive));
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
- PrintDebug("\t\tcdrom: READ (%d) LBA=%d LEN=%d\n",
- (atapi_command == 0x28) ? 10 : 12,
- lba, transfer_length);
+ PrintDebug("\t\tcdrom: READ (%d) LBA=%d LEN=%d\n",
+ (atapi_command == 0x28) ? 10 : 12,
+ lba, transfer_length);
- // handle command
- if (rd_init_send_atapi_command(dev, channel, atapi_command, transfer_length * 2048,
- transfer_length * 2048, true) == -1) {
- PrintError("CDROM Error: Atapi command send error\n");
- return -1;
- }
-
- drive->cdrom.remaining_blocks = transfer_length;
- drive->cdrom.next_lba = lba;
- rd_ready_to_send_atapi(dev, channel);
- break;
- }
- case 0x2b: // seek
- {
- uint32_t lba = rd_read_32bit(controller->buffer + 2);
-
- if (!(drive->cdrom.ready)) {
- PrintError("CDROM not ready in seek\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- rd_raise_interrupt(dev, channel);
- break;
- }
+ // handle command
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, transfer_length * 2048,
+ transfer_length * 2048, true) == -1) {
+ PrintError("CDROM Error: Atapi command send error\n");
+ return -1;
+ }
+
+ drive->cdrom.remaining_blocks = transfer_length;
+ drive->cdrom.next_lba = lba;
+ rd_ready_to_send_atapi(dev, channel);
+ break;
+ }
+ case 0x2b: // seek
+ {
+ uint32_t lba = rd_read_32bit(controller->buffer + 2);
+
+ if (!(drive->cdrom.ready)) {
+ PrintError("CDROM not ready in seek\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
- if (lba > drive->cdrom.capacity) {
- PrintError("LBA is greater than CDROM capacity in seek\n");
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
- rd_raise_interrupt(dev, channel);
- break;
- }
+ if (lba > drive->cdrom.capacity) {
+ PrintError("LBA is greater than CDROM capacity in seek\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
- PrintError("\t\tcdrom: SEEK (ignored)\n");
+ PrintError("\t\tcdrom: SEEK (ignored)\n");
- rd_atapi_cmd_nop(dev, channel);
- rd_raise_interrupt(dev, channel);
+ rd_atapi_cmd_nop(dev, channel);
+ rd_raise_interrupt(dev, channel);
- break;
- }
- case 0x1e: // prevent/allow medium removal
- {
-
- if (drive->cdrom.ready) {
- drive->cdrom.locked = controller->buffer[4] & 1;
- rd_atapi_cmd_nop(dev, channel);
- } else {
- PrintError("CD not ready in prevent/allow medium removal\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- }
+ break;
+ }
+ case 0x1e: // prevent/allow medium removal
+ {
- rd_raise_interrupt(dev, channel);
+ if (drive->cdrom.ready) {
+ drive->cdrom.locked = controller->buffer[4] & 1;
+ rd_atapi_cmd_nop(dev, channel);
+ } else {
+ PrintError("CD not ready in prevent/allow medium removal\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ }
- break;
- }
- case 0x42: // read sub-channel
- {
- //bool msf = get_packet_field(channel,1, 1, 1);
- bool sub_q = get_packet_field(channel,2, 6, 1);
- //uint8_t data_format = get_packet_byte(channel,3);
- //uint8_t track_number = get_packet_byte(channel,6);
- uint16_t alloc_length = get_packet_word(channel,7);
+ rd_raise_interrupt(dev, channel);
+
+ break;
+ }
+ case 0x42: // read sub-channel
+ {
+ //bool msf = get_packet_field(channel,1, 1, 1);
+ bool sub_q = get_packet_field(channel,2, 6, 1);
+ //uint8_t data_format = get_packet_byte(channel,3);
+ //uint8_t track_number = get_packet_byte(channel,6);
+ uint16_t alloc_length = get_packet_word(channel,7);
- /*
- UNUSED(msf);
- UNUSED(data_format);
- UNUSED(track_number);
- */
- if (!(drive->cdrom.ready)) {
- PrintError("CDROM not ready in read sub-channel\n");
- rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
- rd_raise_interrupt(dev, channel);
- } else {
- controller->buffer[0] = 0;
- controller->buffer[1] = 0; // audio not supported
- controller->buffer[2] = 0;
- controller->buffer[3] = 0;
+ /*
+ UNUSED(msf);
+ UNUSED(data_format);
+ UNUSED(track_number);
+ */
+ if (!(drive->cdrom.ready)) {
+ PrintError("CDROM not ready in read sub-channel\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ rd_raise_interrupt(dev, channel);
+ } else {
+ controller->buffer[0] = 0;
+ controller->buffer[1] = 0; // audio not supported
+ controller->buffer[2] = 0;
+ controller->buffer[3] = 0;
- int ret_len = 4; // header size
+ int ret_len = 4; // header size
- if (sub_q) { // !sub_q == header only
- PrintError("Read sub-channel with SubQ not implemented\n");
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
- ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- }
+ if (sub_q) { // !sub_q == header only
+ PrintError("Read sub-channel with SubQ not implemented\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
+ ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ }
- if (rd_init_send_atapi_command(dev, channel, atapi_command, ret_len, alloc_length, false) == -1) {
- PrintError("Error sending atapi command in read sub-channel\n");
- return -1;
- }
- rd_ready_to_send_atapi(dev, channel);
+ if (rd_init_send_atapi_command(dev, channel, atapi_command, ret_len, alloc_length, false) == -1) {
+ PrintError("Error sending atapi command in read sub-channel\n");
+ return -1;
+ }
+ rd_ready_to_send_atapi(dev, channel);
+ }
+ break;
+ }
+ case 0x51: // read disc info
+ {
+ // no-op to keep the Linux CD-ROM driver happy
+ PrintError("Error: Read disk info no-op to keep the Linux CD-ROM driver happy\n");
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ }
+ case 0x55: // mode select
+ case 0xa6: // load/unload cd
+ case 0x4b: // pause/resume
+ case 0x45: // play audio
+ case 0x47: // play audio msf
+ case 0xbc: // play cd
+ case 0xb9: // read cd msf
+ case 0x44: // read header
+ case 0xba: // scan
+ case 0xbb: // set cd speed
+ case 0x4e: // stop play/scan
+ case 0x46: // ???
+ case 0x4a: // ???
+ PrintError("ATAPI command 0x%x not implemented yet\n",
+ atapi_command);
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
+ default:
+ PrintError("Unknown ATAPI command 0x%x (%d)\n",
+ atapi_command, atapi_command);
+ // We'd better signal the error if the user chose to continue
+ rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
+ rd_raise_interrupt(dev, channel);
+ break;
}
- break;
- }
- case 0x51: // read disc info
- {
- // no-op to keep the Linux CD-ROM driver happy
- PrintError("Error: Read disk info no-op to keep the Linux CD-ROM driver happy\n");
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- }
- case 0x55: // mode select
- case 0xa6: // load/unload cd
- case 0x4b: // pause/resume
- case 0x45: // play audio
- case 0x47: // play audio msf
- case 0xbc: // play cd
- case 0xb9: // read cd msf
- case 0x44: // read header
- case 0xba: // scan
- case 0xbb: // set cd speed
- case 0x4e: // stop play/scan
- case 0x46: // ???
- case 0x4a: // ???
- PrintError("ATAPI command 0x%x not implemented yet\n",
- atapi_command);
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
- default:
- PrintError("Unknown ATAPI command 0x%x (%d)\n",
- atapi_command, atapi_command);
- // We'd better signal the error if the user chose to continue
- rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
- rd_raise_interrupt(dev, channel);
- break;
}
- }
- return 0;
+ return 0;
}
int rd_init_send_atapi_command(struct vm_device * dev, struct channel_t * channel, Bit8u command, int req_length, int alloc_length, bool lazy)
{
- struct drive_t * drive = &(channel->drives[channel->drive_select]);
- struct controller_t * controller = &(drive->controller);
+ struct drive_t * drive = &(channel->drives[channel->drive_select]);
+ struct controller_t * controller = &(drive->controller);
- // controller->byte_count is a union of controller->cylinder_no;
- // lazy is used to force a data read in the buffer at the next read.
+ // controller->byte_count is a union of controller->cylinder_no;
+ // lazy is used to force a data read in the buffer at the next read.
- PrintDebug("[rd_init_send_atapi_cmd]\n");
+ PrintDebug("[rd_init_send_atapi_cmd]\n");
- if (controller->byte_count == 0xffff) {
- controller->byte_count = 0xfffe;
- }
+ if (controller->byte_count == 0xffff) {
+ controller->byte_count = 0xfffe;
+ }
- if ((controller->byte_count & 1) &&
- !(alloc_length <= controller->byte_count)) {
+ if ((controller->byte_count & 1) &&
+ !(alloc_length <= controller->byte_count)) {
- PrintDebug("\t\tOdd byte count (0x%04x) to ATAPI command 0x%02x, using 0x%x\n",
- controller->byte_count,
- command,
- controller->byte_count - 1);
+ PrintDebug("\t\tOdd byte count (0x%04x) to ATAPI command 0x%02x, using 0x%x\n",
+ controller->byte_count,
+ command,
+ controller->byte_count - 1);
- controller->byte_count -= 1;
- }
+ controller->byte_count -= 1;
+ }
- if (controller->byte_count == 0) {
- PrintError("\t\tATAPI command with zero byte count\n");
- return -1;
- }
+ if (controller->byte_count == 0) {
+ PrintError("\t\tATAPI command with zero byte count\n");
+ return -1;
+ }
- if (alloc_length < 0) {
- PrintError("\t\tAllocation length < 0\n");
- return -1;
- }
+ if (alloc_length < 0) {
+ PrintError("\t\tAllocation length < 0\n");
+ return -1;
+ }
- if (alloc_length == 0) {
- alloc_length = controller->byte_count;
- }
+ if (alloc_length == 0) {
+ alloc_length = controller->byte_count;
+ }
- controller->interrupt_reason.i_o = 1;
- controller->interrupt_reason.c_d = 0;
- controller->status.busy = 0;
- controller->status.drq = 1;
- controller->status.err = 0;
+ controller->interrupt_reason.i_o = 1;
+ controller->interrupt_reason.c_d = 0;
+ controller->status.busy = 0;
+ controller->status.drq = 1;
+ controller->status.err = 0;
- // no bytes transfered yet
- if (lazy) {
- controller->buffer_index = 2048;
- } else {
- controller->buffer_index = 0;
- }
+ // no bytes transfered yet
+ if (lazy) {
+ controller->buffer_index = 2048;
+ } else {
+ controller->buffer_index = 0;
+ }
- controller->drq_index = 0;
+ controller->drq_index = 0;
- if (controller->byte_count > req_length) {
- controller->byte_count = req_length;
- }
+ if (controller->byte_count > req_length) {
+ controller->byte_count = req_length;
+ }
- if (controller->byte_count > alloc_length) {
- controller->byte_count = alloc_length;
- }
+ if (controller->byte_count > alloc_length) {
+ controller->byte_count = alloc_length;
+ }
- drive->atapi.command = command;
- drive->atapi.drq_bytes = controller->byte_count;
- drive->atapi.total_bytes_remaining = (req_length < alloc_length) ? req_length : alloc_length;
+ drive->atapi.command = command;
+ drive->atapi.drq_bytes = controller->byte_count;
+ drive->atapi.total_bytes_remaining = (req_length < alloc_length) ? req_length : alloc_length;
- // if (lazy) {
- // // bias drq_bytes and total_bytes_remaining
- // SELECTED_DRIVE(channel).atapi.drq_bytes += 2048;
- // SELECTED_DRIVE(channel).atapi.total_bytes_remaining += 2048;
- // }
+ // if (lazy) {
+ // // bias drq_bytes and total_bytes_remaining
+ // SELECTED_DRIVE(channel).atapi.drq_bytes += 2048;
+ // SELECTED_DRIVE(channel).atapi.total_bytes_remaining += 2048;
+ // }
- return 0;
+ return 0;
}
void rd_ready_to_send_atapi(struct vm_device * dev, struct channel_t * channel) {
- PrintDebug("[rd_ready_to_send_atapi]\n");
+ PrintDebug("[rd_ready_to_send_atapi]\n");
- rd_raise_interrupt(dev, channel);
+ rd_raise_interrupt(dev, channel);
}
void rd_atapi_cmd_error(struct vm_device * dev, struct channel_t * channel, sense_t sense_key, asc_t asc)
{
- struct drive_t * drive = &(channel->drives[channel->drive_select]);
- struct controller_t * controller = &(drive->controller);
+ struct drive_t * drive = &(channel->drives[channel->drive_select]);
+ struct controller_t * controller = &(drive->controller);
- struct ramdisk_t *ramdisk = (struct ramdisk_t *)(dev->private_data);
- PrintError("[rd_atapi_cmd_error]\n");
- PrintError("Error: atapi_cmd_error channel=%02x key=%02x asc=%02x\n",
- get_channel_no(ramdisk, channel), sense_key, asc);
+ struct ramdisk_t *ramdisk = (struct ramdisk_t *)(dev->private_data);
+ PrintError("[rd_atapi_cmd_error]\n");
+ PrintError("Error: atapi_cmd_error channel=%02x key=%02x asc=%02x\n",
+ get_channel_no(ramdisk, channel), sense_key, asc);
- controller->error_register = sense_key << 4;
- controller->interrupt_reason.i_o = 1;
- controller->interrupt_reason.c_d = 1;
- controller->interrupt_reason.rel = 0;
- controller->status.busy = 0;
- controller->status.drive_ready = 1;
- controller->status.write_fault = 0;
- controller->status.drq = 0;
- controller->status.err = 1;
+ controller->error_register = sense_key << 4;
+ controller->interrupt_reason.i_o = 1;
+ controller->interrupt_reason.c_d = 1;
+ controller->interrupt_reason.rel = 0;
+ controller->status.busy = 0;
+ controller->status.drive_ready = 1;
+ controller->status.write_fault = 0;
+ controller->status.drq = 0;
+ controller->status.err = 1;
- drive->sense.sense_key = sense_key;
- drive->sense.asc = asc;
- drive->sense.ascq = 0;
+ drive->sense.sense_key = sense_key;
+ drive->sense.asc = asc;
+ drive->sense.ascq = 0;
}
void rd_atapi_cmd_nop(struct vm_device * dev, struct channel_t * channel)
{
- struct drive_t * drive = &(channel->drives[channel->drive_select]);
- struct controller_t * controller = &(drive->controller);
-
- PrintDebug("[rd_atapi_cmd_nop]\n");
- controller->interrupt_reason.i_o = 1;
- controller->interrupt_reason.c_d = 1;
- controller->interrupt_reason.rel = 0;
- controller->status.busy = 0;
- controller->status.drive_ready = 1;
- controller->status.drq = 0;
- controller->status.err = 0;
+ struct drive_t * drive = &(channel->drives[channel->drive_select]);
+ struct controller_t * controller = &(drive->controller);
+
+ PrintDebug("[rd_atapi_cmd_nop]\n");
+ controller->interrupt_reason.i_o = 1;
+ controller->interrupt_reason.c_d = 1;
+ controller->interrupt_reason.rel = 0;
+ controller->status.busy = 0;
+ controller->status.drive_ready = 1;
+ controller->status.drq = 0;
+ controller->status.err = 0;
}
void rd_identify_ATAPI_drive(struct vm_device * dev, struct channel_t * channel)
{
- struct drive_t * drive = &(channel->drives[channel->drive_select]);
- struct controller_t * controller = &(drive->controller);
+ struct drive_t * drive = &(channel->drives[channel->drive_select]);
+ struct controller_t * controller = &(drive->controller);
- uint_t i;
- const char* serial_number = " VT00001\0\0\0\0\0\0\0\0\0\0\0\0";
- const char* firmware = "ALPHA1 ";
+ uint_t i;
+ const char* serial_number = " VT00001\0\0\0\0\0\0\0\0\0\0\0\0";
+ const char* firmware = "ALPHA1 ";
- drive->id_drive[0] = (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0); // Removable CDROM, 50us response, 12 byte packets
+ drive->id_drive[0] = (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0); // Removable CDROM, 50us response, 12 byte packets
- for (i = 1; i <= 9; i++) {
- drive->id_drive[i] = 0;
- }
+ for (i = 1; i <= 9; i++) {
+ drive->id_drive[i] = 0;
+ }
- for (i = 0; i < 10; i++) {
- drive->id_drive[10 + i] = ((serial_number[i * 2] << 8) |
- (serial_number[(i * 2) + 1]));
- }
+ for (i = 0; i < 10; i++) {
+ drive->id_drive[10 + i] = ((serial_number[i * 2] << 8) |
+ (serial_number[(i * 2) + 1]));
+ }
- for (i = 20; i <= 22; i++) {
- drive->id_drive[i] = 0;
- }
+ for (i = 20; i <= 22; i++) {
+ drive->id_drive[i] = 0;
+ }
- for (i = 0; i < strlen(firmware)/2; i++) {
- drive->id_drive[23 + i] = ((firmware[i * 2] << 8) |
- (firmware[(i * 2) + 1]));
- }
- V3_ASSERT((23 + i) == 27);
+ for (i = 0; i < strlen(firmware)/2; i++) {
+ drive->id_drive[23 + i] = ((firmware[i * 2] << 8) |
+ (firmware[(i * 2) + 1]));
+ }
+ V3_ASSERT((23 + i) == 27);
- for (i = 0; i < strlen((char *)(drive->model_no)) / 2; i++) {
- drive->id_drive[27 + i] = ((drive->model_no[i * 2] << 8) |
- (drive->model_no[(i * 2) + 1]));
- }
- V3_ASSERT((27 + i) == 47);
+ for (i = 0; i < strlen((char *)(drive->model_no)) / 2; i++) {
+ drive->id_drive[27 + i] = ((drive->model_no[i * 2] << 8) |
+ (drive->model_no[(i * 2) + 1]));
+ }
+ V3_ASSERT((27 + i) == 47);
- drive->id_drive[47] = 0;
- drive->id_drive[48] = 1; // 32 bits access
+ drive->id_drive[47] = 0;
+ drive->id_drive[48] = 1; // 32 bits access
- drive->id_drive[49] = (1 << 9); // LBA supported
+ drive->id_drive[49] = (1 << 9); // LBA supported
- drive->id_drive[50] = 0;
- drive->id_drive[51] = 0;
- drive->id_drive[52] = 0;
+ drive->id_drive[50] = 0;
+ drive->id_drive[51] = 0;
+ drive->id_drive[52] = 0;
- drive->id_drive[53] = 3; // words 64-70, 54-58 valid
+ drive->id_drive[53] = 3; // words 64-70, 54-58 valid
- for (i = 54; i <= 62; i++) {
- drive->id_drive[i] = 0;
- }
+ for (i = 54; i <= 62; i++) {
+ drive->id_drive[i] = 0;
+ }
- // copied from CFA540A
- drive->id_drive[63] = 0x0103; // variable (DMA stuff)
- drive->id_drive[64] = 0x0001; // PIO
- drive->id_drive[65] = 0x00b4;
- drive->id_drive[66] = 0x00b4;
- drive->id_drive[67] = 0x012c;
- drive->id_drive[68] = 0x00b4;
-
- drive->id_drive[69] = 0;
- drive->id_drive[70] = 0;
- drive->id_drive[71] = 30; // faked
- drive->id_drive[72] = 30; // faked
- drive->id_drive[73] = 0;
- drive->id_drive[74] = 0;
-
- drive->id_drive[75] = 0;
-
- for (i = 76; i <= 79; i++) {
- drive->id_drive[i] = 0;
- }
+ // copied from CFA540A
+ drive->id_drive[63] = 0x0103; // variable (DMA stuff)
+ drive->id_drive[64] = 0x0001; // PIO
+ drive->id_drive[65] = 0x00b4;
+ drive->id_drive[66] = 0x00b4;
+ drive->id_drive[67] = 0x012c;
+ drive->id_drive[68] = 0x00b4;
+
+ drive->id_drive[69] = 0;
+ drive->id_drive[70] = 0;
+ drive->id_drive[71] = 30; // faked
+ drive->id_drive[72] = 30; // faked
+ drive->id_drive[73] = 0;
+ drive->id_drive[74] = 0;
+
+ drive->id_drive[75] = 0;
+
+ for (i = 76; i <= 79; i++) {
+ drive->id_drive[i] = 0;
+ }
- drive->id_drive[80] = 0x1e; // supports up to ATA/ATAPI-4
- drive->id_drive[81] = 0;
- drive->id_drive[82] = 0;
- drive->id_drive[83] = 0;
- drive->id_drive[84] = 0;
- drive->id_drive[85] = 0;
- drive->id_drive[86] = 0;
- drive->id_drive[87] = 0;
- drive->id_drive[88] = 0;
-
- for (i = 89; i <= 126; i++) {
- drive->id_drive[i] = 0;
- }
+ drive->id_drive[80] = 0x1e; // supports up to ATA/ATAPI-4
+ drive->id_drive[81] = 0;
+ drive->id_drive[82] = 0;
+ drive->id_drive[83] = 0;
+ drive->id_drive[84] = 0;
+ drive->id_drive[85] = 0;
+ drive->id_drive[86] = 0;
+ drive->id_drive[87] = 0;
+ drive->id_drive[88] = 0;
+
+ for (i = 89; i <= 126; i++) {
+ drive->id_drive[i] = 0;
+ }
- drive->id_drive[127] = 0;
- drive->id_drive[128] = 0;
+ drive->id_drive[127] = 0;
+ drive->id_drive[128] = 0;
- for (i = 129; i <= 159; i++) {
- drive->id_drive[i] = 0;
- }
+ for (i = 129; i <= 159; i++) {
+ drive->id_drive[i] = 0;
+ }
- for (i = 160; i <= 255; i++) {
- drive->id_drive[i] = 0;
- }
+ for (i = 160; i <= 255; i++) {
+ drive->id_drive[i] = 0;
+ }
- // now convert the id_drive array (native 256 word format) to
- // the controller buffer (512 bytes)
- Bit16u temp16;
- for (i = 0; i <= 255; i++) {
- temp16 = drive->id_drive[i];
- controller->buffer[i * 2] = temp16 & 0x00ff;
- controller->buffer[i * 2 + 1] = temp16 >> 8;
- }
+ // now convert the id_drive array (native 256 word format) to
+ // the controller buffer (512 bytes)
+ Bit16u temp16;
+ for (i = 0; i <= 255; i++) {
+ temp16 = drive->id_drive[i];
+ controller->buffer[i * 2] = temp16 & 0x00ff;
+ controller->buffer[i * 2 + 1] = temp16 >> 8;
+ }
- return;
+ return;
}
void rd_init_mode_sense_single(struct vm_device * dev,
struct channel_t * channel, const void* src, int size)
{
- struct drive_t * drive = &(channel->drives[channel->drive_select]);
- struct controller_t * controller = &(drive->controller);
-
- PrintDebug("[rd_init_mode_sense_single]\n");
-
- // Header
- controller->buffer[0] = (size + 6) >> 8;
- controller->buffer[1] = (size + 6) & 0xff;
- controller->buffer[2] = 0x70; // no media present
- controller->buffer[3] = 0; // reserved
- controller->buffer[4] = 0; // reserved
- controller->buffer[5] = 0; // reserved
- controller->buffer[6] = 0; // reserved
- controller->buffer[7] = 0; // reserved
+ struct drive_t * drive = &(channel->drives[channel->drive_select]);
+ struct controller_t * controller = &(drive->controller);
+
+ PrintDebug("[rd_init_mode_sense_single]\n");
+
+ // Header
+ controller->buffer[0] = (size + 6) >> 8;
+ controller->buffer[1] = (size + 6) & 0xff;
+ controller->buffer[2] = 0x70; // no media present
+ controller->buffer[3] = 0; // reserved
+ controller->buffer[4] = 0; // reserved
+ controller->buffer[5] = 0; // reserved
+ controller->buffer[6] = 0; // reserved
+ controller->buffer[7] = 0; // reserved
- // Data
- memcpy(controller->buffer + 8, src, size);
+ // Data
+ memcpy(controller->buffer + 8, src, size);
}
static void rd_command_aborted(struct vm_device * dev,
struct channel_t * channel, unsigned value) {
- struct drive_t * drive = &(channel->drives[channel->drive_select]);
- struct controller_t * controller = &(drive->controller);
-
- PrintError("[rd_command_aborted]\n");
- PrintError("\t\taborting on command 0x%02x {%s}\n", value, device_type_to_str(drive->device_type));
-
- controller->current_command = 0;
- controller->status.busy = 0;
- controller->status.drive_ready = 1;
- controller->status.err = 1;
- controller->error_register = 0x04; // command ABORTED
- controller->status.drq = 0;
- controller->status.seek_complete = 0;
- controller->status.corrected_data = 0;
- controller->buffer_index = 0;
-
- rd_raise_interrupt(dev, channel);
+ struct drive_t * drive = &(channel->drives[channel->drive_select]);
+ struct controller_t * controller = &(drive->controller);
+
+ PrintError("[rd_command_aborted]\n");
+ PrintError("\t\taborting on command 0x%02x {%s}\n", value, device_type_to_str(drive->device_type));
+
+ controller->current_command = 0;
+ controller->status.busy = 0;
+ controller->status.drive_ready = 1;
+ controller->status.err = 1;
+ controller->error_register = 0x04; // command ABORTED
+ controller->status.drq = 0;
+ controller->status.seek_complete = 0;
+ controller->status.corrected_data = 0;
+ controller->buffer_index = 0;
+
+ rd_raise_interrupt(dev, channel);
}
static int ramdisk_init_device(struct vm_device *dev) {
- struct ramdisk_t *ramdisk= (struct ramdisk_t *)dev->private_data;
-
- PrintDebug("Initializing Ramdisk\n");
-
-
- rd_init_hardware(ramdisk);
-
-
- v3_dev_hook_io(dev, PRI_CTRL_PORT,
- &read_status_port, &write_ctrl_port);
-
- v3_dev_hook_io(dev, PRI_DATA_PORT,
- &read_data_port, &write_data_port);
- v3_dev_hook_io(dev, PRI_FEATURES_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_SECT_CNT_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_SECT_ADDR1_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_SECT_ADDR2_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_SECT_ADDR3_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_DRV_SEL_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_CMD_PORT,
- &read_status_port, &write_cmd_port);
-
-
- v3_dev_hook_io(dev, SEC_CTRL_PORT,
- &read_status_port, &write_ctrl_port);
-
- v3_dev_hook_io(dev, SEC_DATA_PORT,
- &read_data_port, &write_data_port);
- v3_dev_hook_io(dev, SEC_FEATURES_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, SEC_SECT_CNT_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, SEC_SECT_ADDR1_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, SEC_SECT_ADDR2_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, SEC_SECT_ADDR3_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, SEC_DRV_SEL_PORT,
- &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, SEC_CMD_PORT,
- &read_status_port, &write_cmd_port);
+ struct ramdisk_t *ramdisk= (struct ramdisk_t *)dev->private_data;
+
+ PrintDebug("Initializing Ramdisk\n");
+
+
+ rd_init_hardware(ramdisk);
+
+
+ v3_dev_hook_io(dev, PRI_CTRL_PORT,
+ &read_status_port, &write_ctrl_port);
+
+ v3_dev_hook_io(dev, PRI_DATA_PORT,
+ &read_data_port, &write_data_port);
+ v3_dev_hook_io(dev, PRI_FEATURES_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_SECT_CNT_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_SECT_ADDR1_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_SECT_ADDR2_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_SECT_ADDR3_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_DRV_SEL_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_CMD_PORT,
+ &read_status_port, &write_cmd_port);
+
+
+ v3_dev_hook_io(dev, SEC_CTRL_PORT,
+ &read_status_port, &write_ctrl_port);
+
+ v3_dev_hook_io(dev, SEC_DATA_PORT,
+ &read_data_port, &write_data_port);
+ v3_dev_hook_io(dev, SEC_FEATURES_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_SECT_CNT_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_SECT_ADDR1_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_SECT_ADDR2_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_SECT_ADDR3_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_DRV_SEL_PORT,
+ &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_CMD_PORT,
+ &read_status_port, &write_cmd_port);
- v3_dev_hook_io(dev, SEC_ADDR_REG_PORT,
- &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, SEC_ADDR_REG_PORT,
+ &read_general_port, &write_general_port);
- v3_dev_hook_io(dev, PRI_ADDR_REG_PORT,
- &read_general_port, &write_general_port);
+ v3_dev_hook_io(dev, PRI_ADDR_REG_PORT,
+ &read_general_port, &write_general_port);
- return 0;
+ return 0;
}
static int ramdisk_deinit_device(struct vm_device *dev) {
- struct ramdisk_t *ramdisk = (struct ramdisk_t *)(dev->private_data);
- rd_close_harddrive(ramdisk);
- return 0;
+ struct ramdisk_t *ramdisk = (struct ramdisk_t *)(dev->private_data);
+ rd_close_harddrive(ramdisk);
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = ramdisk_init_device,
- .deinit = ramdisk_deinit_device,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = ramdisk_init_device,
+ .deinit = ramdisk_deinit_device,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_ramdisk()
{
- struct ramdisk_t *ramdisk;
- ramdisk = (struct ramdisk_t *)V3_Malloc(sizeof(struct ramdisk_t));
- V3_ASSERT(ramdisk != NULL);
+ struct ramdisk_t *ramdisk;
+ ramdisk = (struct ramdisk_t *)V3_Malloc(sizeof(struct ramdisk_t));
+ V3_ASSERT(ramdisk != NULL);
- PrintDebug("[create_ramdisk]\n");
+ PrintDebug("[create_ramdisk]\n");
- struct vm_device * device = v3_create_device("RAMDISK", &dev_ops, ramdisk);
+ struct vm_device * device = v3_create_device("RAMDISK", &dev_ops, ramdisk);
- return device;
+ return device;
}
#ifdef DEBUG_RAMDISK
static void rd_print_state(struct ramdisk_t * ramdisk) {
- uchar_t channel;
- uchar_t device;
- struct channel_t * channels = (struct channel_t *)(&(ramdisk->channels));
+ uchar_t channel;
+ uchar_t device;
+ struct channel_t * channels = (struct channel_t *)(&(ramdisk->channels));
- /*
- for (channel = 0; channel < MAX_ATA_CHANNEL; channel++) {
- memset((char *)(channels + channel), 0, sizeof(struct channel_t));
- }
- */
- PrintDebug("sizeof(*channels) = %d\n", sizeof(*channels));
- PrintDebug("sizeof(channles->drives[0].controller) = %d\n", sizeof((channels->drives[0].controller)));
- PrintDebug("sizeof(channles->drives[0].cdrom) = %d\n", sizeof((channels->drives[0].cdrom)));
- PrintDebug("sizeof(channles->drives[0].sense) = %d\n", sizeof((channels->drives[0].sense)));
- PrintDebug("sizeof(channles->drives[0].atapi) = %d\n", sizeof((channels->drives[0].atapi)));
+ /*
+ for (channel = 0; channel < MAX_ATA_CHANNEL; channel++) {
+ memset((char *)(channels + channel), 0, sizeof(struct channel_t));
+ }
+ */
+ PrintDebug("sizeof(*channels) = %d\n", sizeof(*channels));
+ PrintDebug("sizeof(channles->drives[0].controller) = %d\n", sizeof((channels->drives[0].controller)));
+ PrintDebug("sizeof(channles->drives[0].cdrom) = %d\n", sizeof((channels->drives[0].cdrom)));
+ PrintDebug("sizeof(channles->drives[0].sense) = %d\n", sizeof((channels->drives[0].sense)));
+ PrintDebug("sizeof(channles->drives[0].atapi) = %d\n", sizeof((channels->drives[0].atapi)));
- PrintDebug("sizeof(channles->drives[0].controller.status) = %d\n",
- sizeof((channels->drives[0].controller.status)));
- PrintDebug("sizeof(channles->drives[0].controller.sector_count) = %d\n",
- sizeof((channels->drives[0].controller.sector_count)));
- PrintDebug("sizeof(channles->drives[0].controller.interrupt_reason) = %d\n",
- sizeof((channels->drives[0].controller.interrupt_reason)));
+ PrintDebug("sizeof(channles->drives[0].controller.status) = %d\n",
+ sizeof((channels->drives[0].controller.status)));
+ PrintDebug("sizeof(channles->drives[0].controller.sector_count) = %d\n",
+ sizeof((channels->drives[0].controller.sector_count)));
+ PrintDebug("sizeof(channles->drives[0].controller.interrupt_reason) = %d\n",
+ sizeof((channels->drives[0].controller.interrupt_reason)));
- PrintDebug("sizeof(channles->drives[0].controller.cylinder_no) = %d\n",
- sizeof((channels->drives[0].controller.cylinder_no)));
- PrintDebug("sizeof(channles->drives[0].controller.byte_count) = %d\n",
- sizeof((channels->drives[0].controller.byte_count)));
+ PrintDebug("sizeof(channles->drives[0].controller.cylinder_no) = %d\n",
+ sizeof((channels->drives[0].controller.cylinder_no)));
+ PrintDebug("sizeof(channles->drives[0].controller.byte_count) = %d\n",
+ sizeof((channels->drives[0].controller.byte_count)));
- PrintDebug("sizeof(channles->drives[0].controller.control) = %d\n",
- sizeof((channels->drives[0].controller.control)));
+ PrintDebug("sizeof(channles->drives[0].controller.control) = %d\n",
+ sizeof((channels->drives[0].controller.control)));
- for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
+ for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
- for (device = 0; device < 2; device++){
+ for (device = 0; device < 2; device++){
- // Initialize controller state, even if device is not present
- PrintDebug("channels[%d].drives[%d].controller.status.busy = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.busy);
- PrintDebug("channels[%d].drives[%d].controller.status.drive_ready = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.drive_ready);
- PrintDebug("channels[%d].drives[%d].controller.status.write_fault = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.write_fault);
- PrintDebug("channels[%d].drives[%d].controller.status.seek_complete = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.seek_complete);
- PrintDebug("channels[%d].drives[%d].controller.status.drq = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.drq);
- PrintDebug("channels[%d].drives[%d].controller.status.corrected_data = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.corrected_data);
- PrintDebug("channels[%d].drives[%d].controller.status.index_pulse = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.index_pulse);
- PrintDebug("channels[%d].drives[%d].controller.status.index_pulse_count = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.index_pulse_count);
- PrintDebug("channels[%d].drives[%d].controller.status.err = %d\n",
- channel, device,
- channels[channel].drives[device].controller.status.err);
-
-
- PrintDebug("channels[%d].drives[%d].controller.error_register = %d\n",
- channel, device,
- channels[channel].drives[device].controller.error_register);
- PrintDebug("channels[%d].drives[%d].controller.head_no = %d\n",
- channel, device,
- channels[channel].drives[device].controller.head_no);
- PrintDebug("channels[%d].drives[%d].controller.sector_count = %d\n",
- channel, device,
- channels[channel].drives[device].controller.sector_count);
- PrintDebug("channels[%d].drives[%d].controller.sector_no = %d\n",
- channel, device,
- channels[channel].drives[device].controller.sector_no);
- PrintDebug("channels[%d].drives[%d].controller.cylinder_no = %d\n",
- channel, device,
- channels[channel].drives[device].controller.cylinder_no);
- PrintDebug("channels[%d].drives[%d].controller.current_command = %02x\n",
- channel, device,
- channels[channel].drives[device].controller.current_command);
- PrintDebug("channels[%d].drives[%d].controller.buffer_index = %d\n",
- channel, device,
- channels[channel].drives[device].controller.buffer_index);
-
-
- PrintDebug("channels[%d].drives[%d].controller.control.reset = %d\n",
- channel, device,
- channels[channel].drives[device].controller.control.reset);
- PrintDebug("channels[%d].drives[%d].controller.control.disable_irq = %d\n",
- channel, device,
- channels[channel].drives[device].controller.control.disable_irq);
-
-
- PrintDebug("channels[%d].drives[%d].controller.reset_in_progress = %d\n",
- channel, device,
- channels[channel].drives[device].controller.reset_in_progress);
- PrintDebug("channels[%d].drives[%d].controller.sectors_per_block = %02x\n",
- channel, device,
- channels[channel].drives[device].controller.sectors_per_block);
- PrintDebug("channels[%d].drives[%d].controller.lba_mode = %d\n",
- channel, device,
- channels[channel].drives[device].controller.lba_mode);
- PrintDebug("channels[%d].drives[%d].controller.features = %d\n",
- channel, device,
- channels[channel].drives[device].controller.features);
-
-
- PrintDebug("channels[%d].drives[%d].model_no = %s\n",
- channel, device,
- channels[channel].drives[device].model_no);
- PrintDebug("channels[%d].drives[%d].device_type = %d\n",
- channel, device,
- channels[channel].drives[device].device_type);
- PrintDebug("channels[%d].drives[%d].cdrom.locked = %d\n",
- channel, device,
- channels[channel].drives[device].cdrom.locked);
- PrintDebug("channels[%d].drives[%d].sense.sense_key = %d\n",
- channel, device,
- channels[channel].drives[device].sense.sense_key);
- PrintDebug("channels[%d].drives[%d].sense.asc = %d\n",
- channel, device,
- channels[channel].drives[device].sense.asc);
- PrintDebug("channels[%d].drives[%d].sense.ascq = %d\n",
- channel, device,
- channels[channel].drives[device].sense.ascq);
-
-
-
- PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n",
- channel, device,
- channels[channel].drives[device].controller.interrupt_reason.c_d);
-
- PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n",
- channel, device,
- channels[channel].drives[device].controller.interrupt_reason.i_o);
-
- PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n",
- channel, device,
- channels[channel].drives[device].controller.interrupt_reason.rel);
-
- PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n",
- channel, device,
- channels[channel].drives[device].controller.interrupt_reason.tag);
-
- PrintDebug("channels[%d].drives[%d].cdrom.ready = %d\n",
- channel, device,
- channels[channel].drives[device].cdrom.ready);
+ // Initialize controller state, even if device is not present
+ PrintDebug("channels[%d].drives[%d].controller.status.busy = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.busy);
+ PrintDebug("channels[%d].drives[%d].controller.status.drive_ready = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.drive_ready);
+ PrintDebug("channels[%d].drives[%d].controller.status.write_fault = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.write_fault);
+ PrintDebug("channels[%d].drives[%d].controller.status.seek_complete = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.seek_complete);
+ PrintDebug("channels[%d].drives[%d].controller.status.drq = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.drq);
+ PrintDebug("channels[%d].drives[%d].controller.status.corrected_data = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.corrected_data);
+ PrintDebug("channels[%d].drives[%d].controller.status.index_pulse = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.index_pulse);
+ PrintDebug("channels[%d].drives[%d].controller.status.index_pulse_count = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.index_pulse_count);
+ PrintDebug("channels[%d].drives[%d].controller.status.err = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.status.err);
+
+
+ PrintDebug("channels[%d].drives[%d].controller.error_register = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.error_register);
+ PrintDebug("channels[%d].drives[%d].controller.head_no = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.head_no);
+ PrintDebug("channels[%d].drives[%d].controller.sector_count = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.sector_count);
+ PrintDebug("channels[%d].drives[%d].controller.sector_no = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.sector_no);
+ PrintDebug("channels[%d].drives[%d].controller.cylinder_no = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.cylinder_no);
+ PrintDebug("channels[%d].drives[%d].controller.current_command = %02x\n",
+ channel, device,
+ channels[channel].drives[device].controller.current_command);
+ PrintDebug("channels[%d].drives[%d].controller.buffer_index = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.buffer_index);
+
+
+ PrintDebug("channels[%d].drives[%d].controller.control.reset = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.control.reset);
+ PrintDebug("channels[%d].drives[%d].controller.control.disable_irq = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.control.disable_irq);
+
+
+ PrintDebug("channels[%d].drives[%d].controller.reset_in_progress = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.reset_in_progress);
+ PrintDebug("channels[%d].drives[%d].controller.sectors_per_block = %02x\n",
+ channel, device,
+ channels[channel].drives[device].controller.sectors_per_block);
+ PrintDebug("channels[%d].drives[%d].controller.lba_mode = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.lba_mode);
+ PrintDebug("channels[%d].drives[%d].controller.features = %d\n",
+ channel, device,
+ channels[channel].drives[device].controller.features);
+
+
+ PrintDebug("channels[%d].drives[%d].model_no = %s\n",
+ channel, device,
+ channels[channel].drives[device].model_no);
+ PrintDebug("channels[%d].drives[%d].device_type = %d\n",
+ channel, device,
+ channels[channel].drives[device].device_type);
+ PrintDebug("channels[%d].drives[%d].cdrom.locked = %d\n",
+ channel, device,
+ channels[channel].drives[device].cdrom.locked);
+ PrintDebug("channels[%d].drives[%d].sense.sense_key = %d\n",
+ channel, device,
+ channels[channel].drives[device].sense.sense_key);
+ PrintDebug("channels[%d].drives[%d].sense.asc = %d\n",
+ channel, device,
+ channels[channel].drives[device].sense.asc);
+ PrintDebug("channels[%d].drives[%d].sense.ascq = %d\n",
+ channel, device,
+ channels[channel].drives[device].sense.ascq);
+
+
+
+ PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n",
+ channel, device,
+ channels[channel].drives[device].controller.interrupt_reason.c_d);
+
+ PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n",
+ channel, device,
+ channels[channel].drives[device].controller.interrupt_reason.i_o);
+
+ PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n",
+ channel, device,
+ channels[channel].drives[device].controller.interrupt_reason.rel);
+
+ PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n",
+ channel, device,
+ channels[channel].drives[device].controller.interrupt_reason.tag);
+
+ PrintDebug("channels[%d].drives[%d].cdrom.ready = %d\n",
+ channel, device,
+ channels[channel].drives[device].cdrom.ready);
- } //for device
- } //for channel
+ } //for device
+ } //for channel
- return;
+ return;
}
static int check_bit_fields(struct controller_t * controller) {
- //Check bit fields
- controller->sector_count = 0;
- controller->interrupt_reason.c_d = 1;
- if (controller->sector_count != 0x01) {
- return INTR_REASON_BIT_ERR;
- }
+ //Check bit fields
+ controller->sector_count = 0;
+ controller->interrupt_reason.c_d = 1;
+ if (controller->sector_count != 0x01) {
+ return INTR_REASON_BIT_ERR;
+ }
- controller->sector_count = 0;
- controller->interrupt_reason.i_o = 1;
- if (controller->sector_count != 0x02) {
- return INTR_REASON_BIT_ERR;
- }
+ controller->sector_count = 0;
+ controller->interrupt_reason.i_o = 1;
+ if (controller->sector_count != 0x02) {
+ return INTR_REASON_BIT_ERR;
+ }
- controller->sector_count = 0;
- controller->interrupt_reason.rel = 1;
- if (controller->sector_count != 0x04) {
- return INTR_REASON_BIT_ERR;
- }
+ controller->sector_count = 0;
+ controller->interrupt_reason.rel = 1;
+ if (controller->sector_count != 0x04) {
+ return INTR_REASON_BIT_ERR;
+ }
- controller->sector_count = 0;
- controller->interrupt_reason.tag = 3;
- if (controller->sector_count != 0x18) {
- return INTR_REASON_BIT_ERR;
- }
+ controller->sector_count = 0;
+ controller->interrupt_reason.tag = 3;
+ if (controller->sector_count != 0x18) {
+ return INTR_REASON_BIT_ERR;
+ }
- return 0;
+ return 0;
}
#endif
struct irq_enable_reg {
- uint_t erbfi : 1; // Enable Receiver Buffer full interrupt
- uint_t etbei : 1; // Enable Transmit buffer empty interrupt
- uint_t elsi : 1; // Enable Line Status Interrupt
- uint_t edssi : 1; // Enable Delta Status signals interrupt
- uint_t rsvd : 4; // MBZ
+ uint_t erbfi : 1; // Enable Receiver Buffer full interrupt
+ uint_t etbei : 1; // Enable Transmit buffer empty interrupt
+ uint_t elsi : 1; // Enable Line Status Interrupt
+ uint_t edssi : 1; // Enable Delta Status signals interrupt
+ uint_t rsvd : 4; // MBZ
};
#define MODEL_IRQ_DELTA_SET 0x0
struct irq_id_reg {
- uint_t pending : 1; // Interrupt pending (0=interrupt pending)
- uint_t iid : 3; // Interrupt Identification
- uint_t rsvd : 2; // MBZ
- uint_t fifo_en : 2; // FIFO enable
+ uint_t pending : 1; // Interrupt pending (0=interrupt pending)
+ uint_t iid : 3; // Interrupt Identification
+ uint_t rsvd : 2; // MBZ
+ uint_t fifo_en : 2; // FIFO enable
};
struct fifo_ctrl_reg {
- uint_t enable : 1; // enable fifo
- uint_t rfres : 1; // RX FIFO reset
- uint_t xfres : 1; // TX FIFO reset
- uint_t dma_sel : 1; // DMA mode select
- uint_t rsvd : 2; // MBZ
- uint_t rx_trigger: 2; // RX FIFO trigger level select
+ uint_t enable : 1; // enable fifo
+ uint_t rfres : 1; // RX FIFO reset
+ uint_t xfres : 1; // TX FIFO reset
+ uint_t dma_sel : 1; // DMA mode select
+ uint_t rsvd : 2; // MBZ
+ uint_t rx_trigger: 2; // RX FIFO trigger level select
};
struct line_ctrl_reg {
- uint_t word_len : 2; // word length select
- uint_t stop_bits : 1; // Stop Bit select
- uint_t parity_enable : 1; // Enable parity
- uint_t even_sel : 1; // Even Parity Select
- uint_t stick_parity : 1; // Stick Parity Select
- uint_t sbr : 1; // Set Break
- uint_t dlab : 1; // Divisor latch access bit
+ uint_t word_len : 2; // word length select
+ uint_t stop_bits : 1; // Stop Bit select
+ uint_t parity_enable : 1; // Enable parity
+ uint_t even_sel : 1; // Even Parity Select
+ uint_t stick_parity : 1; // Stick Parity Select
+ uint_t sbr : 1; // Set Break
+ uint_t dlab : 1; // Divisor latch access bit
};
struct modem_ctrl_reg {
- uint_t dtr : 1;
- uint_t rts : 1;
- uint_t out1 : 1;
- uint_t out2 : 1;
- uint_t loop : 1; // loopback mode
- uint_t rsvd : 3; // MBZ
+ uint_t dtr : 1;
+ uint_t rts : 1;
+ uint_t out1 : 1;
+ uint_t out2 : 1;
+ uint_t loop : 1; // loopback mode
+ uint_t rsvd : 3; // MBZ
};
struct line_status_reg {
- uint_t rbf : 1; // Receiver Buffer Full
- uint_t oe : 1; // Overrun error
- uint_t pe : 1; // Parity Error
- uint_t fe : 1; // Framing Error
- uint_t brk : 1; // broken line detected
- uint_t thre : 1; // Transmitter holding register empty
- uint_t temt : 1; // Transmitter Empty
- uint_t fifo_err : 1; // at least one error is pending in the RX FIFO chain
+ uint_t rbf : 1; // Receiver Buffer Full
+ uint_t oe : 1; // Overrun error
+ uint_t pe : 1; // Parity Error
+ uint_t fe : 1; // Framing Error
+ uint_t brk : 1; // broken line detected
+ uint_t thre : 1; // Transmitter holding register empty
+ uint_t temt : 1; // Transmitter Empty
+ uint_t fifo_err : 1; // at least one error is pending in the RX FIFO chain
};
struct modem_status_reg {
- uint_t dcts : 1; // Delta Clear To Send
- uint_t ddsr : 1; // Delta Data Set Ready
- uint_t teri : 1; // Trailing Edge Ring Indicator
- uint_t ddcd : 1; // Delta Data Carrier Detect
- uint_t cts : 1; // Clear to Send
- uint_t dsr : 1; // Data Set Ready
- uint_t ri : 1; // Ring Indicator
- uint_t dcd : 1; // Data Carrier Detect
+ uint_t dcts : 1; // Delta Clear To Send
+ uint_t ddsr : 1; // Delta Data Set Ready
+ uint_t teri : 1; // Trailing Edge Ring Indicator
+ uint_t ddcd : 1; // Delta Data Carrier Detect
+ uint_t cts : 1; // Clear to Send
+ uint_t dsr : 1; // Data Set Ready
+ uint_t ri : 1; // Ring Indicator
+ uint_t dcd : 1; // Data Carrier Detect
};
#define SERIAL_BUF_LEN 256
struct serial_buffer {
- uint_t head; // most recent data
- uint_t tail; // oldest char
- char buffer[SERIAL_BUF_LEN];
+ uint_t head; // most recent data
+ uint_t tail; // oldest char
+ char buffer[SERIAL_BUF_LEN];
};
static int queue_data(struct serial_buffer * buf, char data) {
- uint_t next_loc = (buf->head + 1) % SERIAL_BUF_LEN;
+ uint_t next_loc = (buf->head + 1) % SERIAL_BUF_LEN;
- if (next_loc == buf->tail) {
- return -1;
- }
+ if (next_loc == buf->tail) {
+ return -1;
+ }
- buf->buffer[next_loc] = data;
- buf->head = next_loc;
+ buf->buffer[next_loc] = data;
+ buf->head = next_loc;
- return 0;
+ return 0;
}
static int dequeue_data(struct serial_buffer * buf, char * data) {
- uint_t next_tail = (buf->tail + 1) % SERIAL_BUF_LEN;
+ uint_t next_tail = (buf->tail + 1) % SERIAL_BUF_LEN;
- if (buf->head == buf->tail) {
- return -1;
- }
+ if (buf->head == buf->tail) {
+ return -1;
+ }
- *data = buf->buffer[buf->tail];
- buf->tail = next_tail;
+ *data = buf->buffer[buf->tail];
+ buf->tail = next_tail;
- return 0;
+ return 0;
}
struct serial_port {
- char ier;
- char iir;
- char fcr;
- char lcr;
- char mcr;
- char lsr;
- char msr;
-
- struct serial_buffer tx_buffer;
- struct serial_buffer rx_buffer;
+ char ier;
+ char iir;
+ char fcr;
+ char lcr;
+ char mcr;
+ char lsr;
+ char msr;
+
+ struct serial_buffer tx_buffer;
+ struct serial_buffer rx_buffer;
};
struct serial_state {
- struct serial_port com1;
- struct serial_port com2;
- struct serial_port com3;
- struct serial_port com4;
+ struct serial_port com1;
+ struct serial_port com2;
+ struct serial_port com3;
+ struct serial_port com4;
};
static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct serial_state * state = (struct serial_state *)dev->private_data;
- char * val = (char *)src;
- PrintDebug("Write to Data Port 0x%x (val=%x)\n", port, *(char*)src);
+ struct serial_state * state = (struct serial_state *)dev->private_data;
+ char * val = (char *)src;
+ PrintDebug("Write to Data Port 0x%x (val=%x)\n", port, *(char*)src);
- if (length != 1) {
- PrintDebug("Invalid length(%d) in write to 0x%x\n", length, port);
- return -1;
- }
-
- switch (port) {
- case COM1_DATA_PORT:
- queue_data(&(state->com1.tx_buffer), *val);
- break;
- case COM2_DATA_PORT:
- queue_data(&(state->com2.tx_buffer), *val);
- break;
- case COM3_DATA_PORT:
- queue_data(&(state->com3.tx_buffer), *val);
- break;
- case COM4_DATA_PORT:
- queue_data(&(state->com4.tx_buffer), *val);
- break;
- default:
- return -1;
- }
+ if (length != 1) {
+ PrintDebug("Invalid length(%d) in write to 0x%x\n", length, port);
+ return -1;
+ }
+
+ switch (port) {
+ case COM1_DATA_PORT:
+ queue_data(&(state->com1.tx_buffer), *val);
+ break;
+ case COM2_DATA_PORT:
+ queue_data(&(state->com2.tx_buffer), *val);
+ break;
+ case COM3_DATA_PORT:
+ queue_data(&(state->com3.tx_buffer), *val);
+ break;
+ case COM4_DATA_PORT:
+ queue_data(&(state->com4.tx_buffer), *val);
+ break;
+ default:
+ return -1;
+ }
- return length;
+ return length;
}
static int read_data_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct serial_state * state = (struct serial_state *)dev->private_data;
- char * val = (char *)dst;
- PrintDebug("Read from Data Port 0x%x\n", port);
+ struct serial_state * state = (struct serial_state *)dev->private_data;
+ char * val = (char *)dst;
+ PrintDebug("Read from Data Port 0x%x\n", port);
- if (length != 1) {
- PrintDebug("Invalid length(%d) in write to 0x%x\n", length, port);
- return -1;
- }
-
- switch (port) {
- case COM1_DATA_PORT:
- dequeue_data(&(state->com1.tx_buffer), val);
- break;
- case COM2_DATA_PORT:
- dequeue_data(&(state->com2.tx_buffer), val);
- break;
- case COM3_DATA_PORT:
- dequeue_data(&(state->com3.tx_buffer), val);
- break;
- case COM4_DATA_PORT:
- dequeue_data(&(state->com4.tx_buffer), val);
- break;
- default:
- return -1;
- }
+ if (length != 1) {
+ PrintDebug("Invalid length(%d) in write to 0x%x\n", length, port);
+ return -1;
+ }
+
+ switch (port) {
+ case COM1_DATA_PORT:
+ dequeue_data(&(state->com1.tx_buffer), val);
+ break;
+ case COM2_DATA_PORT:
+ dequeue_data(&(state->com2.tx_buffer), val);
+ break;
+ case COM3_DATA_PORT:
+ dequeue_data(&(state->com3.tx_buffer), val);
+ break;
+ case COM4_DATA_PORT:
+ dequeue_data(&(state->com4.tx_buffer), val);
+ break;
+ default:
+ return -1;
+ }
- return length;
+ return length;
}
static int handle_ier_write(struct serial_port * com, struct irq_enable_reg * ier) {
- return -1;
+ return -1;
}
static int write_ctrl_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- struct serial_state * state = (struct serial_state *)dev->private_data;
- char * val = (char *)src;
- PrintDebug("Write to Control Port (val=%x)\n", *(char *)src);
-
- if (length != 1) {
- PrintDebug("Invalid Write length to control port %d\n", port);
- return -1;
- }
+ struct serial_state * state = (struct serial_state *)dev->private_data;
+ char * val = (char *)src;
+ PrintDebug("Write to Control Port (val=%x)\n", *(char *)src);
- switch (port) {
- case COM1_IRQ_ENABLE_PORT:
- if (handle_ier_write(&(state->com1), (struct irq_enable_reg *)val) == -1) {
- return -1;
+ if (length != 1) {
+ PrintDebug("Invalid Write length to control port %d\n", port);
+ return -1;
}
- break;
- case COM2_IRQ_ENABLE_PORT:
- if (handle_ier_write(&(state->com2), (struct irq_enable_reg *)val) == -1) {
- return -1;
- }
- break;
- case COM3_IRQ_ENABLE_PORT:
- if (handle_ier_write(&(state->com3), (struct irq_enable_reg *)val) == -1) {
- return -1;
- }
- break;
- case COM4_IRQ_ENABLE_PORT:
- if (handle_ier_write(&(state->com4), (struct irq_enable_reg *)val) == -1) {
- return -1;
- }
- break;
-
- case COM1_FIFO_CTRL_PORT:
- case COM2_FIFO_CTRL_PORT:
- case COM3_FIFO_CTRL_PORT:
- case COM4_FIFO_CTRL_PORT:
-
- case COM1_LINE_CTRL_PORT:
- case COM2_LINE_CTRL_PORT:
- case COM3_LINE_CTRL_PORT:
- case COM4_LINE_CTRL_PORT:
-
- case COM1_MODEM_CTRL_PORT:
- case COM2_MODEM_CTRL_PORT:
- case COM3_MODEM_CTRL_PORT:
- case COM4_MODEM_CTRL_PORT:
+
+ switch (port) {
+ case COM1_IRQ_ENABLE_PORT:
+ if (handle_ier_write(&(state->com1), (struct irq_enable_reg *)val) == -1) {
+ return -1;
+ }
+ break;
+ case COM2_IRQ_ENABLE_PORT:
+ if (handle_ier_write(&(state->com2), (struct irq_enable_reg *)val) == -1) {
+ return -1;
+ }
+ break;
+ case COM3_IRQ_ENABLE_PORT:
+ if (handle_ier_write(&(state->com3), (struct irq_enable_reg *)val) == -1) {
+ return -1;
+ }
+ break;
+ case COM4_IRQ_ENABLE_PORT:
+ if (handle_ier_write(&(state->com4), (struct irq_enable_reg *)val) == -1) {
+ return -1;
+ }
+ break;
+
+ case COM1_FIFO_CTRL_PORT:
+ case COM2_FIFO_CTRL_PORT:
+ case COM3_FIFO_CTRL_PORT:
+ case COM4_FIFO_CTRL_PORT:
+
+ case COM1_LINE_CTRL_PORT:
+ case COM2_LINE_CTRL_PORT:
+ case COM3_LINE_CTRL_PORT:
+ case COM4_LINE_CTRL_PORT:
+
+ case COM1_MODEM_CTRL_PORT:
+ case COM2_MODEM_CTRL_PORT:
+ case COM3_MODEM_CTRL_PORT:
+ case COM4_MODEM_CTRL_PORT:
- default:
- return -1;
- }
+ default:
+ return -1;
+ }
- return -1;
+ return -1;
}
static int read_ctrl_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct serial_state * state = (struct serial_state *)dev->private_data;
- char * val = (char *)dst;
- PrintDebug("Read from Control Port\n");
+ struct serial_state * state = (struct serial_state *)dev->private_data;
+ char * val = (char *)dst;
+ PrintDebug("Read from Control Port\n");
- if (length != 1) {
- PrintDebug("Invalid Read length to control port\n");
- return -1;
- }
-
- switch (port) {
- case COM1_IRQ_ENABLE_PORT:
- *val = state->com1.ier;
- break;
- case COM2_IRQ_ENABLE_PORT:
- *val = state->com2.ier;
- break;
- case COM3_IRQ_ENABLE_PORT:
- *val = state->com3.ier;
- break;
- case COM4_IRQ_ENABLE_PORT:
- *val = state->com4.ier;
- break;
-
- case COM1_FIFO_CTRL_PORT:
- *val = state->com1.fcr;
- break;
- case COM2_FIFO_CTRL_PORT:
- *val = state->com2.fcr;
- break;
- case COM3_FIFO_CTRL_PORT:
- *val = state->com3.fcr;
- break;
- case COM4_FIFO_CTRL_PORT:
- *val = state->com4.fcr;
- break;
-
- case COM1_LINE_CTRL_PORT:
- *val = state->com1.lcr;
- break;
- case COM2_LINE_CTRL_PORT:
- *val = state->com2.lcr;
- break;
- case COM3_LINE_CTRL_PORT:
- *val = state->com3.lcr;
- break;
- case COM4_LINE_CTRL_PORT:
- *val = state->com4.lcr;
- break;
-
- case COM1_MODEM_CTRL_PORT:
- *val = state->com1.mcr;
- break;
- case COM2_MODEM_CTRL_PORT:
- *val = state->com2.mcr;
- break;
- case COM3_MODEM_CTRL_PORT:
- *val = state->com3.mcr;
- break;
- case COM4_MODEM_CTRL_PORT:
- *val = state->com4.mcr;
- break;
-
- default:
- return -1;
- }
+ if (length != 1) {
+ PrintDebug("Invalid Read length to control port\n");
+ return -1;
+ }
+
+ switch (port) {
+ case COM1_IRQ_ENABLE_PORT:
+ *val = state->com1.ier;
+ break;
+ case COM2_IRQ_ENABLE_PORT:
+ *val = state->com2.ier;
+ break;
+ case COM3_IRQ_ENABLE_PORT:
+ *val = state->com3.ier;
+ break;
+ case COM4_IRQ_ENABLE_PORT:
+ *val = state->com4.ier;
+ break;
+
+ case COM1_FIFO_CTRL_PORT:
+ *val = state->com1.fcr;
+ break;
+ case COM2_FIFO_CTRL_PORT:
+ *val = state->com2.fcr;
+ break;
+ case COM3_FIFO_CTRL_PORT:
+ *val = state->com3.fcr;
+ break;
+ case COM4_FIFO_CTRL_PORT:
+ *val = state->com4.fcr;
+ break;
+
+ case COM1_LINE_CTRL_PORT:
+ *val = state->com1.lcr;
+ break;
+ case COM2_LINE_CTRL_PORT:
+ *val = state->com2.lcr;
+ break;
+ case COM3_LINE_CTRL_PORT:
+ *val = state->com3.lcr;
+ break;
+ case COM4_LINE_CTRL_PORT:
+ *val = state->com4.lcr;
+ break;
+
+ case COM1_MODEM_CTRL_PORT:
+ *val = state->com1.mcr;
+ break;
+ case COM2_MODEM_CTRL_PORT:
+ *val = state->com2.mcr;
+ break;
+ case COM3_MODEM_CTRL_PORT:
+ *val = state->com3.mcr;
+ break;
+ case COM4_MODEM_CTRL_PORT:
+ *val = state->com4.mcr;
+ break;
+
+ default:
+ return -1;
+ }
- return length;
+ return length;
}
static int write_status_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
- PrintDebug("Write to Status Port 0x%x (val=%x)\n", port, *(char *)src);
+ PrintDebug("Write to Status Port 0x%x (val=%x)\n", port, *(char *)src);
- return -1;
+ return -1;
}
static int read_status_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
- struct serial_state * state = (struct serial_state *)dev->private_data;
- char * val = (char *)dst;
- PrintDebug("Read from Status Port 0x%x\n", port);
+ struct serial_state * state = (struct serial_state *)dev->private_data;
+ char * val = (char *)dst;
+ PrintDebug("Read from Status Port 0x%x\n", port);
- if (length != 1) {
- PrintDebug("Invalid Read length to control port\n");
- return -1;
- }
+ if (length != 1) {
+ PrintDebug("Invalid Read length to control port\n");
+ return -1;
+ }
- switch (port) {
- case COM1_LINE_STATUS_PORT:
- *val = state->com1.lsr;
- break;
- case COM2_LINE_STATUS_PORT:
- *val = state->com2.lsr;
- break;
- case COM3_LINE_STATUS_PORT:
- *val = state->com3.lsr;
- break;
- case COM4_LINE_STATUS_PORT:
- *val = state->com4.lsr;
- break;
+ switch (port) {
+ case COM1_LINE_STATUS_PORT:
+ *val = state->com1.lsr;
+ break;
+ case COM2_LINE_STATUS_PORT:
+ *val = state->com2.lsr;
+ break;
+ case COM3_LINE_STATUS_PORT:
+ *val = state->com3.lsr;
+ break;
+ case COM4_LINE_STATUS_PORT:
+ *val = state->com4.lsr;
+ break;
- case COM1_MODEM_STATUS_PORT:
- *val = state->com1.msr;
- break;
- case COM2_MODEM_STATUS_PORT:
- *val = state->com2.msr;
- break;
- case COM3_MODEM_STATUS_PORT:
- *val = state->com3.msr;
- break;
- case COM4_MODEM_STATUS_PORT:
- *val = state->com4.msr;
- break;
-
- default:
- return -1;
- }
+ case COM1_MODEM_STATUS_PORT:
+ *val = state->com1.msr;
+ break;
+ case COM2_MODEM_STATUS_PORT:
+ *val = state->com2.msr;
+ break;
+ case COM3_MODEM_STATUS_PORT:
+ *val = state->com3.msr;
+ break;
+ case COM4_MODEM_STATUS_PORT:
+ *val = state->com4.msr;
+ break;
+
+ default:
+ return -1;
+ }
- return length;
+ return length;
}
static int init_serial_port(struct serial_port * com) {
- //struct irq_enable_reg * ier = (struct irq_enable_reg *)&(com->ier);
- //struct irq_id_reg * iir = (struct irq_id_reg *)&(com->iir);
- //struct fifo_ctrl_reg * fcr = (struct fifo_ctrl_reg *)&(com->fcr);
- //struct line_ctrl_reg * lcr = (struct line_ctrl_reg *)&(com->lcr);
- //struct modem_ctrl_reg * mcr = (struct modem_ctrl_reg *)&(com->mcr);
- //struct line_status_reg * lsr = (struct line_status_reg *)&(com->lsr);
- //struct modem_status_reg * msr = (struct modem_status_reg *)&(com->msr);
-
- com->ier = 0x00;
- com->iir = 0x01;
- com->fcr = 0x00;
- com->lcr = 0x00;
- com->mcr = 0x00;
- com->lsr = 0x60;
- com->msr = 0x00;
-
- return 0;
+ //struct irq_enable_reg * ier = (struct irq_enable_reg *)&(com->ier);
+ //struct irq_id_reg * iir = (struct irq_id_reg *)&(com->iir);
+ //struct fifo_ctrl_reg * fcr = (struct fifo_ctrl_reg *)&(com->fcr);
+ //struct line_ctrl_reg * lcr = (struct line_ctrl_reg *)&(com->lcr);
+ //struct modem_ctrl_reg * mcr = (struct modem_ctrl_reg *)&(com->mcr);
+ //struct line_status_reg * lsr = (struct line_status_reg *)&(com->lsr);
+ //struct modem_status_reg * msr = (struct modem_status_reg *)&(com->msr);
+
+ com->ier = 0x00;
+ com->iir = 0x01;
+ com->fcr = 0x00;
+ com->lcr = 0x00;
+ com->mcr = 0x00;
+ com->lsr = 0x60;
+ com->msr = 0x00;
+
+ return 0;
}
static int serial_init(struct vm_device * dev) {
- struct serial_state * state = (struct serial_state *)dev->private_data;
-
-
- init_serial_port(&(state->com1));
- init_serial_port(&(state->com2));
- init_serial_port(&(state->com3));
- init_serial_port(&(state->com4));
-
- v3_dev_hook_io(dev, COM1_DATA_PORT, &read_data_port, &write_data_port);
- v3_dev_hook_io(dev, COM1_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM1_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM1_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM1_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM1_LINE_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM1_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM1_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
-
- v3_dev_hook_io(dev, COM2_DATA_PORT, &read_data_port, &write_data_port);
- v3_dev_hook_io(dev, COM2_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM2_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM2_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM2_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM2_LINE_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM2_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM2_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
-
- v3_dev_hook_io(dev, COM3_DATA_PORT, &read_data_port, &write_data_port);
- v3_dev_hook_io(dev, COM3_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM3_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM3_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM3_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM3_LINE_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM3_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM3_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
-
- v3_dev_hook_io(dev, COM4_DATA_PORT, &read_data_port, &write_data_port);
- v3_dev_hook_io(dev, COM4_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM4_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM4_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM4_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
- v3_dev_hook_io(dev, COM4_LINE_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM4_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
- v3_dev_hook_io(dev, COM4_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
-
- return 0;
+ struct serial_state * state = (struct serial_state *)dev->private_data;
+
+
+ init_serial_port(&(state->com1));
+ init_serial_port(&(state->com2));
+ init_serial_port(&(state->com3));
+ init_serial_port(&(state->com4));
+
+ v3_dev_hook_io(dev, COM1_DATA_PORT, &read_data_port, &write_data_port);
+ v3_dev_hook_io(dev, COM1_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM1_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM1_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM1_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM1_LINE_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM1_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM1_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
+
+ v3_dev_hook_io(dev, COM2_DATA_PORT, &read_data_port, &write_data_port);
+ v3_dev_hook_io(dev, COM2_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM2_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM2_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM2_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM2_LINE_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM2_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM2_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
+
+ v3_dev_hook_io(dev, COM3_DATA_PORT, &read_data_port, &write_data_port);
+ v3_dev_hook_io(dev, COM3_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM3_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM3_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM3_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM3_LINE_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM3_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM3_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
+
+ v3_dev_hook_io(dev, COM4_DATA_PORT, &read_data_port, &write_data_port);
+ v3_dev_hook_io(dev, COM4_IRQ_ENABLE_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM4_FIFO_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM4_LINE_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM4_MODEM_CTRL_PORT, &read_ctrl_port, &write_ctrl_port);
+ v3_dev_hook_io(dev, COM4_LINE_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM4_MODEM_STATUS_PORT, &read_status_port, &write_status_port);
+ v3_dev_hook_io(dev, COM4_SCRATCH_PORT, &read_ctrl_port, &write_ctrl_port);
+
+ return 0;
}
static int serial_deinit(struct vm_device * dev) {
- v3_dev_unhook_io(dev, COM1_DATA_PORT);
- v3_dev_unhook_io(dev, COM1_IRQ_ENABLE_PORT);
- v3_dev_unhook_io(dev, COM1_FIFO_CTRL_PORT);
- v3_dev_unhook_io(dev, COM1_LINE_CTRL_PORT);
- v3_dev_unhook_io(dev, COM1_MODEM_CTRL_PORT);
- v3_dev_unhook_io(dev, COM1_LINE_STATUS_PORT);
- v3_dev_unhook_io(dev, COM1_MODEM_STATUS_PORT);
- v3_dev_unhook_io(dev, COM1_SCRATCH_PORT);
-
- v3_dev_unhook_io(dev, COM2_DATA_PORT);
- v3_dev_unhook_io(dev, COM2_IRQ_ENABLE_PORT);
- v3_dev_unhook_io(dev, COM2_FIFO_CTRL_PORT);
- v3_dev_unhook_io(dev, COM2_LINE_CTRL_PORT);
- v3_dev_unhook_io(dev, COM2_MODEM_CTRL_PORT);
- v3_dev_unhook_io(dev, COM2_LINE_STATUS_PORT);
- v3_dev_unhook_io(dev, COM2_MODEM_STATUS_PORT);
- v3_dev_unhook_io(dev, COM2_SCRATCH_PORT);
-
- v3_dev_unhook_io(dev, COM3_DATA_PORT);
- v3_dev_unhook_io(dev, COM3_IRQ_ENABLE_PORT);
- v3_dev_unhook_io(dev, COM3_FIFO_CTRL_PORT);
- v3_dev_unhook_io(dev, COM3_LINE_CTRL_PORT);
- v3_dev_unhook_io(dev, COM3_MODEM_CTRL_PORT);
- v3_dev_unhook_io(dev, COM3_LINE_STATUS_PORT);
- v3_dev_unhook_io(dev, COM3_MODEM_STATUS_PORT);
- v3_dev_unhook_io(dev, COM3_SCRATCH_PORT);
-
- v3_dev_unhook_io(dev, COM4_DATA_PORT);
- v3_dev_unhook_io(dev, COM4_IRQ_ENABLE_PORT);
- v3_dev_unhook_io(dev, COM4_FIFO_CTRL_PORT);
- v3_dev_unhook_io(dev, COM4_LINE_CTRL_PORT);
- v3_dev_unhook_io(dev, COM4_MODEM_CTRL_PORT);
- v3_dev_unhook_io(dev, COM4_LINE_STATUS_PORT);
- v3_dev_unhook_io(dev, COM4_MODEM_STATUS_PORT);
- v3_dev_unhook_io(dev, COM4_SCRATCH_PORT);
-
- return 0;
+ v3_dev_unhook_io(dev, COM1_DATA_PORT);
+ v3_dev_unhook_io(dev, COM1_IRQ_ENABLE_PORT);
+ v3_dev_unhook_io(dev, COM1_FIFO_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM1_LINE_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM1_MODEM_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM1_LINE_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM1_MODEM_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM1_SCRATCH_PORT);
+
+ v3_dev_unhook_io(dev, COM2_DATA_PORT);
+ v3_dev_unhook_io(dev, COM2_IRQ_ENABLE_PORT);
+ v3_dev_unhook_io(dev, COM2_FIFO_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM2_LINE_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM2_MODEM_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM2_LINE_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM2_MODEM_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM2_SCRATCH_PORT);
+
+ v3_dev_unhook_io(dev, COM3_DATA_PORT);
+ v3_dev_unhook_io(dev, COM3_IRQ_ENABLE_PORT);
+ v3_dev_unhook_io(dev, COM3_FIFO_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM3_LINE_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM3_MODEM_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM3_LINE_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM3_MODEM_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM3_SCRATCH_PORT);
+
+ v3_dev_unhook_io(dev, COM4_DATA_PORT);
+ v3_dev_unhook_io(dev, COM4_IRQ_ENABLE_PORT);
+ v3_dev_unhook_io(dev, COM4_FIFO_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM4_LINE_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM4_MODEM_CTRL_PORT);
+ v3_dev_unhook_io(dev, COM4_LINE_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM4_MODEM_STATUS_PORT);
+ v3_dev_unhook_io(dev, COM4_SCRATCH_PORT);
+
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = serial_init,
- .deinit = serial_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = serial_init,
+ .deinit = serial_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_serial(int num_ports) {
- struct serial_state * state = NULL;
- state = (struct serial_state *)V3_Malloc(sizeof(struct serial_state));
- V3_ASSERT(state != NULL);
+ struct serial_state * state = NULL;
+ state = (struct serial_state *)V3_Malloc(sizeof(struct serial_state));
+ V3_ASSERT(state != NULL);
- struct vm_device * device = v3_create_device("Serial UART", &dev_ops, state);
+ struct vm_device * device = v3_create_device("Serial UART", &dev_ops, state);
- return device;
+ return device;
}
#include <palacios/vmm.h>
struct pic_internal {
- int pending_irq;
+ int pending_irq;
};
static int pic_intr_pending(void * private_data) {
- struct pic_internal * data = (struct pic_internal *)private_data;
+ struct pic_internal * data = (struct pic_internal *)private_data;
- return (data->pending_irq > 0);
+ return (data->pending_irq > 0);
}
static int pic_raise_intr(void * private_data, int irq) {
- struct pic_internal * data = (struct pic_internal *)private_data;
+ struct pic_internal * data = (struct pic_internal *)private_data;
- data->pending_irq = irq;
+ data->pending_irq = irq;
- return 0;
+ return 0;
}
static int pic_get_intr_number(void * private_data) {
- struct pic_internal * data = (struct pic_internal *)private_data;
+ struct pic_internal * data = (struct pic_internal *)private_data;
- return data->pending_irq;
+ return data->pending_irq;
}
static struct intr_ctrl_ops intr_ops = {
- .intr_pending = pic_intr_pending,
- .get_intr_number = pic_get_intr_number,
- .raise_intr = pic_raise_intr
+ .intr_pending = pic_intr_pending,
+ .get_intr_number = pic_get_intr_number,
+ .raise_intr = pic_raise_intr
};
static int pic_init_device(struct vm_device * dev) {
- struct pic_internal * data = (struct pic_internal *)dev->private_data;
- v3_register_intr_controller(dev->vm, &intr_ops, data);
- data->pending_irq = 0;
+ struct pic_internal * data = (struct pic_internal *)dev->private_data;
+ v3_register_intr_controller(dev->vm, &intr_ops, data);
+ data->pending_irq = 0;
- return 0;
+ return 0;
}
static int pic_deinit_device(struct vm_device * dev) {
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = pic_init_device,
- .deinit = pic_deinit_device,
- .reset = NULL,
- .start = NULL,
- .stop = NULL
+ .init = pic_init_device,
+ .deinit = pic_deinit_device,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL
};
struct vm_device * v3_create_simple_pic() {
- struct pic_internal * state = NULL;
- state = (struct pic_internal *)V3_Malloc(sizeof(struct pic_internal));
- V3_ASSERT(state != NULL);
+ struct pic_internal * state = NULL;
+ state = (struct pic_internal *)V3_Malloc(sizeof(struct pic_internal));
+ V3_ASSERT(state != NULL);
- struct vm_device * pic_dev = v3_create_device("Simple Pic", &dev_ops, state);
+ struct vm_device * pic_dev = v3_create_device("Simple Pic", &dev_ops, state);
- return pic_dev;
+ return pic_dev;
}
#define TIMER_IRQ 32
struct timer_state {
- int foo;
+ int foo;
};
/*
-static int irq_handler(uint_t irq, struct vm_device * dev) {
+ static int irq_handler(uint_t irq, struct vm_device * dev) {
PrintDebug("Timer interrupt\n");
return 0;
-}
+ }
*/
static int timer_init(struct vm_device * dev) {
- //dev_hook_irq(dev, TIMER_IRQ, &irq_handler);
+ //dev_hook_irq(dev, TIMER_IRQ, &irq_handler);
- return 0;
+ return 0;
}
static int timer_deinit(struct vm_device * dev) {
- return 0;
+ return 0;
}
static struct vm_device_ops dev_ops = {
- .init = timer_init,
- .deinit = timer_deinit,
- .reset = NULL,
- .start = NULL,
- .stop = NULL,
+ .init = timer_init,
+ .deinit = timer_deinit,
+ .reset = NULL,
+ .start = NULL,
+ .stop = NULL,
};
struct vm_device * v3_create_timer() {
- struct timer_state * timer = NULL;
- timer = (struct timer_state *)V3_Malloc( sizeof(struct timer_state));
- V3_ASSERT(timer != NULL);
+ struct timer_state * timer = NULL;
+ timer = (struct timer_state *)V3_Malloc( sizeof(struct timer_state));
+ V3_ASSERT(timer != NULL);
- struct vm_device * dev = v3_create_device("Timer", &dev_ops, timer);
+ struct vm_device * dev = v3_create_device("Timer", &dev_ops, timer);
- return dev;
+ return dev;
}
--- /dev/null
+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
+ * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Lei Xia <lxia@northwestern.edu>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+/*
+* Virtual NE2K Network Card
+*/
+
+
+
+
+#include <devices/vnic.h>
+#include <palacios/vmm.h>
+#include <palacios/vmm_types.h>
+#include <palacios/vmm_io.h>
+#include <palacios/vmm_debug.h>
+
+#define DEBUG_NIC
+
+#ifndef DEBUG_NIC
+#undef PrintDebug()
+#define PrintDebug(fmts, args...)
+#endif
+
+typedef enum {NIC_READY, NIC_REG_POSTED} nic_state_t;
+
+struct nic_regs {
+ uchar_t cmd;
+ uchar_t pgstart;
+ uchar_t pgstop;
+ ushort_t clda;
+ uchar_t boundary;
+ uchar_t tsr;
+ uchar_t tpsr;
+ uchar_t ncr;
+ ushort_t tbcr;
+ uchar_t fifo;
+ uchar_t isr;
+ ushort_t crda;
+ ushort_t rsar;
+ ushort_t rbcr;
+ uchar_t rsr;
+ uchar_t rcr;
+ uint32_t cntr;
+ uchar_t tcr;
+ uchar_t dcr;
+ uchar_t imr;
+
+ uchar_t phys[6]; //mac address
+ uchar_t curpag;
+ uchar_t mult[8]; //multicast mask array
+ uchar_t rnpp;
+ uchar_t lnpp;
+ ushort_t addcnt;
+
+ uchar_t macaddr[6];
+};
+
+struct nic_context{
+ struct guest_info *vm;
+
+ nic_state_t dev_state;
+
+ struct nic_regs regs;
+
+ uchar_t mac[6]; //the mac address of this nic
+
+ uchar_t mem[NE2K_MEM_SIZE];
+};
+
+struct vm_device *current_vnic;
+
+#define compare_mac(src, dst) ({ \
+ ( (src[0] == dst[0]) && \
+ (src[1] == dst[1]) && \
+ (src[2] == dst[2]) && \
+ (src[3] == dst[3]) && \
+ (src[4] == dst[4]) && \
+ (src[5] == dst[5]) ) ? 1 : 0; \
+ })
+
+
+
+
+static int vnic_mem_write(struct nic_context * nic_state,
+ uint32_t addr,
+ void * src, uint_t length) {
+
+ PrintDebug("wmem addr: %x val: %x\n", addr, val);
+
+ if ((addr < NE2K_PMEM_START) || (addr > NE2K_MEM_SIZE))
+
+ switch (length) {
+ case 1: {
+ uchar_t val = *(uchar_t *)src;
+
+ }
+ case 2:
+ case 4:
+ }
+
+}
+
+
+static void vnic_mem_writeb(struct nic_context * nic_state,
+ uint32_t addr,
+ uint32_t val) {
+ uchar_t tmp = (uchar_t) (val & 0x000000ff);
+
+ if ( (addr < 32) ||
+ ((addr >= NE2K_PMEM_START && addr) < NE2K_MEM_SIZE) ) {
+ nic_state->mem[addr] = tmp;
+ }
+
+ PrintDebug("wmem addr: %x val: %x\n", addr, val);
+}
+
+static void vnic_mem_writew(struct nic_context * nic_state,
+ uint32_t addr,
+ uint32_t val) {
+
+ addr &= ~1; //XXX: check exact behaviour if not even
+
+ if ( (addr < 32) ||
+ ((addr >= NE2K_PMEM_START && addr) < NE2K_MEM_SIZE)) {
+ *(ushort_t *)(nic_state->mem + addr) = cpu2le16(val);
+ }
+
+ PrintDebug("wmem addr: %x val: %x\n", addr, val);
+}
+
+static void vnic_mem_writel(struct nic_context * nic_state,
+ uint32_t addr,
+ uint32_t val) {
+ addr &= ~1; // XXX: check exact behaviour if not even
+
+ if ( (addr < 32) ||
+ ( (addr >= NE2K_PMEM_START) && (addr < NE2K_MEM_SIZE) ) ) {
+ *(uint32_t *)(nic_state->mem + addr) = cpu2le32(val);
+ }
+
+ PrintDebug("wmem addr: %x val: %x\n", addr, val);
+}
+
+static uchar_t vnic_mem_readb(struct nic_context * nic_state, uint32_t addr) {
+ PrintDebug("rmem addr: %x\n", addr);
+
+ if ( (addr < 32) ||
+ ( (addr >= NE2K_PMEM_START) && (addr < NE2K_MEM_SIZE)) ) {
+ return nic_state->mem[addr];
+ } else {
+ return 0xff;
+ }
+}
+
+static ushort_t vnic_mem_readw(struct nic_context * nic_state, uint32_t addr) {
+ PrintDebug("rmem addr: %x\n", addr);
+
+ addr &= ~1; //XXX: check exact behaviour if not even
+
+ if ( (addr < 32) ||
+ ( (addr >= NE2K_PMEM_START) && (addr < NE2K_MEM_SIZE))) {
+ return (ushort_t)le16_to_cpu((ushort_t *)(nic_state->mem + addr));
+ } else {
+ return 0xffff;
+ }
+}
+
+static uint32_t vnic_mem_readl(struct nic_context * nic_state, uint32_t addr) {
+ PrintDebug("rmem addr: %x\n", addr);
+
+ addr &= ~1; //XXX: check exact behaviour if not even
+
+ if ( (addr < 32) ||
+ ( (addr >= NE2K_PMEM_START && addr < NE2K_MEM_SIZE))) {
+ return (uint32_t)le32_to_cpu((uint32_t *)(nic_state->mem + addr));
+ } else {
+ return 0xffffffff;
+ }
+}
+
+
+
+
+static void dump_state(struct vm_device * dev) {
+ int i = 0;
+ uchar_t * p = NULL;
+ struct nic_context * nic_state = (struct nic_context *)dev->private_data;
+
+ PrintDebug("====VNIC: Dumping state Begin ==========\n");
+ PrintDebug("Registers:\n");
+
+ p = (uchar_t *)&nic_state->regs;
+
+ for (i = 0; i < sizeof(struct nic_regs); i++) {
+ PrintDebug("Regs[i] = 0x%2x\n", (int)p[i]);
+ }
+
+ PrintDebug("Memory:\n");
+
+ for (i = 0; i < 32; i++) {
+ PrintDebug("0x%02x ", nic_state->mem[i]);
+ }
+
+ PrintDebug("\n");
+ PrintDebug("====VNIC: Dumping state End==========\n");
+}
+
+static void vnic_update_irq(struct vm_device * dev) {
+ struct nic_context * nic_state = (struct nic_context *)dev->private_data;
+ struct guest_info * guest = dev->vm;
+
+ int isr = ((nic_state->regs.isr & nic_state->regs.imr) & 0x7f);
+
+ if ((isr & 0x7f) != 0x0) {
+ v3_raise_irq(guest, NIC_IRQ);
+ PrintDebug("VNIC: RaiseIrq: isr: 0x%02x imr: 0x%02x\n", nic_state->regs.isr, nic_state->regs.imr);
+ }
+}
+
+static void init_vnic_context(struct vm_device * dev) {
+ struct nic_context *nic_state = (struct nic_context *)dev->private_data;
+ int i;
+ uchar_t mac[6] = {0x52, 0x54, 0x0, 0x12, 0x34, 0x56};
+
+ nic_state->vm = dev->vm;
+
+ nic_state->regs.isr = ENISR_RESET;
+ nic_state->regs.imr = 0x00;
+ nic_state->regs.cmd = 0x22;
+
+ for (i = 0; i < 6; i++) {
+ nic_state->regs.macaddr[i] = nic_state->mac[i] = mac[i];
+ }
+
+ for (i = 0; i < 8; i++) {
+ nic_state->regs.mult[i] = 0xff;
+ }
+
+ for(i = 0; i < 32; i++) {
+ nic_state->mem[i] = 0xff;
+ }
+
+ memcpy(nic_state->mem, nic_state->mac, 6);
+ nic_state->mem[14] = 0x57;
+ nic_state->mem[15] = 0x57;
+
+ dump_state(dev);
+}
+
+
+static int vnic_send_packet(struct vm_device *dev, uchar_t *pkt, int length) {
+ int i;
+
+ PrintDebug("\nVNIC: Sending Packet\n");
+
+ for (i = 0; i<length; i++) {
+ PrintDebug("%x ",pkt[i]);
+ }
+
+ PrintDebug("\n");
+
+ return V3_SEND_PKT(pkt, length);
+}
+
+
+struct vm_device * get_rx_dev(uchar_t * dst_mac) {
+ struct nic_context * nic_state = (struct nic_context *)current_vnic->private_data;
+ struct nic_regs * nregs = &(nic_state->regs);
+
+ static const uchar_t brocast_mac[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+ if (nregs->rcr & 0x10) {
+ // promiscuous model
+ } else {
+ if (compare_mac(dst_mac, brocast_mac)) { //broadcast address
+ if (!(nregs->rcr & 0x04)) {
+ return NULL;
+ }
+ } else if (dst_mac[0] & 0x01) {
+ // multicast packet, not fully done here
+ // ==========
+ if (!(nregs->rcr & 0x08)) {
+ return NULL;
+ }
+ } else if (!compare_mac(dst_mac, nic_state->mac)) {
+ return NULL;
+ } else {
+ // TODO: ELSE??
+ }
+ }
+
+ return current_vnic;
+}
+
+static int vnic_rxbuf_full(struct vm_device * dev) {
+ int empty, index, boundary;
+ struct nic_context * nic_state = (struct nic_context *)dev->private_data;
+
+ index = nic_state->regs.curpag << 8;
+ boundary = nic_state->regs.boundary << 8;
+ if (index < boundary) {
+ empty = boundary - index;
+ } else {
+ empty = ((nic_state->regs.pgstop - nic_state->regs.pgstart) << 8) - (index - boundary);
+ }
+
+ if (empty < (MAX_ETH_FRAME_SIZE + 4)) {
+ return 1;
+ }
+
+ return 0;
+}
+
+#define MIN_BUF_SIZE 60
+
+static void vnic_receive(struct vm_device * dev, const uchar_t * pkt, int length) {
+ struct nic_context * nic_state = (struct nic_context *)dev->private_data;
+ struct nic_regs * nregs = &(nic_state->regs);
+
+ uchar_t * p = NULL;
+ uint32_t total_len = 0;
+ uint32_t next = 0;
+ uint32_t len = 0;
+ uint32_t index = 0;
+ uint32_t empty = 0;
+ uchar_t buf[60];
+ uint32_t start = nregs->pgstart << 8;
+ uint32_t stop = nregs->pgstop << 8;
+
+ //PrintDebug("VNIC: received packet, len=%d\n", length);
+
+ if (nregs->cmd & NE2K_STOP) {
+ return;
+ }
+
+ if (vnic_rxbuf_full(dev)){
+ PrintDebug("VNIC: received buffer overflow\n");
+ return;
+ }
+
+ // if too small buffer, expand it
+ if (length < MIN_BUF_SIZE) {
+ memcpy(buf, pkt, length);
+ memset(buf + length, 0, MIN_BUF_SIZE - length);
+
+ pkt = buf;
+
+ length = MIN_BUF_SIZE;
+ }
+
+ index = nregs->curpag << 8;
+
+ // 4 bytes header
+ total_len = length + 4;
+
+ // address for next packet (4 bytes for CRC)
+ next = index + ((total_len + 4 + 255) & ~0xff);
+
+ if (next >= stop) {
+ next -= stop - start;
+ }
+
+ p = nic_state->mem + index;
+ nregs->rsr = ENRSR_RXOK;
+
+ if (pkt[0] & 0x01) {
+ nregs->rsr |= ENRSR_PHY;
+ }
+
+ p[0] = nregs->rsr;
+ p[1] = next >> 8;
+ p[2] = total_len;
+ p[3] = total_len >> 8;
+
+ index += 4;
+
+ while (length > 0) {
+ if (index <= stop) {
+ empty = stop - index;
+ } else {
+ empty = 0;
+ }
+
+ len = length;
+
+ if (len > empty) {
+ len = empty;
+ }
+
+ memcpy(nic_state->mem + index, pkt, len);
+ pkt += len;
+ index += len;
+
+ if (index == stop) {
+ index = start;
+ }
+
+ length -= len;
+ }
+
+ nregs->curpag = next >> 8;
+
+ nregs->isr |= ENISR_RX;
+ vnic_update_irq(dev);
+}
+
+// =====begin here
+#if 0
+void pci_vnic_init(PCIBus * bus, NICInfo * nd, int devfn)
+{
+ PCINE2000State * d = NULL;
+ NE2000State * s = NULL;
+ uint8_t * pci_conf = NULL;
+ struct pci_device * pdev = pci_register_device(bus,
+ "NE2000", sizeof(PCINE2000State),
+ devfn,
+ NULL, NULL);
+ pci_conf = d->dev.config;
+
+ pci_conf[0x00] = 0xec; // Realtek 8029
+ pci_conf[0x01] = 0x10;
+ pci_conf[0x02] = 0x29;
+ pci_conf[0x03] = 0x80;
+ pci_conf[0x0a] = 0x00; // ethernet network controller
+ pci_conf[0x0b] = 0x02;
+ pci_conf[0x0e] = 0x00; // header_type
+ pci_conf[0x3d] = 1; // interrupt pin 0
+
+ pci_register_io_region(&d->dev, 0, 0x100,
+ PCI_ADDRESS_SPACE_IO, ne2000_map);
+ s = &d->ne2000;
+
+ s->irq = d->dev.irq[0];
+
+ s->pci_dev = (PCIDevice *)d;
+
+ memcpy(s->macaddr, nd->macaddr, 6);
+
+ ne2000_reset(s);
+
+ s->vc = qemu_new_vlan_client(nd->vlan, ne2000_receive,
+ ne2000_can_receive, s);
+
+ snprintf(s->vc->info_str, sizeof(s->vc->info_str),
+ "ne2000 pci macaddr=%02x:%02x:%02x:%02x:%02x:%02x",
+ s->macaddr[0],
+ s->macaddr[1],
+ s->macaddr[2],
+ s->macaddr[3],
+ s->macaddr[4],
+ s->macaddr[5]);
+
+ /* XXX: instance number ? */
+ register_savevm("ne2000", 0, 3, ne2000_save, ne2000_load, s);
+}
+#endif
+//End Here====================================
+
+static int netif_input(uchar_t * pkt, uint_t size) {
+ uint_t i;
+ struct vm_device * dev = NULL;
+
+ PrintDebug("\nVNIC: Packet Received:\nSource:");
+
+ for (i = 6; i < 12; i++) {
+ PrintDebug("%x ", pkt[i]);
+ }
+
+ dev = get_rx_dev(pkt);
+
+ if (dev == NULL) {
+ return 0;
+ }
+ PrintDebug("\n");
+
+ for(i = 0; i < size; i++) {
+ PrintDebug("%x ", pkt[i]);
+ }
+
+ vnic_receive(dev, pkt, size);
+
+ return 0;
+}
+
+
+static int vnic_ioport_write(ushort_t port,
+ void * src,
+ uint_t length,
+ struct vm_device * dev) {
+ uchar_t page = 0;
+ struct nic_context *nic_state = (struct nic_context* )dev->private_data;
+ uchar_t val = 0;
+ int index;
+
+ if (length == 1) {
+ memcpy(&val, src, 1);
+ } else {
+ PrintDebug("vnic_write error: length %d\n", length);
+ return length;
+ }
+
+ port &= 0x1f;
+
+ PrintDebug("vnic_write: port:0x%x (%u bytes): 0x%x\n", port, length, (int)val);
+
+ if (port == EN0_COMMAND) {
+ nic_state->regs.cmd = val;
+
+ if (!(val & NE2K_STOP)) {
+ nic_state->regs.isr &= ~ENISR_RESET;
+
+ if ((val & (NE2K_DMAREAD | NE2K_DMAWRITE)) &&
+ nic_state->regs.rbcr == 0) {
+ nic_state->regs.isr |= ENISR_RDC;
+ vnic_update_irq(dev);
+ }
+
+
+ if (val & NE2K_TRANSMIT) {
+ index = (nic_state->regs.tpsr << 8);
+
+ if (index >= NE2K_PMEM_END) {
+ index -= NE2K_PMEM_SIZE;
+ }
+
+ if (index + nic_state->regs.tbcr <= NE2K_PMEM_END) {
+ vnic_send_packet(dev, nic_state->mem + index, nic_state->regs.tbcr);
+ }
+
+ nic_state->regs.tsr = ENTSR_PTX;
+ nic_state->regs.isr |= ENISR_TX;
+ nic_state->regs.cmd &= ~NE2K_TRANSMIT;
+
+ vnic_update_irq(dev);
+ }
+ }
+
+ } else {
+ page = nic_state->regs.cmd >> 6;
+
+ if (page == 0){
+
+ switch(port) {
+ case EN0_STARTPG:
+ nic_state->regs.pgstart = val;
+ break;
+ case EN0_STOPPG:
+ nic_state->regs.pgstop = val;
+ break;
+ case EN0_BOUNDARY:
+ nic_state->regs.boundary = val;
+ break;
+ case EN0_TPSR:
+ nic_state->regs.tpsr = val;
+ break;
+ case EN0_TCNTLO:
+ nic_state->regs.tbcr = (nic_state->regs.tbcr & 0xff00) | val;
+ break;
+ case EN0_TCNTHI:
+ nic_state->regs.tbcr = (nic_state->regs.tbcr & 0x00ff) | (val << 8);
+ break;
+ case EN0_ISR:
+ nic_state->regs.isr &= ~(val & 0x7f);
+ vnic_update_irq(dev);
+ break;
+ case EN0_RSARLO:
+ nic_state->regs.rsar = (nic_state->regs.rsar & 0xff00) | val;
+ break;
+ case EN0_RSARHI:
+ nic_state->regs.rsar = (nic_state->regs.rsar & 0x00ff) | (val << 8);
+ break;
+ case EN0_RCNTLO:
+ nic_state->regs.rbcr = (nic_state->regs.rbcr & 0xff00) | val;
+ break;
+ case EN0_RCNTHI:
+ nic_state->regs.rbcr = (nic_state->regs.rbcr & 0x00ff) | (val << 8);
+ break;
+ case EN0_RXCR:
+ nic_state->regs.rcr = val;
+ break;
+ case EN0_TXCR:
+ nic_state->regs.tcr = val;
+ case EN0_DCFG:
+ nic_state->regs.dcr = val;
+ break;
+ case EN0_IMR:
+ nic_state->regs.imr = val;
+ vnic_update_irq(dev);
+ break;
+ default:
+ PrintDebug("vnic_write error: invalid port:0x%x\n", port);
+ break;
+ }
+ }
+
+
+ if (page == 1) {
+
+ switch(port) {
+ case EN1_PHYS ... EN1_PHYS + 5:
+ nic_state->regs.phys[port - EN1_PHYS] = val;
+ break;
+ case EN1_CURPAG:
+ nic_state->regs.curpag = val;
+ break;
+ case EN1_MULT ... EN1_MULT + 7:
+ nic_state->regs.mult[port - EN1_MULT] = val;
+ break;
+ default:
+ PrintDebug("vnic_write error: invalid port:0x%x\n", port);
+ break;
+ }
+ }
+
+
+ if (page == 2) {
+
+ switch(port) {
+ case EN2_LDMA0:
+ nic_state->regs.clda = (nic_state->regs.clda & 0xff00) | val;
+ break;
+ case EN2_LDMA1:
+ nic_state->regs.clda = (nic_state->regs.clda & 0x00ff) | (val << 8);
+ break;
+ case EN2_RNPR:
+ nic_state->regs.rnpp = val;
+ break;
+ case EN2_LNRP:
+ nic_state->regs.lnpp = val;
+ break;
+ case EN2_ACNT0:
+ nic_state->regs.addcnt = (nic_state->regs.addcnt & 0xff00) | val;
+ break;
+ case EN2_ACNT1:
+ nic_state->regs.addcnt = (nic_state->regs.addcnt & 0x00ff) | (val << 8);
+ break;
+ default:
+ PrintDebug("vnic_write error: invalid port:0x%x\n", port);
+ break;
+ }
+ }
+ }
+
+ //dump_state(dev);
+
+ return length;
+
+}
+
+static int vnic_ioport_read(ushort_t port, void * dst, uint_t length, struct vm_device *dev) {
+ uchar_t page = 0;
+ int val = 0;
+
+ struct nic_context *nic_state = (struct nic_context* )dev->private_data;
+
+ if (length > 1) {
+ PrintDebug("vnic_read error: length %d\n", length);
+ valurn length;
+ }
+
+ port &= 0x1f;
+
+ if (port == EN0_COMMAND) {
+ val = nic_state->regs.cmd;
+ } else {
+ page = nic_state->regs.cmd >> 6;
+
+ if (page == 0) {
+
+ switch (port) {
+ case EN0_CLDALO:
+ val = nic_state->regs.clda & 0x00ff;
+ break;
+ case EN0_CLDAHI:
+ val = (nic_state->regs.clda & 0xff00) >> 8;
+ break;
+ case EN0_BOUNDARY:
+ val = nic_state->regs.boundary;
+ break;
+ case EN0_TSR:
+ val = nic_state->regs.tsr;
+ break;
+ case EN0_NCR:
+ val = nic_state->regs.ncr;
+ break;
+ case EN0_FIFO:
+ val = nic_state->regs.fifo;
+ break;
+ case EN0_ISR:
+ val = nic_state->regs.isr;
+ vnic_update_irq(dev);
+ break;
+ case EN0_CRDALO:
+ val = nic_state->regs.crda & 0x00ff;
+ break;
+ case EN0_CRDAHI:
+ val = (nic_state->regs.crda & 0xff00) >> 8;
+ break;
+ case EN0_RSR:
+ val = nic_state->regs.rsr;
+ break;
+ case EN0_COUNTER0:
+ val = nic_state->regs.cntr & 0x000000ff;
+ break;
+ case EN0_COUNTER1:
+ val = (nic_state->regs.cntr & 0x0000ff00) >> 8;
+ break;
+ case EN0_COUNTER2:
+ val = (nic_state->regs.cntr & 0x00ff0000) >> 16;
+ break;
+ default:
+ PrintDebug("vnic_read error: invalid port:0x%x\n", port);
+ val = 0x00;
+ break;
+ }
+
+ } else if (page == 1) {
+
+ switch(port) {
+ case EN1_PHYS ... EN1_PHYS + 5:
+ val = nic_state->regs.phys[port - EN1_PHYS];
+ break;
+ case EN1_CURPAG:
+ val = nic_state->regs.curpag;
+ break;
+ case EN1_MULT ... EN1_MULT + 7:
+ val = nic_state->regs.mult[port - EN1_MULT];
+ break;
+ default:
+ PrintDebug("vnic_read error: invalid port:0x%x\n", port);
+ val = 0x00;
+ break;
+ }
+
+ } else if (page == 2) {
+
+ switch(port) {
+ case EN2_STARTPG:
+ val = nic_state->regs.pgstart;
+ break;
+ case EN2_STOPPG:
+ val = nic_state->regs.pgstop;
+ break;
+ case EN2_RNPR:
+ val = nic_state->regs.rnpp;
+ break;
+ case EN2_LNRP:
+ val = nic_state->regs.lnpp;
+ break;
+ case EN2_TPSR:
+ val = nic_state->regs.tpsr;
+ break;
+ case EN2_ACNT0:
+ val = nic_state->regs.addcnt & 0x00ff;
+ break;
+ case EN2_ACNT1:
+ val = (nic_state->regs.addcnt & 0xff00) >> 8;
+ break;
+ case EN2_RCR:
+ val = nic_state->regs.rcr;
+ break;
+ case EN2_TCR:
+ val = nic_state->regs.tcr;
+ break;
+ case EN2_DCR:
+ val = nic_state->regs.dcr;
+ break;
+ case EN2_IMR:
+ val = nic_state->regs.imr;
+ break;
+ default:
+ PrintDebug("vnic_read error: invalid port:0x%x\n", port);
+ val = 0x00;
+ break;
+ }
+ }
+ }
+
+ memcpy(dst, &val, 1);
+
+ PrintDebug("vnic_read: port:0x%x (%u bytes): 0x%x\n", port,length, (uint32_t)val);
+
+ //dump_state(dev);
+
+ return length;
+
+}
+
+
+
+
+static void vnic_dma_update(struct vm_device * dev, int len) {
+ struct nic_context *nic_state = (struct nic_context *)dev->private_data;
+
+ nic_state->regs.rsar += len;
+ // wrap
+
+ if (nic_state->regs.rsar == nic_state->regs.pgstop) {
+ nic_state->regs.rsar = nic_state->regs.pgstart;
+ }
+
+ if (nic_state->regs.rbcr <= len) {
+ nic_state->regs.rbcr = 0;
+ nic_state->regs.isr |= ENISR_RDC;
+
+ vnic_update_irq(dev);
+ } else {
+ nic_state->regs.rbcr -= len;
+ }
+}
+
+
+//for data port read/write
+static int vnic_data_read(ushort_t port,
+ void * dst,
+ uint_t length,
+ struct vm_device * dev) {
+ uint32_t val = 0;
+ struct nic_context *nic_state = (struct nic_context *)dev->private_data;
+
+ // current dma address
+ uint32_t addr = nic_state->regs.rsar;
+
+ switch (length) {
+ case 1:
+ val = vnic_mem_readb(nic_state, addr);
+ break;
+ case 2:
+ val = vnic_mem_readw(nic_state, addr);
+ break;
+ case 4:
+ val = vnic_mem_readl(nic_state, addr);
+ break;
+ default:
+ PrintDebug("vnic_data_read error: invalid length %d\n", length);
+ val = 0x0;
+ }
+
+ vnic_dma_update(dev, length);
+
+ memcpy(dst, &val, length);
+
+ PrintDebug("vnic_read: port:0x%x (%u bytes): 0x%x", port & 0x1f,length, val);
+
+ return length;
+}
+
+static int vnic_data_write(ushort_t port,
+ void * src,
+ uint_t length,
+ struct vm_device * dev) {
+ uint32_t val = 0;
+ struct nic_context * nic_state = (struct nic_context *)dev->private_data;
+
+ uint32_t addr = nic_state->regs.rsar;
+
+ if (nic_state->regs.rbcr == 0) {
+ return length;
+ }
+
+ memcpy(&val, src, length);
+
+ //determine the starting address of reading/writing
+ //addr= ??
+
+ switch (length) {
+ case 1:
+ vnic_mem_writeb(nic_state, addr, val);
+ break;
+ case 2:
+ vnic_mem_writew(nic_state, addr, val);
+ break;
+ case 4:
+ vnic_mem_writel(nic_state, addr, val);
+ break;
+ default:
+ PrintDebug("nic_data_write error: invalid length %d\n", length);
+ }
+
+ vnic_dma_update(dev, length);
+
+ PrintDebug("vnic_write: port:0x%x (%u bytes): 0x%x\n", port & 0x1f,length, val);
+
+ return length;
+}
+
+static int vnic_reset_device(struct vm_device * dev) {
+
+ PrintDebug("vnic: reset device\n");
+
+ init_vnic_context(dev);
+
+ return 0;
+}
+
+
+//for 0xc11f port
+static int vnic_reset_port_read(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
+ uint32_t val = 0;
+
+ PrintDebug("vnic_read: port:0x%x (%u bytes): 0x%x\n", port,length, val);
+ memcpy(dst, &val, length);
+
+ vnic_reset_device(dev);
+
+ return length;
+}
+
+static int vnic_reset_port_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
+ uint32_t val = 0;
+
+ PrintDebug("vnic_write: port:0x%x (%u bytes): 0x%x\n", port,length, val);
+ memcpy(&val, src, length);
+
+ return length;
+}
+
+
+static int vnic_start_device(struct vm_device * dev) {
+ PrintDebug("vnic: start device\n");
+ return 0;
+}
+
+
+static int vnic_stop_device(struct vm_device * dev) {
+ PrintDebug("vnic: stop device\n");
+ return 0;
+}
+
+static void init_phy_network() {
+ V3_REGISTER_PKT_DELIVERY(&netif_input);
+}
+
+static int vnic_init_device(struct vm_device * dev) {
+ int i;
+
+ PrintDebug("vnic: init_device\n");
+
+ init_phy_network();
+ init_vnic_context(dev);
+
+ current_vnic = dev;
+
+ for (i = 0; i < 16; i++) {
+ v3_dev_hook_io(dev, NIC_BASE_ADDR + i, &vnic_ioport_read, &vnic_ioport_write);
+ }
+
+ v3_dev_hook_io(dev, NIC_BASE_ADDR + NIC_DATA_PORT, &vnic_data_read, &vnic_data_write);
+ v3_dev_hook_io(dev, NIC_BASE_ADDR + NIC_RESET_PORT, &vnic_reset_port_read, &vnic_reset_port_write);
+
+ return 0;
+}
+
+
+
+static int vnic_deinit_device(struct vm_device * dev) {
+ int i;
+
+ for (i = 0; i < 16; i++){
+ v3_dev_unhook_io(dev, NIC_BASE_ADDR + i);
+ }
+
+ v3_dev_unhook_io(dev, NIC_BASE_ADDR + NIC_DATA_PORT);
+ v3_dev_unhook_io(dev, NIC_BASE_ADDR + NIC_RESET_PORT);
+
+ //vnic_reset_device(dev);
+
+ return 0;
+}
+
+
+static struct vm_device_ops dev_ops = {
+ .init = vnic_init_device,
+ .deinit = vnic_deinit_device,
+ .reset = vnic_reset_device,
+ .start = vnic_start_device,
+ .stop = vnic_stop_device,
+};
+
+
+struct vm_device * v3_create_vnic() {
+ struct nic_context * nic_state = V3_Malloc(sizeof(struct nic_context));
+
+ //memset(nic_state, 0, sizeof(struct nic_context));
+
+ //PrintDebug("VNIC internal at %x\n",(int)nic_state);
+
+ struct vm_device *device = v3_create_device("VNIC", &dev_ops, nic_state);
+
+ return device;
+}
+
--- /dev/null
+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
+ * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
+ * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Lei Xia <lxia@northwestern.edu>
+ * Chang Seok Bae <jhuell@gmail.com>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+/*
+ * Virtual PCI
+ */
+
+#include <devices/vpci.h>
+#include <palacios/vmm.h>
+#include <palacios/vmm_types.h>
+#include <palacios/vmm_io.h>
+#include <palacios/vmm_string.h>
+#include <palacios/vmm_intr.h>
+
+
+// TODO: Add Debugging directives to Makefiles
+
+#ifndef DEBUG_PCI
+#undef PrintDebug
+#define PrintDebug(fmt, args...)
+#endif
+
+#define NUM_DEVICES 255
+#define NUM_BUS 1
+
+struct pci_bus {
+ int bus_num;
+ struct pci_device * device_list[NUM_DEVICES];
+ struct pci_bus * next;
+ struct vm_device * vm_dev;
+};
+
+struct pci_internal {
+ uint_t num_buses;
+ uint32_t config_address; //current value of corresponding to configure port
+ struct pci_bus * bus_list[NUM_BUS];
+};
+
+
+struct port_ops_map {
+ uint32_t port;
+ int (*port_read)(ushort_t port, void * dst, uint_t length, struct vm_device * vdev);
+ int (*port_write)(ushort_t port, void * src, uint_t length, struct vm_device * vdev);
+};
+
+
+//Lei
+struct pci_device * get_device (struct vm_device * vmdev, uchar_t bus_no, uchar_t devfn_no)
+{
+ struct pci_device * dev = NULL;
+ struct pci_bus * bus = NULL;
+ struct pci_internal * pci_state = NULL;
+
+ if ((bus_no >= NUM_BUS) || (devfn_no >= NUM_DEVICES)) {
+ return dev;
+ }
+
+ pci_state = (struct pci_internal *)vmdev->private_data;
+ bus = pci_state->bus_list[bus_no];
+
+ if (bus != NULL) {
+ dev = bus->device_list[devfn_no];
+ }
+
+ return dev;
+}
+
+
+//Lei
+// TODO: Should this be static? If not it should be v3_pci_...
+int pci_hook_ports(struct pci_device * dev,
+ int reg_num,
+ int num_ports,
+ port_read_fn * port_reads[],
+ port_write_fn * port_writes[]) {
+ struct pci_ioregion * ioreg = NULL;
+
+ ioreg = dev->ioregion[reg_num];
+
+ if (ioreg == NULL) {
+ PrintError("No Device registered at ioregion %d\n", reg_num);
+ return -1;
+ }
+
+ if (ioreg->size != num_ports) {
+ // TODO: What does this error mean?
+ PrintError("IO registration size mismatch\n");
+ return -1;
+ }
+
+ ioreg->port_reads = port_reads;
+ ioreg->port_writes = port_writes;
+
+ return 0;
+}
+
+//Lei
+// TODO: should return 'int' to indicate success or error?
+// TODO: add error checking
+static inline void hook_ioregion(struct pci_device * dev, struct pci_ioregion * ioreg) {
+ int i = 0;
+
+ if (ioreg->addr == -1) {
+ // TODO: Is this an error?
+ return;
+ }
+
+ if (ioreg->type != PCI_ADDRESS_SPACE_IO) {
+ // TODO: is this an error?
+ return;
+ }
+
+ for (i = 0; i < ioreg->size; i++) {
+ if ( (ioreg->port_reads[i]) ||
+ (ioreg->port_writes[i]) ) {
+ v3_dev_hook_io(dev->bus->vm_dev, ioreg->addr + i, ioreg->port_reads[i], ioreg->port_writes[i]);
+ }
+ }
+
+ // TODO: return 0;
+}
+
+
+//Chang
+static uint32_t vpci_read_config(struct pci_device * pdev, uchar_t offset, int len) {
+ uint32_t val = 0;
+
+ switch(len) {
+ case 4:
+ if (offset <= 0xfc) {
+ val = *(uint32_t *)(&(pdev->config) + offset);
+ break;
+ }
+ // TODO: Shouldn't this break unconditionally?
+ case 2:
+ if (offset <= 0xfe) {
+ val = *(uint16_t *)(&(pdev->config) + offset);
+ break;
+ }
+ // TODO: Shouldn't this break unconditionally?
+ case 1:
+ val = *(uint8_t *)(&(pdev->config) + offset);
+ break;
+ default:
+ break;
+ }
+
+ return val;
+}
+
+//Lei
+// TODO: Should this return 'int'?
+static void vpci_write_config(struct pci_device * dev, uchar_t offset, uint32_t val, int len) {
+ uchar_t * dev_config = NULL;
+
+ dev_config = (uchar_t *)&(dev->config);
+ dev_config += offset;
+
+ switch(len) {
+ case 1:
+ *dev_config = (val & 0xff);
+ break;
+ case 2:
+ *(uint16_t *)dev_config = (val & 0xffff);
+ break;
+ case 4:
+ *(uint32_t *)dev_config = val;
+ break;
+ default:
+ PrintDebug("pci_write_config: wrong length %d\n", len);
+ break;
+ }
+}
+
+//Lei
+// TODO: If this is not static, it should be v3_pci_raise_irq
+void vpci_raise_irq(struct pci_device * pdev, void * data) {
+ struct guest_info * vm = NULL;
+ int irq_line = 0;
+
+ vm = pdev->bus->vm_dev->vm;
+ irq_line = pdev->config.intr_line;
+
+ v3_raise_irq(vm, irq_line);
+}
+
+#if 0
+//Chang
+static void pci_write_config(struct pci_device *dev, uint32_t address, uint32_t val, int len)
+{
+ int can_write, i, reg_num;
+ uint32_t addr;
+
+ if(len == 4 && ((address >= 0x10 && address < 0x10 + 4 * 6) || //base address registers
+ (address >= 0x30 && address < 0x34))) { //expansion rom base address
+
+ struct pci_ioregion * ioregion;
+ if(address >= 0x30) {
+ reg_num = PCI_ROM_SLOT;
+ }else {
+ reg_num = ((address - 0x10) >>2);
+ }
+
+ ioregion = &dev->io_regions[reg_num];
+
+ if(ioregion->size == 0) {//default config
+
+ addr = address;
+ for (i=0;i<len;i++) {
+ switch(*(uint8_t *)(&(dev->config)+0x0e)) {
+ case 0x00:
+ case 0x80:
+ switch(addr) {
+ case 0x00:
+ case 0x01:
+ case 0x02:
+ case 0x03:
+ case 0x08:
+ case 0x09:
+ case 0x0a:
+ case 0x0b:
+ case 0x0e:
+ case 0x10 ... 0x27:
+ case 0x3d:
+ can_write = 0;
+ break;
+ default:
+ can_write = 1;
+ break;
+ }
+ break;
+ default:
+ case 0x01:
+ switch(addr) {
+ case 0x00:
+ case 0x01:
+ case 0x02:
+ case 0x03:
+ case 0x08:
+ case 0x09:
+ case 0x0a:
+ case 0x0b:
+ case 0x0e:
+ case 0x38 ... 0x3b:
+ case 0x3d:
+ can_write = 0;
+ break;
+ default:
+ can_write = 1;
+ break;
+ }
+ break;
+ }
+ if (can_write) {
+ *(uint32_t *)(&(dev->config)+addr) = val;
+ }
+ if(++addr > 0xff) break;
+ val >>= 8;
+ }
+
+ return;
+
+ }else {
+ if(reg_num== PCI_ROM_SLOT) {
+ val &= (~(ioregion->size -1 )) | 1;
+ } else {
+ val &= ~(ioregion->size -1);
+ val |= ioregion->type;
+ }
+ }
+ //pci_update_mappings();
+ return;
+ }
+}
+#endif
+
+/* -1 for dev_num means auto assign */
+// TODO: Should be v3_pci_register_device
+struct pci_device *
+pci_register_device(struct pci_bus * bus, const char * name,
+ int instance_size, int dev_num,
+ uint32_t (*config_read)(struct pci_device * pci_dev, uchar_t addr, int len),
+ void (*config_write)(struct pci_device * pci_dev, uchar_t addr, uint32_t val, int len)) {
+
+ struct pci_device * pci_dev = NULL;
+ int found = 0;
+ int i = 0;
+
+ if (dev_num < 0) {
+ for (dev_num = 0; dev_num < 256; dev_num++) {
+ if (!bus->device_list[dev_num]) {
+ found = 1;
+ break;
+ }
+ }
+ }
+
+ if (found == 0) {
+ return NULL;
+ }
+
+ pci_dev = (struct pci_device *)V3_Malloc(sizeof(struct pci_device));
+
+ if (pci_dev == NULL) {
+ return NULL;
+ }
+
+ pci_dev->bus = bus;
+ pci_dev->dev_num = dev_num;
+ pci_dev->irqline = -1;
+
+ strcpy(pci_dev->name, name);
+
+ if (config_read != NULL) {
+ pci_dev->ops.config_read = config_read;
+ } else {
+ pci_dev->ops.config_read = &vpci_read_config;
+ }
+
+ if (config_write != NULL) {
+ pci_dev->ops.config_write = config_write;
+ } else {
+ pci_dev->ops.config_write = &vpci_write_config;
+ }
+
+
+ pci_dev->ops.raise_irq = &vpci_raise_irq;
+
+ for (i = 0; i < PCI_IO_REGIONS; i++) {
+ pci_dev->ioregion[i] = NULL;
+ }
+
+ //config space initiate
+
+ bus->device_list[dev_num] = pci_dev;
+
+ return pci_dev;
+}
+
+//Chang
+static void init_fake_device(struct pci_internal * pci_state) {
+ //maybe need table to map device, but just
+ //bus_num=0, dev_num=0
+
+ //int i=0;
+ struct pci_device *fake_device;
+
+ //fake dev
+ fake_device = pci_register_device(pci_state->bus_list[0],
+ "fake ide", sizeof(struct pci_device),
+ -1,
+ NULL,NULL);
+
+ if (!fake_device) {
+ return;
+ }
+
+ /*
+ intel, ide ctroller
+ vendor id:0x8086
+ device id: 0x1222
+ */
+ fake_device->config.vendor_id = 0x8086;
+ fake_device->config.device_id = 0x1222;
+ fake_device->config.command = 0x0;
+ fake_device->config.status = 0x0;
+ fake_device->config.revision = 0x07;
+ fake_device->config.class_code[0] = 0x1;
+ fake_device->config.class_code[1] = 0x1;
+ fake_device->config.class_code[2] = 0x1;
+ fake_device->config.header_type = 0x0;
+
+ //base address
+ fake_device->config.BAR[0] = 0x1F0;
+ fake_device->config.BAR[1] = 0;
+ fake_device->config.BAR[2] = 0;
+ fake_device->config.BAR[3] = 0;
+ fake_device->config.BAR[4] = 0;
+ fake_device->config.BAR[5] = 0;
+
+ //fake dev end
+
+ //need to register io regions
+
+ pci_state->bus_list[0]->device_list[0] = fake_device;
+ fake_device->bus = pci_state->bus_list[0];
+ fake_device->next = NULL;
+
+ return;
+}
+
+
+
+// Lei
+/* if region_num == -1, assign automatically
+ */
+//TODO: Should be v3_pci_register...
+int
+pci_register_io_region(struct pci_device * pci_dev, int region_num,
+ uint32_t size, int type,
+ pci_mapioregion_fn * map_func) {
+ int found = 0;
+ struct pci_ioregion * region = NULL;
+
+ if (region_num < 0) {
+ for (region_num = 0; region_num < 256; region_num++) {
+ if (pci_dev->ioregion[region_num] == NULL) {
+ found = 1;
+ break;
+ }
+ }
+ }
+
+ if (found == 0) {
+ return -1;
+ }
+
+ if (pci_dev->ioregion[region_num] != NULL) {
+ return -1;
+ }
+
+ region = (struct pci_ioregion *)V3_Malloc(sizeof(struct pci_ioregion));
+ if (region == NULL) {
+ return -1;
+ }
+
+ region->addr = -1;
+ region->reg_num = region_num;
+ region->size = size;
+ region->mapped_size = -1;
+ region->type = type;
+ region->map_func = map_func;
+ region->port_reads = NULL;
+ region->port_writes = NULL;
+
+ pci_dev->ioregion[region_num] = region;
+
+ return region_num;
+}
+
+
+
+
+//Chang
+static int
+vpci_addrport_read(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
+
+ struct pci_internal *pci_state = (struct pci_internal *)dev->private_data;
+ int start = 0;
+ uchar_t * addr = NULL;
+ int i = 0;
+
+ start = port - PCI_CONFIG_ADDRESS;
+
+ if ((length + start) > 4) {
+ //cross port boundary, is memory mapped IO style
+ return length;
+ }
+
+ addr = (uchar_t *)&(pci_state->config_address);
+ addr += start;
+
+ memcpy(dst, addr, length); //be careful, PCI is little endian
+
+ PrintDebug("PCI Address: reading %d bytes from port %x: 0x", length, port);
+ for (i = (length - 1); i >= 0; i--) {
+ PrintDebug("%.2x", ((uchar_t*)dst)[i]);
+ }
+ PrintDebug("\n");
+
+ return length;
+}
+
+//Lei
+static int
+vpci_addrport_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
+ struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;
+ int start = 0;
+ uchar_t * addr = NULL;
+ int i = 0;
+
+ start = port - PCI_CONFIG_ADDRESS;
+
+ if ((length + start) > 4){
+ //cross port boundary, is memory mapped IO style
+ return length;
+ }
+
+ addr = (uchar_t *)&(pci_state->config_address);
+ addr += start;
+ memcpy(addr, src, length); //be careful, PCI is little endian
+
+ PrintDebug("PCI Address: writing %d bytes to port %x: 0x", length, port);
+
+ for (i = (length - 1); i >= 0; i--) {
+ PrintDebug("%.2x", ((uchar_t*)src)[i]);
+ }
+ PrintDebug("\n");
+
+ return length;
+}
+
+//Chang
+static int
+vpci_dataport_read(ushort_t port, void * dst, uint_t length, struct vm_device * vmdev) {
+ /*
+ decode address of config_address
+ bus num = config_address[23:16]
+ device num = config_address[15:11]
+ func num = config_address[10:08]
+ reg num = config_address[07:02]
+ */
+
+ struct pci_internal * pci_state = NULL;
+ struct pci_device * pci_dev = NULL;
+ int bus_num = 0;
+ int devfn = 0;
+ int offset = 0;
+ uint32_t address = 0;
+ uint32_t val = 0;
+ int i = 0;
+
+ if (length > 4){
+ PrintDebug("Read more than 4 bytes from port 0x%x\n", (int)port);
+ return length;
+ }
+
+ pci_state = (struct pci_internal *)vmdev->private_data;
+
+ address = pci_state->config_address;
+ offset = address & 0xff;
+ devfn = (address >> 8) & 0xff;
+ bus_num = (address >> 16) & 0xff;
+
+ pci_dev = get_device(vmdev, bus_num, devfn);
+
+ if (pci_dev == NULL) {
+ val = 0xffffffff;
+ } else {
+ val = 0x0;
+ val = pci_dev->ops.config_read(pci_dev, offset, length);
+ }
+
+ memcpy(dst, &val, length);
+
+ PrintDebug("PCI Data: reading %d bytes from port %x: 0x", length, port);
+
+ for (i = (length - 1); i >= 0; i--) {
+ PrintDebug("%.2x", ((uchar_t*)dst)[i]);
+ }
+ PrintDebug("\n");
+
+ return length;
+}
+
+static int
+vpci_dataport_write(ushort_t port, void * src, uint_t length, struct vm_device * vmdev) {
+ struct pci_internal * pci_state = NULL;
+ uint32_t val = 0;
+ uint32_t address = 0;
+ struct pci_device * pdev = NULL;
+ // TODO: Why are these 'char', but the read variables 'int'
+ char bus = 0;
+ char devfn = 0;
+ char offset = 0;
+ int i = 0;
+
+ if (length > 4){
+ PrintDebug("Write more than 4 bytes to port 0x%x\n", (int)port);
+ return length;
+ }
+
+ pci_state = (struct pci_internal *)vmdev->private_data;
+
+ address = pci_state->config_address;
+ offset = address & 0xff;
+ devfn = (address >> 8) & 0xff;
+ bus = (address >> 16) & 0xff;
+
+ pdev = get_device(vmdev, bus, devfn);
+
+ if (pdev == NULL){
+ // not sure what to do here, just ignore it
+ return length;
+ }
+
+ val = 0x0;
+ memcpy(&val, src, length);
+
+ pdev->ops.config_write(pdev, offset, val, length);
+
+ PrintDebug("PCI Data: writing %d bytes to port %x: 0x", length, port);
+
+ for (i = (length - 1); i >= 0; i--) {
+ PrintDebug("%.2x", ((uchar_t*)src)[i]);
+ }
+ PrintDebug("\n");
+
+ return length;
+}
+
+
+//Lei
+static void init_pci_bus(struct pci_internal * pci_state) {
+ int i = 0;
+ struct pci_bus * first_bus = NULL;
+
+ first_bus = (struct pci_bus *)V3_Malloc(sizeof(struct pci_bus));
+
+ first_bus->bus_num = 0; //?? not sure
+
+ for (i = 0; i < NUM_DEVICES; i++) {
+ first_bus->device_list[i] = NULL;
+ }
+
+ first_bus->next = NULL;
+
+ pci_state->num_buses = 1;
+ pci_state->bus_list[0] = first_bus;
+
+ for (i = 1; i < NUM_BUS; i++) {
+ pci_state->bus_list[i] = NULL;
+ }
+}
+
+//Lei
+static void init_pci_internal(struct pci_internal * pci_state) {
+ pci_state->config_address = 0x00; //Not sure????
+ init_pci_bus(pci_state);
+}
+
+
+static int vpci_set_defaults(struct vm_device * dev) {
+ PrintDebug("vpci: set defaults\n");
+ return 0;
+}
+
+
+static int vpci_reset_device(struct vm_device * dev) {
+ PrintDebug("vpci: reset device\n");
+
+ vpci_set_defaults(dev);
+
+ return 0;
+}
+
+
+static int vpci_start_device(struct vm_device * dev) {
+ PrintDebug("vpci: start device\n");
+ return 0;
+}
+
+
+// TODO: This should be static
+int vpci_stop_device(struct vm_device * dev) {
+ PrintDebug("vpci: stop device\n");
+ return 0;
+}
+
+// TODO: this should be static?
+int vpci_init_device(struct vm_device * dev) {
+ struct pci_internal *pci_state = NULL;
+ int i = 0;
+
+ PrintDebug("vpci: init_device\n");
+
+ pci_state = (struct pci_internal *)dev->private_data;
+
+ init_pci_internal(pci_state);
+
+ init_fake_device(pci_state); //Chang
+
+ for (i = 0; i < 4; i++){
+ v3_dev_hook_io(dev, PCI_CONFIG_ADDRESS + i, &vpci_addrport_read, &vpci_addrport_write);
+ v3_dev_hook_io(dev, PCI_CONFIG_DATA + i, &vpci_dataport_read, &vpci_dataport_write);
+ }
+
+ return 0;
+}
+
+// TODO: This should be static
+int vpci_deinit_device(struct vm_device * dev) {
+ int i = 0;
+
+ for (i = 0; i < 4; i++){
+ v3_dev_unhook_io(dev, PCI_CONFIG_ADDRESS + i);
+ v3_dev_unhook_io(dev, PCI_CONFIG_DATA + i);
+ }
+
+ vpci_reset_device(dev);
+ return 0;
+}
+
+static struct vm_device_ops dev_ops = {
+ .init = vpci_init_device,
+ .deinit = vpci_deinit_device,
+ .reset = vpci_reset_device,
+ .start = vpci_start_device,
+ .stop = vpci_stop_device,
+};
+
+struct vm_device * v3_create_vpci() {
+ struct pci_internal * pci_state = V3_Malloc(sizeof(struct pci_internal));
+
+ PrintDebug("PCI internal at %p\n",(void *)pci_state);
+
+ struct vm_device * device = v3_create_device("PCI", &dev_ops, pci_state);
+
+ return device;
+}
*/
-
-
-
#include <palacios/svm.h>
#include <palacios/vmm.h>
static vmcb_t * Allocate_VMCB() {
- vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1));
+ vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1));
- memset(vmcb_page, 0, 4096);
+ memset(vmcb_page, 0, 4096);
- return vmcb_page;
+ return vmcb_page;
}
#include <palacios/vmm_ctrl_regs.h>
static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info *vm_info) {
- vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
- uint_t i;
-
-
- guest_state->rsp = vm_info->vm_regs.rsp;
- // guest_state->rip = vm_info->rip;
- guest_state->rip = 0xfff0;
-
- guest_state->cpl = 0;
-
- //ctrl_area->instrs.instrs.CR0 = 1;
- ctrl_area->cr_reads.cr0 = 1;
- ctrl_area->cr_writes.cr0 = 1;
- //ctrl_area->cr_reads.cr4 = 1;
- ctrl_area->cr_writes.cr4 = 1;
+ vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
+ vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
+ uint_t i;
- /* Set up the efer to enable 64 bit page tables */
- /*
- {
- struct efer_64 * efer = (struct efer_64 *)&(guest_state->efer);
- struct cr4_32 * cr4 = (struct cr4_32 *)&(guest_state->cr4);
- efer->lma = 1;
- efer->lme = 1;
+ guest_state->rsp = vm_info->vm_regs.rsp;
+ // guest_state->rip = vm_info->rip;
+ guest_state->rip = 0xfff0;
- cr4->pae = 1;
- }
- */
-
- guest_state->efer |= EFER_MSR_svm_enable;
- vm_info->guest_efer.value = 0x0LL;
+ guest_state->cpl = 0;
- v3_hook_msr(vm_info, EFER_MSR,
- &v3_handle_efer_read,
- &v3_handle_efer_write,
- vm_info);
+ //ctrl_area->instrs.instrs.CR0 = 1;
+ ctrl_area->cr_reads.cr0 = 1;
+ ctrl_area->cr_writes.cr0 = 1;
+ //ctrl_area->cr_reads.cr4 = 1;
+ ctrl_area->cr_writes.cr4 = 1;
+ /* Set up the efer to enable 64 bit page tables */
+ /*
+ {
+ struct efer_64 * efer = (struct efer_64 *)&(guest_state->efer);
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(guest_state->cr4);
+ efer->lma = 1;
+ efer->lme = 1;
+
+ cr4->pae = 1;
+ }
+ */
- guest_state->rflags = 0x00000002; // The reserved bit is always 1
- ctrl_area->svm_instrs.VMRUN = 1;
- ctrl_area->svm_instrs.VMMCALL = 1;
- ctrl_area->svm_instrs.VMLOAD = 1;
- ctrl_area->svm_instrs.VMSAVE = 1;
- ctrl_area->svm_instrs.STGI = 1;
- ctrl_area->svm_instrs.CLGI = 1;
- ctrl_area->svm_instrs.SKINIT = 1;
- ctrl_area->svm_instrs.RDTSCP = 1;
- ctrl_area->svm_instrs.ICEBP = 1;
- ctrl_area->svm_instrs.WBINVD = 1;
- ctrl_area->svm_instrs.MONITOR = 1;
- ctrl_area->svm_instrs.MWAIT_always = 1;
- ctrl_area->svm_instrs.MWAIT_if_armed = 1;
-
-
- ctrl_area->instrs.HLT = 1;
- // guest_state->cr0 = 0x00000001; // PE
- ctrl_area->guest_ASID = 1;
-
-
- /*
- ctrl_area->exceptions.de = 1;
- ctrl_area->exceptions.df = 1;
+ guest_state->efer |= EFER_MSR_svm_enable;
+ vm_info->guest_efer.value = 0x0LL;
- ctrl_area->exceptions.ts = 1;
- ctrl_area->exceptions.ss = 1;
- ctrl_area->exceptions.ac = 1;
- ctrl_area->exceptions.mc = 1;
- ctrl_area->exceptions.gp = 1;
- ctrl_area->exceptions.ud = 1;
- ctrl_area->exceptions.np = 1;
- ctrl_area->exceptions.of = 1;
-
- ctrl_area->exceptions.nmi = 1;
- */
+ v3_hook_msr(vm_info, EFER_MSR,
+ &v3_handle_efer_read,
+ &v3_handle_efer_write,
+ vm_info);
- // Debug of boot on physical machines - 7/14/08
- ctrl_area->instrs.NMI=1;
- ctrl_area->instrs.SMI=1;
- ctrl_area->instrs.INIT=1;
- ctrl_area->instrs.PAUSE=1;
- ctrl_area->instrs.shutdown_evts=1;
- vm_info->vm_regs.rdx = 0x00000f00;
+ guest_state->rflags = 0x00000002; // The reserved bit is always 1
+ ctrl_area->svm_instrs.VMRUN = 1;
+ ctrl_area->svm_instrs.VMMCALL = 1;
+ ctrl_area->svm_instrs.VMLOAD = 1;
+ ctrl_area->svm_instrs.VMSAVE = 1;
+ ctrl_area->svm_instrs.STGI = 1;
+ ctrl_area->svm_instrs.CLGI = 1;
+ ctrl_area->svm_instrs.SKINIT = 1;
+ ctrl_area->svm_instrs.RDTSCP = 1;
+ ctrl_area->svm_instrs.ICEBP = 1;
+ ctrl_area->svm_instrs.WBINVD = 1;
+ ctrl_area->svm_instrs.MONITOR = 1;
+ ctrl_area->svm_instrs.MWAIT_always = 1;
+ ctrl_area->svm_instrs.MWAIT_if_armed = 1;
- guest_state->cr0 = 0x60000010;
-
- guest_state->cs.selector = 0xf000;
- guest_state->cs.limit=0xffff;
- guest_state->cs.base = 0x0000000f0000LL;
- guest_state->cs.attrib.raw = 0xf3;
+ ctrl_area->instrs.HLT = 1;
+ // guest_state->cr0 = 0x00000001; // PE
+ ctrl_area->guest_ASID = 1;
- /* DEBUG FOR RETURN CODE */
- ctrl_area->exit_code = 1;
-
-
- struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
- for ( i = 0; segregs[i] != NULL; i++) {
- struct vmcb_selector * seg = segregs[i];
+ /*
+ ctrl_area->exceptions.de = 1;
+ ctrl_area->exceptions.df = 1;
+
+ ctrl_area->exceptions.ts = 1;
+ ctrl_area->exceptions.ss = 1;
+ ctrl_area->exceptions.ac = 1;
+ ctrl_area->exceptions.mc = 1;
+ ctrl_area->exceptions.gp = 1;
+ ctrl_area->exceptions.ud = 1;
+ ctrl_area->exceptions.np = 1;
+ ctrl_area->exceptions.of = 1;
+
+ ctrl_area->exceptions.nmi = 1;
+ */
- seg->selector = 0x0000;
- // seg->base = seg->selector << 4;
- seg->base = 0x00000000;
- seg->attrib.raw = 0xf3;
- seg->limit = ~0u;
- }
-
- guest_state->gdtr.limit = 0x0000ffff;
- guest_state->gdtr.base = 0x0000000000000000LL;
- guest_state->idtr.limit = 0x0000ffff;
- guest_state->idtr.base = 0x0000000000000000LL;
-
- guest_state->ldtr.selector = 0x0000;
- guest_state->ldtr.limit = 0x0000ffff;
- guest_state->ldtr.base = 0x0000000000000000LL;
- guest_state->tr.selector = 0x0000;
- guest_state->tr.limit = 0x0000ffff;
- guest_state->tr.base = 0x0000000000000000LL;
-
- guest_state->dr6 = 0x00000000ffff0ff0LL;
- guest_state->dr7 = 0x0000000000000400LL;
+ // Debug of boot on physical machines - 7/14/08
+ ctrl_area->instrs.NMI=1;
+ ctrl_area->instrs.SMI=1;
+ ctrl_area->instrs.INIT=1;
+ ctrl_area->instrs.PAUSE=1;
+ ctrl_area->instrs.shutdown_evts=1;
+
+ vm_info->vm_regs.rdx = 0x00000f00;
+
+ guest_state->cr0 = 0x60000010;
+
+
+ guest_state->cs.selector = 0xf000;
+ guest_state->cs.limit=0xffff;
+ guest_state->cs.base = 0x0000000f0000LL;
+ guest_state->cs.attrib.raw = 0xf3;
+ /* DEBUG FOR RETURN CODE */
+ ctrl_area->exit_code = 1;
+
+
+ struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
+ for ( i = 0; segregs[i] != NULL; i++) {
+ struct vmcb_selector * seg = segregs[i];
+
+ seg->selector = 0x0000;
+ // seg->base = seg->selector << 4;
+ seg->base = 0x00000000;
+ seg->attrib.raw = 0xf3;
+ seg->limit = ~0u;
+ }
-
-
-
- if ( !RB_EMPTY_ROOT(&(vm_info->io_map)) ) {
- struct v3_io_hook * iter;
- struct rb_node * io_node = v3_rb_first(&(vm_info->io_map));
- addr_t io_port_bitmap;
- int i = 0;
-
- io_port_bitmap = (addr_t)V3_VAddr(V3_AllocPages(3));
- memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
+ guest_state->gdtr.limit = 0x0000ffff;
+ guest_state->gdtr.base = 0x0000000000000000LL;
+ guest_state->idtr.limit = 0x0000ffff;
+ guest_state->idtr.base = 0x0000000000000000LL;
- ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr((void *)io_port_bitmap);
+ guest_state->ldtr.selector = 0x0000;
+ guest_state->ldtr.limit = 0x0000ffff;
+ guest_state->ldtr.base = 0x0000000000000000LL;
+ guest_state->tr.selector = 0x0000;
+ guest_state->tr.limit = 0x0000ffff;
+ guest_state->tr.base = 0x0000000000000000LL;
- //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
- do {
- iter = rb_entry(io_node, struct v3_io_hook, tree_node);
+ guest_state->dr6 = 0x00000000ffff0ff0LL;
+ guest_state->dr7 = 0x0000000000000400LL;
- ushort_t port = iter->port;
- uchar_t * bitmap = (uchar_t *)io_port_bitmap;
- //PrintDebug("%d: Hooking Port %d\n", i, port);
-
- bitmap += (port / 8);
- // PrintDebug("Setting Bit for port 0x%x\n", port);
- *bitmap |= 1 << (port % 8);
-
- i++;
- } while ((io_node = v3_rb_next(io_node)));
-
-
- //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
-
- ctrl_area->instrs.IOIO_PROT = 1;
- }
+
- PrintDebug("Exiting on interrupts\n");
- ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
- ctrl_area->instrs.INTR = 1;
-
-
- if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
- PrintDebug("Creating initial shadow page table\n");
-
-
-
- /* Testing 64 bit page tables for long paged real mode guests */
- // vm_info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(vm_info));
- vm_info->direct_map_pt = (addr_t)V3_PAddr((void *)v3_create_direct_passthrough_pts(vm_info));
- /* End Test */
-
- vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
- PrintDebug("Created\n");
-
-
- guest_state->cr3 = vm_info->direct_map_pt;
-
-
- //PrintDebugPageTables((pde32_t*)(vm_info->shdw_pg_state.shadow_cr3.e_reg.low));
-
- ctrl_area->cr_reads.cr3 = 1;
- ctrl_area->cr_writes.cr3 = 1;
-
-
- ctrl_area->instrs.INVLPG = 1;
- ctrl_area->instrs.INVLPGA = 1;
- ctrl_area->exceptions.pf = 1;
- /* JRL: This is a performance killer, and a simplistic solution */
- /* We need to fix this */
- ctrl_area->TLB_CONTROL = 1;
+ if ( !RB_EMPTY_ROOT(&(vm_info->io_map)) ) {
+ struct v3_io_hook * iter;
+ struct rb_node * io_node = v3_rb_first(&(vm_info->io_map));
+ addr_t io_port_bitmap;
+ int i = 0;
+
+ io_port_bitmap = (addr_t)V3_VAddr(V3_AllocPages(3));
+ memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
+
+ ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr((void *)io_port_bitmap);
+
+ //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
+
+ do {
+ iter = rb_entry(io_node, struct v3_io_hook, tree_node);
+
+ ushort_t port = iter->port;
+ uchar_t * bitmap = (uchar_t *)io_port_bitmap;
+ //PrintDebug("%d: Hooking Port %d\n", i, port);
+
+ bitmap += (port / 8);
+ // PrintDebug("Setting Bit for port 0x%x\n", port);
+ *bitmap |= 1 << (port % 8);
+
+ i++;
+ } while ((io_node = v3_rb_next(io_node)));
+
+
+ //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
+
+ ctrl_area->instrs.IOIO_PROT = 1;
+ }
+
+
+ PrintDebug("Exiting on interrupts\n");
+ ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
+ ctrl_area->instrs.INTR = 1;
+
+
+ if (vm_info->shdw_pg_mode == SHADOW_PAGING) {
+ PrintDebug("Creating initial shadow page table\n");
+
+
+
+ /* Testing 64 bit page tables for long paged real mode guests */
+ // vm_info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(vm_info));
+ vm_info->direct_map_pt = (addr_t)V3_PAddr((void *)v3_create_direct_passthrough_pts(vm_info));
+ /* End Test */
+
+ vm_info->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
+ PrintDebug("Created\n");
+
+
+ guest_state->cr3 = vm_info->direct_map_pt;
+
+
+ //PrintDebugPageTables((pde32_t*)(vm_info->shdw_pg_state.shadow_cr3.e_reg.low));
+
+ ctrl_area->cr_reads.cr3 = 1;
+ ctrl_area->cr_writes.cr3 = 1;
+
+
+ ctrl_area->instrs.INVLPG = 1;
+ ctrl_area->instrs.INVLPGA = 1;
+
+ ctrl_area->exceptions.pf = 1;
+
+ /* JRL: This is a performance killer, and a simplistic solution */
+ /* We need to fix this */
+ ctrl_area->TLB_CONTROL = 1;
+
+
+ guest_state->g_pat = 0x7040600070406ULL;
+
+ guest_state->cr0 |= 0x80000000;
+
+ } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
+ // Flush the TLB on entries/exits
+ ctrl_area->TLB_CONTROL = 1;
+
+ // Enable Nested Paging
+ ctrl_area->NP_ENABLE = 1;
+
+ PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
+
+ // Set the Nested Page Table pointer
+ vm_info->direct_map_pt = ((addr_t)v3_create_direct_passthrough_pts(vm_info) & ~0xfff);
+ ctrl_area->N_CR3 = vm_info->direct_map_pt;
+
+ // ctrl_area->N_CR3 = Get_CR3();
+ // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
+
+ guest_state->g_pat = 0x7040600070406ULL;
+ }
- guest_state->g_pat = 0x7040600070406ULL;
-
- guest_state->cr0 |= 0x80000000;
-
- } else if (vm_info->shdw_pg_mode == NESTED_PAGING) {
- // Flush the TLB on entries/exits
- ctrl_area->TLB_CONTROL = 1;
-
- // Enable Nested Paging
- ctrl_area->NP_ENABLE = 1;
-
- PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
-
- // Set the Nested Page Table pointer
- vm_info->direct_map_pt = ((addr_t)create_passthrough_pts_32(vm_info) & ~0xfff);
- ctrl_area->N_CR3 = vm_info->direct_map_pt;
-
- // ctrl_area->N_CR3 = Get_CR3();
- // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
-
- guest_state->g_pat = 0x7040600070406ULL;
- }
-
-
- if (vm_info->msr_map.num_hooks > 0) {
- PrintDebug("Hooking %d msrs\n", vm_info->msr_map.num_hooks);
- ctrl_area->MSRPM_BASE_PA = v3_init_svm_msr_map(vm_info);
- ctrl_area->instrs.MSR_PROT = 1;
-
- }
-
-
- /* Safety locations for fs/gs */
- vm_info->fs = 0;
- vm_info->gs = 0;
-
-
+ if (vm_info->msr_map.num_hooks > 0) {
+ PrintDebug("Hooking %d msrs\n", vm_info->msr_map.num_hooks);
+ ctrl_area->MSRPM_BASE_PA = v3_init_svm_msr_map(vm_info);
+ ctrl_area->instrs.MSR_PROT = 1;
+
+ }
+
+ /* Safety locations for fs/gs */
+ vm_info->fs = 0;
+ vm_info->gs = 0;
}
static int init_svm_guest(struct guest_info *info) {
-
- PrintDebug("Allocating VMCB\n");
- info->vmm_data = (void*)Allocate_VMCB();
+ PrintDebug("Allocating VMCB\n");
+ info->vmm_data = (void*)Allocate_VMCB();
- //PrintDebug("Generating Guest nested page tables\n");
- // info->page_tables = NULL;
- //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
- //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
- // PrintDebugPageTables(info->page_tables);
+ //PrintDebug("Generating Guest nested page tables\n");
+ // info->page_tables = NULL;
+ //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
+ //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
+ // PrintDebugPageTables(info->page_tables);
- PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data);
- Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
+ PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data);
+ Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
- info->run_state = VM_STOPPED;
-
- // info->rip = 0;
+ info->run_state = VM_STOPPED;
- info->vm_regs.rdi = 0;
- info->vm_regs.rsi = 0;
- info->vm_regs.rbp = 0;
- info->vm_regs.rsp = 0;
- info->vm_regs.rbx = 0;
- info->vm_regs.rdx = 0;
- info->vm_regs.rcx = 0;
- info->vm_regs.rax = 0;
-
- return 0;
+ // info->rip = 0;
+
+ info->vm_regs.rdi = 0;
+ info->vm_regs.rsi = 0;
+ info->vm_regs.rbp = 0;
+ info->vm_regs.rsp = 0;
+ info->vm_regs.rbx = 0;
+ info->vm_regs.rdx = 0;
+ info->vm_regs.rcx = 0;
+ info->vm_regs.rax = 0;
+
+ return 0;
}
// can we start a kernel thread here...
static int start_svm_guest(struct guest_info *info) {
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
- // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
- uint_t num_exits = 0;
-
-
+ vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
+ uint_t num_exits = 0;
- PrintDebug("Launching SVM VM (vmcb=%p)\n", (void *)info->vmm_data);
- //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
- info->run_state = VM_RUNNING;
-
- while (1) {
- ullong_t tmp_tsc;
+ PrintDebug("Launching SVM VM (vmcb=%p)\n", (void *)info->vmm_data);
+ //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
+
+ info->run_state = VM_RUNNING;
+
+ while (1) {
+ ullong_t tmp_tsc;
+
#define MSR_STAR 0xc0000081
#define MSR_KERNGS_BASE 0xc0000102
- struct v3_msr host_cstar;
- struct v3_msr host_star;
- struct v3_msr host_lstar;
- struct v3_msr host_syscall_mask;
- struct v3_msr host_gs_base;
- struct v3_msr host_kerngs_base;
+ struct v3_msr host_cstar;
+ struct v3_msr host_star;
+ struct v3_msr host_lstar;
+ struct v3_msr host_syscall_mask;
+ struct v3_msr host_gs_base;
+ struct v3_msr host_kerngs_base;
- v3_enable_ints();
- v3_clgi();
+ v3_enable_ints();
+ v3_clgi();
- /*
- PrintDebug("SVM Entry to CS=%p rip=%p...\n",
- (void *)(addr_t)info->segments.cs.base,
- (void *)(addr_t)info->rip);
- */
-
-
- v3_get_msr(MSR_STAR, &(host_star.hi), &(host_star.lo));
- v3_get_msr(MSR_LSTAR, &(host_lstar.hi), &(host_lstar.lo));
- v3_get_msr(MSR_CSTAR, &(host_cstar.hi), &(host_cstar.lo));
- v3_get_msr(MSR_SF_MASK, &(host_syscall_mask.hi), &(host_syscall_mask.lo));
- v3_get_msr(MSR_GS_BASE, &(host_gs_base.hi), &(host_gs_base.lo));
- v3_get_msr(MSR_KERNGS_BASE, &(host_kerngs_base.hi), &(host_kerngs_base.lo));
-
-
- rdtscll(info->time_state.cached_host_tsc);
- // guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
+ /*
+ PrintDebug("SVM Entry to CS=%p rip=%p...\n",
+ (void *)(addr_t)info->segments.cs.base,
+ (void *)(addr_t)info->rip);
+ */
- //v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs), &(info->fs), &(info->gs));
- v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs));
- rdtscll(tmp_tsc);
+ v3_get_msr(MSR_STAR, &(host_star.hi), &(host_star.lo));
+ v3_get_msr(MSR_LSTAR, &(host_lstar.hi), &(host_lstar.lo));
+ v3_get_msr(MSR_CSTAR, &(host_cstar.hi), &(host_cstar.lo));
+ v3_get_msr(MSR_SF_MASK, &(host_syscall_mask.hi), &(host_syscall_mask.lo));
+ v3_get_msr(MSR_GS_BASE, &(host_gs_base.hi), &(host_gs_base.lo));
+ v3_get_msr(MSR_KERNGS_BASE, &(host_kerngs_base.hi), &(host_kerngs_base.lo));
- v3_set_msr(MSR_STAR, host_star.hi, host_star.lo);
- v3_set_msr(MSR_LSTAR, host_lstar.hi, host_lstar.lo);
- v3_set_msr(MSR_CSTAR, host_cstar.hi, host_cstar.lo);
- v3_set_msr(MSR_SF_MASK, host_syscall_mask.hi, host_syscall_mask.lo);
- v3_set_msr(MSR_GS_BASE, host_gs_base.hi, host_gs_base.lo);
- v3_set_msr(MSR_KERNGS_BASE, host_kerngs_base.hi, host_kerngs_base.lo);
- //PrintDebug("SVM Returned\n");
+ rdtscll(info->time_state.cached_host_tsc);
+ // guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
+
+ //v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs), &(info->fs), &(info->gs));
+ v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs));
+
+ rdtscll(tmp_tsc);
+
+ v3_set_msr(MSR_STAR, host_star.hi, host_star.lo);
+ v3_set_msr(MSR_LSTAR, host_lstar.hi, host_lstar.lo);
+ v3_set_msr(MSR_CSTAR, host_cstar.hi, host_cstar.lo);
+ v3_set_msr(MSR_SF_MASK, host_syscall_mask.hi, host_syscall_mask.lo);
+ v3_set_msr(MSR_GS_BASE, host_gs_base.hi, host_gs_base.lo);
+ v3_set_msr(MSR_KERNGS_BASE, host_kerngs_base.hi, host_kerngs_base.lo);
+
+ //PrintDebug("SVM Returned\n");
- v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
- num_exits++;
+ v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
+ num_exits++;
- //PrintDebug("Turning on global interrupts\n");
- v3_stgi();
+ //PrintDebug("Turning on global interrupts\n");
+ v3_stgi();
+
+
+ if ((num_exits % 5000) == 0) {
+ PrintDebug("SVM Exit number %d\n", num_exits);
-
- if ((num_exits % 5000) == 0) {
- PrintDebug("SVM Exit number %d\n", num_exits);
- if (info->enable_profiler)
- v3_print_profile(info);
- }
+ if (info->enable_profiler) {
+ v3_print_profile(info);
+ }
+ }
- if (v3_handle_svm_exit(info) != 0) {
- vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
- addr_t host_addr;
- addr_t linear_addr = 0;
-
- info->run_state = VM_ERROR;
-
- PrintDebug("SVM ERROR!!\n");
+ if (v3_handle_svm_exit(info) != 0) {
+ vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
+ addr_t host_addr;
+ addr_t linear_addr = 0;
+
+ info->run_state = VM_ERROR;
+
+ PrintDebug("SVM ERROR!!\n");
- PrintDebug("RIP: %p\n", (void *)(addr_t)(guest_state->rip));
+ PrintDebug("RIP: %p\n", (void *)(addr_t)(guest_state->rip));
- linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
+ linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
- PrintDebug("RIP Linear: %p\n", (void *)linear_addr);
- v3_print_segments(info);
- v3_print_ctrl_regs(info);
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- PrintDebug("Shadow Paging Guest Registers:\n");
- PrintDebug("\tGuest CR0=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr0));
- PrintDebug("\tGuest CR3=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr3));
- // efer
- // CR4
- }
- v3_print_GPRs(info);
+ PrintDebug("RIP Linear: %p\n", (void *)linear_addr);
+ v3_print_segments(info);
+ v3_print_ctrl_regs(info);
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ PrintDebug("Shadow Paging Guest Registers:\n");
+ PrintDebug("\tGuest CR0=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr0));
+ PrintDebug("\tGuest CR3=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr3));
+ // efer
+ // CR4
+ }
+ v3_print_GPRs(info);
- PrintDebug("SVM Exit Code: %p\n", (void *)(addr_t)guest_ctrl->exit_code);
+ PrintDebug("SVM Exit Code: %p\n", (void *)(addr_t)guest_ctrl->exit_code);
- PrintDebug("exit_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1));
- PrintDebug("exit_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
+ PrintDebug("exit_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1));
+ PrintDebug("exit_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
- PrintDebug("exit_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
- PrintDebug("exit_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
+ PrintDebug("exit_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
+ PrintDebug("exit_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
- if (info->mem_mode == PHYSICAL_MEM) {
- guest_pa_to_host_va(info, linear_addr, &host_addr);
- } else if (info->mem_mode == VIRTUAL_MEM) {
- guest_va_to_host_va(info, linear_addr, &host_addr);
- }
+ if (info->mem_mode == PHYSICAL_MEM) {
+ guest_pa_to_host_va(info, linear_addr, &host_addr);
+ } else if (info->mem_mode == VIRTUAL_MEM) {
+ guest_va_to_host_va(info, linear_addr, &host_addr);
+ }
- PrintDebug("Host Address of rip = 0x%p\n", (void *)host_addr);
+ PrintDebug("Host Address of rip = 0x%p\n", (void *)host_addr);
- PrintDebug("Instr (15 bytes) at %p:\n", (void *)host_addr);
- PrintTraceMemDump((uchar_t *)host_addr, 15);
+ PrintDebug("Instr (15 bytes) at %p:\n", (void *)host_addr);
+ PrintTraceMemDump((uchar_t *)host_addr, 15);
- break;
+ break;
+ }
}
-
- }
- return 0;
+ return 0;
}
/* Checks machine SVM capability */
/* Implemented from: AMD Arch Manual 3, sect 15.4 */
int v3_is_svm_capable() {
+ // Dinda
+ uint_t vm_cr_low = 0, vm_cr_high = 0;
+ addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
-#if 1
- // Dinda
- uint_t vm_cr_low = 0, vm_cr_high = 0;
- addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
-
- v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+ v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_ecx=%p\n", (void *)ecx);
+ PrintDebug("CPUID_FEATURE_IDS_ecx=%p\n", (void *)ecx);
- if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
- PrintDebug("SVM Not Available\n");
- return 0;
- } else {
- v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
-
- PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
-
- if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
- PrintDebug("SVM is available but is disabled.\n");
-
- v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
-
- PrintDebug("CPUID_FEATURE_IDS_edx=%p\n", (void *)edx);
-
- if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
- PrintDebug("SVM BIOS Disabled, not unlockable\n");
- } else {
- PrintDebug("SVM is locked with a key\n");
- }
+ if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
+ PrintDebug("SVM Not Available\n");
return 0;
-
- } else {
- PrintDebug("SVM is available and enabled.\n");
-
- v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_eax=%p\n", (void *)eax);
- PrintDebug("CPUID_FEATURE_IDS_ebx=%p\n", (void *)ebx);
- PrintDebug("CPUID_FEATURE_IDS_ecx=%p\n", (void *)ecx);
- PrintDebug("CPUID_FEATURE_IDS_edx=%p\n", (void *)edx);
-
-
- if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
- PrintDebug("SVM Nested Paging not supported\n");
- } else {
- PrintDebug("SVM Nested Paging supported\n");
- }
-
- return 1;
-
+ } else {
+ v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
+
+ PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
+
+ if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
+ PrintDebug("SVM is available but is disabled.\n");
+
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+
+ PrintDebug("CPUID_FEATURE_IDS_edx=%p\n", (void *)edx);
+
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
+ PrintDebug("SVM BIOS Disabled, not unlockable\n");
+ } else {
+ PrintDebug("SVM is locked with a key\n");
+ }
+ return 0;
+
+ } else {
+ PrintDebug("SVM is available and enabled.\n");
+
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+ PrintDebug("CPUID_FEATURE_IDS_eax=%p\n", (void *)eax);
+ PrintDebug("CPUID_FEATURE_IDS_ebx=%p\n", (void *)ebx);
+ PrintDebug("CPUID_FEATURE_IDS_ecx=%p\n", (void *)ecx);
+ PrintDebug("CPUID_FEATURE_IDS_edx=%p\n", (void *)edx);
+
+
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
+ PrintDebug("SVM Nested Paging not supported\n");
+ } else {
+ PrintDebug("SVM Nested Paging supported\n");
+ }
+
+ return 1;
+ }
}
- }
-
-#else
- uint_t eax = 0, ebx = 0, ecx = 0, edx = 0;
- addr_t vm_cr_low = 0, vm_cr_high = 0;
-
- v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
-
- if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
- PrintDebug("SVM Not Available\n");
- return 0;
- }
-
- v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
-
- PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
-
-
- // this part is clearly wrong, since the np bit is in
- // edx, not ecx
- if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
- PrintDebug("Nested Paging not supported\n");
- } else {
- PrintDebug("Nested Paging supported\n");
- }
-
- if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 0) {
- PrintDebug("SVM is disabled.\n");
- return 1;
- }
-
- v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
-
- if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
- PrintDebug("SVM BIOS Disabled, not unlockable\n");
- } else {
- PrintDebug("SVM is locked with a key\n");
- }
-
- return 0;
-
-#endif
-
}
static int has_svm_nested_paging() {
- addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+ addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
- v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
+ //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
- if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
- PrintDebug("SVM Nested Paging not supported\n");
- return 0;
- } else {
- PrintDebug("SVM Nested Paging supported\n");
- return 1;
- }
-
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
+ PrintDebug("SVM Nested Paging not supported\n");
+ return 0;
+ } else {
+ PrintDebug("SVM Nested Paging supported\n");
+ return 1;
+ }
}
void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) {
- reg_ex_t msr;
- void * host_state;
+ reg_ex_t msr;
+ void * host_state;
+ // Enable SVM on the CPU
+ v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
+ msr.e_reg.low |= EFER_MSR_svm_enable;
+ v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
- // Enable SVM on the CPU
- v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
- msr.e_reg.low |= EFER_MSR_svm_enable;
- v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
-
- PrintDebug("SVM Enabled\n");
+ PrintDebug("SVM Enabled\n");
- // Setup the host state save area
- host_state = V3_AllocPages(4);
-
+ // Setup the host state save area
+ host_state = V3_AllocPages(4);
+
- /* 64-BIT-ISSUE */
- // msr.e_reg.high = 0;
- //msr.e_reg.low = (uint_t)host_state;
- msr.r_reg = (addr_t)host_state;
+ /* 64-BIT-ISSUE */
+ // msr.e_reg.high = 0;
+ //msr.e_reg.low = (uint_t)host_state;
+ msr.r_reg = (addr_t)host_state;
- PrintDebug("Host State being saved at %p\n", (void *)(addr_t)host_state);
- v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
+ PrintDebug("Host State being saved at %p\n", (void *)(addr_t)host_state);
+ v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
- // Setup the SVM specific vmm operations
- vmm_ops->init_guest = &init_svm_guest;
- vmm_ops->start_guest = &start_svm_guest;
- vmm_ops->has_nested_paging = &has_svm_nested_paging;
+ // Setup the SVM specific vmm operations
+ vmm_ops->init_guest = &init_svm_guest;
+ vmm_ops->start_guest = &start_svm_guest;
+ vmm_ops->has_nested_paging = &has_svm_nested_paging;
- return;
+ return;
}
int v3_handle_svm_halt(struct guest_info * info)
{
- if (info->cpl!=0) {
- v3_raise_exception(info, GPF_EXCEPTION);
- } else {
+ if (info->cpl!=0) {
+ v3_raise_exception(info, GPF_EXCEPTION);
+ } else {
- // What we should do is starting waiting on an OS event that will
- // result in an injection of an interrupt.
+ // What we should do is starting waiting on an OS event that will
+ // result in an injection of an interrupt.
+
+ // What we will hackishly do instead is resume on any event
+ // Plus is this totally GeekOS specific
+
+ ullong_t yield_start = 0;
+ ullong_t yield_stop = 0;
+ uint32_t gap = 0;
+
+ PrintDebug("GeekOS Yield\n");
+
+ rdtscll(yield_start);
+ V3_Yield();
+ rdtscll(yield_stop);
- // What we will hackishly do instead is resume on any event
- // Plus is this totally GeekOS specific
- ullong_t yield_start = 0;
- ullong_t yield_stop = 0;
- uint32_t gap = 0;
-
- PrintDebug("GeekOS Yield\n");
-
- rdtscll(yield_start);
- V3_Yield();
- rdtscll(yield_stop);
-
-
- //v3_update_time(info, yield_stop - yield_start);
- gap = yield_stop - yield_start;
- v3_raise_irq(info, 0);
-
- PrintDebug("GeekOS Yield Done (%d cycles)\n", gap);
-
- info->rip+=1;
- }
-
- return 0;
-
+ //v3_update_time(info, yield_stop - yield_start);
+ gap = yield_stop - yield_start;
+ v3_raise_irq(info, 0);
+
+ PrintDebug("GeekOS Yield Done (%d cycles)\n", gap);
+
+ info->rip+=1;
+ }
+ return 0;
}
int v3_handle_svm_exit(struct guest_info * info) {
- vmcb_ctrl_t * guest_ctrl = 0;
- vmcb_saved_state_t * guest_state = 0;
- ulong_t exit_code = 0;
-
- guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
- guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ vmcb_ctrl_t * guest_ctrl = 0;
+ vmcb_saved_state_t * guest_state = 0;
+ ulong_t exit_code = 0;
+
+ guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
+ guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
- // Update the high level state
- info->rip = guest_state->rip;
- info->vm_regs.rsp = guest_state->rsp;
- info->vm_regs.rax = guest_state->rax;
+ // Update the high level state
+ info->rip = guest_state->rip;
+ info->vm_regs.rsp = guest_state->rsp;
+ info->vm_regs.rax = guest_state->rax;
- info->cpl = guest_state->cpl;
+ info->cpl = guest_state->cpl;
- info->ctrl_regs.cr0 = guest_state->cr0;
- info->ctrl_regs.cr2 = guest_state->cr2;
- info->ctrl_regs.cr3 = guest_state->cr3;
- info->ctrl_regs.cr4 = guest_state->cr4;
- info->dbg_regs.dr6 = guest_state->dr6;
- info->dbg_regs.dr7 = guest_state->dr7;
- info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
- info->ctrl_regs.rflags = guest_state->rflags;
- info->ctrl_regs.efer = guest_state->efer;
-
- get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
- info->cpu_mode = v3_get_cpu_mode(info);
- info->mem_mode = v3_get_mem_mode(info);
+ info->ctrl_regs.cr0 = guest_state->cr0;
+ info->ctrl_regs.cr2 = guest_state->cr2;
+ info->ctrl_regs.cr3 = guest_state->cr3;
+ info->ctrl_regs.cr4 = guest_state->cr4;
+ info->dbg_regs.dr6 = guest_state->dr6;
+ info->dbg_regs.dr7 = guest_state->dr7;
+ info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
+ info->ctrl_regs.rflags = guest_state->rflags;
+ info->ctrl_regs.efer = guest_state->efer;
+
+ get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
+ info->cpu_mode = v3_get_cpu_mode(info);
+ info->mem_mode = v3_get_mem_mode(info);
- exit_code = guest_ctrl->exit_code;
+ exit_code = guest_ctrl->exit_code;
- // Disable printing io exits due to bochs debug messages
- //if (!((exit_code == VMEXIT_IOIO) && ((ushort_t)(guest_ctrl->exit_info1 >> 16) == 0x402))) {
-
-
- // PrintDebug("SVM Returned: Exit Code: 0x%x \t\t(tsc=%ul)\n",exit_code, (uint_t)info->time_state.guest_tsc);
-
- if ((0) && (exit_code <= VMEXIT_EXCP14)) {
- uchar_t instr[32];
- int ret;
- // Dump out the instr stream
-
- //PrintDebug("RIP: %x\n", guest_state->rip);
- PrintDebug("\n\n\nRIP Linear: %p\n", (void *)get_addr_linear(info, info->rip, &(info->segments.cs)));
-
- v3_print_GPRs(info);
- v3_print_ctrl_regs(info);
-
-
- // OK, now we will read the instruction
- // The only difference between PROTECTED and PROTECTED_PG is whether we read
- // from guest_pa or guest_va
- if (info->mem_mode == PHYSICAL_MEM) {
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 32, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 32, instr);
- }
+ // Disable printing io exits due to bochs debug messages
+ //if (!((exit_code == VMEXIT_IOIO) && ((ushort_t)(guest_ctrl->exit_info1 >> 16) == 0x402))) {
+
+ // PrintDebug("SVM Returned: Exit Code: 0x%x \t\t(tsc=%ul)\n",exit_code, (uint_t)info->time_state.guest_tsc);
+
+ if ((0) && (exit_code <= VMEXIT_EXCP14)) {
+ uchar_t instr[32];
+ int ret;
+ // Dump out the instr stream
+ //PrintDebug("RIP: %x\n", guest_state->rip);
+ PrintDebug("\n\n\nRIP Linear: %p\n", (void *)get_addr_linear(info, info->rip, &(info->segments.cs)));
+
+ v3_print_GPRs(info);
+ v3_print_ctrl_regs(info);
+
+
+ // OK, now we will read the instruction
+ // The only difference between PROTECTED and PROTECTED_PG is whether we read
+ // from guest_pa or guest_va
+ if (info->mem_mode == PHYSICAL_MEM) {
+ // The real rip address is actually a combination of the rip + CS base
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 32, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 32, instr);
+ }
+
- if (ret != 32) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- } else {
- PrintDebug("Instr Stream:\n");
- PrintTraceMemDump(instr, 32);
+ if (ret != 32) {
+ // I think we should inject a GPF into the guest
+ PrintDebug("Could not read instruction (ret=%d)\n", ret);
+ } else {
+ PrintDebug("Instr Stream:\n");
+ PrintTraceMemDump(instr, 32);
+ }
}
- }
-
-
-
- if (info->enable_profiler) {
- rdtscll(info->profiler.start_time);
- }
-
- //PrintDebug("SVM Returned: Exit Code: %x\n",exit_code);
- switch (exit_code) {
- case VMEXIT_IOIO:
- {
- struct svm_io_info * io_info = (struct svm_io_info *)&(guest_ctrl->exit_info1);
-
- if (io_info->type == 0) {
- if (io_info->str) {
- if (v3_handle_svm_io_outs(info) == -1 ) {
- return -1;
- }
- } else {
- if (v3_handle_svm_io_out(info) == -1) {
- return -1;
- }
- }
- } else {
- if (io_info->str) {
- if (v3_handle_svm_io_ins(info) == -1) {
- return -1;
- }
- } else {
- if (v3_handle_svm_io_in(info) == -1) {
- return -1;
- }
- }
- }
- break;
+ if (info->enable_profiler) {
+ rdtscll(info->profiler.start_time);
}
- case VMEXIT_MSR:
- {
- if (guest_ctrl->exit_info1 == 0) {
- if (v3_handle_msr_read(info) == -1) {
- return -1;
- }
- } else if (guest_ctrl->exit_info1 == 1) {
- if (v3_handle_msr_write(info) == -1) {
- return -1;
+
+ //PrintDebug("SVM Returned: Exit Code: %x\n",exit_code);
+
+ switch (exit_code) {
+ case VMEXIT_IOIO: {
+ struct svm_io_info * io_info = (struct svm_io_info *)&(guest_ctrl->exit_info1);
+
+ if (io_info->type == 0) {
+ if (io_info->str) {
+
+ if (v3_handle_svm_io_outs(info) == -1 ) {
+ return -1;
+ }
+ } else {
+ if (v3_handle_svm_io_out(info) == -1) {
+ return -1;
+ }
+ }
+
+ } else {
+
+ if (io_info->str) {
+ if (v3_handle_svm_io_ins(info) == -1) {
+ return -1;
+ }
+ } else {
+ if (v3_handle_svm_io_in(info) == -1) {
+ return -1;
+ }
+ }
+
+ }
+ break;
}
- } else {
- PrintError("Invalid MSR Operation\n");
- return -1;
- }
-
- break;
- }
- case VMEXIT_CR0_WRITE:
- {
+ case VMEXIT_MSR:
+ if (guest_ctrl->exit_info1 == 0) {
+ if (v3_handle_msr_read(info) == -1) {
+ return -1;
+ }
+ } else if (guest_ctrl->exit_info1 == 1) {
+ if (v3_handle_msr_write(info) == -1) {
+ return -1;
+ }
+ } else {
+ PrintError("Invalid MSR Operation\n");
+ return -1;
+ }
+
+ break;
+ case VMEXIT_CR0_WRITE:
#ifdef DEBUG_CTRL_REGS
- PrintDebug("CR0 Write\n");
+ PrintDebug("CR0 Write\n");
#endif
- if (v3_handle_cr0_write(info) == -1) {
- return -1;
- }
- break;
- }
- case VMEXIT_CR0_READ:
- {
+ if (v3_handle_cr0_write(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_CR0_READ:
#ifdef DEBUG_CTRL_REGS
- PrintDebug("CR0 Read\n");
+ PrintDebug("CR0 Read\n");
#endif
- if (v3_handle_cr0_read(info) == -1) {
- return -1;
- }
- break;
- }
- case VMEXIT_CR3_WRITE:
- {
+ if (v3_handle_cr0_read(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_CR3_WRITE:
#ifdef DEBUG_CTRL_REGS
- PrintDebug("CR3 Write\n");
+ PrintDebug("CR3 Write\n");
#endif
- if (v3_handle_cr3_write(info) == -1) {
- return -1;
- }
- break;
- }
- case VMEXIT_CR3_READ:
- {
+ if (v3_handle_cr3_write(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_CR3_READ:
#ifdef DEBUG_CTRL_REGS
- PrintDebug("CR3 Read\n");
+ PrintDebug("CR3 Read\n");
#endif
- if (v3_handle_cr3_read(info) == -1) {
- return -1;
- }
- break;
- }
- case VMEXIT_CR4_WRITE:
- {
+ if (v3_handle_cr3_read(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_CR4_WRITE:
#ifdef DEBUG_CTRL_REGS
- PrintDebug("CR4 Write\n");
+ PrintDebug("CR4 Write\n");
#endif
- if (v3_handle_cr4_write(info) == -1) {
- return -1;
- }
- break;
- }
- case VMEXIT_CR4_READ:
- {
+ if (v3_handle_cr4_write(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_CR4_READ:
#ifdef DEBUG_CTRL_REGS
- PrintDebug("CR4 Read\n");
+ PrintDebug("CR4 Read\n");
#endif
- if (v3_handle_cr4_read(info) == -1) {
- return -1;
- }
- break;
- }
-
- case VMEXIT_EXCP14:
- {
- addr_t fault_addr = guest_ctrl->exit_info2;
- pf_error_t * error_code = (pf_error_t *)&(guest_ctrl->exit_info1);
+ if (v3_handle_cr4_read(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_EXCP14: {
+ addr_t fault_addr = guest_ctrl->exit_info2;
+ pf_error_t * error_code = (pf_error_t *)&(guest_ctrl->exit_info1);
#ifdef DEBUG_SHADOW_PAGING
- PrintDebug("PageFault at %p (error=%d)\n",
- (void *)fault_addr, *(uint_t *)error_code);
+ PrintDebug("PageFault at %p (error=%d)\n",
+ (void *)fault_addr, *(uint_t *)error_code);
#endif
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- if (v3_handle_shadow_pagefault(info, fault_addr, *error_code) == -1) {
- return -1;
- }
- } else {
- PrintError("Page fault in un implemented paging mode\n");
- return -1;
- }
- break;
- }
- case VMEXIT_NPF:
- {
- PrintError("Currently unhandled Nested Page Fault\n");
- return -1;
-
- break;
- }
- case VMEXIT_INVLPG:
- {
- if (info->shdw_pg_mode == SHADOW_PAGING) {
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ if (v3_handle_shadow_pagefault(info, fault_addr, *error_code) == -1) {
+ return -1;
+ }
+ } else {
+ PrintError("Page fault in un implemented paging mode\n");
+ return -1;
+ }
+ break;
+ }
+ case VMEXIT_NPF:
+
+ PrintError("Currently unhandled Nested Page Fault\n");
+ return -1;
+
+ break;
+ case VMEXIT_INVLPG:
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
#ifdef DEBUG_SHADOW_PAGING
- PrintDebug("Invlpg\n");
+ PrintDebug("Invlpg\n");
#endif
- if (v3_handle_shadow_invlpg(info) == -1) {
- return -1;
- }
- }
-
- /*
- (exit_code == VMEXIT_INVLPGA) ||
- */
- break;
- }
-
-
-
- case VMEXIT_VMMCALL:
- {
- /*
- * Hypercall
- */
-
- if (v3_handle_hypercall(info) == -1) {
- return -1;
- }
-
- // VMMCALL is a 3 byte op
- info->rip += 3;
- break;
- }
-
-
- case VMEXIT_INTR:
- {
- // handled by interrupt dispatch earlier
- break;
- }
- case VMEXIT_SMI:
- {
- // handle_svm_smi(info); // ignored for now
- break;
- }
- case VMEXIT_HLT:
- {
+ if (v3_handle_shadow_invlpg(info) == -1) {
+ return -1;
+ }
+ }
+ break;
+ case VMEXIT_VMMCALL:
+ /*
+ * Hypercall
+ */
+
+ if (v3_handle_hypercall(info) == -1) {
+ return -1;
+ }
+
+ // VMMCALL is a 3 byte op
+ info->rip += 3;
+ break;
+ case VMEXIT_INTR:
+ // handled by interrupt dispatch earlier
+ break;
+ case VMEXIT_SMI:
+ // handle_svm_smi(info); // ignored for now
+ break;
+ case VMEXIT_HLT:
#ifdef DEBUG_HALT
- PrintDebug("Guest halted\n");
+ PrintDebug("Guest halted\n");
#endif
- if (v3_handle_svm_halt(info) == -1) {
- return -1;
- }
- break;
- }
- case VMEXIT_PAUSE: {
- //PrintDebug("Guest paused\n");
- if (v3_handle_svm_pause(info) == -1) {
- return -1;
- }
- }
- break;
-
-
-
-
- case VMEXIT_WBINVD:
- {
+ if (v3_handle_svm_halt(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_PAUSE:
+ //PrintDebug("Guest paused\n");
+ if (v3_handle_svm_pause(info) == -1) {
+ return -1;
+ }
+ break;
+ case VMEXIT_WBINVD:
#ifdef DEBUG_EMULATOR
- PrintDebug("WBINVD\n");
+ PrintDebug("WBINVD\n");
#endif
- if (v3_handle_svm_wbinvd(info) == -1) {
- return -1;
- }
- break;
- }
-
-
+ if (v3_handle_svm_wbinvd(info) == -1) {
+ return -1;
+ }
+ break;
+
- /* Exits Following this line are NOT HANDLED */
- /*=======================================================================*/
- default:
- {
- addr_t rip_addr;
-
- PrintDebug("Unhandled SVM Exit: %s\n", vmexit_code_to_str(exit_code));
-
- rip_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
-
-
- PrintError("SVM Returned:(VMCB=%p)\n", (void *)(info->vmm_data));
- PrintError("RIP: %p\n", (void *)(addr_t)(guest_state->rip));
- PrintError("RIP Linear: %p\n", (void *)(addr_t)(rip_addr));
-
- PrintError("SVM Returned: Exit Code: %p\n", (void *)(addr_t)exit_code);
-
- PrintError("io_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1));
- PrintError("io_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
-
- PrintError("io_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
- PrintError("io_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
-
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- PrintHostPageTables(info, info->ctrl_regs.cr3);
- //PrintGuestPageTables(info, info->shdw_pg_state.guest_cr3);
- }
-
- return -1;
-
+ /* Exits Following this line are NOT HANDLED */
+ /*=======================================================================*/
+
+ default: {
+
+ addr_t rip_addr;
+
+ PrintDebug("Unhandled SVM Exit: %s\n", vmexit_code_to_str(exit_code));
+
+ rip_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
+
+
+ PrintError("SVM Returned:(VMCB=%p)\n", (void *)(info->vmm_data));
+ PrintError("RIP: %p\n", (void *)(addr_t)(guest_state->rip));
+ PrintError("RIP Linear: %p\n", (void *)(addr_t)(rip_addr));
+
+ PrintError("SVM Returned: Exit Code: %p\n", (void *)(addr_t)exit_code);
+
+ PrintError("io_info1 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info1));
+ PrintError("io_info1 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
+
+ PrintError("io_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
+ PrintError("io_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
+
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ PrintHostPageTables(info, info->ctrl_regs.cr3);
+ //PrintGuestPageTables(info, info->shdw_pg_state.guest_cr3);
+ }
+
+ return -1;
+ }
}
- break;
-
- }
- // END OF SWITCH (EXIT_CODE)
+ // END OF SWITCH (EXIT_CODE)
- if (info->enable_profiler) {
- rdtscll(info->profiler.end_time);
- v3_profile_exit(info, exit_code);
- }
+ if (info->enable_profiler) {
+ rdtscll(info->profiler.end_time);
+ v3_profile_exit(info, exit_code);
+ }
- // Update the low level state
-
- if (v3_intr_pending(info)) {
-
- switch (v3_get_intr_type(info)) {
- case EXTERNAL_IRQ:
- {
- uint_t irq = v3_get_intr_number(info);
-
- // check to see if ==-1 (non exists)
-
- /*
- guest_ctrl->EVENTINJ.vector = irq;
- guest_ctrl->EVENTINJ.valid = 1;
- guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXTERNAL_INTR;
- */
-
- guest_ctrl->guest_ctrl.V_IRQ = 1;
- guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
- guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
- guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
+ // Update the low level state
+
+ if (v3_intr_pending(info)) {
+
+ switch (v3_get_intr_type(info)) {
+ case EXTERNAL_IRQ: {
+ uint_t irq = v3_get_intr_number(info);
+
+ // check to see if ==-1 (non exists)
+
+ /*
+ guest_ctrl->EVENTINJ.vector = irq;
+ guest_ctrl->EVENTINJ.valid = 1;
+ guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXTERNAL_INTR;
+ */
+
+ guest_ctrl->guest_ctrl.V_IRQ = 1;
+ guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
+ guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
+ guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
#ifdef DEBUG_INTERRUPTS
- PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
- guest_ctrl->guest_ctrl.V_INTR_VECTOR,
- (void *)(addr_t)info->rip);
+ PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
+ guest_ctrl->guest_ctrl.V_INTR_VECTOR,
+ (void *)(addr_t)info->rip);
#endif
- v3_injecting_intr(info, irq, EXTERNAL_IRQ);
-
- break;
- }
- case NMI:
- guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
- break;
- case EXCEPTION:
- {
- uint_t excp = v3_get_intr_number(info);
-
- guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
-
- if (info->intr_state.excp_error_code_valid) { //PAD
- guest_ctrl->EVENTINJ.error_code = info->intr_state.excp_error_code;
- guest_ctrl->EVENTINJ.ev = 1;
+ v3_injecting_intr(info, irq, EXTERNAL_IRQ);
+
+ break;
+ }
+ case NMI:
+ guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
+ break;
+ case EXCEPTION: {
+ uint_t excp = v3_get_intr_number(info);
+
+ guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
+
+ if (info->intr_state.excp_error_code_valid) { //PAD
+ guest_ctrl->EVENTINJ.error_code = info->intr_state.excp_error_code;
+ guest_ctrl->EVENTINJ.ev = 1;
#ifdef DEBUG_INTERRUPTS
- PrintDebug("Injecting error code %x\n", guest_ctrl->EVENTINJ.error_code);
+ PrintDebug("Injecting error code %x\n", guest_ctrl->EVENTINJ.error_code);
#endif
+ }
+
+ guest_ctrl->EVENTINJ.vector = excp;
+
+ guest_ctrl->EVENTINJ.valid = 1;
+#ifdef DEBUG_INTERRUPTS
+ PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
+ guest_ctrl->EVENTINJ.vector,
+ (void *)(addr_t)info->rip);
+#endif
+ v3_injecting_intr(info, excp, EXCEPTION);
+ break;
+ }
+ case SOFTWARE_INTR:
+ guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
+ break;
+ case VIRTUAL_INTR:
+ guest_ctrl->EVENTINJ.type = SVM_INJECTION_VIRTUAL_INTR;
+ break;
+
+ case INVALID_INTR:
+ default:
+ PrintError("Attempted to issue an invalid interrupt\n");
+ return -1;
}
- guest_ctrl->EVENTINJ.vector = excp;
-
- guest_ctrl->EVENTINJ.valid = 1;
+ } else {
#ifdef DEBUG_INTERRUPTS
- PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
- guest_ctrl->EVENTINJ.vector,
- (void *)(addr_t)info->rip);
+ PrintDebug("No interrupts/exceptions pending\n");
#endif
- v3_injecting_intr(info, excp, EXCEPTION);
- break;
- }
- case SOFTWARE_INTR:
- guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
- break;
- case VIRTUAL_INTR:
- guest_ctrl->EVENTINJ.type = SVM_INJECTION_VIRTUAL_INTR;
- break;
-
- case INVALID_INTR:
- default:
- PrintError("Attempted to issue an invalid interrupt\n");
- return -1;
}
+
+ guest_state->cr0 = info->ctrl_regs.cr0;
+ guest_state->cr2 = info->ctrl_regs.cr2;
+ guest_state->cr3 = info->ctrl_regs.cr3;
+ guest_state->cr4 = info->ctrl_regs.cr4;
+ guest_state->dr6 = info->dbg_regs.dr6;
+ guest_state->dr7 = info->dbg_regs.dr7;
+ guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
+ guest_state->rflags = info->ctrl_regs.rflags;
+ guest_state->efer = info->ctrl_regs.efer;
+
+ guest_state->cpl = info->cpl;
- } else {
-#ifdef DEBUG_INTERRUPTS
- PrintDebug("No interrupts/exceptions pending\n");
-#endif
- }
-
- guest_state->cr0 = info->ctrl_regs.cr0;
- guest_state->cr2 = info->ctrl_regs.cr2;
- guest_state->cr3 = info->ctrl_regs.cr3;
- guest_state->cr4 = info->ctrl_regs.cr4;
- guest_state->dr6 = info->dbg_regs.dr6;
- guest_state->dr7 = info->dbg_regs.dr7;
- guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
- guest_state->rflags = info->ctrl_regs.rflags;
- guest_state->efer = info->ctrl_regs.efer;
-
- guest_state->cpl = info->cpl;
-
- guest_state->rax = info->vm_regs.rax;
- guest_state->rip = info->rip;
- guest_state->rsp = info->vm_regs.rsp;
-
+ guest_state->rax = info->vm_regs.rax;
+ guest_state->rip = info->rip;
+ guest_state->rsp = info->vm_regs.rsp;
- set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
- if (exit_code == VMEXIT_INTR) {
- //PrintDebug("INTR ret IP = %x\n", guest_state->rip);
- }
+ set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
- return 0;
+ if (exit_code == VMEXIT_INTR) {
+ //PrintDebug("INTR ret IP = %x\n", guest_state->rip);
+ }
+
+ return 0;
}
const char * vmexit_code_to_str(uint_t exit_code) {
- switch(exit_code) {
- case VMEXIT_CR0_READ:
- return VMEXIT_CR0_READ_STR;
- case VMEXIT_CR1_READ:
- return VMEXIT_CR1_READ_STR;
- case VMEXIT_CR2_READ:
- return VMEXIT_CR2_READ_STR;
- case VMEXIT_CR3_READ:
- return VMEXIT_CR3_READ_STR;
- case VMEXIT_CR4_READ:
- return VMEXIT_CR4_READ_STR;
- case VMEXIT_CR5_READ:
- return VMEXIT_CR5_READ_STR;
- case VMEXIT_CR6_READ:
- return VMEXIT_CR6_READ_STR;
- case VMEXIT_CR7_READ:
- return VMEXIT_CR7_READ_STR;
- case VMEXIT_CR8_READ:
- return VMEXIT_CR8_READ_STR;
- case VMEXIT_CR9_READ:
- return VMEXIT_CR9_READ_STR;
- case VMEXIT_CR10_READ:
- return VMEXIT_CR10_READ_STR;
- case VMEXIT_CR11_READ:
- return VMEXIT_CR11_READ_STR;
- case VMEXIT_CR12_READ:
- return VMEXIT_CR12_READ_STR;
- case VMEXIT_CR13_READ:
- return VMEXIT_CR13_READ_STR;
- case VMEXIT_CR14_READ:
- return VMEXIT_CR14_READ_STR;
- case VMEXIT_CR15_READ:
- return VMEXIT_CR15_READ_STR;
- case VMEXIT_CR0_WRITE:
- return VMEXIT_CR0_WRITE_STR;
- case VMEXIT_CR1_WRITE:
- return VMEXIT_CR1_WRITE_STR;
- case VMEXIT_CR2_WRITE:
- return VMEXIT_CR2_WRITE_STR;
- case VMEXIT_CR3_WRITE:
- return VMEXIT_CR3_WRITE_STR;
- case VMEXIT_CR4_WRITE:
- return VMEXIT_CR4_WRITE_STR;
- case VMEXIT_CR5_WRITE:
- return VMEXIT_CR5_WRITE_STR;
- case VMEXIT_CR6_WRITE:
- return VMEXIT_CR6_WRITE_STR;
- case VMEXIT_CR7_WRITE:
- return VMEXIT_CR7_WRITE_STR;
- case VMEXIT_CR8_WRITE:
- return VMEXIT_CR8_WRITE_STR;
- case VMEXIT_CR9_WRITE:
- return VMEXIT_CR9_WRITE_STR;
- case VMEXIT_CR10_WRITE:
- return VMEXIT_CR10_WRITE_STR;
- case VMEXIT_CR11_WRITE:
- return VMEXIT_CR11_WRITE_STR;
- case VMEXIT_CR12_WRITE:
- return VMEXIT_CR12_WRITE_STR;
- case VMEXIT_CR13_WRITE:
- return VMEXIT_CR13_WRITE_STR;
- case VMEXIT_CR14_WRITE:
- return VMEXIT_CR14_WRITE_STR;
- case VMEXIT_CR15_WRITE:
- return VMEXIT_CR15_WRITE_STR;
- case VMEXIT_DR0_READ:
- return VMEXIT_DR0_READ_STR;
- case VMEXIT_DR1_READ:
- return VMEXIT_DR1_READ_STR;
- case VMEXIT_DR2_READ:
- return VMEXIT_DR2_READ_STR;
- case VMEXIT_DR3_READ:
- return VMEXIT_DR3_READ_STR;
- case VMEXIT_DR4_READ:
- return VMEXIT_DR4_READ_STR;
- case VMEXIT_DR5_READ:
- return VMEXIT_DR5_READ_STR;
- case VMEXIT_DR6_READ:
- return VMEXIT_DR6_READ_STR;
- case VMEXIT_DR7_READ:
- return VMEXIT_DR7_READ_STR;
- case VMEXIT_DR8_READ:
- return VMEXIT_DR8_READ_STR;
- case VMEXIT_DR9_READ:
- return VMEXIT_DR9_READ_STR;
- case VMEXIT_DR10_READ:
- return VMEXIT_DR10_READ_STR;
- case VMEXIT_DR11_READ:
- return VMEXIT_DR11_READ_STR;
- case VMEXIT_DR12_READ:
- return VMEXIT_DR12_READ_STR;
- case VMEXIT_DR13_READ:
- return VMEXIT_DR13_READ_STR;
- case VMEXIT_DR14_READ:
- return VMEXIT_DR14_READ_STR;
- case VMEXIT_DR15_READ:
- return VMEXIT_DR15_READ_STR;
- case VMEXIT_DR0_WRITE:
- return VMEXIT_DR0_WRITE_STR;
- case VMEXIT_DR1_WRITE:
- return VMEXIT_DR1_WRITE_STR;
- case VMEXIT_DR2_WRITE:
- return VMEXIT_DR2_WRITE_STR;
- case VMEXIT_DR3_WRITE:
- return VMEXIT_DR3_WRITE_STR;
- case VMEXIT_DR4_WRITE:
- return VMEXIT_DR4_WRITE_STR;
- case VMEXIT_DR5_WRITE:
- return VMEXIT_DR5_WRITE_STR;
- case VMEXIT_DR6_WRITE:
- return VMEXIT_DR6_WRITE_STR;
- case VMEXIT_DR7_WRITE:
- return VMEXIT_DR7_WRITE_STR;
- case VMEXIT_DR8_WRITE:
- return VMEXIT_DR8_WRITE_STR;
- case VMEXIT_DR9_WRITE:
- return VMEXIT_DR9_WRITE_STR;
- case VMEXIT_DR10_WRITE:
- return VMEXIT_DR10_WRITE_STR;
- case VMEXIT_DR11_WRITE:
- return VMEXIT_DR11_WRITE_STR;
- case VMEXIT_DR12_WRITE:
- return VMEXIT_DR12_WRITE_STR;
- case VMEXIT_DR13_WRITE:
- return VMEXIT_DR13_WRITE_STR;
- case VMEXIT_DR14_WRITE:
- return VMEXIT_DR14_WRITE_STR;
- case VMEXIT_DR15_WRITE:
- return VMEXIT_DR15_WRITE_STR;
- case VMEXIT_EXCP0:
- return VMEXIT_EXCP0_STR;
- case VMEXIT_EXCP1:
- return VMEXIT_EXCP1_STR;
- case VMEXIT_EXCP2:
- return VMEXIT_EXCP2_STR;
- case VMEXIT_EXCP3:
- return VMEXIT_EXCP3_STR;
- case VMEXIT_EXCP4:
- return VMEXIT_EXCP4_STR;
- case VMEXIT_EXCP5:
- return VMEXIT_EXCP5_STR;
- case VMEXIT_EXCP6:
- return VMEXIT_EXCP6_STR;
- case VMEXIT_EXCP7:
- return VMEXIT_EXCP7_STR;
- case VMEXIT_EXCP8:
- return VMEXIT_EXCP8_STR;
- case VMEXIT_EXCP9:
- return VMEXIT_EXCP9_STR;
- case VMEXIT_EXCP10:
- return VMEXIT_EXCP10_STR;
- case VMEXIT_EXCP11:
- return VMEXIT_EXCP11_STR;
- case VMEXIT_EXCP12:
- return VMEXIT_EXCP12_STR;
- case VMEXIT_EXCP13:
- return VMEXIT_EXCP13_STR;
- case VMEXIT_EXCP14:
- return VMEXIT_EXCP14_STR;
- case VMEXIT_EXCP15:
- return VMEXIT_EXCP15_STR;
- case VMEXIT_EXCP16:
- return VMEXIT_EXCP16_STR;
- case VMEXIT_EXCP17:
- return VMEXIT_EXCP17_STR;
- case VMEXIT_EXCP18:
- return VMEXIT_EXCP18_STR;
- case VMEXIT_EXCP19:
- return VMEXIT_EXCP19_STR;
- case VMEXIT_EXCP20:
- return VMEXIT_EXCP20_STR;
- case VMEXIT_EXCP21:
- return VMEXIT_EXCP21_STR;
- case VMEXIT_EXCP22:
- return VMEXIT_EXCP22_STR;
- case VMEXIT_EXCP23:
- return VMEXIT_EXCP23_STR;
- case VMEXIT_EXCP24:
- return VMEXIT_EXCP24_STR;
- case VMEXIT_EXCP25:
- return VMEXIT_EXCP25_STR;
- case VMEXIT_EXCP26:
- return VMEXIT_EXCP26_STR;
- case VMEXIT_EXCP27:
- return VMEXIT_EXCP27_STR;
- case VMEXIT_EXCP28:
- return VMEXIT_EXCP28_STR;
- case VMEXIT_EXCP29:
- return VMEXIT_EXCP29_STR;
- case VMEXIT_EXCP30:
- return VMEXIT_EXCP30_STR;
- case VMEXIT_EXCP31:
- return VMEXIT_EXCP31_STR;
- case VMEXIT_INTR:
- return VMEXIT_INTR_STR;
- case VMEXIT_NMI:
- return VMEXIT_NMI_STR;
- case VMEXIT_SMI:
- return VMEXIT_SMI_STR;
- case VMEXIT_INIT:
- return VMEXIT_INIT_STR;
- case VMEXIT_VINITR:
- return VMEXIT_VINITR_STR;
- case VMEXIT_CR0_SEL_WRITE:
- return VMEXIT_CR0_SEL_WRITE_STR;
- case VMEXIT_IDTR_READ:
- return VMEXIT_IDTR_READ_STR;
- case VMEXIT_GDTR_READ:
- return VMEXIT_GDTR_READ_STR;
- case VMEXIT_LDTR_READ:
- return VMEXIT_LDTR_READ_STR;
- case VMEXIT_TR_READ:
- return VMEXIT_TR_READ_STR;
- case VMEXIT_IDTR_WRITE:
- return VMEXIT_IDTR_WRITE_STR;
- case VMEXIT_GDTR_WRITE:
- return VMEXIT_GDTR_WRITE_STR;
- case VMEXIT_LDTR_WRITE:
- return VMEXIT_LDTR_WRITE_STR;
- case VMEXIT_TR_WRITE:
- return VMEXIT_TR_WRITE_STR;
- case VMEXIT_RDTSC:
- return VMEXIT_RDTSC_STR;
- case VMEXIT_RDPMC:
- return VMEXIT_RDPMC_STR;
- case VMEXIT_PUSHF:
- return VMEXIT_PUSHF_STR;
- case VMEXIT_POPF:
- return VMEXIT_POPF_STR;
- case VMEXIT_CPUID:
- return VMEXIT_CPUID_STR;
- case VMEXIT_RSM:
- return VMEXIT_RSM_STR;
- case VMEXIT_IRET:
- return VMEXIT_IRET_STR;
- case VMEXIT_SWINT:
- return VMEXIT_SWINT_STR;
- case VMEXIT_INVD:
- return VMEXIT_INVD_STR;
- case VMEXIT_PAUSE:
- return VMEXIT_PAUSE_STR;
- case VMEXIT_HLT:
- return VMEXIT_HLT_STR;
- case VMEXIT_INVLPG:
- return VMEXIT_INVLPG_STR;
- case VMEXIT_INVLPGA:
- return VMEXIT_INVLPGA_STR;
- case VMEXIT_IOIO:
- return VMEXIT_IOIO_STR;
- case VMEXIT_MSR:
- return VMEXIT_MSR_STR;
- case VMEXIT_TASK_SWITCH:
- return VMEXIT_TASK_SWITCH_STR;
- case VMEXIT_FERR_FREEZE:
- return VMEXIT_FERR_FREEZE_STR;
- case VMEXIT_SHUTDOWN:
- return VMEXIT_SHUTDOWN_STR;
- case VMEXIT_VMRUN:
- return VMEXIT_VMRUN_STR;
- case VMEXIT_VMMCALL:
- return VMEXIT_VMMCALL_STR;
- case VMEXIT_VMLOAD:
- return VMEXIT_VMLOAD_STR;
- case VMEXIT_VMSAVE:
- return VMEXIT_VMSAVE_STR;
- case VMEXIT_STGI:
- return VMEXIT_STGI_STR;
- case VMEXIT_CLGI:
- return VMEXIT_CLGI_STR;
- case VMEXIT_SKINIT:
- return VMEXIT_SKINIT_STR;
- case VMEXIT_RDTSCP:
- return VMEXIT_RDTSCP_STR;
- case VMEXIT_ICEBP:
- return VMEXIT_ICEBP_STR;
- case VMEXIT_WBINVD:
- return VMEXIT_WBINVD_STR;
- case VMEXIT_MONITOR:
- return VMEXIT_MONITOR_STR;
- case VMEXIT_MWAIT:
- return VMEXIT_MWAIT_STR;
- case VMEXIT_MWAIT_CONDITIONAL:
- return VMEXIT_MWAIT_CONDITIONAL_STR;
- case VMEXIT_NPF:
- return VMEXIT_NPF_STR;
- case VMEXIT_INVALID_VMCB:
- return VMEXIT_INVALID_VMCB_STR;
- }
- return NULL;
+ switch(exit_code) {
+ case VMEXIT_CR0_READ:
+ return VMEXIT_CR0_READ_STR;
+ case VMEXIT_CR1_READ:
+ return VMEXIT_CR1_READ_STR;
+ case VMEXIT_CR2_READ:
+ return VMEXIT_CR2_READ_STR;
+ case VMEXIT_CR3_READ:
+ return VMEXIT_CR3_READ_STR;
+ case VMEXIT_CR4_READ:
+ return VMEXIT_CR4_READ_STR;
+ case VMEXIT_CR5_READ:
+ return VMEXIT_CR5_READ_STR;
+ case VMEXIT_CR6_READ:
+ return VMEXIT_CR6_READ_STR;
+ case VMEXIT_CR7_READ:
+ return VMEXIT_CR7_READ_STR;
+ case VMEXIT_CR8_READ:
+ return VMEXIT_CR8_READ_STR;
+ case VMEXIT_CR9_READ:
+ return VMEXIT_CR9_READ_STR;
+ case VMEXIT_CR10_READ:
+ return VMEXIT_CR10_READ_STR;
+ case VMEXIT_CR11_READ:
+ return VMEXIT_CR11_READ_STR;
+ case VMEXIT_CR12_READ:
+ return VMEXIT_CR12_READ_STR;
+ case VMEXIT_CR13_READ:
+ return VMEXIT_CR13_READ_STR;
+ case VMEXIT_CR14_READ:
+ return VMEXIT_CR14_READ_STR;
+ case VMEXIT_CR15_READ:
+ return VMEXIT_CR15_READ_STR;
+ case VMEXIT_CR0_WRITE:
+ return VMEXIT_CR0_WRITE_STR;
+ case VMEXIT_CR1_WRITE:
+ return VMEXIT_CR1_WRITE_STR;
+ case VMEXIT_CR2_WRITE:
+ return VMEXIT_CR2_WRITE_STR;
+ case VMEXIT_CR3_WRITE:
+ return VMEXIT_CR3_WRITE_STR;
+ case VMEXIT_CR4_WRITE:
+ return VMEXIT_CR4_WRITE_STR;
+ case VMEXIT_CR5_WRITE:
+ return VMEXIT_CR5_WRITE_STR;
+ case VMEXIT_CR6_WRITE:
+ return VMEXIT_CR6_WRITE_STR;
+ case VMEXIT_CR7_WRITE:
+ return VMEXIT_CR7_WRITE_STR;
+ case VMEXIT_CR8_WRITE:
+ return VMEXIT_CR8_WRITE_STR;
+ case VMEXIT_CR9_WRITE:
+ return VMEXIT_CR9_WRITE_STR;
+ case VMEXIT_CR10_WRITE:
+ return VMEXIT_CR10_WRITE_STR;
+ case VMEXIT_CR11_WRITE:
+ return VMEXIT_CR11_WRITE_STR;
+ case VMEXIT_CR12_WRITE:
+ return VMEXIT_CR12_WRITE_STR;
+ case VMEXIT_CR13_WRITE:
+ return VMEXIT_CR13_WRITE_STR;
+ case VMEXIT_CR14_WRITE:
+ return VMEXIT_CR14_WRITE_STR;
+ case VMEXIT_CR15_WRITE:
+ return VMEXIT_CR15_WRITE_STR;
+ case VMEXIT_DR0_READ:
+ return VMEXIT_DR0_READ_STR;
+ case VMEXIT_DR1_READ:
+ return VMEXIT_DR1_READ_STR;
+ case VMEXIT_DR2_READ:
+ return VMEXIT_DR2_READ_STR;
+ case VMEXIT_DR3_READ:
+ return VMEXIT_DR3_READ_STR;
+ case VMEXIT_DR4_READ:
+ return VMEXIT_DR4_READ_STR;
+ case VMEXIT_DR5_READ:
+ return VMEXIT_DR5_READ_STR;
+ case VMEXIT_DR6_READ:
+ return VMEXIT_DR6_READ_STR;
+ case VMEXIT_DR7_READ:
+ return VMEXIT_DR7_READ_STR;
+ case VMEXIT_DR8_READ:
+ return VMEXIT_DR8_READ_STR;
+ case VMEXIT_DR9_READ:
+ return VMEXIT_DR9_READ_STR;
+ case VMEXIT_DR10_READ:
+ return VMEXIT_DR10_READ_STR;
+ case VMEXIT_DR11_READ:
+ return VMEXIT_DR11_READ_STR;
+ case VMEXIT_DR12_READ:
+ return VMEXIT_DR12_READ_STR;
+ case VMEXIT_DR13_READ:
+ return VMEXIT_DR13_READ_STR;
+ case VMEXIT_DR14_READ:
+ return VMEXIT_DR14_READ_STR;
+ case VMEXIT_DR15_READ:
+ return VMEXIT_DR15_READ_STR;
+ case VMEXIT_DR0_WRITE:
+ return VMEXIT_DR0_WRITE_STR;
+ case VMEXIT_DR1_WRITE:
+ return VMEXIT_DR1_WRITE_STR;
+ case VMEXIT_DR2_WRITE:
+ return VMEXIT_DR2_WRITE_STR;
+ case VMEXIT_DR3_WRITE:
+ return VMEXIT_DR3_WRITE_STR;
+ case VMEXIT_DR4_WRITE:
+ return VMEXIT_DR4_WRITE_STR;
+ case VMEXIT_DR5_WRITE:
+ return VMEXIT_DR5_WRITE_STR;
+ case VMEXIT_DR6_WRITE:
+ return VMEXIT_DR6_WRITE_STR;
+ case VMEXIT_DR7_WRITE:
+ return VMEXIT_DR7_WRITE_STR;
+ case VMEXIT_DR8_WRITE:
+ return VMEXIT_DR8_WRITE_STR;
+ case VMEXIT_DR9_WRITE:
+ return VMEXIT_DR9_WRITE_STR;
+ case VMEXIT_DR10_WRITE:
+ return VMEXIT_DR10_WRITE_STR;
+ case VMEXIT_DR11_WRITE:
+ return VMEXIT_DR11_WRITE_STR;
+ case VMEXIT_DR12_WRITE:
+ return VMEXIT_DR12_WRITE_STR;
+ case VMEXIT_DR13_WRITE:
+ return VMEXIT_DR13_WRITE_STR;
+ case VMEXIT_DR14_WRITE:
+ return VMEXIT_DR14_WRITE_STR;
+ case VMEXIT_DR15_WRITE:
+ return VMEXIT_DR15_WRITE_STR;
+ case VMEXIT_EXCP0:
+ return VMEXIT_EXCP0_STR;
+ case VMEXIT_EXCP1:
+ return VMEXIT_EXCP1_STR;
+ case VMEXIT_EXCP2:
+ return VMEXIT_EXCP2_STR;
+ case VMEXIT_EXCP3:
+ return VMEXIT_EXCP3_STR;
+ case VMEXIT_EXCP4:
+ return VMEXIT_EXCP4_STR;
+ case VMEXIT_EXCP5:
+ return VMEXIT_EXCP5_STR;
+ case VMEXIT_EXCP6:
+ return VMEXIT_EXCP6_STR;
+ case VMEXIT_EXCP7:
+ return VMEXIT_EXCP7_STR;
+ case VMEXIT_EXCP8:
+ return VMEXIT_EXCP8_STR;
+ case VMEXIT_EXCP9:
+ return VMEXIT_EXCP9_STR;
+ case VMEXIT_EXCP10:
+ return VMEXIT_EXCP10_STR;
+ case VMEXIT_EXCP11:
+ return VMEXIT_EXCP11_STR;
+ case VMEXIT_EXCP12:
+ return VMEXIT_EXCP12_STR;
+ case VMEXIT_EXCP13:
+ return VMEXIT_EXCP13_STR;
+ case VMEXIT_EXCP14:
+ return VMEXIT_EXCP14_STR;
+ case VMEXIT_EXCP15:
+ return VMEXIT_EXCP15_STR;
+ case VMEXIT_EXCP16:
+ return VMEXIT_EXCP16_STR;
+ case VMEXIT_EXCP17:
+ return VMEXIT_EXCP17_STR;
+ case VMEXIT_EXCP18:
+ return VMEXIT_EXCP18_STR;
+ case VMEXIT_EXCP19:
+ return VMEXIT_EXCP19_STR;
+ case VMEXIT_EXCP20:
+ return VMEXIT_EXCP20_STR;
+ case VMEXIT_EXCP21:
+ return VMEXIT_EXCP21_STR;
+ case VMEXIT_EXCP22:
+ return VMEXIT_EXCP22_STR;
+ case VMEXIT_EXCP23:
+ return VMEXIT_EXCP23_STR;
+ case VMEXIT_EXCP24:
+ return VMEXIT_EXCP24_STR;
+ case VMEXIT_EXCP25:
+ return VMEXIT_EXCP25_STR;
+ case VMEXIT_EXCP26:
+ return VMEXIT_EXCP26_STR;
+ case VMEXIT_EXCP27:
+ return VMEXIT_EXCP27_STR;
+ case VMEXIT_EXCP28:
+ return VMEXIT_EXCP28_STR;
+ case VMEXIT_EXCP29:
+ return VMEXIT_EXCP29_STR;
+ case VMEXIT_EXCP30:
+ return VMEXIT_EXCP30_STR;
+ case VMEXIT_EXCP31:
+ return VMEXIT_EXCP31_STR;
+ case VMEXIT_INTR:
+ return VMEXIT_INTR_STR;
+ case VMEXIT_NMI:
+ return VMEXIT_NMI_STR;
+ case VMEXIT_SMI:
+ return VMEXIT_SMI_STR;
+ case VMEXIT_INIT:
+ return VMEXIT_INIT_STR;
+ case VMEXIT_VINITR:
+ return VMEXIT_VINITR_STR;
+ case VMEXIT_CR0_SEL_WRITE:
+ return VMEXIT_CR0_SEL_WRITE_STR;
+ case VMEXIT_IDTR_READ:
+ return VMEXIT_IDTR_READ_STR;
+ case VMEXIT_GDTR_READ:
+ return VMEXIT_GDTR_READ_STR;
+ case VMEXIT_LDTR_READ:
+ return VMEXIT_LDTR_READ_STR;
+ case VMEXIT_TR_READ:
+ return VMEXIT_TR_READ_STR;
+ case VMEXIT_IDTR_WRITE:
+ return VMEXIT_IDTR_WRITE_STR;
+ case VMEXIT_GDTR_WRITE:
+ return VMEXIT_GDTR_WRITE_STR;
+ case VMEXIT_LDTR_WRITE:
+ return VMEXIT_LDTR_WRITE_STR;
+ case VMEXIT_TR_WRITE:
+ return VMEXIT_TR_WRITE_STR;
+ case VMEXIT_RDTSC:
+ return VMEXIT_RDTSC_STR;
+ case VMEXIT_RDPMC:
+ return VMEXIT_RDPMC_STR;
+ case VMEXIT_PUSHF:
+ return VMEXIT_PUSHF_STR;
+ case VMEXIT_POPF:
+ return VMEXIT_POPF_STR;
+ case VMEXIT_CPUID:
+ return VMEXIT_CPUID_STR;
+ case VMEXIT_RSM:
+ return VMEXIT_RSM_STR;
+ case VMEXIT_IRET:
+ return VMEXIT_IRET_STR;
+ case VMEXIT_SWINT:
+ return VMEXIT_SWINT_STR;
+ case VMEXIT_INVD:
+ return VMEXIT_INVD_STR;
+ case VMEXIT_PAUSE:
+ return VMEXIT_PAUSE_STR;
+ case VMEXIT_HLT:
+ return VMEXIT_HLT_STR;
+ case VMEXIT_INVLPG:
+ return VMEXIT_INVLPG_STR;
+ case VMEXIT_INVLPGA:
+ return VMEXIT_INVLPGA_STR;
+ case VMEXIT_IOIO:
+ return VMEXIT_IOIO_STR;
+ case VMEXIT_MSR:
+ return VMEXIT_MSR_STR;
+ case VMEXIT_TASK_SWITCH:
+ return VMEXIT_TASK_SWITCH_STR;
+ case VMEXIT_FERR_FREEZE:
+ return VMEXIT_FERR_FREEZE_STR;
+ case VMEXIT_SHUTDOWN:
+ return VMEXIT_SHUTDOWN_STR;
+ case VMEXIT_VMRUN:
+ return VMEXIT_VMRUN_STR;
+ case VMEXIT_VMMCALL:
+ return VMEXIT_VMMCALL_STR;
+ case VMEXIT_VMLOAD:
+ return VMEXIT_VMLOAD_STR;
+ case VMEXIT_VMSAVE:
+ return VMEXIT_VMSAVE_STR;
+ case VMEXIT_STGI:
+ return VMEXIT_STGI_STR;
+ case VMEXIT_CLGI:
+ return VMEXIT_CLGI_STR;
+ case VMEXIT_SKINIT:
+ return VMEXIT_SKINIT_STR;
+ case VMEXIT_RDTSCP:
+ return VMEXIT_RDTSCP_STR;
+ case VMEXIT_ICEBP:
+ return VMEXIT_ICEBP_STR;
+ case VMEXIT_WBINVD:
+ return VMEXIT_WBINVD_STR;
+ case VMEXIT_MONITOR:
+ return VMEXIT_MONITOR_STR;
+ case VMEXIT_MWAIT:
+ return VMEXIT_MWAIT_STR;
+ case VMEXIT_MWAIT_CONDITIONAL:
+ return VMEXIT_MWAIT_CONDITIONAL_STR;
+ case VMEXIT_NPF:
+ return VMEXIT_NPF_STR;
+ case VMEXIT_INVALID_VMCB:
+ return VMEXIT_INVALID_VMCB_STR;
+ }
+ return NULL;
}
// This should package up an IO request and call vmm_handle_io
int v3_handle_svm_io_in(struct guest_info * info) {
- vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
- // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
- struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
+ vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
+ // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
- struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
- int read_size = 0;
+ struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
+ int read_size = 0;
- if (hook == NULL) {
- PrintError("Hook Not present for in on port %x\n", io_info->port);
- // error, we should not have exited on this port
- return -1;
- }
+ if (hook == NULL) {
+ PrintError("Hook Not present for in on port %x\n", io_info->port);
+ // error, we should not have exited on this port
+ return -1;
+ }
- if (io_info->sz8) {
- read_size = 1;
- } else if (io_info->sz16) {
- read_size = 2;
- } else if (io_info->sz32) {
- read_size = 4;
- }
+ if (io_info->sz8) {
+ read_size = 1;
+ } else if (io_info->sz16) {
+ read_size = 2;
+ } else if (io_info->sz32) {
+ read_size = 4;
+ }
- PrintDebug("IN of %d bytes on port %d (0x%x)\n", read_size, io_info->port, io_info->port);
+ PrintDebug("IN of %d bytes on port %d (0x%x)\n", read_size, io_info->port, io_info->port);
- if (hook->read(io_info->port, &(info->vm_regs.rax), read_size, hook->priv_data) != read_size) {
- // not sure how we handle errors.....
- PrintError("Read Failure for in on port %x\n", io_info->port);
- return -1;
- }
+ if (hook->read(io_info->port, &(info->vm_regs.rax), read_size, hook->priv_data) != read_size) {
+ // not sure how we handle errors.....
+ PrintError("Read Failure for in on port %x\n", io_info->port);
+ return -1;
+ }
- info->rip = ctrl_area->exit_info2;
+ info->rip = ctrl_area->exit_info2;
- return 0;
+ return 0;
}
* In that if we do wrap around the effect will manifest in the higher bits of the register
*/
int v3_handle_svm_io_ins(struct guest_info * info) {
- vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
+ vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
- struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
+ struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
- struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
- int read_size = 0;
+ struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
+ int read_size = 0;
+ addr_t dst_addr = 0;
+ uint_t rep_num = 1;
+ ullong_t mask = 0;
+ struct v3_segment *theseg = &(info->segments.es); // default is ES
+ addr_t inst_ptr;
+
+
+ // This is kind of hacky...
+ // direction can equal either 1 or -1
+ // We will multiply the final added offset by this value to go the correct direction
+ int direction = 1;
+ struct rflags * flags = (struct rflags *)&(guest_state->rflags);
+
+ if (flags->df) {
+ direction = -1;
+ }
+
- addr_t dst_addr = 0;
- uint_t rep_num = 1;
- ullong_t mask = 0;
+ if (hook == NULL) {
+ PrintError("Hook Not present for ins on port %x\n", io_info->port);
+ // error, we should not have exited on this port
+ return -1;
+ }
- // This is kind of hacky...
- // direction can equal either 1 or -1
- // We will multiply the final added offset by this value to go the correct direction
- int direction = 1;
- struct rflags * flags = (struct rflags *)&(guest_state->rflags);
- if (flags->df) {
- direction = -1;
- }
+ if (guest_va_to_host_va(info, get_addr_linear(info, info->rip, &(info->segments.cs)), &inst_ptr) == -1) {
+ PrintError("Can't access instruction\n");
+ return -1;
+ }
+ while (is_prefix_byte(*((char*)inst_ptr))) {
+ switch (*((char*)inst_ptr)) {
+ case PREFIX_CS_OVERRIDE:
+ theseg = &(info->segments.cs);
+ break;
+ case PREFIX_SS_OVERRIDE:
+ theseg = &(info->segments.ss);
+ break;
+ case PREFIX_DS_OVERRIDE:
+ theseg = &(info->segments.ds);
+ break;
+ case PREFIX_ES_OVERRIDE:
+ theseg = &(info->segments.es);
+ break;
+ case PREFIX_FS_OVERRIDE:
+ theseg = &(info->segments.fs);
+ break;
+ case PREFIX_GS_OVERRIDE:
+ theseg = &(info->segments.gs);
+ break;
+ default:
+ break;
+ }
+ inst_ptr++;
+ }
- if (hook == NULL) {
- PrintError("Hook Not present for ins on port %x\n", io_info->port);
- // error, we should not have exited on this port
- return -1;
- }
- struct v3_segment *theseg = &(info->segments.es); // default is ES
+ PrintDebug("INS on port %d (0x%x)\n", io_info->port, io_info->port);
+
+ if (io_info->sz8) {
+ read_size = 1;
+ } else if (io_info->sz16) {
+ read_size = 2;
+ } else if (io_info->sz32) {
+ read_size = 4;
+ } else {
+ PrintError("io_info Invalid Size\n");
+ return -1;
+ }
+
- addr_t inst_ptr;
-
- if (guest_va_to_host_va(info, get_addr_linear(info, info->rip, &(info->segments.cs)), &inst_ptr) == -1) {
- PrintError("Can't access instruction\n");
- return -1;
- }
-
- while (is_prefix_byte(*((char*)inst_ptr))) {
- switch (*((char*)inst_ptr)) {
- case PREFIX_CS_OVERRIDE:
- theseg = &(info->segments.cs);
- break;
- case PREFIX_SS_OVERRIDE:
- theseg = &(info->segments.ss);
- break;
- case PREFIX_DS_OVERRIDE:
- theseg = &(info->segments.ds);
- break;
- case PREFIX_ES_OVERRIDE:
- theseg = &(info->segments.es);
- break;
- case PREFIX_FS_OVERRIDE:
- theseg = &(info->segments.fs);
- break;
- case PREFIX_GS_OVERRIDE:
- theseg = &(info->segments.gs);
- break;
- default:
- break;
+ if (io_info->addr16) {
+ mask = 0xffff;
+ } else if (io_info->addr32) {
+ mask = 0xffffffff;
+ } else if (io_info->addr64) {
+ mask = 0xffffffffffffffffLL;
+ } else {
+ // This value should be set depending on the host register size...
+ mask = get_gpr_mask(info);
+
+ PrintDebug("INS io_info invalid address size, mask=0x%p, io_info=0x%p\n",
+ (void *)(addr_t)mask, (void *)(addr_t)(io_info));
+ // PrintDebug("INS Aborted... Check implementation\n");
+ //return -1;
}
- inst_ptr++;
- }
+ if (io_info->rep) {
+ // rep_num = info->vm_regs.rcx & mask;
+ rep_num = info->vm_regs.rcx;
+ }
- PrintDebug("INS on port %d (0x%x)\n", io_info->port, io_info->port);
- if (io_info->sz8) {
- read_size = 1;
- } else if (io_info->sz16) {
- read_size = 2;
- } else if (io_info->sz32) {
- read_size = 4;
- } else {
- PrintError("io_info Invalid Size\n");
- return -1;
- }
+ PrintDebug("INS size=%d for %d steps\n", read_size, rep_num);
-
- if (io_info->addr16) {
- mask = 0xffff;
- } else if (io_info->addr32) {
- mask = 0xffffffff;
- } else if (io_info->addr64) {
- mask = 0xffffffffffffffffLL;
- } else {
- // This value should be set depending on the host register size...
- mask = get_gpr_mask(info);
-
- PrintDebug("INS io_info invalid address size, mask=0x%p, io_info=0x%p\n",
- (void *)(addr_t)mask, (void *)(addr_t)(io_info));
- // PrintDebug("INS Aborted... Check implementation\n");
- //return -1;
- }
-
- if (io_info->rep) {
- // rep_num = info->vm_regs.rcx & mask;
- rep_num = info->vm_regs.rcx;
- }
-
-
- PrintDebug("INS size=%d for %d steps\n", read_size, rep_num);
-
- while (rep_num > 0) {
- addr_t host_addr;
- dst_addr = get_addr_linear(info, info->vm_regs.rdi & mask, theseg);
+ while (rep_num > 0) {
+ addr_t host_addr;
+ dst_addr = get_addr_linear(info, info->vm_regs.rdi & mask, theseg);
- PrintDebug("Writing 0x%p\n", (void *)dst_addr);
+ PrintDebug("Writing 0x%p\n", (void *)dst_addr);
- if (guest_va_to_host_va(info, dst_addr, &host_addr) == -1) {
- // either page fault or gpf...
- PrintError("Could not convert Guest VA to host VA\n");
- return -1;
- }
+ if (guest_va_to_host_va(info, dst_addr, &host_addr) == -1) {
+ // either page fault or gpf...
+ PrintError("Could not convert Guest VA to host VA\n");
+ return -1;
+ }
- if (hook->read(io_info->port, (char*)host_addr, read_size, hook->priv_data) != read_size) {
- // not sure how we handle errors.....
- PrintError("Read Failure for ins on port %x\n", io_info->port);
- return -1;
- }
+ if (hook->read(io_info->port, (char*)host_addr, read_size, hook->priv_data) != read_size) {
+ // not sure how we handle errors.....
+ PrintError("Read Failure for ins on port %x\n", io_info->port);
+ return -1;
+ }
- info->vm_regs.rdi += read_size * direction;
+ info->vm_regs.rdi += read_size * direction;
- if (io_info->rep)
- info->vm_regs.rcx--;
+ if (io_info->rep)
+ info->vm_regs.rcx--;
- rep_num--;
- }
+ rep_num--;
+ }
- info->rip = ctrl_area->exit_info2;
+ info->rip = ctrl_area->exit_info2;
- return 0;
+ return 0;
}
int v3_handle_svm_io_out(struct guest_info * info) {
- vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
- // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
- struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
+ vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
+ // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
- struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
- int write_size = 0;
+ struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
+ int write_size = 0;
- if (hook == NULL) {
- PrintError("Hook Not present for out on port %x\n", io_info->port);
- // error, we should not have exited on this port
- return -1;
- }
+ if (hook == NULL) {
+ PrintError("Hook Not present for out on port %x\n", io_info->port);
+ // error, we should not have exited on this port
+ return -1;
+ }
- if (io_info->sz8) {
- write_size = 1;
- } else if (io_info->sz16) {
- write_size = 2;
- } else if (io_info->sz32) {
- write_size = 4;
- }
+ if (io_info->sz8) {
+ write_size = 1;
+ } else if (io_info->sz16) {
+ write_size = 2;
+ } else if (io_info->sz32) {
+ write_size = 4;
+ }
- PrintDebug("OUT of %d bytes on port %d (0x%x)\n", write_size, io_info->port, io_info->port);
+ PrintDebug("OUT of %d bytes on port %d (0x%x)\n", write_size, io_info->port, io_info->port);
- if (hook->write(io_info->port, &(info->vm_regs.rax), write_size, hook->priv_data) != write_size) {
- // not sure how we handle errors.....
- PrintError("Write Failure for out on port %x\n", io_info->port);
- return -1;
- }
+ if (hook->write(io_info->port, &(info->vm_regs.rax), write_size, hook->priv_data) != write_size) {
+ // not sure how we handle errors.....
+ PrintError("Write Failure for out on port %x\n", io_info->port);
+ return -1;
+ }
- info->rip = ctrl_area->exit_info2;
+ info->rip = ctrl_area->exit_info2;
- return 0;
+ return 0;
}
*/
int v3_handle_svm_io_outs(struct guest_info * info) {
- vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA((vmcb_t *)(info->vmm_data));
+ vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
- struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
+ struct svm_io_info * io_info = (struct svm_io_info *)&(ctrl_area->exit_info1);
- struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
- int write_size = 0;
-
- addr_t dst_addr = 0;
- uint_t rep_num = 1;
- ullong_t mask = 0;
-
-
-
- // This is kind of hacky...
- // direction can equal either 1 or -1
- // We will multiply the final added offset by this value to go the correct direction
- int direction = 1;
- struct rflags * flags = (struct rflags *)&(guest_state->rflags);
- if (flags->df) {
- direction = -1;
- }
-
-
- if (hook == NULL) {
- PrintError("Hook Not present for outs on port %x\n", io_info->port);
- // error, we should not have exited on this port
- return -1;
- }
-
- PrintDebug("OUTS on port %d (0x%x)\n", io_info->port, io_info->port);
-
- if (io_info->sz8) {
- write_size = 1;
- } else if (io_info->sz16) {
- write_size = 2;
- } else if (io_info->sz32) {
- write_size = 4;
- }
-
-
- if (io_info->addr16) {
- mask = 0xffff;
- } else if (io_info->addr32) {
- mask = 0xffffffff;
- } else if (io_info->addr64) {
- mask = 0xffffffffffffffffLL;
- } else {
- // This value should be set depending on the host register size...
- mask = get_gpr_mask(info);
-
- PrintDebug("OUTS io_info invalid address size, mask=0%p, io_info=0x%p\n",
- (void *)(addr_t)mask, (void *)(addr_t)io_info);
- // PrintDebug("INS Aborted... Check implementation\n");
- //return -1;
- // should never happen
- //PrintDebug("Invalid Address length\n");
- //return -1;
- }
-
- if (io_info->rep) {
- rep_num = info->vm_regs.rcx & mask;
- }
-
- struct v3_segment *theseg = &(info->segments.es); // default is ES
-
- addr_t inst_ptr;
-
- if (guest_va_to_host_va(info,get_addr_linear(info,info->rip,&(info->segments.cs)),&inst_ptr)==-1) {
- PrintError("Can't access instruction\n");
- return -1;
- }
-
- while (is_prefix_byte(*((char*)inst_ptr))) {
- switch (*((char*)inst_ptr)) {
- case PREFIX_CS_OVERRIDE:
- theseg = &(info->segments.cs);
- break;
- case PREFIX_SS_OVERRIDE:
- theseg = &(info->segments.ss);
- break;
- case PREFIX_DS_OVERRIDE:
- theseg = &(info->segments.ds);
- break;
- case PREFIX_ES_OVERRIDE:
- theseg = &(info->segments.es);
- break;
- case PREFIX_FS_OVERRIDE:
- theseg = &(info->segments.fs);
- break;
- case PREFIX_GS_OVERRIDE:
- theseg = &(info->segments.gs);
- break;
- default:
- break;
+ struct v3_io_hook * hook = v3_get_io_hook(info, io_info->port);
+ int write_size = 0;
+ addr_t dst_addr = 0;
+ uint_t rep_num = 1;
+ ullong_t mask = 0;
+ addr_t inst_ptr;
+ struct v3_segment * theseg = &(info->segments.es); // default is ES
+
+ // This is kind of hacky...
+ // direction can equal either 1 or -1
+ // We will multiply the final added offset by this value to go the correct direction
+ int direction = 1;
+ struct rflags * flags = (struct rflags *)&(guest_state->rflags);
+
+ if (flags->df) {
+ direction = -1;
}
- inst_ptr++;
- }
- PrintDebug("OUTS size=%d for %d steps\n", write_size, rep_num);
- while (rep_num > 0) {
- addr_t host_addr;
+ if (hook == NULL) {
+ PrintError("Hook Not present for outs on port %x\n", io_info->port);
+ // error, we should not have exited on this port
+ return -1;
+ }
+ PrintDebug("OUTS on port %d (0x%x)\n", io_info->port, io_info->port);
+ if (io_info->sz8) {
+ write_size = 1;
+ } else if (io_info->sz16) {
+ write_size = 2;
+ } else if (io_info->sz32) {
+ write_size = 4;
+ }
- dst_addr = get_addr_linear(info, (info->vm_regs.rsi & mask), theseg);
-
- if (guest_va_to_host_va(info, dst_addr, &host_addr) == -1) {
- // either page fault or gpf...
+
+ if (io_info->addr16) {
+ mask = 0xffff;
+ } else if (io_info->addr32) {
+ mask = 0xffffffff;
+ } else if (io_info->addr64) {
+ mask = 0xffffffffffffffffLL;
+ } else {
+ // This value should be set depending on the host register size...
+ mask = get_gpr_mask(info);
+
+ PrintDebug("OUTS io_info invalid address size, mask=0%p, io_info=0x%p\n",
+ (void *)(addr_t)mask, (void *)(addr_t)io_info);
+ // PrintDebug("INS Aborted... Check implementation\n");
+ //return -1;
+ // should never happen
+ //PrintDebug("Invalid Address length\n");
+ //return -1;
+ }
+
+ if (io_info->rep) {
+ rep_num = info->vm_regs.rcx & mask;
+ }
+
+
+
+
+ if (guest_va_to_host_va(info,get_addr_linear(info,info->rip,&(info->segments.cs)),&inst_ptr)==-1) {
+ PrintError("Can't access instruction\n");
+ return -1;
}
- if (hook->write(io_info->port, (char*)host_addr, write_size, hook->priv_data) != write_size) {
- // not sure how we handle errors.....
- PrintError("Write Failure for outs on port %x\n", io_info->port);
- return -1;
+ while (is_prefix_byte(*((char*)inst_ptr))) {
+ switch (*((char*)inst_ptr)) {
+ case PREFIX_CS_OVERRIDE:
+ theseg = &(info->segments.cs);
+ break;
+ case PREFIX_SS_OVERRIDE:
+ theseg = &(info->segments.ss);
+ break;
+ case PREFIX_DS_OVERRIDE:
+ theseg = &(info->segments.ds);
+ break;
+ case PREFIX_ES_OVERRIDE:
+ theseg = &(info->segments.es);
+ break;
+ case PREFIX_FS_OVERRIDE:
+ theseg = &(info->segments.fs);
+ break;
+ case PREFIX_GS_OVERRIDE:
+ theseg = &(info->segments.gs);
+ break;
+ default:
+ break;
+ }
+ inst_ptr++;
}
- info->vm_regs.rsi += write_size * direction;
+ PrintDebug("OUTS size=%d for %d steps\n", write_size, rep_num);
- if (io_info->rep)
- info->vm_regs.rcx--;
+ while (rep_num > 0) {
+ addr_t host_addr;
+
+ dst_addr = get_addr_linear(info, (info->vm_regs.rsi & mask), theseg);
- rep_num--;
- }
+ if (guest_va_to_host_va(info, dst_addr, &host_addr) == -1) {
+ // either page fault or gpf...
+ }
+
+ if (hook->write(io_info->port, (char*)host_addr, write_size, hook->priv_data) != write_size) {
+ // not sure how we handle errors.....
+ PrintError("Write Failure for outs on port %x\n", io_info->port);
+ return -1;
+ }
+
+ info->vm_regs.rsi += write_size * direction;
+
+ if (io_info->rep) {
+ info->vm_regs.rcx--;
+ }
+
+ rep_num--;
+ }
- info->rip = ctrl_area->exit_info2;
+ info->rip = ctrl_area->exit_info2;
- return 0;
+ return 0;
}
static int get_bitmap_index(uint_t msr) {
- if ((msr >= PENTIUM_MSRS_START) &&
- (msr <= PENTIUM_MSRS_END)) {
- return (PENTIUM_MSRS_INDEX + (msr - PENTIUM_MSRS_START));
- } else if ((msr >= AMD_6_GEN_MSRS_START) &&
- (msr <= AMD_6_GEN_MSRS_END)) {
- return (AMD_6_GEN_MSRS_INDEX + (msr - AMD_6_GEN_MSRS_START));
- } else if ((msr >= AMD_7_8_GEN_MSRS_START) &&
- (msr <= AMD_7_8_GEN_MSRS_END)) {
- return (AMD_7_8_GEN_MSRS_INDEX + (msr - AMD_7_8_GEN_MSRS_START));
- } else {
- PrintError("MSR out of range (MSR=0x%x)\n", msr);
- return -1;
- }
+ if ((msr >= PENTIUM_MSRS_START) &&
+ (msr <= PENTIUM_MSRS_END)) {
+ return (PENTIUM_MSRS_INDEX + (msr - PENTIUM_MSRS_START));
+ } else if ((msr >= AMD_6_GEN_MSRS_START) &&
+ (msr <= AMD_6_GEN_MSRS_END)) {
+ return (AMD_6_GEN_MSRS_INDEX + (msr - AMD_6_GEN_MSRS_START));
+ } else if ((msr >= AMD_7_8_GEN_MSRS_START) &&
+ (msr <= AMD_7_8_GEN_MSRS_END)) {
+ return (AMD_7_8_GEN_MSRS_INDEX + (msr - AMD_7_8_GEN_MSRS_START));
+ } else {
+ PrintError("MSR out of range (MSR=0x%x)\n", msr);
+ return -1;
+ }
}
addr_t v3_init_svm_msr_map(struct guest_info * info) {
- uchar_t * msr_bitmap = (uchar_t*)V3_VAddr(V3_AllocPages(2));
- struct v3_msr_map * msr_map = &(info->msr_map);
- struct v3_msr_hook * hook = NULL;
+ uchar_t * msr_bitmap = (uchar_t*)V3_VAddr(V3_AllocPages(2));
+ struct v3_msr_map * msr_map = &(info->msr_map);
+ struct v3_msr_hook * hook = NULL;
- memset(msr_bitmap, 0, PAGE_SIZE * 2);
+ memset(msr_bitmap, 0, PAGE_SIZE * 2);
- list_for_each_entry(hook, &(msr_map->hook_list), link) {
- int index = get_bitmap_index(hook->msr);
- uint_t byte_offset = index / 4;
- uint_t bit_offset = (index % 4) * 2;
- uchar_t val = 0;
- uchar_t mask = ~0x3;
+ list_for_each_entry(hook, &(msr_map->hook_list), link) {
+ int index = get_bitmap_index(hook->msr);
+ uint_t byte_offset = index / 4;
+ uint_t bit_offset = (index % 4) * 2;
+ uchar_t val = 0;
+ uchar_t mask = ~0x3;
- if (hook->read) {
- val |= 0x1;
- }
+ if (hook->read) {
+ val |= 0x1;
+ }
- if (hook->write) {
- val |= 0x2;
- }
+ if (hook->write) {
+ val |= 0x2;
+ }
- val = val << bit_offset;
- mask = mask << bit_offset;
+ val = val << bit_offset;
+ mask = mask << bit_offset;
- *(msr_bitmap + byte_offset) &= mask;
- *(msr_bitmap + byte_offset) |= val;
- }
+ *(msr_bitmap + byte_offset) &= mask;
+ *(msr_bitmap + byte_offset) |= val;
+ }
- return (addr_t)V3_PAddr(msr_bitmap);
+ return (addr_t)V3_PAddr(msr_bitmap);
}
int v3_handle_msr_write(struct guest_info * info) {
- uint_t msr_num = info->vm_regs.rcx;
- struct v3_msr msr_val;
- struct v3_msr_hook * hook = NULL;
+ uint_t msr_num = info->vm_regs.rcx;
+ struct v3_msr msr_val;
+ struct v3_msr_hook * hook = NULL;
- hook = v3_get_msr_hook(info, msr_num);
+ hook = v3_get_msr_hook(info, msr_num);
- if (!hook) {
- PrintError("Hook for MSR write %d not found\n", msr_num);
- return -1;
- }
+ if (!hook) {
+ PrintError("Hook for MSR write %d not found\n", msr_num);
+ return -1;
+ }
- msr_val.value = 0;
- msr_val.lo = info->vm_regs.rax;
- msr_val.hi = info->vm_regs.rdx;
+ msr_val.value = 0;
+ msr_val.lo = info->vm_regs.rax;
+ msr_val.hi = info->vm_regs.rdx;
- if (hook->write(msr_num, msr_val, hook->priv_data) == -1) {
- PrintError("Error in MSR hook Write\n");
- return -1;
- }
+ if (hook->write(msr_num, msr_val, hook->priv_data) == -1) {
+ PrintError("Error in MSR hook Write\n");
+ return -1;
+ }
- return 0;
+ return 0;
}
int v3_handle_msr_read(struct guest_info * info) {
- uint_t msr_num = info->vm_regs.rcx;
- struct v3_msr msr_val;
- struct v3_msr_hook * hook = NULL;
+ uint_t msr_num = info->vm_regs.rcx;
+ struct v3_msr msr_val;
+ struct v3_msr_hook * hook = NULL;
- hook = v3_get_msr_hook(info, msr_num);
+ hook = v3_get_msr_hook(info, msr_num);
- if (!hook) {
- PrintError("Hook for MSR read %d not found\n", msr_num);
- return -1;
- }
+ if (!hook) {
+ PrintError("Hook for MSR read %d not found\n", msr_num);
+ return -1;
+ }
- msr_val.value = 0;
+ msr_val.value = 0;
- if (hook->read(msr_num, &msr_val, hook->priv_data) == -1) {
- PrintError("Error in MSR hook Read\n");
- return -1;
- }
+ if (hook->read(msr_num, &msr_val, hook->priv_data) == -1) {
+ PrintError("Error in MSR hook Read\n");
+ return -1;
+ }
- info->vm_regs.rax = msr_val.lo;
- info->vm_regs.rdx = msr_val.hi;
+ info->vm_regs.rax = msr_val.lo;
+ info->vm_regs.rdx = msr_val.hi;
- return 0;
+ return 0;
}
#include <palacios/vmm_intr.h>
-int v3_handle_svm_pause(struct guest_info * info)
-{
- // handled as a nop
-
- info->rip+=2;
-
- return 0;
+int v3_handle_svm_pause(struct guest_info * info) {
+ // handled as a nop
+ info->rip+=2;
+ return 0;
}
int v3_handle_svm_wbinvd(struct guest_info * info) {
- if (info->cpl != 0) {
- PrintDebug("WBINVD: cpl != 0, injecting GPF\n");
- v3_raise_exception(info, GPF_EXCEPTION);
- } else {
- info->rip += 2;
- asm("wbinvd");
- }
-
- return 0;
+ if (info->cpl != 0) {
+ PrintDebug("WBINVD: cpl != 0, injecting GPF\n");
+ v3_raise_exception(info, GPF_EXCEPTION);
+ } else {
+ info->rip += 2;
+ asm("wbinvd");
+ }
+
+ return 0;
}
static struct vm_device * v3_allocate_device() {
- struct vm_device * dev = NULL;
- dev = (struct vm_device*)V3_Malloc(sizeof(struct vm_device));
+ struct vm_device * dev = NULL;
+ dev = (struct vm_device*)V3_Malloc(sizeof(struct vm_device));
- V3_ASSERT(dev != NULL);
+ V3_ASSERT(dev != NULL);
- dev->ops = NULL;
- memset(dev->name, 0, 32);
- dev->vm = NULL;
- dev->private_data = NULL;
+ dev->ops = NULL;
+ memset(dev->name, 0, 32);
+ dev->vm = NULL;
+ dev->private_data = NULL;
- INIT_LIST_HEAD(&(dev->io_hooks));
- dev->num_io_hooks = 0;
+ INIT_LIST_HEAD(&(dev->io_hooks));
+ dev->num_io_hooks = 0;
- INIT_LIST_HEAD(&(dev->mem_hooks));
- dev->num_mem_hooks = 0;
+ INIT_LIST_HEAD(&(dev->mem_hooks));
+ dev->num_mem_hooks = 0;
- INIT_LIST_HEAD(&(dev->irq_hooks));
- dev->num_irq_hooks = 0;
+ INIT_LIST_HEAD(&(dev->irq_hooks));
+ dev->num_irq_hooks = 0;
- return dev;
+ return dev;
}
struct vm_device * v3_create_device(char * name, struct vm_device_ops * ops, void * private_data) {
- struct vm_device * dev = v3_allocate_device();
+ struct vm_device * dev = v3_allocate_device();
- strncpy(dev->name, name, 32);
- dev->ops = ops;
- dev->private_data = private_data;
+ strncpy(dev->name, name, 32);
+ dev->ops = ops;
+ dev->private_data = private_data;
- return dev;
+ return dev;
}
void v3_free_device(struct vm_device * dev) {
- V3_Free(dev);
+ V3_Free(dev);
}
v3_vm_cpu_mode_t v3_get_cpu_mode(struct guest_info * info) {
- struct cr0_32 * cr0;
- struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
- struct efer_64 * efer = (struct efer_64 *)&(info->guest_efer);
- struct v3_segment * cs = &(info->segments.cs);
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- } else if (info->shdw_pg_mode == NESTED_PAGING) {
- cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- } else {
- PrintError("Invalid Paging Mode...\n");
- V3_ASSERT(0);
- return -1;
- }
-
- if (cr0->pe == 0) {
- return REAL;
- } else if ((cr4->pae == 0) && (efer->lme == 0)) {
- return PROTECTED;
- } else if (efer->lme == 0) {
- return PROTECTED_PAE;
- } else if ((efer->lme == 1) && (cs->long_mode == 1)) {
- return LONG;
- } else {
- // What about LONG_16_COMPAT???
- return LONG_32_COMPAT;
- }
+ struct cr0_32 * cr0;
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+ struct efer_64 * efer = (struct efer_64 *)&(info->guest_efer);
+ struct v3_segment * cs = &(info->segments.cs);
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ } else if (info->shdw_pg_mode == NESTED_PAGING) {
+ cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+ } else {
+ PrintError("Invalid Paging Mode...\n");
+ V3_ASSERT(0);
+ return -1;
+ }
+
+ if (cr0->pe == 0) {
+ return REAL;
+ } else if ((cr4->pae == 0) && (efer->lme == 0)) {
+ return PROTECTED;
+ } else if (efer->lme == 0) {
+ return PROTECTED_PAE;
+ } else if ((efer->lme == 1) && (cs->long_mode == 1)) {
+ return LONG;
+ } else {
+ // What about LONG_16_COMPAT???
+ return LONG_32_COMPAT;
+ }
}
// Get address width in bytes
uint_t v3_get_addr_width(struct guest_info * info) {
- struct cr0_32 * cr0;
- struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
- struct efer_64 * efer = (struct efer_64 *)&(info->guest_efer);
- struct v3_segment * cs = &(info->segments.cs);
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- } else if (info->shdw_pg_mode == NESTED_PAGING) {
- cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- } else {
- PrintError("Invalid Paging Mode...\n");
- V3_ASSERT(0);
- return -1;
- }
-
- if (cr0->pe == 0) {
- return 2;
- } else if ((cr4->pae == 0) && (efer->lme == 0)) {
- return 4;
- } else if (efer->lme == 0) {
- return 4;
- } else if ((efer->lme == 1) && (cs->long_mode == 1)) {
- return 8;
- } else {
- // What about LONG_16_COMPAT???
- return 4;
- }
+ struct cr0_32 * cr0;
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+ struct efer_64 * efer = (struct efer_64 *)&(info->guest_efer);
+ struct v3_segment * cs = &(info->segments.cs);
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ } else if (info->shdw_pg_mode == NESTED_PAGING) {
+ cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+ } else {
+ PrintError("Invalid Paging Mode...\n");
+ V3_ASSERT(0);
+ return -1;
+ }
+
+ if (cr0->pe == 0) {
+ return 2;
+ } else if ((cr4->pae == 0) && (efer->lme == 0)) {
+ return 4;
+ } else if (efer->lme == 0) {
+ return 4;
+ } else if ((efer->lme == 1) && (cs->long_mode == 1)) {
+ return 8;
+ } else {
+ // What about LONG_16_COMPAT???
+ return 4;
+ }
}
static const uchar_t LONG_16_COMPAT_STR[] = "16bit Compat";
const uchar_t * v3_cpu_mode_to_str(v3_vm_cpu_mode_t mode) {
- switch (mode) {
- case REAL:
- return REAL_STR;
- case PROTECTED:
- return PROTECTED_STR;
- case PROTECTED_PAE:
- return PROTECTED_PAE_STR;
- case LONG:
- return LONG_STR;
- case LONG_32_COMPAT:
- return LONG_32_COMPAT_STR;
- case LONG_16_COMPAT:
- return LONG_16_COMPAT_STR;
- default:
- return NULL;
- }
+ switch (mode) {
+ case REAL:
+ return REAL_STR;
+ case PROTECTED:
+ return PROTECTED_STR;
+ case PROTECTED_PAE:
+ return PROTECTED_PAE_STR;
+ case LONG:
+ return LONG_STR;
+ case LONG_32_COMPAT:
+ return LONG_32_COMPAT_STR;
+ case LONG_16_COMPAT:
+ return LONG_16_COMPAT_STR;
+ default:
+ return NULL;
+ }
}
v3_vm_mem_mode_t v3_get_mem_mode(struct guest_info * info) {
- struct cr0_32 * cr0;
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- } else if (info->shdw_pg_mode == NESTED_PAGING) {
- cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- } else {
- PrintError("Invalid Paging Mode...\n");
- V3_ASSERT(0);
- return -1;
- }
-
- if (cr0->pg == 0) {
- return PHYSICAL_MEM;
- } else {
- return VIRTUAL_MEM;
- }
+ struct cr0_32 * cr0;
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ } else if (info->shdw_pg_mode == NESTED_PAGING) {
+ cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+ } else {
+ PrintError("Invalid Paging Mode...\n");
+ V3_ASSERT(0);
+ return -1;
+ }
+
+ if (cr0->pg == 0) {
+ return PHYSICAL_MEM;
+ } else {
+ return VIRTUAL_MEM;
+ }
}
static const uchar_t PHYS_MEM_STR[] = "Physical Memory";
static const uchar_t VIRT_MEM_STR[] = "Virtual Memory";
const uchar_t * v3_mem_mode_to_str(v3_vm_mem_mode_t mode) {
- switch (mode) {
- case PHYSICAL_MEM:
- return PHYS_MEM_STR;
- case VIRTUAL_MEM:
- return VIRT_MEM_STR;
- default:
- return NULL;
- }
+ switch (mode) {
+ case PHYSICAL_MEM:
+ return PHYS_MEM_STR;
+ case VIRTUAL_MEM:
+ return VIRT_MEM_STR;
+ default:
+ return NULL;
+ }
}
void v3_print_segments(struct guest_info * info) {
- struct v3_segments * segs = &(info->segments);
- int i = 0;
- struct v3_segment * seg_ptr;
+ struct v3_segments * segs = &(info->segments);
+ int i = 0;
+ struct v3_segment * seg_ptr;
- seg_ptr=(struct v3_segment *)segs;
+ seg_ptr=(struct v3_segment *)segs;
- char *seg_names[] = {"CS", "DS" , "ES", "FS", "GS", "SS" , "LDTR", "GDTR", "IDTR", "TR", NULL};
- PrintDebug("Segments\n");
+ char *seg_names[] = {"CS", "DS" , "ES", "FS", "GS", "SS" , "LDTR", "GDTR", "IDTR", "TR", NULL};
+ PrintDebug("Segments\n");
- for (i = 0; seg_names[i] != NULL; i++) {
+ for (i = 0; seg_names[i] != NULL; i++) {
- PrintDebug("\t%s: Sel=%x, base=%p, limit=%x (long_mode=%d, db=%d)\n", seg_names[i], seg_ptr[i].selector,
- (void *)(addr_t)seg_ptr[i].base, seg_ptr[i].limit,
- seg_ptr[i].long_mode, seg_ptr[i].db);
+ PrintDebug("\t%s: Sel=%x, base=%p, limit=%x (long_mode=%d, db=%d)\n", seg_names[i], seg_ptr[i].selector,
+ (void *)(addr_t)seg_ptr[i].base, seg_ptr[i].limit,
+ seg_ptr[i].long_mode, seg_ptr[i].db);
- }
+ }
}
void v3_print_ctrl_regs(struct guest_info * info) {
- struct v3_ctrl_regs * regs = &(info->ctrl_regs);
- int i = 0;
- v3_reg_t * reg_ptr;
- char * reg_names[] = {"CR0", "CR2", "CR3", "CR4", "CR8", "FLAGS", NULL};
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(info->vmm_data);
+ struct v3_ctrl_regs * regs = &(info->ctrl_regs);
+ int i = 0;
+ v3_reg_t * reg_ptr;
+ char * reg_names[] = {"CR0", "CR2", "CR3", "CR4", "CR8", "FLAGS", NULL};
+ vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(info->vmm_data);
- reg_ptr= (v3_reg_t *)regs;
+ reg_ptr= (v3_reg_t *)regs;
- PrintDebug("32 bit Ctrl Regs:\n");
+ PrintDebug("32 bit Ctrl Regs:\n");
- for (i = 0; reg_names[i] != NULL; i++) {
- PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
- }
+ for (i = 0; reg_names[i] != NULL; i++) {
+ PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
+ }
- PrintDebug("\tEFER=0x%p\n", (void*)(addr_t)(guest_state->efer));
+ PrintDebug("\tEFER=0x%p\n", (void*)(addr_t)(guest_state->efer));
}
#ifdef __V3_32BIT__
void v3_print_GPRs(struct guest_info * info) {
- struct v3_gprs * regs = &(info->vm_regs);
- int i = 0;
- v3_reg_t * reg_ptr;
- char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", NULL};
+ struct v3_gprs * regs = &(info->vm_regs);
+ int i = 0;
+ v3_reg_t * reg_ptr;
+ char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", NULL};
- reg_ptr= (v3_reg_t *)regs;
+ reg_ptr= (v3_reg_t *)regs;
- PrintDebug("32 bit GPRs:\n");
+ PrintDebug("32 bit GPRs:\n");
- for (i = 0; reg_names[i] != NULL; i++) {
- PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
- }
+ for (i = 0; reg_names[i] != NULL; i++) {
+ PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
+ }
}
#elif __V3_64BIT__
void v3_print_GPRs(struct guest_info * info) {
- struct v3_gprs * regs = &(info->vm_regs);
- int i = 0;
- v3_reg_t * reg_ptr;
- char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", \
- "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", NULL};
+ struct v3_gprs * regs = &(info->vm_regs);
+ int i = 0;
+ v3_reg_t * reg_ptr;
+ char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", \
+ "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", NULL};
- reg_ptr= (v3_reg_t *)regs;
+ reg_ptr= (v3_reg_t *)regs;
- PrintDebug("64 bit GPRs:\n");
+ PrintDebug("64 bit GPRs:\n");
- for (i = 0; reg_names[i] != NULL; i++) {
- PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
- }
+ for (i = 0; reg_names[i] != NULL; i++) {
+ PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
+ }
}
/**********************************/
int host_va_to_host_pa(addr_t host_va, addr_t * host_pa) {
- if ((os_hooks) && (os_hooks)->vaddr_to_paddr) {
+ if ((os_hooks) && (os_hooks)->vaddr_to_paddr) {
- *host_pa = (addr_t)(os_hooks)->vaddr_to_paddr((void *)host_va);
+ *host_pa = (addr_t)(os_hooks)->vaddr_to_paddr((void *)host_va);
- if (*host_pa == 0) {
- PrintError("In HVA->HPA: Invalid HVA(%p)->HPA lookup\n",
- (void *)host_va);
- return -1;
+ if (*host_pa == 0) {
+ PrintError("In HVA->HPA: Invalid HVA(%p)->HPA lookup\n",
+ (void *)host_va);
+ return -1;
+ }
+ } else {
+ PrintError("In HVA->HPA: os_hooks not defined\n");
+ return -1;
}
- } else {
- PrintError("In HVA->HPA: os_hooks not defined\n");
- return -1;
- }
- return 0;
+ return 0;
}
int host_pa_to_host_va(addr_t host_pa, addr_t * host_va) {
- if ((os_hooks) && (os_hooks)->paddr_to_vaddr) {
+ if ((os_hooks) && (os_hooks)->paddr_to_vaddr) {
- *host_va = (addr_t)(os_hooks)->paddr_to_vaddr((void *)host_pa);
+ *host_va = (addr_t)(os_hooks)->paddr_to_vaddr((void *)host_pa);
- if (*host_va == 0) {
- PrintError("In HPA->HVA: Invalid HPA(%p)->HVA lookup\n",
- (void *)host_pa);
- return -1;
+ if (*host_va == 0) {
+ PrintError("In HPA->HVA: Invalid HPA(%p)->HVA lookup\n",
+ (void *)host_pa);
+ return -1;
+ }
+ } else {
+ PrintError("In HPA->HVA: os_hooks not defined\n");
+ return -1;
}
- } else {
- PrintError("In HPA->HVA: os_hooks not defined\n");
- return -1;
- }
- return 0;
+ return 0;
}
int guest_pa_to_host_pa(struct guest_info * guest_info, addr_t guest_pa, addr_t * host_pa) {
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(guest_info, guest_pa);
+ struct v3_shadow_region * shdw_reg = v3_get_shadow_region(guest_info, guest_pa);
- *host_pa = v3_get_shadow_addr(shdw_reg, guest_pa);
+ *host_pa = v3_get_shadow_addr(shdw_reg, guest_pa);
- if ((shdw_reg == NULL) ||
- (shdw_reg->host_type == SHDW_REGION_INVALID) ||
- (shdw_reg->host_type == SHDW_REGION_FULL_HOOK)){
- PrintError("In GPA->HPA: Could not find address in shadow map (addr=%p) (reg_type=%s)\n",
- (void *)guest_pa, v3_shdw_region_type_to_str(shdw_reg->host_type));
- return -1;
- }
+ if ((shdw_reg == NULL) ||
+ (shdw_reg->host_type == SHDW_REGION_INVALID) ||
+ (shdw_reg->host_type == SHDW_REGION_FULL_HOOK)){
+ PrintError("In GPA->HPA: Could not find address in shadow map (addr=%p) (reg_type=%s)\n",
+ (void *)guest_pa, v3_shdw_region_type_to_str(shdw_reg->host_type));
+ return -1;
+ }
- return 0;
+ return 0;
}
// For now we ignore it
//
int host_pa_to_guest_pa(struct guest_info * guest_info, addr_t host_pa, addr_t * guest_pa) {
- *guest_pa = 0;
- PrintError("ERROR!!! HPA->GPA currently not implemented!!!\n");
+ *guest_pa = 0;
+ PrintError("ERROR!!! HPA->GPA currently not implemented!!!\n");
- return -1;
+ return -1;
}
/* !! Currently not implemented !! */
// This will return negative until we implement host_pa_to_guest_pa()
int host_va_to_guest_pa(struct guest_info * guest_info, addr_t host_va, addr_t * guest_pa) {
- addr_t host_pa = 0;
- *guest_pa = 0;
+ addr_t host_pa = 0;
+ *guest_pa = 0;
- if (host_va_to_host_pa(host_va, &host_pa) != 0) {
- PrintError("In HVA->GPA: Invalid HVA(%p)->HPA lookup\n",
- (void *)host_va);
- return -1;
- }
+ if (host_va_to_host_pa(host_va, &host_pa) != 0) {
+ PrintError("In HVA->GPA: Invalid HVA(%p)->HPA lookup\n",
+ (void *)host_va);
+ return -1;
+ }
- if (host_pa_to_guest_pa(guest_info, host_pa, guest_pa) != 0) {
- PrintError("In HVA->GPA: Invalid HPA(%p)->GPA lookup\n",
- (void *)host_pa);
- return -1;
- }
+ if (host_pa_to_guest_pa(guest_info, host_pa, guest_pa) != 0) {
+ PrintError("In HVA->GPA: Invalid HPA(%p)->GPA lookup\n",
+ (void *)host_pa);
+ return -1;
+ }
- return 0;
+ return 0;
}
int guest_pa_to_host_va(struct guest_info * guest_info, addr_t guest_pa, addr_t * host_va) {
- addr_t host_pa = 0;
+ addr_t host_pa = 0;
- *host_va = 0;
+ *host_va = 0;
- if (guest_pa_to_host_pa(guest_info, guest_pa, &host_pa) != 0) {
- PrintError("In GPA->HVA: Invalid GPA(%p)->HPA lookup\n",
- (void *)guest_pa);
- return -1;
- }
+ if (guest_pa_to_host_pa(guest_info, guest_pa, &host_pa) != 0) {
+ PrintError("In GPA->HVA: Invalid GPA(%p)->HPA lookup\n",
+ (void *)guest_pa);
+ return -1;
+ }
- if (host_pa_to_host_va(host_pa, host_va) != 0) {
- PrintError("In GPA->HVA: Invalid HPA(%p)->HVA lookup\n",
- (void *)host_pa);
- return -1;
- }
+ if (host_pa_to_host_va(host_pa, host_va) != 0) {
+ PrintError("In GPA->HVA: Invalid HPA(%p)->HVA lookup\n",
+ (void *)host_pa);
+ return -1;
+ }
- return 0;
+ return 0;
}
int guest_va_to_guest_pa(struct guest_info * guest_info, addr_t guest_va, addr_t * guest_pa) {
- v3_reg_t guest_cr3 = 0;
+ v3_reg_t guest_cr3 = 0;
- if (guest_info->mem_mode == PHYSICAL_MEM) {
- // guest virtual address is the same as the physical
- *guest_pa = guest_va;
- return 0;
- }
-
- if (guest_info->shdw_pg_mode == SHADOW_PAGING) {
- guest_cr3 = guest_info->shdw_pg_state.guest_cr3;
- } else {
- guest_cr3 = guest_info->ctrl_regs.cr3;
- }
-
-
- // Guest Is in Paged mode
- switch (guest_info->cpu_mode) {
- case PROTECTED:
- if (v3_translate_guest_pt_32(guest_info, guest_cr3, guest_va, guest_pa) == -1) {
- PrintDebug("Could not translate addr (%p) through 32 bit guest PT at %p\n",
- (void *)guest_va, (void *)(addr_t)guest_cr3);
- return -1;
+ if (guest_info->mem_mode == PHYSICAL_MEM) {
+ // guest virtual address is the same as the physical
+ *guest_pa = guest_va;
+ return 0;
}
- break;
- case PROTECTED_PAE:
- if (v3_translate_guest_pt_32pae(guest_info, guest_cr3, guest_va, guest_pa) == -1) {
- PrintDebug("Could not translate addr (%p) through 32 bitpae guest PT at %p\n",
- (void *)guest_va, (void *)(addr_t)guest_cr3);
- return -1;
+
+ if (guest_info->shdw_pg_mode == SHADOW_PAGING) {
+ guest_cr3 = guest_info->shdw_pg_state.guest_cr3;
+ } else {
+ guest_cr3 = guest_info->ctrl_regs.cr3;
}
- break;
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- if (v3_translate_guest_pt_64(guest_info, guest_cr3, guest_va, guest_pa) == -1) {
- PrintDebug("Could not translate addr (%p) through 64 bit guest PT at %p\n",
- (void *)guest_va, (void *)(addr_t)guest_cr3);
- return -1;
+
+
+ // Guest Is in Paged mode
+ switch (guest_info->cpu_mode) {
+ case PROTECTED:
+ if (v3_translate_guest_pt_32(guest_info, guest_cr3, guest_va, guest_pa) == -1) {
+ PrintDebug("Could not translate addr (%p) through 32 bit guest PT at %p\n",
+ (void *)guest_va, (void *)(addr_t)guest_cr3);
+ return -1;
+ }
+ break;
+ case PROTECTED_PAE:
+ if (v3_translate_guest_pt_32pae(guest_info, guest_cr3, guest_va, guest_pa) == -1) {
+ PrintDebug("Could not translate addr (%p) through 32 bitpae guest PT at %p\n",
+ (void *)guest_va, (void *)(addr_t)guest_cr3);
+ return -1;
+ }
+ break;
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ if (v3_translate_guest_pt_64(guest_info, guest_cr3, guest_va, guest_pa) == -1) {
+ PrintDebug("Could not translate addr (%p) through 64 bit guest PT at %p\n",
+ (void *)guest_va, (void *)(addr_t)guest_cr3);
+ return -1;
+ }
+ break;
+ default:
+ return -1;
}
- break;
- default:
- return -1;
- }
- return 0;
+ return 0;
}
* For now we ignore it...
*/
int guest_pa_to_guest_va(struct guest_info * guest_info, addr_t guest_pa, addr_t * guest_va) {
- *guest_va = 0;
- PrintError("ERROR!!: GPA->GVA Not Implemented!!\n");
- return -1;
+ *guest_va = 0;
+ PrintError("ERROR!!: GPA->GVA Not Implemented!!\n");
+ return -1;
}
int guest_va_to_host_pa(struct guest_info * guest_info, addr_t guest_va, addr_t * host_pa) {
- addr_t guest_pa = 0;
+ addr_t guest_pa = 0;
- *host_pa = 0;
+ *host_pa = 0;
- if (guest_va_to_guest_pa(guest_info, guest_va, &guest_pa) != 0) {
- PrintError("In GVA->HPA: Invalid GVA(%p)->GPA lookup\n",
- (void *)guest_va);
- return -1;
- }
+ if (guest_va_to_guest_pa(guest_info, guest_va, &guest_pa) != 0) {
+ PrintError("In GVA->HPA: Invalid GVA(%p)->GPA lookup\n",
+ (void *)guest_va);
+ return -1;
+ }
- if (guest_pa_to_host_pa(guest_info, guest_pa, host_pa) != 0) {
- PrintError("In GVA->HPA: Invalid GPA(%p)->HPA lookup\n",
- (void *)guest_pa);
- return -1;
- }
+ if (guest_pa_to_host_pa(guest_info, guest_pa, host_pa) != 0) {
+ PrintError("In GVA->HPA: Invalid GPA(%p)->HPA lookup\n",
+ (void *)guest_pa);
+ return -1;
+ }
- return 0;
+ return 0;
}
/* !! Currently not implemented !! */
int host_pa_to_guest_va(struct guest_info * guest_info, addr_t host_pa, addr_t * guest_va) {
- addr_t guest_pa = 0;
+ addr_t guest_pa = 0;
- *guest_va = 0;
+ *guest_va = 0;
- if (host_pa_to_guest_pa(guest_info, host_pa, &guest_pa) != 0) {
- PrintError("In HPA->GVA: Invalid HPA(%p)->GPA lookup\n",
- (void *)host_pa);
- return -1;
- }
+ if (host_pa_to_guest_pa(guest_info, host_pa, &guest_pa) != 0) {
+ PrintError("In HPA->GVA: Invalid HPA(%p)->GPA lookup\n",
+ (void *)host_pa);
+ return -1;
+ }
- if (guest_pa_to_guest_va(guest_info, guest_pa, guest_va) != 0) {
- PrintError("In HPA->GVA: Invalid GPA(%p)->GVA lookup\n",
- (void *)guest_pa);
- return -1;
- }
+ if (guest_pa_to_guest_va(guest_info, guest_pa, guest_va) != 0) {
+ PrintError("In HPA->GVA: Invalid GPA(%p)->GVA lookup\n",
+ (void *)guest_pa);
+ return -1;
+ }
- return 0;
+ return 0;
}
int guest_va_to_host_va(struct guest_info * guest_info, addr_t guest_va, addr_t * host_va) {
- addr_t guest_pa = 0;
- addr_t host_pa = 0;
+ addr_t guest_pa = 0;
+ addr_t host_pa = 0;
- *host_va = 0;
+ *host_va = 0;
- if (guest_va_to_guest_pa(guest_info, guest_va, &guest_pa) != 0) {
- PrintError("In GVA->HVA: Invalid GVA(%p)->GPA lookup\n",
- (void *)guest_va);
- return -1;
- }
+ if (guest_va_to_guest_pa(guest_info, guest_va, &guest_pa) != 0) {
+ PrintError("In GVA->HVA: Invalid GVA(%p)->GPA lookup\n",
+ (void *)guest_va);
+ return -1;
+ }
- if (guest_pa_to_host_pa(guest_info, guest_pa, &host_pa) != 0) {
- PrintError("In GVA->HVA: Invalid GPA(%p)->HPA lookup\n",
- (void *)guest_pa);
- return -1;
- }
+ if (guest_pa_to_host_pa(guest_info, guest_pa, &host_pa) != 0) {
+ PrintError("In GVA->HVA: Invalid GPA(%p)->HPA lookup\n",
+ (void *)guest_pa);
+ return -1;
+ }
- if (host_pa_to_host_va(host_pa, host_va) != 0) {
- PrintError("In GVA->HVA: Invalid HPA(%p)->HVA lookup\n",
- (void *)host_pa);
- return -1;
- }
+ if (host_pa_to_host_va(host_pa, host_va) != 0) {
+ PrintError("In GVA->HVA: Invalid HPA(%p)->HVA lookup\n",
+ (void *)host_pa);
+ return -1;
+ }
- return 0;
+ return 0;
}
/* !! Currently not implemented !! */
int host_va_to_guest_va(struct guest_info * guest_info, addr_t host_va, addr_t * guest_va) {
- addr_t host_pa = 0;
- addr_t guest_pa = 0;
+ addr_t host_pa = 0;
+ addr_t guest_pa = 0;
- *guest_va = 0;
+ *guest_va = 0;
- if (host_va_to_host_pa(host_va, &host_pa) != 0) {
- PrintError("In HVA->GVA: Invalid HVA(%p)->HPA lookup\n",
- (void *)host_va);
- return -1;
- }
+ if (host_va_to_host_pa(host_va, &host_pa) != 0) {
+ PrintError("In HVA->GVA: Invalid HVA(%p)->HPA lookup\n",
+ (void *)host_va);
+ return -1;
+ }
- if (host_pa_to_guest_pa(guest_info, host_pa, &guest_pa) != 0) {
- PrintError("In HVA->GVA: Invalid HPA(%p)->GPA lookup\n",
- (void *)host_va);
- return -1;
- }
+ if (host_pa_to_guest_pa(guest_info, host_pa, &guest_pa) != 0) {
+ PrintError("In HVA->GVA: Invalid HPA(%p)->GPA lookup\n",
+ (void *)host_va);
+ return -1;
+ }
- if (guest_pa_to_guest_va(guest_info, guest_pa, guest_va) != 0) {
- PrintError("In HVA->GVA: Invalid GPA(%p)->GVA lookup\n",
- (void *)guest_pa);
- return -1;
- }
+ if (guest_pa_to_guest_va(guest_info, guest_pa, guest_va) != 0) {
+ PrintError("In HVA->GVA: Invalid GPA(%p)->GVA lookup\n",
+ (void *)guest_pa);
+ return -1;
+ }
- return 0;
+ return 0;
}
* except for the tiny little issue of crossing page boundries.....
*/
int read_guest_va_memory(struct guest_info * guest_info, addr_t guest_va, int count, uchar_t * dest) {
- addr_t cursor = guest_va;
- int bytes_read = 0;
+ addr_t cursor = guest_va;
+ int bytes_read = 0;
- while (count > 0) {
- int dist_to_pg_edge = (PAGE_ADDR(cursor) + PAGE_SIZE) - cursor;
- int bytes_to_copy = (dist_to_pg_edge > count) ? count : dist_to_pg_edge;
- addr_t host_addr = 0;
+ while (count > 0) {
+ int dist_to_pg_edge = (PAGE_ADDR(cursor) + PAGE_SIZE) - cursor;
+ int bytes_to_copy = (dist_to_pg_edge > count) ? count : dist_to_pg_edge;
+ addr_t host_addr = 0;
- if (guest_va_to_host_va(guest_info, cursor, &host_addr) != 0) {
- PrintDebug("Invalid GVA(%p)->HVA lookup\n", (void *)cursor);
- return bytes_read;
- }
+ if (guest_va_to_host_va(guest_info, cursor, &host_addr) != 0) {
+ PrintDebug("Invalid GVA(%p)->HVA lookup\n", (void *)cursor);
+ return bytes_read;
+ }
- memcpy(dest + bytes_read, (void*)host_addr, bytes_to_copy);
+ memcpy(dest + bytes_read, (void*)host_addr, bytes_to_copy);
- bytes_read += bytes_to_copy;
- count -= bytes_to_copy;
- cursor += bytes_to_copy;
- }
+ bytes_read += bytes_to_copy;
+ count -= bytes_to_copy;
+ cursor += bytes_to_copy;
+ }
- return bytes_read;
+ return bytes_read;
}
* except for the tiny little issue of crossing page boundries.....
*/
int read_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, uchar_t * dest) {
- addr_t cursor = guest_pa;
- int bytes_read = 0;
+ addr_t cursor = guest_pa;
+ int bytes_read = 0;
- while (count > 0) {
- int dist_to_pg_edge = (PAGE_ADDR(cursor) + PAGE_SIZE) - cursor;
- int bytes_to_copy = (dist_to_pg_edge > count) ? count : dist_to_pg_edge;
- addr_t host_addr = 0;
+ while (count > 0) {
+ int dist_to_pg_edge = (PAGE_ADDR(cursor) + PAGE_SIZE) - cursor;
+ int bytes_to_copy = (dist_to_pg_edge > count) ? count : dist_to_pg_edge;
+ addr_t host_addr = 0;
- if (guest_pa_to_host_va(guest_info, cursor, &host_addr) != 0) {
- return bytes_read;
- }
+ if (guest_pa_to_host_va(guest_info, cursor, &host_addr) != 0) {
+ return bytes_read;
+ }
- /*
- PrintDebug("Trying to read %d bytes\n", bytes_to_copy);
- PrintDebug("Dist to page edge=%d\n", dist_to_pg_edge);
- PrintDebug("PAGE_ADDR=0x%x\n", PAGE_ADDR(cursor));
- PrintDebug("guest_pa=0x%x\n", guest_pa);
- */
+ /*
+ PrintDebug("Trying to read %d bytes\n", bytes_to_copy);
+ PrintDebug("Dist to page edge=%d\n", dist_to_pg_edge);
+ PrintDebug("PAGE_ADDR=0x%x\n", PAGE_ADDR(cursor));
+ PrintDebug("guest_pa=0x%x\n", guest_pa);
+ */
- memcpy(dest + bytes_read, (void*)host_addr, bytes_to_copy);
+ memcpy(dest + bytes_read, (void*)host_addr, bytes_to_copy);
- bytes_read += bytes_to_copy;
- count -= bytes_to_copy;
- cursor += bytes_to_copy;
- }
+ bytes_read += bytes_to_copy;
+ count -= bytes_to_copy;
+ cursor += bytes_to_copy;
+ }
- return bytes_read;
+ return bytes_read;
}
* except for the tiny little issue of crossing page boundries.....
*/
int write_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, uchar_t * src) {
- addr_t cursor = guest_pa;
- int bytes_written = 0;
+ addr_t cursor = guest_pa;
+ int bytes_written = 0;
- while (count > 0) {
- int dist_to_pg_edge = (PAGE_ADDR(cursor) + PAGE_SIZE) - cursor;
- int bytes_to_copy = (dist_to_pg_edge > count) ? count : dist_to_pg_edge;
- addr_t host_addr;
+ while (count > 0) {
+ int dist_to_pg_edge = (PAGE_ADDR(cursor) + PAGE_SIZE) - cursor;
+ int bytes_to_copy = (dist_to_pg_edge > count) ? count : dist_to_pg_edge;
+ addr_t host_addr;
- if (guest_pa_to_host_va(guest_info, cursor, &host_addr) != 0) {
- return bytes_written;
- }
+ if (guest_pa_to_host_va(guest_info, cursor, &host_addr) != 0) {
+ return bytes_written;
+ }
- memcpy((void*)host_addr, src + bytes_written, bytes_to_copy);
+ memcpy((void*)host_addr, src + bytes_written, bytes_to_copy);
- bytes_written += bytes_to_copy;
- count -= bytes_to_copy;
- cursor += bytes_to_copy;
- }
+ bytes_written += bytes_to_copy;
+ count -= bytes_to_copy;
+ cursor += bytes_to_copy;
+ }
- return bytes_written;
+ return bytes_written;
}
void set_vmcb_segment(struct vmcb_selector * vmcb_seg, struct v3_segment * seg) {
- vmcb_seg->selector = seg->selector;
- vmcb_seg->limit = seg->limit;
- vmcb_seg->base = seg->base;
- vmcb_seg->attrib.fields.type = seg->type;
- vmcb_seg->attrib.fields.S = seg->system;
- vmcb_seg->attrib.fields.dpl = seg->dpl;
- vmcb_seg->attrib.fields.P = seg->present;
- vmcb_seg->attrib.fields.avl = seg->avail;
- vmcb_seg->attrib.fields.L = seg->long_mode;
- vmcb_seg->attrib.fields.db = seg->db;
- vmcb_seg->attrib.fields.G = seg->granularity;
+ vmcb_seg->selector = seg->selector;
+ vmcb_seg->limit = seg->limit;
+ vmcb_seg->base = seg->base;
+ vmcb_seg->attrib.fields.type = seg->type;
+ vmcb_seg->attrib.fields.S = seg->system;
+ vmcb_seg->attrib.fields.dpl = seg->dpl;
+ vmcb_seg->attrib.fields.P = seg->present;
+ vmcb_seg->attrib.fields.avl = seg->avail;
+ vmcb_seg->attrib.fields.L = seg->long_mode;
+ vmcb_seg->attrib.fields.db = seg->db;
+ vmcb_seg->attrib.fields.G = seg->granularity;
}
void get_vmcb_segment(struct vmcb_selector * vmcb_seg, struct v3_segment * seg) {
- seg->selector = vmcb_seg->selector;
- seg->limit = vmcb_seg->limit;
- seg->base = vmcb_seg->base;
- seg->type = vmcb_seg->attrib.fields.type;
- seg->system = vmcb_seg->attrib.fields.S;
- seg->dpl = vmcb_seg->attrib.fields.dpl;
- seg->present = vmcb_seg->attrib.fields.P;
- seg->avail = vmcb_seg->attrib.fields.avl;
- seg->long_mode = vmcb_seg->attrib.fields.L;
- seg->db = vmcb_seg->attrib.fields.db;
- seg->granularity = vmcb_seg->attrib.fields.G;
+ seg->selector = vmcb_seg->selector;
+ seg->limit = vmcb_seg->limit;
+ seg->base = vmcb_seg->base;
+ seg->type = vmcb_seg->attrib.fields.type;
+ seg->system = vmcb_seg->attrib.fields.S;
+ seg->dpl = vmcb_seg->attrib.fields.dpl;
+ seg->present = vmcb_seg->attrib.fields.P;
+ seg->avail = vmcb_seg->attrib.fields.avl;
+ seg->long_mode = vmcb_seg->attrib.fields.L;
+ seg->db = vmcb_seg->attrib.fields.db;
+ seg->granularity = vmcb_seg->attrib.fields.G;
}
void set_vmcb_segments(vmcb_t * vmcb, struct v3_segments * segs) {
- vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(vmcb);
-
- set_vmcb_segment(&(guest_area->cs), &(segs->cs));
- set_vmcb_segment(&(guest_area->ds), &(segs->ds));
- set_vmcb_segment(&(guest_area->es), &(segs->es));
- set_vmcb_segment(&(guest_area->fs), &(segs->fs));
- set_vmcb_segment(&(guest_area->gs), &(segs->gs));
- set_vmcb_segment(&(guest_area->ss), &(segs->ss));
- set_vmcb_segment(&(guest_area->ldtr), &(segs->ldtr));
- set_vmcb_segment(&(guest_area->gdtr), &(segs->gdtr));
- set_vmcb_segment(&(guest_area->idtr), &(segs->idtr));
- set_vmcb_segment(&(guest_area->tr), &(segs->tr));
+ vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(vmcb);
+
+ set_vmcb_segment(&(guest_area->cs), &(segs->cs));
+ set_vmcb_segment(&(guest_area->ds), &(segs->ds));
+ set_vmcb_segment(&(guest_area->es), &(segs->es));
+ set_vmcb_segment(&(guest_area->fs), &(segs->fs));
+ set_vmcb_segment(&(guest_area->gs), &(segs->gs));
+ set_vmcb_segment(&(guest_area->ss), &(segs->ss));
+ set_vmcb_segment(&(guest_area->ldtr), &(segs->ldtr));
+ set_vmcb_segment(&(guest_area->gdtr), &(segs->gdtr));
+ set_vmcb_segment(&(guest_area->idtr), &(segs->idtr));
+ set_vmcb_segment(&(guest_area->tr), &(segs->tr));
}
void get_vmcb_segments(vmcb_t * vmcb, struct v3_segments * segs) {
- vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(vmcb);
-
- get_vmcb_segment(&(guest_area->cs), &(segs->cs));
- get_vmcb_segment(&(guest_area->ds), &(segs->ds));
- get_vmcb_segment(&(guest_area->es), &(segs->es));
- get_vmcb_segment(&(guest_area->fs), &(segs->fs));
- get_vmcb_segment(&(guest_area->gs), &(segs->gs));
- get_vmcb_segment(&(guest_area->ss), &(segs->ss));
- get_vmcb_segment(&(guest_area->ldtr), &(segs->ldtr));
- get_vmcb_segment(&(guest_area->gdtr), &(segs->gdtr));
- get_vmcb_segment(&(guest_area->idtr), &(segs->idtr));
- get_vmcb_segment(&(guest_area->tr), &(segs->tr));
+ vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(vmcb);
+
+ get_vmcb_segment(&(guest_area->cs), &(segs->cs));
+ get_vmcb_segment(&(guest_area->ds), &(segs->ds));
+ get_vmcb_segment(&(guest_area->es), &(segs->es));
+ get_vmcb_segment(&(guest_area->fs), &(segs->fs));
+ get_vmcb_segment(&(guest_area->gs), &(segs->gs));
+ get_vmcb_segment(&(guest_area->ss), &(segs->ss));
+ get_vmcb_segment(&(guest_area->ldtr), &(segs->ldtr));
+ get_vmcb_segment(&(guest_area->gdtr), &(segs->gdtr));
+ get_vmcb_segment(&(guest_area->idtr), &(segs->idtr));
+ get_vmcb_segment(&(guest_area->tr), &(segs->tr));
}
void PrintDebugVMCB(vmcb_t * vmcb) {
- reg_ex_t tmp_reg;
+ reg_ex_t tmp_reg;
- vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
- vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(vmcb);
+ vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
+ vmcb_saved_state_t * guest_area = GET_VMCB_SAVE_STATE_AREA(vmcb);
- PrintDebug("VMCB (0x%p)\n", (void *)vmcb);
+ PrintDebug("VMCB (0x%p)\n", (void *)vmcb);
- PrintDebug("--Control Area--\n");
- PrintDebug("CR Reads: %x\n", *(ushort_t*)&(ctrl_area->cr_reads));
- PrintDebug("CR Writes: %x\n", *(ushort_t*)&(ctrl_area->cr_writes));
- PrintDebug("DR Reads: %x\n", *(ushort_t*)&(ctrl_area->dr_reads));
- PrintDebug("DR Writes: %x\n", *(ushort_t*)&(ctrl_area->dr_writes));
+ PrintDebug("--Control Area--\n");
+ PrintDebug("CR Reads: %x\n", *(ushort_t*)&(ctrl_area->cr_reads));
+ PrintDebug("CR Writes: %x\n", *(ushort_t*)&(ctrl_area->cr_writes));
+ PrintDebug("DR Reads: %x\n", *(ushort_t*)&(ctrl_area->dr_reads));
+ PrintDebug("DR Writes: %x\n", *(ushort_t*)&(ctrl_area->dr_writes));
- PrintDebug("Exception Bitmap: %x (at 0x%p)\n", *(uint_t*)&(ctrl_area->exceptions), (void *)&(ctrl_area->exceptions));
- PrintDebug("\tDivide-by-Zero: %d\n", ctrl_area->exceptions.de);
- PrintDebug("\tDebug: %d\n", ctrl_area->exceptions.db);
- PrintDebug("\tNon-maskable interrupts: %d\n", ctrl_area->exceptions.nmi);
- PrintDebug("\tBreakpoint: %d\n", ctrl_area->exceptions.bp);
- PrintDebug("\tOverflow: %d\n", ctrl_area->exceptions.of);
- PrintDebug("\tBound-Range: %d\n", ctrl_area->exceptions.br);
- PrintDebug("\tInvalid Opcode: %d\n", ctrl_area->exceptions.ud);
- PrintDebug("\tDevice not available: %d\n", ctrl_area->exceptions.nm);
- PrintDebug("\tDouble Fault: %d\n", ctrl_area->exceptions.df);
- PrintDebug("\tInvalid TSS: %d\n", ctrl_area->exceptions.ts);
- PrintDebug("\tSegment not present: %d\n", ctrl_area->exceptions.np);
- PrintDebug("\tStack: %d\n", ctrl_area->exceptions.ss);
- PrintDebug("\tGPF: %d\n", ctrl_area->exceptions.gp);
- PrintDebug("\tPage Fault: %d\n", ctrl_area->exceptions.pf);
- PrintDebug("\tFloating Point: %d\n", ctrl_area->exceptions.mf);
- PrintDebug("\tAlignment Check: %d\n", ctrl_area->exceptions.ac);
- PrintDebug("\tMachine Check: %d\n", ctrl_area->exceptions.mc);
- PrintDebug("\tSIMD floating point: %d\n", ctrl_area->exceptions.xf);
- PrintDebug("\tSecurity: %d\n", ctrl_area->exceptions.sx);
-
- PrintDebug("Instructions bitmap: %.8x (at 0x%p)\n", *(uint_t*)&(ctrl_area->instrs), &(ctrl_area->instrs));
- PrintDebug("\tINTR: %d\n", ctrl_area->instrs.INTR);
- PrintDebug("\tNMI: %d\n", ctrl_area->instrs.NMI);
- PrintDebug("\tSMI: %d\n", ctrl_area->instrs.SMI);
- PrintDebug("\tINIT: %d\n", ctrl_area->instrs.INIT);
- PrintDebug("\tVINTR: %d\n", ctrl_area->instrs.VINTR);
- PrintDebug("\tCR0: %d\n", ctrl_area->instrs.CR0);
- PrintDebug("\tRD_IDTR: %d\n", ctrl_area->instrs.RD_IDTR);
- PrintDebug("\tRD_GDTR: %d\n", ctrl_area->instrs.RD_GDTR);
- PrintDebug("\tRD_LDTR: %d\n", ctrl_area->instrs.RD_LDTR);
- PrintDebug("\tRD_TR: %d\n", ctrl_area->instrs.RD_TR);
- PrintDebug("\tWR_IDTR: %d\n", ctrl_area->instrs.WR_IDTR);
- PrintDebug("\tWR_GDTR: %d\n", ctrl_area->instrs.WR_GDTR);
- PrintDebug("\tWR_LDTR: %d\n", ctrl_area->instrs.WR_LDTR);
- PrintDebug("\tWR_TR: %d\n", ctrl_area->instrs.WR_TR);
- PrintDebug("\tRDTSC: %d\n", ctrl_area->instrs.RDTSC);
- PrintDebug("\tRDPMC: %d\n", ctrl_area->instrs.RDPMC);
- PrintDebug("\tPUSHF: %d\n", ctrl_area->instrs.PUSHF);
- PrintDebug("\tPOPF: %d\n", ctrl_area->instrs.POPF);
- PrintDebug("\tCPUID: %d\n", ctrl_area->instrs.CPUID);
- PrintDebug("\tRSM: %d\n", ctrl_area->instrs.RSM);
- PrintDebug("\tIRET: %d\n", ctrl_area->instrs.IRET);
- PrintDebug("\tINTn: %d\n", ctrl_area->instrs.INTn);
- PrintDebug("\tINVD: %d\n", ctrl_area->instrs.INVD);
- PrintDebug("\tPAUSE: %d\n", ctrl_area->instrs.PAUSE);
- PrintDebug("\tHLT: %d\n", ctrl_area->instrs.HLT);
- PrintDebug("\tINVLPG: %d\n", ctrl_area->instrs.INVLPG);
- PrintDebug("\tINVLPGA: %d\n", ctrl_area->instrs.INVLPGA);
- PrintDebug("\tIOIO_PROT: %d\n", ctrl_area->instrs.IOIO_PROT);
- PrintDebug("\tMSR_PROT: %d\n", ctrl_area->instrs.MSR_PROT);
- PrintDebug("\ttask_switch: %d\n", ctrl_area->instrs.task_switch);
- PrintDebug("\tFERR_FREEZE: %d\n", ctrl_area->instrs.FERR_FREEZE);
- PrintDebug("\tshutdown_evts: %d\n", ctrl_area->instrs.shutdown_evts);
-
- PrintDebug("SVM Instruction Bitmap: %x (at 0x%p)\n", *(uint_t*)&(ctrl_area->svm_instrs), &(ctrl_area->svm_instrs));
- PrintDebug("\tVMRUN: %d\n", ctrl_area->svm_instrs.VMRUN);
- PrintDebug("\tVMMCALL: %d\n", ctrl_area->svm_instrs.VMMCALL);
- PrintDebug("\tVMLOAD: %d\n", ctrl_area->svm_instrs.VMLOAD);
- PrintDebug("\tVMSAVE: %d\n", ctrl_area->svm_instrs.VMSAVE);
- PrintDebug("\tSTGI: %d\n", ctrl_area->svm_instrs.STGI);
- PrintDebug("\tCLGI: %d\n", ctrl_area->svm_instrs.CLGI);
- PrintDebug("\tSKINIT: %d\n", ctrl_area->svm_instrs.SKINIT);
- PrintDebug("\tRDTSCP: %d\n", ctrl_area->svm_instrs.RDTSCP);
- PrintDebug("\tICEBP: %d\n", ctrl_area->svm_instrs.ICEBP);
- PrintDebug("\tWBINVD: %d\n", ctrl_area->svm_instrs.WBINVD);
- PrintDebug("\tMONITOR: %d\n", ctrl_area->svm_instrs.MONITOR);
- PrintDebug("\tMWAIT_always: %d\n", ctrl_area->svm_instrs.MWAIT_always);
- PrintDebug("\tMWAIT_if_armed: %d\n", ctrl_area->svm_instrs.MWAIT_if_armed);
-
-
-
- tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
- PrintDebug("IOPM_BASE_PA: lo: 0x%x, hi: 0x%x\n", tmp_reg.e_reg.low, tmp_reg.e_reg.high);
- tmp_reg.r_reg = ctrl_area->MSRPM_BASE_PA;
- PrintDebug("MSRPM_BASE_PA: lo: 0x%x, hi: 0x%x\n", tmp_reg.e_reg.low, tmp_reg.e_reg.high);
- tmp_reg.r_reg = ctrl_area->TSC_OFFSET;
- PrintDebug("TSC_OFFSET: lo: 0x%x, hi: 0x%x\n", tmp_reg.e_reg.low, tmp_reg.e_reg.high);
-
- PrintDebug("guest_ASID: %d\n", ctrl_area->guest_ASID);
- PrintDebug("TLB_CONTROL: %d\n", ctrl_area->TLB_CONTROL);
-
-
- PrintDebug("Guest Control Bitmap: %x (at 0x%p)\n", *(uint_t*)&(ctrl_area->guest_ctrl), &(ctrl_area->guest_ctrl));
- PrintDebug("\tV_TPR: %d\n", ctrl_area->guest_ctrl.V_TPR);
- PrintDebug("\tV_IRQ: %d\n", ctrl_area->guest_ctrl.V_IRQ);
- PrintDebug("\tV_INTR_PRIO: %d\n", ctrl_area->guest_ctrl.V_INTR_PRIO);
- PrintDebug("\tV_IGN_TPR: %d\n", ctrl_area->guest_ctrl.V_IGN_TPR);
- PrintDebug("\tV_INTR_MASKING: %d\n", ctrl_area->guest_ctrl.V_INTR_MASKING);
- PrintDebug("\tV_INTR_VECTOR: %d\n", ctrl_area->guest_ctrl.V_INTR_VECTOR);
-
- PrintDebug("Interrupt_shadow: %d\n", ctrl_area->interrupt_shadow);
-
-
- tmp_reg.r_reg = ctrl_area->exit_code;
- PrintDebug("exit_code: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = ctrl_area->exit_info1;
- PrintDebug("exit_info1: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = ctrl_area->exit_info2;
- PrintDebug("exit_info2: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("Exit Int Info: (at 0x%p)\n", &(ctrl_area->exit_int_info));
- PrintDebug("Vector: %d\n", ctrl_area->exit_int_info.vector);
- PrintDebug("(type=%d) (ev=%d) (valid=%d)\n", ctrl_area->exit_int_info.type,
- ctrl_area->exit_int_info.ev, ctrl_area->exit_int_info.valid);
- PrintDebug("Error Code: %d\n", ctrl_area->exit_int_info.error_code);
-
-
- tmp_reg.r_reg = ctrl_area->NP_ENABLE;
- PrintDebug("NP_ENABLE: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
- PrintDebug("Event Injection: (at 0x%p)\n", &(ctrl_area->EVENTINJ));
- PrintDebug("Vector: %d\n", ctrl_area->EVENTINJ.vector);
- PrintDebug("(type=%d) (ev=%d) (valid=%d)\n", ctrl_area->EVENTINJ.type,
- ctrl_area->EVENTINJ.ev, ctrl_area->EVENTINJ.valid);
- PrintDebug("Error Code: %d\n", ctrl_area->EVENTINJ.error_code);
-
-
- tmp_reg.r_reg = ctrl_area->N_CR3;
- PrintDebug("N_CR3: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
- PrintDebug("LBR_VIRTUALIZATION_ENABLE: %d\n", ctrl_area->LBR_VIRTUALIZATION_ENABLE);
-
-
- PrintDebug("\n--Guest Saved State--\n");
-
- PrintDebug("es Selector (at 0x%p): \n", &(guest_area->es));
- PrintDebug("\tSelector: %d\n", guest_area->es.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->es.attrib.fields.type, guest_area->es.attrib.fields.S,
- guest_area->es.attrib.fields.dpl, guest_area->es.attrib.fields.P,
- guest_area->es.attrib.fields.avl, guest_area->es.attrib.fields.L,
- guest_area->es.attrib.fields.db, guest_area->es.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->es.limit);
- tmp_reg.r_reg = guest_area->es.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("cs Selector (at 0x%p): \n", &(guest_area->cs));
- PrintDebug("\tSelector: %d\n", guest_area->cs.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->cs.attrib.fields.type, guest_area->cs.attrib.fields.S,
- guest_area->cs.attrib.fields.dpl, guest_area->cs.attrib.fields.P,
- guest_area->cs.attrib.fields.avl, guest_area->cs.attrib.fields.L,
- guest_area->cs.attrib.fields.db, guest_area->cs.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->cs.limit);
- tmp_reg.r_reg = guest_area->cs.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("ss Selector (at 0x%p): \n", &(guest_area->ss));
- PrintDebug("\tSelector: %d\n", guest_area->ss.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->ss.attrib.fields.type, guest_area->ss.attrib.fields.S,
- guest_area->ss.attrib.fields.dpl, guest_area->ss.attrib.fields.P,
- guest_area->ss.attrib.fields.avl, guest_area->ss.attrib.fields.L,
- guest_area->ss.attrib.fields.db, guest_area->ss.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->ss.limit);
- tmp_reg.r_reg = guest_area->ss.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("ds Selector (at 0x%p): \n", &(guest_area->ds));
- PrintDebug("\tSelector: %d\n", guest_area->ds.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->ds.attrib.fields.type, guest_area->ds.attrib.fields.S,
- guest_area->ds.attrib.fields.dpl, guest_area->ds.attrib.fields.P,
- guest_area->ds.attrib.fields.avl, guest_area->ds.attrib.fields.L,
- guest_area->ds.attrib.fields.db, guest_area->ds.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->ds.limit);
- tmp_reg.r_reg = guest_area->ds.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("fs Selector (at 0x%p): \n", &(guest_area->fs));
- PrintDebug("\tSelector: %d\n", guest_area->fs.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->fs.attrib.fields.type, guest_area->fs.attrib.fields.S,
- guest_area->fs.attrib.fields.dpl, guest_area->fs.attrib.fields.P,
- guest_area->fs.attrib.fields.avl, guest_area->fs.attrib.fields.L,
- guest_area->fs.attrib.fields.db, guest_area->fs.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->fs.limit);
- tmp_reg.r_reg = guest_area->fs.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("gs Selector (at 0x%p): \n", &(guest_area->gs));
- PrintDebug("\tSelector: %d\n", guest_area->gs.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->gs.attrib.fields.type, guest_area->gs.attrib.fields.S,
- guest_area->gs.attrib.fields.dpl, guest_area->gs.attrib.fields.P,
- guest_area->gs.attrib.fields.avl, guest_area->gs.attrib.fields.L,
- guest_area->gs.attrib.fields.db, guest_area->gs.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->gs.limit);
- tmp_reg.r_reg = guest_area->gs.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("gdtr Selector (at 0x%p): \n", &(guest_area->gdtr));
- PrintDebug("\tSelector: %d\n", guest_area->gdtr.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->gdtr.attrib.fields.type, guest_area->gdtr.attrib.fields.S,
- guest_area->gdtr.attrib.fields.dpl, guest_area->gdtr.attrib.fields.P,
- guest_area->gdtr.attrib.fields.avl, guest_area->gdtr.attrib.fields.L,
- guest_area->gdtr.attrib.fields.db, guest_area->gdtr.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->gdtr.limit);
- tmp_reg.r_reg = guest_area->gdtr.base;
- PrintDebug("\tBase: hi: 0x%.8x, lo: 0x%.8x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("ldtr Selector (at 0x%p): \n", &(guest_area->ldtr));
- PrintDebug("\tSelector: %d\n", guest_area->ldtr.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->ldtr.attrib.fields.type, guest_area->ldtr.attrib.fields.S,
- guest_area->ldtr.attrib.fields.dpl, guest_area->ldtr.attrib.fields.P,
- guest_area->ldtr.attrib.fields.avl, guest_area->ldtr.attrib.fields.L,
- guest_area->ldtr.attrib.fields.db, guest_area->ldtr.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->ldtr.limit);
- tmp_reg.r_reg = guest_area->ldtr.base;
- PrintDebug("\tBase: hi: 0x%.8x, lo: 0x%.8x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("idtr Selector (at 0x%p): \n", &(guest_area->idtr));
- PrintDebug("\tSelector: %d\n", guest_area->idtr.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->idtr.attrib.fields.type, guest_area->idtr.attrib.fields.S,
- guest_area->idtr.attrib.fields.dpl, guest_area->idtr.attrib.fields.P,
- guest_area->idtr.attrib.fields.avl, guest_area->idtr.attrib.fields.L,
- guest_area->idtr.attrib.fields.db, guest_area->idtr.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->idtr.limit);
- tmp_reg.r_reg = guest_area->idtr.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("tr Selector (at 0x%p): \n", &(guest_area->tr));
- PrintDebug("\tSelector: %d\n", guest_area->tr.selector);
- PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
- guest_area->tr.attrib.fields.type, guest_area->tr.attrib.fields.S,
- guest_area->tr.attrib.fields.dpl, guest_area->tr.attrib.fields.P,
- guest_area->tr.attrib.fields.avl, guest_area->tr.attrib.fields.L,
- guest_area->tr.attrib.fields.db, guest_area->tr.attrib.fields.G);
- PrintDebug("\tlimit: %u\n", guest_area->tr.limit);
- tmp_reg.r_reg = guest_area->tr.base;
- PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- PrintDebug("cpl: %d\n", guest_area->cpl);
+ PrintDebug("Exception Bitmap: %x (at 0x%p)\n", *(uint_t*)&(ctrl_area->exceptions), (void *)&(ctrl_area->exceptions));
+ PrintDebug("\tDivide-by-Zero: %d\n", ctrl_area->exceptions.de);
+ PrintDebug("\tDebug: %d\n", ctrl_area->exceptions.db);
+ PrintDebug("\tNon-maskable interrupts: %d\n", ctrl_area->exceptions.nmi);
+ PrintDebug("\tBreakpoint: %d\n", ctrl_area->exceptions.bp);
+ PrintDebug("\tOverflow: %d\n", ctrl_area->exceptions.of);
+ PrintDebug("\tBound-Range: %d\n", ctrl_area->exceptions.br);
+ PrintDebug("\tInvalid Opcode: %d\n", ctrl_area->exceptions.ud);
+ PrintDebug("\tDevice not available: %d\n", ctrl_area->exceptions.nm);
+ PrintDebug("\tDouble Fault: %d\n", ctrl_area->exceptions.df);
+ PrintDebug("\tInvalid TSS: %d\n", ctrl_area->exceptions.ts);
+ PrintDebug("\tSegment not present: %d\n", ctrl_area->exceptions.np);
+ PrintDebug("\tStack: %d\n", ctrl_area->exceptions.ss);
+ PrintDebug("\tGPF: %d\n", ctrl_area->exceptions.gp);
+ PrintDebug("\tPage Fault: %d\n", ctrl_area->exceptions.pf);
+ PrintDebug("\tFloating Point: %d\n", ctrl_area->exceptions.mf);
+ PrintDebug("\tAlignment Check: %d\n", ctrl_area->exceptions.ac);
+ PrintDebug("\tMachine Check: %d\n", ctrl_area->exceptions.mc);
+ PrintDebug("\tSIMD floating point: %d\n", ctrl_area->exceptions.xf);
+ PrintDebug("\tSecurity: %d\n", ctrl_area->exceptions.sx);
+
+ PrintDebug("Instructions bitmap: %.8x (at 0x%p)\n", *(uint_t*)&(ctrl_area->instrs), &(ctrl_area->instrs));
+ PrintDebug("\tINTR: %d\n", ctrl_area->instrs.INTR);
+ PrintDebug("\tNMI: %d\n", ctrl_area->instrs.NMI);
+ PrintDebug("\tSMI: %d\n", ctrl_area->instrs.SMI);
+ PrintDebug("\tINIT: %d\n", ctrl_area->instrs.INIT);
+ PrintDebug("\tVINTR: %d\n", ctrl_area->instrs.VINTR);
+ PrintDebug("\tCR0: %d\n", ctrl_area->instrs.CR0);
+ PrintDebug("\tRD_IDTR: %d\n", ctrl_area->instrs.RD_IDTR);
+ PrintDebug("\tRD_GDTR: %d\n", ctrl_area->instrs.RD_GDTR);
+ PrintDebug("\tRD_LDTR: %d\n", ctrl_area->instrs.RD_LDTR);
+ PrintDebug("\tRD_TR: %d\n", ctrl_area->instrs.RD_TR);
+ PrintDebug("\tWR_IDTR: %d\n", ctrl_area->instrs.WR_IDTR);
+ PrintDebug("\tWR_GDTR: %d\n", ctrl_area->instrs.WR_GDTR);
+ PrintDebug("\tWR_LDTR: %d\n", ctrl_area->instrs.WR_LDTR);
+ PrintDebug("\tWR_TR: %d\n", ctrl_area->instrs.WR_TR);
+ PrintDebug("\tRDTSC: %d\n", ctrl_area->instrs.RDTSC);
+ PrintDebug("\tRDPMC: %d\n", ctrl_area->instrs.RDPMC);
+ PrintDebug("\tPUSHF: %d\n", ctrl_area->instrs.PUSHF);
+ PrintDebug("\tPOPF: %d\n", ctrl_area->instrs.POPF);
+ PrintDebug("\tCPUID: %d\n", ctrl_area->instrs.CPUID);
+ PrintDebug("\tRSM: %d\n", ctrl_area->instrs.RSM);
+ PrintDebug("\tIRET: %d\n", ctrl_area->instrs.IRET);
+ PrintDebug("\tINTn: %d\n", ctrl_area->instrs.INTn);
+ PrintDebug("\tINVD: %d\n", ctrl_area->instrs.INVD);
+ PrintDebug("\tPAUSE: %d\n", ctrl_area->instrs.PAUSE);
+ PrintDebug("\tHLT: %d\n", ctrl_area->instrs.HLT);
+ PrintDebug("\tINVLPG: %d\n", ctrl_area->instrs.INVLPG);
+ PrintDebug("\tINVLPGA: %d\n", ctrl_area->instrs.INVLPGA);
+ PrintDebug("\tIOIO_PROT: %d\n", ctrl_area->instrs.IOIO_PROT);
+ PrintDebug("\tMSR_PROT: %d\n", ctrl_area->instrs.MSR_PROT);
+ PrintDebug("\ttask_switch: %d\n", ctrl_area->instrs.task_switch);
+ PrintDebug("\tFERR_FREEZE: %d\n", ctrl_area->instrs.FERR_FREEZE);
+ PrintDebug("\tshutdown_evts: %d\n", ctrl_area->instrs.shutdown_evts);
+
+ PrintDebug("SVM Instruction Bitmap: %x (at 0x%p)\n", *(uint_t*)&(ctrl_area->svm_instrs), &(ctrl_area->svm_instrs));
+ PrintDebug("\tVMRUN: %d\n", ctrl_area->svm_instrs.VMRUN);
+ PrintDebug("\tVMMCALL: %d\n", ctrl_area->svm_instrs.VMMCALL);
+ PrintDebug("\tVMLOAD: %d\n", ctrl_area->svm_instrs.VMLOAD);
+ PrintDebug("\tVMSAVE: %d\n", ctrl_area->svm_instrs.VMSAVE);
+ PrintDebug("\tSTGI: %d\n", ctrl_area->svm_instrs.STGI);
+ PrintDebug("\tCLGI: %d\n", ctrl_area->svm_instrs.CLGI);
+ PrintDebug("\tSKINIT: %d\n", ctrl_area->svm_instrs.SKINIT);
+ PrintDebug("\tRDTSCP: %d\n", ctrl_area->svm_instrs.RDTSCP);
+ PrintDebug("\tICEBP: %d\n", ctrl_area->svm_instrs.ICEBP);
+ PrintDebug("\tWBINVD: %d\n", ctrl_area->svm_instrs.WBINVD);
+ PrintDebug("\tMONITOR: %d\n", ctrl_area->svm_instrs.MONITOR);
+ PrintDebug("\tMWAIT_always: %d\n", ctrl_area->svm_instrs.MWAIT_always);
+ PrintDebug("\tMWAIT_if_armed: %d\n", ctrl_area->svm_instrs.MWAIT_if_armed);
+
+
+
+ tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
+ PrintDebug("IOPM_BASE_PA: lo: 0x%x, hi: 0x%x\n", tmp_reg.e_reg.low, tmp_reg.e_reg.high);
+ tmp_reg.r_reg = ctrl_area->MSRPM_BASE_PA;
+ PrintDebug("MSRPM_BASE_PA: lo: 0x%x, hi: 0x%x\n", tmp_reg.e_reg.low, tmp_reg.e_reg.high);
+ tmp_reg.r_reg = ctrl_area->TSC_OFFSET;
+ PrintDebug("TSC_OFFSET: lo: 0x%x, hi: 0x%x\n", tmp_reg.e_reg.low, tmp_reg.e_reg.high);
+
+ PrintDebug("guest_ASID: %d\n", ctrl_area->guest_ASID);
+ PrintDebug("TLB_CONTROL: %d\n", ctrl_area->TLB_CONTROL);
+
+
+ PrintDebug("Guest Control Bitmap: %x (at 0x%p)\n", *(uint_t*)&(ctrl_area->guest_ctrl), &(ctrl_area->guest_ctrl));
+ PrintDebug("\tV_TPR: %d\n", ctrl_area->guest_ctrl.V_TPR);
+ PrintDebug("\tV_IRQ: %d\n", ctrl_area->guest_ctrl.V_IRQ);
+ PrintDebug("\tV_INTR_PRIO: %d\n", ctrl_area->guest_ctrl.V_INTR_PRIO);
+ PrintDebug("\tV_IGN_TPR: %d\n", ctrl_area->guest_ctrl.V_IGN_TPR);
+ PrintDebug("\tV_INTR_MASKING: %d\n", ctrl_area->guest_ctrl.V_INTR_MASKING);
+ PrintDebug("\tV_INTR_VECTOR: %d\n", ctrl_area->guest_ctrl.V_INTR_VECTOR);
+
+ PrintDebug("Interrupt_shadow: %d\n", ctrl_area->interrupt_shadow);
+
+
+ tmp_reg.r_reg = ctrl_area->exit_code;
+ PrintDebug("exit_code: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = ctrl_area->exit_info1;
+ PrintDebug("exit_info1: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = ctrl_area->exit_info2;
+ PrintDebug("exit_info2: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("Exit Int Info: (at 0x%p)\n", &(ctrl_area->exit_int_info));
+ PrintDebug("Vector: %d\n", ctrl_area->exit_int_info.vector);
+ PrintDebug("(type=%d) (ev=%d) (valid=%d)\n", ctrl_area->exit_int_info.type,
+ ctrl_area->exit_int_info.ev, ctrl_area->exit_int_info.valid);
+ PrintDebug("Error Code: %d\n", ctrl_area->exit_int_info.error_code);
+
+
+ tmp_reg.r_reg = ctrl_area->NP_ENABLE;
+ PrintDebug("NP_ENABLE: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+ PrintDebug("Event Injection: (at 0x%p)\n", &(ctrl_area->EVENTINJ));
+ PrintDebug("Vector: %d\n", ctrl_area->EVENTINJ.vector);
+ PrintDebug("(type=%d) (ev=%d) (valid=%d)\n", ctrl_area->EVENTINJ.type,
+ ctrl_area->EVENTINJ.ev, ctrl_area->EVENTINJ.valid);
+ PrintDebug("Error Code: %d\n", ctrl_area->EVENTINJ.error_code);
+
+
+ tmp_reg.r_reg = ctrl_area->N_CR3;
+ PrintDebug("N_CR3: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+ PrintDebug("LBR_VIRTUALIZATION_ENABLE: %d\n", ctrl_area->LBR_VIRTUALIZATION_ENABLE);
+
+
+ PrintDebug("\n--Guest Saved State--\n");
+
+ PrintDebug("es Selector (at 0x%p): \n", &(guest_area->es));
+ PrintDebug("\tSelector: %d\n", guest_area->es.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->es.attrib.fields.type, guest_area->es.attrib.fields.S,
+ guest_area->es.attrib.fields.dpl, guest_area->es.attrib.fields.P,
+ guest_area->es.attrib.fields.avl, guest_area->es.attrib.fields.L,
+ guest_area->es.attrib.fields.db, guest_area->es.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->es.limit);
+ tmp_reg.r_reg = guest_area->es.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("cs Selector (at 0x%p): \n", &(guest_area->cs));
+ PrintDebug("\tSelector: %d\n", guest_area->cs.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->cs.attrib.fields.type, guest_area->cs.attrib.fields.S,
+ guest_area->cs.attrib.fields.dpl, guest_area->cs.attrib.fields.P,
+ guest_area->cs.attrib.fields.avl, guest_area->cs.attrib.fields.L,
+ guest_area->cs.attrib.fields.db, guest_area->cs.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->cs.limit);
+ tmp_reg.r_reg = guest_area->cs.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("ss Selector (at 0x%p): \n", &(guest_area->ss));
+ PrintDebug("\tSelector: %d\n", guest_area->ss.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->ss.attrib.fields.type, guest_area->ss.attrib.fields.S,
+ guest_area->ss.attrib.fields.dpl, guest_area->ss.attrib.fields.P,
+ guest_area->ss.attrib.fields.avl, guest_area->ss.attrib.fields.L,
+ guest_area->ss.attrib.fields.db, guest_area->ss.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->ss.limit);
+ tmp_reg.r_reg = guest_area->ss.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("ds Selector (at 0x%p): \n", &(guest_area->ds));
+ PrintDebug("\tSelector: %d\n", guest_area->ds.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->ds.attrib.fields.type, guest_area->ds.attrib.fields.S,
+ guest_area->ds.attrib.fields.dpl, guest_area->ds.attrib.fields.P,
+ guest_area->ds.attrib.fields.avl, guest_area->ds.attrib.fields.L,
+ guest_area->ds.attrib.fields.db, guest_area->ds.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->ds.limit);
+ tmp_reg.r_reg = guest_area->ds.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("fs Selector (at 0x%p): \n", &(guest_area->fs));
+ PrintDebug("\tSelector: %d\n", guest_area->fs.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->fs.attrib.fields.type, guest_area->fs.attrib.fields.S,
+ guest_area->fs.attrib.fields.dpl, guest_area->fs.attrib.fields.P,
+ guest_area->fs.attrib.fields.avl, guest_area->fs.attrib.fields.L,
+ guest_area->fs.attrib.fields.db, guest_area->fs.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->fs.limit);
+ tmp_reg.r_reg = guest_area->fs.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("gs Selector (at 0x%p): \n", &(guest_area->gs));
+ PrintDebug("\tSelector: %d\n", guest_area->gs.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->gs.attrib.fields.type, guest_area->gs.attrib.fields.S,
+ guest_area->gs.attrib.fields.dpl, guest_area->gs.attrib.fields.P,
+ guest_area->gs.attrib.fields.avl, guest_area->gs.attrib.fields.L,
+ guest_area->gs.attrib.fields.db, guest_area->gs.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->gs.limit);
+ tmp_reg.r_reg = guest_area->gs.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("gdtr Selector (at 0x%p): \n", &(guest_area->gdtr));
+ PrintDebug("\tSelector: %d\n", guest_area->gdtr.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->gdtr.attrib.fields.type, guest_area->gdtr.attrib.fields.S,
+ guest_area->gdtr.attrib.fields.dpl, guest_area->gdtr.attrib.fields.P,
+ guest_area->gdtr.attrib.fields.avl, guest_area->gdtr.attrib.fields.L,
+ guest_area->gdtr.attrib.fields.db, guest_area->gdtr.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->gdtr.limit);
+ tmp_reg.r_reg = guest_area->gdtr.base;
+ PrintDebug("\tBase: hi: 0x%.8x, lo: 0x%.8x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("ldtr Selector (at 0x%p): \n", &(guest_area->ldtr));
+ PrintDebug("\tSelector: %d\n", guest_area->ldtr.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->ldtr.attrib.fields.type, guest_area->ldtr.attrib.fields.S,
+ guest_area->ldtr.attrib.fields.dpl, guest_area->ldtr.attrib.fields.P,
+ guest_area->ldtr.attrib.fields.avl, guest_area->ldtr.attrib.fields.L,
+ guest_area->ldtr.attrib.fields.db, guest_area->ldtr.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->ldtr.limit);
+ tmp_reg.r_reg = guest_area->ldtr.base;
+ PrintDebug("\tBase: hi: 0x%.8x, lo: 0x%.8x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("idtr Selector (at 0x%p): \n", &(guest_area->idtr));
+ PrintDebug("\tSelector: %d\n", guest_area->idtr.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->idtr.attrib.fields.type, guest_area->idtr.attrib.fields.S,
+ guest_area->idtr.attrib.fields.dpl, guest_area->idtr.attrib.fields.P,
+ guest_area->idtr.attrib.fields.avl, guest_area->idtr.attrib.fields.L,
+ guest_area->idtr.attrib.fields.db, guest_area->idtr.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->idtr.limit);
+ tmp_reg.r_reg = guest_area->idtr.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("tr Selector (at 0x%p): \n", &(guest_area->tr));
+ PrintDebug("\tSelector: %d\n", guest_area->tr.selector);
+ PrintDebug("\t(type=%x), (S=%d), (dpl=%d), (P=%d), (avl=%d), (L=%d), (db=%d), (G=%d)\n",
+ guest_area->tr.attrib.fields.type, guest_area->tr.attrib.fields.S,
+ guest_area->tr.attrib.fields.dpl, guest_area->tr.attrib.fields.P,
+ guest_area->tr.attrib.fields.avl, guest_area->tr.attrib.fields.L,
+ guest_area->tr.attrib.fields.db, guest_area->tr.attrib.fields.G);
+ PrintDebug("\tlimit: %u\n", guest_area->tr.limit);
+ tmp_reg.r_reg = guest_area->tr.base;
+ PrintDebug("\tBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ PrintDebug("cpl: %d\n", guest_area->cpl);
- tmp_reg.r_reg = guest_area->efer;
- PrintDebug("EFER: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
- tmp_reg.r_reg = guest_area->cr4;
- PrintDebug("CR4: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->cr3;
- PrintDebug("CR3: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->cr0;
- PrintDebug("CR0: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->dr7;
- PrintDebug("DR7: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->dr6;
- PrintDebug("DR6: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->rflags;
- PrintDebug("RFLAGS: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->rip;
- PrintDebug("RIP: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
- tmp_reg.r_reg = guest_area->rsp;
- PrintDebug("RSP: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->efer;
+ PrintDebug("EFER: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+ tmp_reg.r_reg = guest_area->cr4;
+ PrintDebug("CR4: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->cr3;
+ PrintDebug("CR3: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->cr0;
+ PrintDebug("CR0: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->dr7;
+ PrintDebug("DR7: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->dr6;
+ PrintDebug("DR6: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->rflags;
+ PrintDebug("RFLAGS: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->rip;
+ PrintDebug("RIP: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+
+ tmp_reg.r_reg = guest_area->rsp;
+ PrintDebug("RSP: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->rax;
- PrintDebug("RAX: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->star;
- PrintDebug("STAR: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->lstar;
- PrintDebug("LSTAR: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->cstar;
- PrintDebug("CSTAR: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->sfmask;
- PrintDebug("SFMASK: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->KernelGsBase;
- PrintDebug("KernelGsBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->sysenter_cs;
- PrintDebug("sysenter_cs: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->sysenter_esp;
- PrintDebug("sysenter_esp: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->sysenter_eip;
- PrintDebug("sysenter_eip: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->cr2;
- PrintDebug("CR2: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
- tmp_reg.r_reg = guest_area->g_pat;
- PrintDebug("g_pat: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->dbgctl;
- PrintDebug("dbgctl: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->br_from;
- PrintDebug("br_from: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->br_to;
- PrintDebug("br_to: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->lastexcpfrom;
- PrintDebug("lastexcpfrom: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
- tmp_reg.r_reg = guest_area->lastexcpto;
- PrintDebug("lastexcpto: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
-
-
-
-
-
-
+ tmp_reg.r_reg = guest_area->rax;
+ PrintDebug("RAX: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->star;
+ PrintDebug("STAR: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->lstar;
+ PrintDebug("LSTAR: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->cstar;
+ PrintDebug("CSTAR: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->sfmask;
+ PrintDebug("SFMASK: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->KernelGsBase;
+ PrintDebug("KernelGsBase: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->sysenter_cs;
+ PrintDebug("sysenter_cs: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->sysenter_esp;
+ PrintDebug("sysenter_esp: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->sysenter_eip;
+ PrintDebug("sysenter_eip: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->cr2;
+ PrintDebug("CR2: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+
+ tmp_reg.r_reg = guest_area->g_pat;
+ PrintDebug("g_pat: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->dbgctl;
+ PrintDebug("dbgctl: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->br_from;
+ PrintDebug("br_from: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->br_to;
+ PrintDebug("br_to: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->lastexcpfrom;
+ PrintDebug("lastexcpfrom: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
+ tmp_reg.r_reg = guest_area->lastexcpto;
+ PrintDebug("lastexcpto: hi: 0x%x, lo: 0x%x\n", tmp_reg.e_reg.high, tmp_reg.e_reg.low);
}
static struct guest_info * allocate_guest() {
- void * info = V3_Malloc(sizeof(struct guest_info));
- memset(info, 0, sizeof(struct guest_info));
- return info;
+ void * info = V3_Malloc(sizeof(struct guest_info));
+ memset(info, 0, sizeof(struct guest_info));
+ return info;
}
void Init_V3(struct v3_os_hooks * hooks, struct v3_ctrl_ops * vmm_ops) {
- os_hooks = hooks;
+ os_hooks = hooks;
- v3_cpu_type = V3_INVALID_CPU;
+ v3_cpu_type = V3_INVALID_CPU;
#ifdef INSTRUMENT_VMM
- v3_init_instrumentation();
+ v3_init_instrumentation();
#endif
- if (v3_is_svm_capable()) {
-
- PrintDebug("Machine is SVM Capable\n");
- vmm_ops->allocate_guest = &allocate_guest;
- vmm_ops->config_guest = &v3_config_guest;
- v3_init_SVM(vmm_ops);
-
- /*
- } else if (is_vmx_capable()) {
- vmm_cpu_type = VMM_VMX_CPU;
- PrintDebug("Machine is VMX Capable\n");
- //Init_VMX();*/
- } else {
- PrintDebug("CPU has no virtualization Extensions\n");
- }
+ if (v3_is_svm_capable()) {
+
+ PrintDebug("Machine is SVM Capable\n");
+ vmm_ops->allocate_guest = &allocate_guest;
+ vmm_ops->config_guest = &v3_config_guest;
+ v3_init_SVM(vmm_ops);
+
+ /*
+ } else if (is_vmx_capable()) {
+ vmm_cpu_type = VMM_VMX_CPU;
+ PrintDebug("Machine is VMX Capable\n");
+ //Init_VMX();*/
+ } else {
+ PrintDebug("CPU has no virtualization Extensions\n");
+ }
}
static int passthrough_mem_write(addr_t guest_addr, void * src, uint_t length, void * priv_data) {
- return length;
- // memcpy((void*)guest_addr, src, length);
- PrintDebug("Write of %d bytes to %p\n", length, (void *)guest_addr);
- PrintDebug("Write Value = %p\n", (void *)*(addr_t *)src);
-
- return length;
+ return length;
+ // memcpy((void*)guest_addr, src, length);
+ PrintDebug("Write of %d bytes to %p\n", length, (void *)guest_addr);
+ PrintDebug("Write Value = %p\n", (void *)*(addr_t *)src);
+
+ return length;
}
int v3_config_guest(struct guest_info * info, struct v3_vm_config * config_ptr) {
- extern v3_cpu_arch_t v3_cpu_type;
-
- // Initialize the subsystem data strutures
- v3_init_time(info);
- v3_init_io_map(info);
- v3_init_msr_map(info);
- v3_init_interrupt_state(info);
- v3_init_dev_mgr(info);
- v3_init_host_events(info);
-
- v3_init_decoder(info);
-
- v3_init_shadow_map(info);
-
- v3_init_hypercall_map(info);
-
-
- if (v3_cpu_type == V3_SVM_REV3_CPU) {
- info->shdw_pg_mode = NESTED_PAGING;
- } else {
- v3_init_shadow_page_state(info);
- info->shdw_pg_mode = SHADOW_PAGING;
- }
+ extern v3_cpu_arch_t v3_cpu_type;
+
+ // Initialize the subsystem data strutures
+ v3_init_time(info);
+ v3_init_io_map(info);
+ v3_init_msr_map(info);
+ v3_init_interrupt_state(info);
+ v3_init_dev_mgr(info);
+ v3_init_host_events(info);
+
+ v3_init_decoder(info);
+
+ v3_init_shadow_map(info);
+
+ v3_init_hypercall_map(info);
+
- // Initial CPU operating mode
- info->cpu_mode = REAL;
- info->mem_mode = PHYSICAL_MEM;
-
- // Amount of ram the Guest will have, rounded to a 4K page boundary
- info->mem_size = config_ptr->mem_size & ~(addr_t)0xfff;
-
- // Configure the memory map for the guest
- if (setup_memory_map(info, config_ptr) == -1) {
- PrintError("Setting up guest memory map failed...\n");
- return -1;
- }
-
- // Configure the devices for the guest
- setup_devices(info, config_ptr);
-
-
+ if (v3_cpu_type == V3_SVM_REV3_CPU) {
+ info->shdw_pg_mode = NESTED_PAGING;
+ } else {
+ v3_init_shadow_page_state(info);
+ info->shdw_pg_mode = SHADOW_PAGING;
+ }
+
+ // Initial CPU operating mode
+ info->cpu_mode = REAL;
+ info->mem_mode = PHYSICAL_MEM;
+
+ // Amount of ram the Guest will have, rounded to a 4K page boundary
+ info->mem_size = config_ptr->mem_size & ~(addr_t)0xfff;
+
+ // Configure the memory map for the guest
+ if (setup_memory_map(info, config_ptr) == -1) {
+ PrintError("Setting up guest memory map failed...\n");
+ return -1;
+ }
+
+ // Configure the devices for the guest
+ setup_devices(info, config_ptr);
+
- if (config_ptr->enable_profiling) {
- info->enable_profiler = 1;
- v3_init_profiler(info);
- } else {
- info->enable_profiler = 0;
- }
- //v3_hook_io_port(info, 1234, &IO_Read, NULL, info);
+ if (config_ptr->enable_profiling) {
+ info->enable_profiler = 1;
+ v3_init_profiler(info);
+ } else {
+ info->enable_profiler = 0;
+ }
- // Setup initial cpu register state
- info->rip = 0xfff0;
- info->vm_regs.rsp = 0x0;
+ //v3_hook_io_port(info, 1234, &IO_Read, NULL, info);
+
+ // Setup initial cpu register state
+ info->rip = 0xfff0;
+ info->vm_regs.rsp = 0x0;
-
- return 0;
+
+ return 0;
}
* We need to make sure the memory map extends to cover it
*/
static int setup_memory_map(struct guest_info * info, struct v3_vm_config * config_ptr) {
- addr_t mem_pages = info->mem_size >> 12;
-
- PrintDebug("Setting up memory map (memory size=%dMB)\n", (uint_t)(info->mem_size / (1024 * 1024)));
-
- // Fill up to the 640K hole
- if (mem_pages >= 160) {
- if (v3_add_shadow_mem(info, 0x0, 0xa0000, (addr_t)V3_AllocPages(160)) == -1) {
- PrintError("Could not map full conventional memory\n");
- return -1;
+ addr_t mem_pages = info->mem_size >> 12;
+
+ PrintDebug("Setting up memory map (memory size=%dMB)\n", (uint_t)(info->mem_size / (1024 * 1024)));
+
+ // Fill up to the 640K hole
+ if (mem_pages >= 160) {
+ if (v3_add_shadow_mem(info, 0x0, 0xa0000, (addr_t)V3_AllocPages(160)) == -1) {
+ PrintError("Could not map full conventional memory\n");
+ return -1;
+ }
+ } else {
+ // Less than 640k of memory
+ if (v3_add_shadow_mem(info, 0x0, (mem_pages * PAGE_SIZE), (addr_t)V3_AllocPages(mem_pages)) == -1) {
+ PrintError("Could not map subset of conventional memory\n");
+ return -1;
+ };
}
- } else {
- // Less than 640k of memory
- if (v3_add_shadow_mem(info, 0x0, (mem_pages * PAGE_SIZE), (addr_t)V3_AllocPages(mem_pages)) == -1) {
- PrintError("Could not map subset of conventional memory\n");
- return -1;
- };
- }
#define VGABIOS_START 0x000c0000
#define ROMBIOS_START 0x000f0000
-
- // VGA frame buffer
- if (1) {
- if (v3_add_shadow_mem(info, 0xa0000, 0xc0000, 0xa0000) == -1) {
- PrintError("Could not map VGA framebuffer\n");
- return -1;
- }
- } else {
- v3_hook_write_mem(info, 0xa0000, 0xc0000, 0xa0000, passthrough_mem_write, NULL);
- }
-
-
- /* layout vgabios */
- {
- uint_t num_pages = (config_ptr->vgabios_size + PAGE_SIZE - 1) / PAGE_SIZE;
- void * guest_mem = V3_AllocPages(num_pages);
- addr_t vgabios_end = VGABIOS_START + (num_pages * PAGE_SIZE);
-
- PrintDebug("Layout Region %d bytes\n", config_ptr->vgabios_size);
- memcpy(V3_VAddr(guest_mem), config_ptr->vgabios, config_ptr->vgabios_size);
-
- if (v3_add_shadow_mem(info, VGABIOS_START, vgabios_end, (addr_t)guest_mem) == -1) {
- PrintError("Could not map VGABIOS\n");
- return -1;
- }
-
- PrintDebug("Adding Shadow Region (0x%p-0x%p) -> 0x%p\n",
- (void *)VGABIOS_START,
- (void *)vgabios_end,
- (void *)guest_mem);
-
-
- // Fill in the space between the VGABIOS and the ROMBIOS
- // We'll just back this to shadow memory for now....
- if (v3_add_shadow_mem(info, vgabios_end, ROMBIOS_START,
- (addr_t)V3_AllocPages((ROMBIOS_START - vgabios_end) / PAGE_SIZE)) == -1) {
- PrintError("Could not map VGABIOS->ROMBIOS gap\n");
- return -1;
- }
- }
-
- /* layout rombios */
- {
- uint_t num_pages = (config_ptr->rombios_size + PAGE_SIZE - 1) / PAGE_SIZE;
- void * guest_mem = V3_AllocPages(num_pages);
- addr_t rombios_end = ROMBIOS_START + (num_pages * PAGE_SIZE);
-
- PrintDebug("Layout Region %d bytes\n", config_ptr->rombios_size);
- memcpy(V3_VAddr(guest_mem), config_ptr->rombios, config_ptr->rombios_size);
-
- if (v3_add_shadow_mem(info, ROMBIOS_START, rombios_end, (addr_t)guest_mem) == -1) {
- PrintError("Could not map ROMBIOS\n");
- return -1;
+
+ // VGA frame buffer
+ if (1) {
+ if (v3_add_shadow_mem(info, 0xa0000, 0xc0000, 0xa0000) == -1) {
+ PrintError("Could not map VGA framebuffer\n");
+ return -1;
+ }
+ } else {
+ v3_hook_write_mem(info, 0xa0000, 0xc0000, 0xa0000, passthrough_mem_write, NULL);
+ }
+
+
+ /* layout vgabios */
+ {
+ uint_t num_pages = (config_ptr->vgabios_size + PAGE_SIZE - 1) / PAGE_SIZE;
+ void * guest_mem = V3_AllocPages(num_pages);
+ addr_t vgabios_end = VGABIOS_START + (num_pages * PAGE_SIZE);
+
+ PrintDebug("Layout Region %d bytes\n", config_ptr->vgabios_size);
+ memcpy(V3_VAddr(guest_mem), config_ptr->vgabios, config_ptr->vgabios_size);
+
+ if (v3_add_shadow_mem(info, VGABIOS_START, vgabios_end, (addr_t)guest_mem) == -1) {
+ PrintError("Could not map VGABIOS\n");
+ return -1;
+ }
+
+ PrintDebug("Adding Shadow Region (0x%p-0x%p) -> 0x%p\n",
+ (void *)VGABIOS_START,
+ (void *)vgabios_end,
+ (void *)guest_mem);
+
+
+ // Fill in the space between the VGABIOS and the ROMBIOS
+ // We'll just back this to shadow memory for now....
+ if (v3_add_shadow_mem(info, vgabios_end, ROMBIOS_START,
+ (addr_t)V3_AllocPages((ROMBIOS_START - vgabios_end) / PAGE_SIZE)) == -1) {
+ PrintError("Could not map VGABIOS->ROMBIOS gap\n");
+ return -1;
+ }
}
- PrintDebug("Adding Shadow Region (0x%p-0x%p) -> 0x%p\n",
- (void *)ROMBIOS_START,
- (void *)rombios_end,
- (void *)guest_mem);
-
- if (rombios_end != 0x100000) {
- PrintError("ROMBIOS must reach the 1MB barrier....\n");
- return -1;
+ /* layout rombios */
+ {
+ uint_t num_pages = (config_ptr->rombios_size + PAGE_SIZE - 1) / PAGE_SIZE;
+ void * guest_mem = V3_AllocPages(num_pages);
+ addr_t rombios_end = ROMBIOS_START + (num_pages * PAGE_SIZE);
+
+ PrintDebug("Layout Region %d bytes\n", config_ptr->rombios_size);
+ memcpy(V3_VAddr(guest_mem), config_ptr->rombios, config_ptr->rombios_size);
+
+ if (v3_add_shadow_mem(info, ROMBIOS_START, rombios_end, (addr_t)guest_mem) == -1) {
+ PrintError("Could not map ROMBIOS\n");
+ return -1;
+ }
+
+ PrintDebug("Adding Shadow Region (0x%p-0x%p) -> 0x%p\n",
+ (void *)ROMBIOS_START,
+ (void *)rombios_end,
+ (void *)guest_mem);
+
+ if (rombios_end != 0x100000) {
+ PrintError("ROMBIOS must reach the 1MB barrier....\n");
+ return -1;
+ }
}
- }
- // Fill in the extended memory map....
- {
- int num_ext_pages = mem_pages - (0x100000 / PAGE_SIZE);
-
- if (num_ext_pages > 0) {
- if (v3_add_shadow_mem(info, 0x100000, info->mem_size, (addr_t)V3_AllocPages(num_ext_pages)) == -1) {
- PrintError("Could not allocate extended shadow memory\n");
- return -1;
- }
+ // Fill in the extended memory map....
+ {
+ int num_ext_pages = mem_pages - (0x100000 / PAGE_SIZE);
+
+ if (num_ext_pages > 0) {
+ if (v3_add_shadow_mem(info, 0x100000, info->mem_size, (addr_t)V3_AllocPages(num_ext_pages)) == -1) {
+ PrintError("Could not allocate extended shadow memory\n");
+ return -1;
+ }
+ }
}
- }
-
- print_shadow_map(info);
+
+ print_shadow_map(info);
- return 0;
+ return 0;
}
if (use_ramdisk) {
- PrintDebug("Creating Ramdisk\n");
- ramdisk = v3_create_ramdisk();
- cdrom = v3_create_cdrom(ramdisk, config_ptr->ramdisk, config_ptr->ramdisk_size);
+ PrintDebug("Creating Ramdisk\n");
+ ramdisk = v3_create_ramdisk();
+ cdrom = v3_create_cdrom(ramdisk, config_ptr->ramdisk, config_ptr->ramdisk_size);
}
if (use_generic) {
- generic = configure_generic(info, config_ptr);
+ generic = configure_generic(info, config_ptr);
}
v3_attach_device(info, ioapic);
if (use_ramdisk) {
- v3_attach_device(info, ramdisk);
- v3_attach_device(info, cdrom);
+ v3_attach_device(info, ramdisk);
+ v3_attach_device(info, cdrom);
}
if (use_generic) {
- // Important that this be attached last!
- v3_attach_device(info, generic);
+ // Important that this be attached last!
+ v3_attach_device(info, generic);
}
PrintDebugDevMgr(info);
if (!use_ramdisk) {
- PrintDebug("Hooking IDE IRQs\n");
-
- //primary ide
- v3_hook_passthrough_irq(info, 14);
-
- // secondary ide
- v3_hook_passthrough_irq(info, 15);
+ PrintDebug("Hooking IDE IRQs\n");
+
+ //primary ide
+ v3_hook_passthrough_irq(info, 14);
+
+ // secondary ide
+ v3_hook_passthrough_irq(info, 15);
}
- return 0;
+ return 0;
}
static struct vm_device * configure_generic(struct guest_info * info, struct v3_vm_config * config_ptr) {
- PrintDebug("Creating Generic Device\n");
- struct vm_device * generic = v3_create_generic();
-
- // Make the DMA controller invisible
- v3_generic_add_port_range(generic, 0x00, 0x07, GENERIC_PRINT_AND_IGNORE); // DMA 1 channels 0,1,2,3 (address, counter)
- v3_generic_add_port_range(generic, 0xc0, 0xc7, GENERIC_PRINT_AND_IGNORE); // DMA 2 channels 4,5,6,7 (address, counter)
- v3_generic_add_port_range(generic, 0x87, 0x87, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 0 page register
- v3_generic_add_port_range(generic, 0x83, 0x83, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 1 page register
- v3_generic_add_port_range(generic, 0x81, 0x81, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 2 page register
- v3_generic_add_port_range(generic, 0x82, 0x82, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 3 page register
- v3_generic_add_port_range(generic, 0x8f, 0x8f, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 4 page register
- v3_generic_add_port_range(generic, 0x8b, 0x8b, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 5 page register
- v3_generic_add_port_range(generic, 0x89, 0x89, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 6 page register
- v3_generic_add_port_range(generic, 0x8a, 0x8a, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 7 page register
- v3_generic_add_port_range(generic, 0x08, 0x0f, GENERIC_PRINT_AND_IGNORE); // DMA 1 misc registers (csr, req, smask,mode,clearff,reset,enable,mmask)
- v3_generic_add_port_range(generic, 0xd0, 0xde, GENERIC_PRINT_AND_IGNORE); // DMA 2 misc registers
-
-
-
-
- // Make the Serial ports invisible
-
- v3_generic_add_port_range(generic, 0x3f8, 0x3f8+7, GENERIC_PRINT_AND_IGNORE); // COM 1
- v3_generic_add_port_range(generic, 0x2f8, 0x2f8+7, GENERIC_PRINT_AND_IGNORE); // COM 2
-
+ PrintDebug("Creating Generic Device\n");
+ struct vm_device * generic = v3_create_generic();
+
+ // Make the DMA controller invisible
+ v3_generic_add_port_range(generic, 0x00, 0x07, GENERIC_PRINT_AND_IGNORE); // DMA 1 channels 0,1,2,3 (address, counter)
+ v3_generic_add_port_range(generic, 0xc0, 0xc7, GENERIC_PRINT_AND_IGNORE); // DMA 2 channels 4,5,6,7 (address, counter)
+ v3_generic_add_port_range(generic, 0x87, 0x87, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 0 page register
+ v3_generic_add_port_range(generic, 0x83, 0x83, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 1 page register
+ v3_generic_add_port_range(generic, 0x81, 0x81, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 2 page register
+ v3_generic_add_port_range(generic, 0x82, 0x82, GENERIC_PRINT_AND_IGNORE); // DMA 1 channel 3 page register
+ v3_generic_add_port_range(generic, 0x8f, 0x8f, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 4 page register
+ v3_generic_add_port_range(generic, 0x8b, 0x8b, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 5 page register
+ v3_generic_add_port_range(generic, 0x89, 0x89, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 6 page register
+ v3_generic_add_port_range(generic, 0x8a, 0x8a, GENERIC_PRINT_AND_IGNORE); // DMA 2 channel 7 page register
+ v3_generic_add_port_range(generic, 0x08, 0x0f, GENERIC_PRINT_AND_IGNORE); // DMA 1 misc registers (csr, req, smask,mode,clearff,reset,enable,mmask)
+ v3_generic_add_port_range(generic, 0xd0, 0xde, GENERIC_PRINT_AND_IGNORE); // DMA 2 misc registers
+
+
+
+
+ // Make the Serial ports invisible
+
+ v3_generic_add_port_range(generic, 0x3f8, 0x3f8+7, GENERIC_PRINT_AND_IGNORE); // COM 1
+ v3_generic_add_port_range(generic, 0x2f8, 0x2f8+7, GENERIC_PRINT_AND_IGNORE); // COM 2
+
- v3_generic_add_port_range(generic, 0x3e8, 0x3e8+7, GENERIC_PRINT_AND_IGNORE); // COM 3
- v3_generic_add_port_range(generic, 0x2e8, 0x2e8+7, GENERIC_PRINT_AND_IGNORE); // COM 4
+ v3_generic_add_port_range(generic, 0x3e8, 0x3e8+7, GENERIC_PRINT_AND_IGNORE); // COM 3
+ v3_generic_add_port_range(generic, 0x2e8, 0x2e8+7, GENERIC_PRINT_AND_IGNORE); // COM 4
- // Make the PCI bus invisible (at least it's configuration)
-
- v3_generic_add_port_range(generic, 0xcf8, 0xcf8, GENERIC_PRINT_AND_IGNORE); // PCI Config Address
- v3_generic_add_port_range(generic, 0xcfc, 0xcfc, GENERIC_PRINT_AND_IGNORE); // PCI Config Data
-
-
-
+ // Make the PCI bus invisible (at least it's configuration)
+
+ v3_generic_add_port_range(generic, 0xcf8, 0xcf8, GENERIC_PRINT_AND_IGNORE); // PCI Config Address
+ v3_generic_add_port_range(generic, 0xcfc, 0xcfc, GENERIC_PRINT_AND_IGNORE); // PCI Config Data
+
+
+
#if 0
- if (!use_ramdisk) {
+ if (!use_ramdisk) {
// Monitor the IDE controllers (very slow)
v3_generic_add_port_range(generic, 0x170, 0x178, GENERIC_PRINT_AND_PASSTHROUGH); // IDE 1
v3_generic_add_port_range(generic, 0x376, 0x377, GENERIC_PRINT_AND_PASSTHROUGH); // IDE 1
- }
+ }
- v3_generic_add_port_range(generic, 0x1f0, 0x1f8, GENERIC_PRINT_AND_PASSTHROUGH); // IDE 0
- v3_generic_add_port_range(generic, 0x3f6, 0x3f7, GENERIC_PRINT_AND_PASSTHROUGH); // IDE 0
+ v3_generic_add_port_range(generic, 0x1f0, 0x1f8, GENERIC_PRINT_AND_PASSTHROUGH); // IDE 0
+ v3_generic_add_port_range(generic, 0x3f6, 0x3f7, GENERIC_PRINT_AND_PASSTHROUGH); // IDE 0
#endif
#if 0
-
- // Make the floppy controllers invisible
-
- v3_generic_add_port_range(generic, 0x3f0, 0x3f2, GENERIC_PRINT_AND_IGNORE); // Primary floppy controller (base,statusa/statusb,DOR)
- v3_generic_add_port_range(generic, 0x3f4, 0x3f5, GENERIC_PRINT_AND_IGNORE); // Primary floppy controller (mainstat/datarate,data)
- v3_generic_add_port_range(generic, 0x3f7, 0x3f7, GENERIC_PRINT_AND_IGNORE); // Primary floppy controller (DIR)
- v3_generic_add_port_range(generic, 0x370, 0x372, GENERIC_PRINT_AND_IGNORE); // Secondary floppy controller (base,statusa/statusb,DOR)
- v3_generic_add_port_range(generic, 0x374, 0x375, GENERIC_PRINT_AND_IGNORE); // Secondary floppy controller (mainstat/datarate,data)
- v3_generic_add_port_range(generic, 0x377, 0x377, GENERIC_PRINT_AND_IGNORE); // Secondary floppy controller (DIR)
-
+
+ // Make the floppy controllers invisible
+
+ v3_generic_add_port_range(generic, 0x3f0, 0x3f2, GENERIC_PRINT_AND_IGNORE); // Primary floppy controller (base,statusa/statusb,DOR)
+ v3_generic_add_port_range(generic, 0x3f4, 0x3f5, GENERIC_PRINT_AND_IGNORE); // Primary floppy controller (mainstat/datarate,data)
+ v3_generic_add_port_range(generic, 0x3f7, 0x3f7, GENERIC_PRINT_AND_IGNORE); // Primary floppy controller (DIR)
+ v3_generic_add_port_range(generic, 0x370, 0x372, GENERIC_PRINT_AND_IGNORE); // Secondary floppy controller (base,statusa/statusb,DOR)
+ v3_generic_add_port_range(generic, 0x374, 0x375, GENERIC_PRINT_AND_IGNORE); // Secondary floppy controller (mainstat/datarate,data)
+ v3_generic_add_port_range(generic, 0x377, 0x377, GENERIC_PRINT_AND_IGNORE); // Secondary floppy controller (DIR)
+
#endif
#if 1
- // Make the parallel port invisible
+ // Make the parallel port invisible
- v3_generic_add_port_range(generic, 0x378, 0x37f, GENERIC_PRINT_AND_IGNORE);
+ v3_generic_add_port_range(generic, 0x378, 0x37f, GENERIC_PRINT_AND_IGNORE);
#endif
#if 1
- // Monitor graphics card operations
-
- v3_generic_add_port_range(generic, 0x3b0, 0x3bb, GENERIC_PRINT_AND_PASSTHROUGH);
- v3_generic_add_port_range(generic, 0x3c0, 0x3df, GENERIC_PRINT_AND_PASSTHROUGH);
+ // Monitor graphics card operations
+
+ v3_generic_add_port_range(generic, 0x3b0, 0x3bb, GENERIC_PRINT_AND_PASSTHROUGH);
+ v3_generic_add_port_range(generic, 0x3c0, 0x3df, GENERIC_PRINT_AND_PASSTHROUGH);
#endif
#if 1
- // Make the ISA PNP features invisible
-
- v3_generic_add_port_range(generic, 0x274, 0x277, GENERIC_PRINT_AND_IGNORE);
- v3_generic_add_port_range(generic, 0x279, 0x279, GENERIC_PRINT_AND_IGNORE);
- v3_generic_add_port_range(generic, 0xa79, 0xa79, GENERIC_PRINT_AND_IGNORE);
+ // Make the ISA PNP features invisible
+
+ v3_generic_add_port_range(generic, 0x274, 0x277, GENERIC_PRINT_AND_IGNORE);
+ v3_generic_add_port_range(generic, 0x279, 0x279, GENERIC_PRINT_AND_IGNORE);
+ v3_generic_add_port_range(generic, 0xa79, 0xa79, GENERIC_PRINT_AND_IGNORE);
#endif
#if 1
- // Monitor any network card (realtek ne2000) operations
- v3_generic_add_port_range(generic, 0xc100, 0xc1ff, GENERIC_PRINT_AND_PASSTHROUGH);
+ // Monitor any network card (realtek ne2000) operations
+ v3_generic_add_port_range(generic, 0xc100, 0xc1ff, GENERIC_PRINT_AND_PASSTHROUGH);
#endif
#if 1
- // Make any Bus master ide controller invisible
-
- v3_generic_add_port_range(generic, 0xc000, 0xc00f, GENERIC_PRINT_AND_IGNORE);
+ // Make any Bus master ide controller invisible
+
+ v3_generic_add_port_range(generic, 0xc000, 0xc00f, GENERIC_PRINT_AND_IGNORE);
#endif
- // v3_generic_add_port_range(generic, 0x378, 0x400, GENERIC_PRINT_AND_IGNORE);
-
-
- return generic;
+ // v3_generic_add_port_range(generic, 0x378, 0x400, GENERIC_PRINT_AND_IGNORE);
+
+ return generic;
}
#include <palacios/vmm_decoder.h>
#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_ctrl_regs.h>
-
+#include <palacios/vmm_direct_paging.h>
#ifndef DEBUG_CTRL_REGS
#undef PrintDebug
// First Attempt = 494 lines
// current = 106 lines
int v3_handle_cr0_write(struct guest_info * info) {
- uchar_t instr[15];
- int ret;
- struct x86_instr dec_instr;
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Could not decode instruction\n");
- return -1;
- }
-
-
- if (dec_instr.op_type == V3_OP_LMSW) {
- if (handle_lmsw(info, &dec_instr) == -1) {
- return -1;
- }
- } else if (dec_instr.op_type == V3_OP_MOV2CR) {
- if (handle_mov_to_cr0(info, &dec_instr) == -1) {
- return -1;
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
- } else if (dec_instr.op_type == V3_OP_CLTS) {
- if (handle_clts(info, &dec_instr) == -1) {
- return -1;
+
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
}
- } else {
- PrintError("Unhandled opcode in handle_cr0_write\n");
- return -1;
- }
- info->rip += dec_instr.instr_length;
-
- return 0;
+
+ if (dec_instr.op_type == V3_OP_LMSW) {
+ if (handle_lmsw(info, &dec_instr) == -1) {
+ return -1;
+ }
+ } else if (dec_instr.op_type == V3_OP_MOV2CR) {
+ if (handle_mov_to_cr0(info, &dec_instr) == -1) {
+ return -1;
+ }
+ } else if (dec_instr.op_type == V3_OP_CLTS) {
+ if (handle_clts(info, &dec_instr) == -1) {
+ return -1;
+ }
+ } else {
+ PrintError("Unhandled opcode in handle_cr0_write\n");
+ return -1;
+ }
+
+ info->rip += dec_instr.instr_length;
+
+ return 0;
}
// The hardware does a format check to make sure the high bits are zero
// Because of this we can ignore the high 32 bits here
static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
- // 32 bit registers
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
- struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- uint_t paging_transition = 0;
-
- PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
-
- PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
-
- PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
- PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
-
-
- // We detect if this is a paging transition
- if (guest_cr0->pg != new_cr0->pg) {
- paging_transition = 1;
- }
-
- // Guest always sees the value they wrote
- *guest_cr0 = *new_cr0;
-
- // This value must always be set to 1
- guest_cr0->et = 1;
-
- // Set the shadow register to catch non-virtualized flags
- *shadow_cr0 = *guest_cr0;
-
- // Paging is always enabled
- shadow_cr0->pg = 1;
-
- // Was there a paging transition
- // Meaning we need to change the page tables
- if (paging_transition) {
- if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
-
- struct efer_64 * guest_efer = (struct efer_64 *)&(info->guest_efer);
- struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
-
- // Check long mode LME to set LME
- if (guest_efer->lme == 1) {
- PrintDebug("Enabing Long Mode\n");
- guest_efer->lma = 1;
-
- shadow_efer->lma = 1;
- shadow_efer->lme = 1;
-
- PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
- }
-
- PrintDebug("Activating Shadow Page Tables\n");
-
- if (v3_activate_shadow_pt(info) == -1) {
- PrintError("Failed to activate shadow page tables\n");
- return -1;
- }
- } else {
-
- if (v3_activate_passthrough_pt(info) == -1) {
- PrintError("Failed to activate passthrough page tables\n");
- return -1;
- }
+ // 32 bit registers
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+ struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ uint_t paging_transition = 0;
+
+ PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+
+ PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
+
+ PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
+ PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
+
+
+ // We detect if this is a paging transition
+ if (guest_cr0->pg != new_cr0->pg) {
+ paging_transition = 1;
+ }
+
+ // Guest always sees the value they wrote
+ *guest_cr0 = *new_cr0;
+
+ // This value must always be set to 1
+ guest_cr0->et = 1;
+
+ // Set the shadow register to catch non-virtualized flags
+ *shadow_cr0 = *guest_cr0;
+
+ // Paging is always enabled
+ shadow_cr0->pg = 1;
+
+ // Was there a paging transition
+ // Meaning we need to change the page tables
+ if (paging_transition) {
+ if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
+
+ struct efer_64 * guest_efer = (struct efer_64 *)&(info->guest_efer);
+ struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
+
+ // Check long mode LME to set LME
+ if (guest_efer->lme == 1) {
+ PrintDebug("Enabing Long Mode\n");
+ guest_efer->lma = 1;
+
+ shadow_efer->lma = 1;
+ shadow_efer->lme = 1;
+
+ PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
+ }
+
+ PrintDebug("Activating Shadow Page Tables\n");
+
+ if (v3_activate_shadow_pt(info) == -1) {
+ PrintError("Failed to activate shadow page tables\n");
+ return -1;
+ }
+ } else {
+
+ if (v3_activate_passthrough_pt(info) == -1) {
+ PrintError("Failed to activate passthrough page tables\n");
+ return -1;
+ }
+ }
}
- }
-
-
- PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
- PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
-
- return 0;
+
+
+ PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
+ PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
+
+ return 0;
}
static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
- // CLTS
- struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
-
- real_cr0->ts = 0;
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- guest_cr0->ts = 0;
- }
- return 0;
+ // CLTS
+ struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+
+ real_cr0->ts = 0;
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ guest_cr0->ts = 0;
+ }
+ return 0;
}
static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
- struct cr0_real * real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
- struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
- uchar_t new_cr0_val;
-
- PrintDebug("LMSW\n");
-
- new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
-
- PrintDebug("OperandVal = %x\n", new_cr0_val);
-
- // We can just copy the new value through
- // we don't need to virtualize the lower 4 bits
- PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
- *(uchar_t*)real_cr0 &= 0xf0;
- *(uchar_t*)real_cr0 |= new_cr0_val;
- PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
-
-
- // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
-
- PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
- *(uchar_t*)guest_cr0 &= 0xf0;
- *(uchar_t*)guest_cr0 |= new_cr0_val;
- PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
- }
- return 0;
+ struct cr0_real * real_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
+ // XED is a mess, and basically reverses the operand order for an LMSW
+ struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->dst_operand.operand);
+ uchar_t new_cr0_val;
+
+ PrintDebug("LMSW\n");
+
+ new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
+
+ PrintDebug("OperandVal = %x\n", new_cr0_val);
+
+ // We can just copy the new value through
+ // we don't need to virtualize the lower 4 bits
+ PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
+ *(uchar_t*)real_cr0 &= 0xf0;
+ *(uchar_t*)real_cr0 |= new_cr0_val;
+ PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
+
+
+ // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
+
+ PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
+ *(uchar_t*)guest_cr0 &= 0xf0;
+ *(uchar_t*)guest_cr0 |= new_cr0_val;
+ PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
+ }
+ return 0;
}
// First attempt = 253 lines
// current = 51 lines
int v3_handle_cr0_read(struct guest_info * info) {
- uchar_t instr[15];
- int ret;
- struct x86_instr dec_instr;
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Could not decode instruction\n");
- return -1;
- }
-
- if (dec_instr.op_type == V3_OP_MOVCR2) {
- struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
-
- PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- *dst_reg = *guest_cr0;
- } else {
- *dst_reg = *shadow_cr0;
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
-
- PrintDebug("Shadow CR0: %x\n", *(uint_t*)shadow_cr0);
- PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
- } else if (dec_instr.op_type == V3_OP_SMSW) {
- struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
- struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
- char cr0_val = *(char*)shadow_cr0 & 0x0f;
- PrintDebug("SMSW\n");
-
- // The lower 4 bits of the guest/shadow CR0 are mapped through
- // We can treat nested and shadow paging the same here
- *(char *)dst_reg &= 0xf0;
- *(char *)dst_reg |= cr0_val;
- } else {
- PrintError("Unhandled opcode in handle_cr0_read\n");
- return -1;
- }
-
- info->rip += dec_instr.instr_length;
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
+
+ if (dec_instr.op_type == V3_OP_MOVCR2) {
+ struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+
+ PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ *dst_reg = *guest_cr0;
+ } else {
+ *dst_reg = *shadow_cr0;
+ }
+
+ PrintDebug("Shadow CR0: %x\n", *(uint_t*)shadow_cr0);
+ PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
+ } else if (dec_instr.op_type == V3_OP_SMSW) {
+ struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
+ struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
+ char cr0_val = *(char*)shadow_cr0 & 0x0f;
+
+ PrintDebug("SMSW\n");
+
+ // The lower 4 bits of the guest/shadow CR0 are mapped through
+ // We can treat nested and shadow paging the same here
+ *(char *)dst_reg &= 0xf0;
+ *(char *)dst_reg |= cr0_val;
+
+ } else {
+ PrintError("Unhandled opcode in handle_cr0_read\n");
+ return -1;
+ }
+
+ info->rip += dec_instr.instr_length;
- return 0;
+ return 0;
}
// First Attempt = 256 lines
// current = 65 lines
int v3_handle_cr3_write(struct guest_info * info) {
- int ret;
- uchar_t instr[15];
- struct x86_instr dec_instr;
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Could not decode instruction\n");
- return -1;
- }
-
- if (dec_instr.op_type == V3_OP_MOV2CR) {
- PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n",
- (void *)(addr_t)(info->ctrl_regs.cr3),
- (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
-
-
- // We update the guest CR3
- if (info->cpu_mode == LONG) {
- struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
- struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
- *guest_cr3 = *new_cr3;
- } else {
- struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- *guest_cr3 = *new_cr3;
- }
-
- // If Paging is enabled in the guest then we need to change the shadow page tables
- if (info->mem_mode == VIRTUAL_MEM) {
- if (v3_activate_shadow_pt(info) == -1) {
- PrintError("Failed to activate 32 bit shadow page table\n");
- return -1;
+ int ret;
+ uchar_t instr[15];
+ struct x86_instr dec_instr;
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
+
+ if (dec_instr.op_type == V3_OP_MOV2CR) {
+ PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n",
+ (void *)(addr_t)(info->ctrl_regs.cr3),
+ (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
+
+
+ // We update the guest CR3
+ if (info->cpu_mode == LONG) {
+ struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
+ *guest_cr3 = *new_cr3;
+ } else {
+ struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ *guest_cr3 = *new_cr3;
+ }
+
+ // If Paging is enabled in the guest then we need to change the shadow page tables
+ if (info->mem_mode == VIRTUAL_MEM) {
+ if (v3_activate_shadow_pt(info) == -1) {
+ PrintError("Failed to activate 32 bit shadow page table\n");
+ return -1;
+ }
+ }
+
+ PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n",
+ (void *)(addr_t)(info->ctrl_regs.cr3),
+ (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
+
+ } else if (info->shdw_pg_mode == NESTED_PAGING) {
+
+ // This is just a passthrough operation which we probably don't need here
+ if (info->cpu_mode == LONG) {
+ struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
+ *guest_cr3 = *new_cr3;
+ } else {
+ struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+ *guest_cr3 = *new_cr3;
+ }
+
}
- }
-
- PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n",
- (void *)(addr_t)(info->ctrl_regs.cr3),
- (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
-
- } else if (info->shdw_pg_mode == NESTED_PAGING) {
-
- // This is just a passthrough operation which we probably don't need here
- if (info->cpu_mode == LONG) {
- struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
- struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
- *guest_cr3 = *new_cr3;
- } else {
- struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- *guest_cr3 = *new_cr3;
- }
-
+ } else {
+ PrintError("Unhandled opcode in handle_cr3_write\n");
+ return -1;
}
- } else {
- PrintError("Unhandled opcode in handle_cr3_write\n");
- return -1;
- }
-
- info->rip += dec_instr.instr_length;
-
- return 0;
+
+ info->rip += dec_instr.instr_length;
+
+ return 0;
}
// first attempt = 156 lines
// current = 36 lines
int v3_handle_cr3_read(struct guest_info * info) {
- uchar_t instr[15];
- int ret;
- struct x86_instr dec_instr;
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Could not decode instruction\n");
- return -1;
- }
-
- if (dec_instr.op_type == V3_OP_MOVCR2) {
- PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
-
- if ((v3_get_cpu_mode(info) == LONG) ||
- (v3_get_cpu_mode(info) == LONG_32_COMPAT)) {
- struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
- struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
- *dst_reg = *guest_cr3;
- } else {
- struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- *dst_reg = *guest_cr3;
- }
-
- } else if (info->shdw_pg_mode == NESTED_PAGING) {
-
- // This is just a passthrough operation which we probably don't need here
- if ((v3_get_cpu_mode(info) == LONG) ||
- (v3_get_cpu_mode(info) == LONG_32_COMPAT)) {
- struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
- struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
- *dst_reg = *guest_cr3;
- } else {
- struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- *dst_reg = *guest_cr3;
- }
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
-
- } else {
- PrintError("Unhandled opcode in handle_cr3_read\n");
- return -1;
- }
-
- info->rip += dec_instr.instr_length;
-
- return 0;
+
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
+
+ if (dec_instr.op_type == V3_OP_MOVCR2) {
+ PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+
+ if ((v3_get_cpu_mode(info) == LONG) ||
+ (v3_get_cpu_mode(info) == LONG_32_COMPAT)) {
+ struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
+ *dst_reg = *guest_cr3;
+ } else {
+ struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ *dst_reg = *guest_cr3;
+ }
+
+ } else if (info->shdw_pg_mode == NESTED_PAGING) {
+
+ // This is just a passthrough operation which we probably don't need here
+ if ((v3_get_cpu_mode(info) == LONG) ||
+ (v3_get_cpu_mode(info) == LONG_32_COMPAT)) {
+ struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
+ *dst_reg = *guest_cr3;
+ } else {
+ struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+ *dst_reg = *guest_cr3;
+ }
+ }
+
+ } else {
+ PrintError("Unhandled opcode in handle_cr3_read\n");
+ return -1;
+ }
+
+ info->rip += dec_instr.instr_length;
+
+ return 0;
}
// We don't need to virtualize CR4, all we need is to detect the activation of PAE
int v3_handle_cr4_read(struct guest_info * info) {
- // PrintError("CR4 Read not handled\n");
- // Do nothing...
- return 0;
+ // PrintError("CR4 Read not handled\n");
+ // Do nothing...
+ return 0;
}
int v3_handle_cr4_write(struct guest_info * info) {
- uchar_t instr[15];
- int ret;
- int flush_tlb=0;
- struct x86_instr dec_instr;
- v3_vm_cpu_mode_t cpu_mode = v3_get_cpu_mode(info);
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Could not decode instruction\n");
- return -1;
- }
-
- if (dec_instr.op_type != V3_OP_MOV2CR) {
- PrintError("Invalid opcode in write to CR4\n");
- return -1;
- }
-
- // Check to see if we need to flush the tlb
-
- if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
- struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
- struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
-
- // if pse, pge, or pae have changed while PG (in any mode) is on
- // the side effect is a TLB flush, which means we need to
- // toss the current shadow page tables too
- //
- //
- // TODO - PAE FLAG needs to be special cased
- if ((cr4->pse != new_cr4->pse) ||
- (cr4->pge != new_cr4->pge) ||
- (cr4->pae != new_cr4->pae)) {
- PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n");
- flush_tlb=1;
-
+ uchar_t instr[15];
+ int ret;
+ int flush_tlb=0;
+ struct x86_instr dec_instr;
+ v3_vm_cpu_mode_t cpu_mode = v3_get_cpu_mode(info);
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
- }
-
-
- if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) {
- struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
- struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
- PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
- PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
-
- if ((info->shdw_pg_mode == SHADOW_PAGING)) {
- if (v3_get_mem_mode(info) == PHYSICAL_MEM) {
-
- if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
- PrintDebug("Creating PAE passthrough tables\n");
-
- // Delete the old 32 bit direct map page tables
- delete_page_tables_32((pde32_t *)V3_VAddr((void *)(info->direct_map_pt)));
-
- // create 32 bit PAE direct map page table
- info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_32PAE(info));
-
- // reset cr3 to new page tables
- info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
-
- } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
- // Create passthrough standard 32bit pagetables
- return -1;
- }
- }
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
}
- *cr4 = *new_cr4;
- PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
+ if (dec_instr.op_type != V3_OP_MOV2CR) {
+ PrintError("Invalid opcode in write to CR4\n");
+ return -1;
+ }
- } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) {
- struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand);
- struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
-
- PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4);
- PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4);
-
- if (new_cr4->pae == 0) {
- // cannot turn off PAE in long mode GPF the guest
- PrintError("Cannot disable PAE in long mode, sending GPF\n");
- return -1;
+ // Check to see if we need to flush the tlb
+
+ if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
+ struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+
+ // if pse, pge, or pae have changed while PG (in any mode) is on
+ // the side effect is a TLB flush, which means we need to
+ // toss the current shadow page tables too
+ //
+ //
+ // TODO - PAE FLAG needs to be special cased
+ if ((cr4->pse != new_cr4->pse) ||
+ (cr4->pge != new_cr4->pge) ||
+ (cr4->pae != new_cr4->pae)) {
+ PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n");
+ flush_tlb=1;
+
+ }
}
+
- *cr4 = *new_cr4;
-
- } else {
- PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
- return -1;
- }
-
-
- if (flush_tlb) {
- PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n");
- if (v3_activate_shadow_pt(info) == -1) {
- PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n");
- return -1;
+ if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) {
+ struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+
+ PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
+ PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
+
+ if ((info->shdw_pg_mode == SHADOW_PAGING)) {
+ if (v3_get_mem_mode(info) == PHYSICAL_MEM) {
+
+ if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
+ PrintDebug("Creating PAE passthrough tables\n");
+
+ // Delete the old 32 bit direct map page tables
+ delete_page_tables_32((pde32_t *)V3_VAddr((void *)(info->direct_map_pt)));
+
+ // create 32 bit PAE direct map page table
+ info->direct_map_pt = (addr_t)V3_PAddr((void *)v3_create_direct_passthrough_pts(info));
+
+ // reset cr3 to new page tables
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+
+ } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
+ // Create passthrough standard 32bit pagetables
+ return -1;
+ }
+ }
+ }
+
+ *cr4 = *new_cr4;
+ PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
+
+ } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) {
+ struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand);
+ struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
+
+ PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4);
+ PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4);
+
+ if (new_cr4->pae == 0) {
+ // cannot turn off PAE in long mode GPF the guest
+ PrintError("Cannot disable PAE in long mode, sending GPF\n");
+ return -1;
+ }
+
+ *cr4 = *new_cr4;
+
+ } else {
+ PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
+ return -1;
}
- }
-
-
- info->rip += dec_instr.instr_length;
- return 0;
+
+
+ if (flush_tlb) {
+ PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n");
+ if (v3_activate_shadow_pt(info) == -1) {
+ PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n");
+ return -1;
+ }
+ }
+
+
+ info->rip += dec_instr.instr_length;
+ return 0;
}
int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) {
- struct guest_info * info = (struct guest_info *)(priv_data);
- PrintDebug("EFER Read HI=%x LO=%x\n", info->guest_efer.hi, info->guest_efer.lo);
-
- dst->value = info->guest_efer.value;
-
- info->rip += 2; // WRMSR/RDMSR are two byte operands
- return 0;
+ struct guest_info * info = (struct guest_info *)(priv_data);
+ PrintDebug("EFER Read HI=%x LO=%x\n", info->guest_efer.hi, info->guest_efer.lo);
+
+ dst->value = info->guest_efer.value;
+
+ info->rip += 2; // WRMSR/RDMSR are two byte operands
+ return 0;
}
// TODO: this is a disaster we need to clean this up...
int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
- struct guest_info * info = (struct guest_info *)(priv_data);
- //struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
- struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
- struct v3_msr * guest_efer = &(info->guest_efer);
-
- PrintDebug("EFER Write\n");
- PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo);
- //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
-
- // We virtualize the guests efer to hide the SVME and LMA bits
- guest_efer->value = src.value;
-
-
- // Enable/Disable Syscall
- shadow_efer->sce = src.value & 0x1;
-
-
- // We have to handle long mode writes....
-
- /*
- if ((info->shdw_pg_mode == SHADOW_PAGING) &&
- (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
-
- if ((shadow_efer->lme == 0) && (new_efer->lme == 1)) {
- PrintDebug("Transition to longmode\n");
- PrintDebug("Creating Passthrough 64 bit page tables\n");
-
- // Delete the old 32 bit direct map page tables
-
- PrintDebug("Deleting old PAE Page tables\n");
- PrintError("JRL BUG?: Will the old page tables always be in PAE format??\n");
- delete_page_tables_32PAE((pdpe32pae_t *)V3_VAddr((void *)(info->direct_map_pt)));
-
- // create 64 bit direct map page table
- info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(info));
-
- // reset cr3 to new page tables
- info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
-
- // We mark the Long Mode active because we have paging enabled
- // We do this in new_efer because we copy the msr in full below
- // new_efer->lma = 1;
-
- } else if ((shadow_efer->lme == 1) && (new_efer->lme == 0)) {
- // transition out of long mode
- //((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
- //((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
-
- return -1;
- }
-
- // accept all changes to the efer, but make sure that the SVME bit is set... (SVM specific)
- *shadow_efer = *new_efer;
- shadow_efer->svme = 1;
-
-
-
- PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(shadow_efer));
- } else {
- PrintError("Write to EFER in NESTED_PAGING or VIRTUAL_MEM mode not supported\n");
- // Should probably just check for a long mode transition, and bomb out if it is
- return -1;
- }
- */
- info->rip += 2; // WRMSR/RDMSR are two byte operands
-
- return 0;
+ struct guest_info * info = (struct guest_info *)(priv_data);
+ //struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
+ struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
+ struct v3_msr * guest_efer = &(info->guest_efer);
+
+ PrintDebug("EFER Write\n");
+ PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo);
+ //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
+
+ // We virtualize the guests efer to hide the SVME and LMA bits
+ guest_efer->value = src.value;
+
+
+ // Enable/Disable Syscall
+ shadow_efer->sce = src.value & 0x1;
+
+
+ // We have to handle long mode writes....
+
+ /*
+ if ((info->shdw_pg_mode == SHADOW_PAGING) &&
+ (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
+
+ if ((shadow_efer->lme == 0) && (new_efer->lme == 1)) {
+ PrintDebug("Transition to longmode\n");
+ PrintDebug("Creating Passthrough 64 bit page tables\n");
+
+ // Delete the old 32 bit direct map page tables
+
+ PrintDebug("Deleting old PAE Page tables\n");
+ PrintError("JRL BUG?: Will the old page tables always be in PAE format??\n");
+ delete_page_tables_32PAE((pdpe32pae_t *)V3_VAddr((void *)(info->direct_map_pt)));
+
+ // create 64 bit direct map page table
+ info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(info));
+
+ // reset cr3 to new page tables
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+
+ // We mark the Long Mode active because we have paging enabled
+ // We do this in new_efer because we copy the msr in full below
+ // new_efer->lma = 1;
+
+ } else if ((shadow_efer->lme == 1) && (new_efer->lme == 0)) {
+ // transition out of long mode
+ //((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
+ //((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
+
+ return -1;
+ }
+
+ // accept all changes to the efer, but make sure that the SVME bit is set... (SVM specific)
+ *shadow_efer = *new_efer;
+ shadow_efer->svme = 1;
+
+
+
+ PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(shadow_efer));
+ } else {
+ PrintError("Write to EFER in NESTED_PAGING or VIRTUAL_MEM mode not supported\n");
+ // Should probably just check for a long mode transition, and bomb out if it is
+ return -1;
+ }
+ */
+ info->rip += 2; // WRMSR/RDMSR are two byte operands
+
+ return 0;
}
#include <palacios/vmm.h>
-void PrintDebugHex(uchar_t x)
-{
- unsigned char z;
+void PrintDebugHex(uchar_t x) {
+ unsigned char z;
- z = (x >> 4) & 0xf ;
- PrintDebug("%x", z);
- z = x & 0xf;
- PrintDebug("%x", z);
+ z = (x >> 4) & 0xf ;
+ PrintDebug("%x", z);
+ z = x & 0xf;
+ PrintDebug("%x", z);
}
-void PrintDebugMemDump(uchar_t *start, int n)
-{
- int i, j;
+void PrintDebugMemDump(uchar_t *start, int n) {
+ int i, j;
- for (i = 0; i < n; i += 16) {
- PrintDebug("%p", (void *)(start + i));
+ for (i = 0; i < n; i += 16) {
+ PrintDebug("%p", (void *)(start + i));
- for (j = i; (j < (i + 16)) && (j < n); j += 2) {
- PrintDebug(" ");
- PrintDebugHex(*((uchar_t *)(start + j)));
+ for (j = i; (j < (i + 16)) && (j < n); j += 2) {
+ PrintDebug(" ");
+ PrintDebugHex(*((uchar_t *)(start + j)));
- if ((j + 1) < n) {
- PrintDebugHex(*((uchar_t *)(start + j + 1)));
- }
+ if ((j + 1) < n) {
+ PrintDebugHex(*((uchar_t *)(start + j + 1)));
+ }
- }
+ }
- PrintDebug(" ");
+ PrintDebug(" ");
- for (j = i; (j < (i + 16)) && (j < n); j++) {
- PrintDebug("%c", ((start[j] >= 32) && (start[j] <= 126)) ? start[j] : '.');
- }
+ for (j = i; (j < (i + 16)) && (j < n); j++) {
+ PrintDebug("%c", ((start[j] >= 32) && (start[j] <= 126)) ? start[j] : '.');
+ }
- PrintDebug("\n");
- }
+ PrintDebug("\n");
+ }
}
int v3_opcode_cmp(const uchar_t * op1, const uchar_t * op2) {
- if (op1[0] != op2[0]) {
- return op1[0] - op2[0];;
- } else {
- return memcmp(op1 + 1, op2 + 1, op1[0]);
- }
+ if (op1[0] != op2[0]) {
+ return op1[0] - op2[0];;
+ } else {
+ return memcmp(op1 + 1, op2 + 1, op1[0]);
+ }
}
void v3_get_prefixes(uchar_t * instr, struct x86_prefixes * prefixes) {
- while (1) {
- switch (*instr) {
- case 0xF0: // lock
- prefixes->lock = 1;
- break;
-
- case 0xF2: // REPNE/REPNZ
- prefixes->repnz = 1;
- prefixes->repne = 1;
- break;
-
- case 0xF3: // REP or REPE/REPZ
- prefixes->rep = 1;
- prefixes->repe = 1;
- prefixes->repz = 1;
- break;
-
- case 0x2E: // CS override or Branch hint not taken (with Jcc instrs)
- prefixes->cs_override = 1;
- prefixes->br_not_taken = 1;
- break;
-
- case 0x36: // SS override
- prefixes->ss_override = 1;
- break;
-
- case 0x3E: // DS override or Branch hint taken (with Jcc instrs)
- prefixes->ds_override = 1;
- prefixes->br_taken = 1;
- break;
-
- case 0x26: // ES override
- prefixes->es_override = 1;
- break;
-
- case 0x64: // FS override
- prefixes->fs_override = 1;
- break;
+ while (1) {
+ switch (*instr) {
+ case 0xF0: // lock
+ prefixes->lock = 1;
+ break;
+
+ case 0xF2: // REPNE/REPNZ
+ prefixes->repnz = 1;
+ prefixes->repne = 1;
+ break;
+
+ case 0xF3: // REP or REPE/REPZ
+ prefixes->rep = 1;
+ prefixes->repe = 1;
+ prefixes->repz = 1;
+ break;
+
+ case 0x2E: // CS override or Branch hint not taken (with Jcc instrs)
+ prefixes->cs_override = 1;
+ prefixes->br_not_taken = 1;
+ break;
+
+ case 0x36: // SS override
+ prefixes->ss_override = 1;
+ break;
+
+ case 0x3E: // DS override or Branch hint taken (with Jcc instrs)
+ prefixes->ds_override = 1;
+ prefixes->br_taken = 1;
+ break;
+
+ case 0x26: // ES override
+ prefixes->es_override = 1;
+ break;
+
+ case 0x64: // FS override
+ prefixes->fs_override = 1;
+ break;
- case 0x65: // GS override
- prefixes->gs_override = 1;
- break;
+ case 0x65: // GS override
+ prefixes->gs_override = 1;
+ break;
- case 0x66: // operand size override
- prefixes->op_size = 1;
- break;
+ case 0x66: // operand size override
+ prefixes->op_size = 1;
+ break;
- case 0x67: // address size override
- prefixes->addr_size = 1;
- break;
+ case 0x67: // address size override
+ prefixes->addr_size = 1;
+ break;
- default:
- return;
- }
+ default:
+ return;
+ }
- instr++;
- }
+ instr++;
+ }
}
void v3_strip_rep_prefix(uchar_t * instr, int length) {
- int read_ctr = 0;
- int write_ctr = 0;
- int found = 0;
-
- while (read_ctr < length) {
- if ((!found) &&
- ( (instr[read_ctr] == 0xF2) ||
- (instr[read_ctr] == 0xF3))) {
- read_ctr++;
- found = 1;
- } else {
- instr[write_ctr] = instr[read_ctr];
- write_ctr++;
- read_ctr++;
+ int read_ctr = 0;
+ int write_ctr = 0;
+ int found = 0;
+
+ while (read_ctr < length) {
+ if ((!found) &&
+ ( (instr[read_ctr] == 0xF2) ||
+ (instr[read_ctr] == 0xF3))) {
+ read_ctr++;
+ found = 1;
+ } else {
+ instr[write_ctr] = instr[read_ctr];
+ write_ctr++;
+ read_ctr++;
+ }
}
- }
}
int v3_init_dev_mgr(struct guest_info * info) {
- struct vmm_dev_mgr * mgr = &(info->dev_mgr);
- INIT_LIST_HEAD(&(mgr->dev_list));
- mgr->num_devs = 0;
+ struct vmm_dev_mgr * mgr = &(info->dev_mgr);
+ INIT_LIST_HEAD(&(mgr->dev_list));
+ mgr->num_devs = 0;
- INIT_LIST_HEAD(&(mgr->io_hooks));
- mgr->num_io_hooks = 0;
+ INIT_LIST_HEAD(&(mgr->io_hooks));
+ mgr->num_io_hooks = 0;
- INIT_LIST_HEAD(&(mgr->mem_hooks));
- mgr->num_mem_hooks = 0;
+ INIT_LIST_HEAD(&(mgr->mem_hooks));
+ mgr->num_mem_hooks = 0;
- INIT_LIST_HEAD(&(mgr->msr_hooks));
- mgr->num_msr_hook = 0;
+ INIT_LIST_HEAD(&(mgr->msr_hooks));
+ mgr->num_msr_hook = 0;
- return 0;
+ return 0;
}
int v3_dev_mgr_deinit(struct guest_info * info) {
- struct vm_device * dev;
- struct vmm_dev_mgr * mgr = &(info->dev_mgr);
- struct vm_device * tmp;
+ struct vm_device * dev;
+ struct vmm_dev_mgr * mgr = &(info->dev_mgr);
+ struct vm_device * tmp;
- list_for_each_entry_safe(dev, tmp, &(mgr->dev_list), dev_link) {
- v3_unattach_device(dev);
- v3_free_device(dev);
- }
+ list_for_each_entry_safe(dev, tmp, &(mgr->dev_list), dev_link) {
+ v3_unattach_device(dev);
+ v3_free_device(dev);
+ }
- return 0;
+ return 0;
}
int v3_attach_device(struct guest_info * vm, struct vm_device * dev) {
- struct vmm_dev_mgr *mgr= &(vm->dev_mgr);
+ struct vmm_dev_mgr *mgr= &(vm->dev_mgr);
- dev->vm = vm;
+ dev->vm = vm;
- list_add(&(dev->dev_link), &(mgr->dev_list));
- mgr->num_devs++;
+ list_add(&(dev->dev_link), &(mgr->dev_list));
+ mgr->num_devs++;
- dev->ops->init(dev);
+ dev->ops->init(dev);
- return 0;
+ return 0;
}
int v3_unattach_device(struct vm_device * dev) {
- struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
+ struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
- dev->ops->deinit(dev);
+ dev->ops->deinit(dev);
- list_del(&(dev->dev_link));
- mgr->num_devs--;
+ list_del(&(dev->dev_link));
+ mgr->num_devs--;
- dev->vm = NULL;
+ dev->vm = NULL;
- return 0;
+ return 0;
}
/* IO HOOKS */
static struct dev_io_hook * dev_mgr_find_io_hook(struct vmm_dev_mgr * mgr, ushort_t port) {
- struct dev_io_hook * tmp = NULL;
+ struct dev_io_hook * tmp = NULL;
- list_for_each_entry(tmp, &(mgr->io_hooks), mgr_list) {
- if (tmp->port == port) {
- return tmp;
+ list_for_each_entry(tmp, &(mgr->io_hooks), mgr_list) {
+ if (tmp->port == port) {
+ return tmp;
+ }
}
- }
- return NULL;
+ return NULL;
}
int (*read)(ushort_t port, void * dst, uint_t length, struct vm_device * dev),
int (*write)(ushort_t port, void * src, uint_t length, struct vm_device * dev)) {
- struct dev_io_hook *hook = (struct dev_io_hook *)V3_Malloc(sizeof(struct dev_io_hook));
- struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
+ struct dev_io_hook *hook = (struct dev_io_hook *)V3_Malloc(sizeof(struct dev_io_hook));
+ struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
- if (!hook) {
- return -1;
- }
+ if (!hook) {
+ return -1;
+ }
- if (v3_hook_io_port(dev->vm, port,
- (int (*)(ushort_t, void *, uint_t, void *))read,
- (int (*)(ushort_t, void *, uint_t, void *))write,
- (void *)dev) == 0) {
+ if (v3_hook_io_port(dev->vm, port,
+ (int (*)(ushort_t, void *, uint_t, void *))read,
+ (int (*)(ushort_t, void *, uint_t, void *))write,
+ (void *)dev) == 0) {
- hook->dev = dev;
- hook->port = port;
- hook->read = read;
- hook->write = write;
+ hook->dev = dev;
+ hook->port = port;
+ hook->read = read;
+ hook->write = write;
- list_add(&(hook->mgr_list), &(mgr->io_hooks));
- mgr->num_io_hooks++;
+ list_add(&(hook->mgr_list), &(mgr->io_hooks));
+ mgr->num_io_hooks++;
- list_add(&(hook->dev_list), &(dev->io_hooks));
- dev->num_io_hooks++;
- } else {
+ list_add(&(hook->dev_list), &(dev->io_hooks));
+ dev->num_io_hooks++;
+ } else {
- return -1;
- }
+ return -1;
+ }
- return 0;
+ return 0;
}
int v3_dev_unhook_io(struct vm_device *dev,
- ushort_t port) {
- struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
- struct dev_io_hook * hook = dev_mgr_find_io_hook(mgr, port);
+ ushort_t port) {
+ struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
+ struct dev_io_hook * hook = dev_mgr_find_io_hook(mgr, port);
- if (!hook) {
- return -1;
- }
+ if (!hook) {
+ return -1;
+ }
- list_del(&(hook->mgr_list));
- mgr->num_io_hooks--;
+ list_del(&(hook->mgr_list));
+ mgr->num_io_hooks--;
- list_del(&(hook->dev_list));
- dev->num_io_hooks--;
+ list_del(&(hook->dev_list));
+ dev->num_io_hooks--;
- return v3_unhook_io_port(dev->vm, port);
+ return v3_unhook_io_port(dev->vm, port);
}
void *end)
{
- struct dev_mem_hook * hook = (struct dev_mem_hook*)V3_Malloc(sizeof(struct dev_mem_hook));
- // V3_Malloc(struct dev_mem_hook *, hook,sizeof(struct dev_mem_hook));
+ struct dev_mem_hook * hook = (struct dev_mem_hook*)V3_Malloc(sizeof(struct dev_mem_hook));
+ // V3_Malloc(struct dev_mem_hook *, hook,sizeof(struct dev_mem_hook));
- if (!hook) {
- return -1;
- }
+ if (!hook) {
+ return -1;
+ }
- /* not implemented yet
- hook_memory(vm->mem_map,
- guest_physical_address_start,
- guest_physical_address_end,
- read,
- write,
- device);
+ /* not implemented yet
+ hook_memory(vm->mem_map,
+ guest_physical_address_start,
+ guest_physical_address_end,
+ read,
+ write,
+ device);
- */
+ */
- return -1; // remove when hook_memory works
+ return -1; // remove when hook_memory works
- hook->addr_start = start;
- hook->addr_end = end;
+ hook->addr_start = start;
+ hook->addr_end = end;
- return 0;
+ return 0;
}
static int dev_mgr_unhook_mem(struct vm_device *dev,
addr_t start,
addr_t end) {
- /*
- struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
- struct dev_mem_hook *hook = dev_mgr_find_mem_hook(mgr, start, end);
+ /*
+ struct vmm_dev_mgr * mgr = &(dev->vm->dev_mgr);
+ struct dev_mem_hook *hook = dev_mgr_find_mem_hook(mgr, start, end);
- if (!hook) {
- // Very bad - unhooking something that doesn't exist!
+ if (!hook) {
+ // Very bad - unhooking something that doesn't exist!
+ return -1;
+ }
+ */
+
+ /* not implemented yet
+ return unhook_mem_port(vm->mem_map,
+ guest_physical_start,
+ guest_physical_end) ;
+
+ */
return -1;
- }
- */
-
- /* not implemented yet
- return unhook_mem_port(vm->mem_map,
- guest_physical_start,
- guest_physical_end) ;
-
- */
- return -1;
}
#endif
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
#ifdef DEBUG_DEV_MGR
void PrintDebugDevMgr(struct guest_info * info) {
- struct vmm_dev_mgr * mgr = &(info->dev_mgr);
- struct vm_device * dev;
- PrintDebug("%d devices registered with manager\n", mgr->num_devs);
+ struct vmm_dev_mgr * mgr = &(info->dev_mgr);
+ struct vm_device * dev;
+ PrintDebug("%d devices registered with manager\n", mgr->num_devs);
- list_for_each_entry(dev, &(mgr->dev_list), dev_link) {
- PrintDebugDev(dev);
- PrintDebug("next..\n");
- }
+ list_for_each_entry(dev, &(mgr->dev_list), dev_link) {
+ PrintDebugDev(dev);
+ PrintDebug("next..\n");
+ }
- return;
+ return;
}
void PrintDebugDev(struct vm_device * dev) {
- PrintDebug("Device: %s\n", dev->name);
- PrintDebugDevIO(dev);
+ PrintDebug("Device: %s\n", dev->name);
+ PrintDebugDevIO(dev);
}
void PrintDebugDevMgrIO(struct vmm_dev_mgr * mgr) {
}
void PrintDebugDevIO(struct vm_device * dev) {
- struct dev_io_hook * hook;
+ struct dev_io_hook * hook;
- PrintDebug("IO Hooks(%d) for Device: %s\n", dev->num_io_hooks, dev->name);
+ PrintDebug("IO Hooks(%d) for Device: %s\n", dev->num_io_hooks, dev->name);
- list_for_each_entry(hook, &(dev->io_hooks), dev_list) {
- PrintDebug("\tPort: 0x%x (read=0x%p), (write=0x%p)\n", hook->port,
- (void *)(addr_t)(hook->read),
- (void *)(addr_t)(hook->write));
- }
+ list_for_each_entry(hook, &(dev->io_hooks), dev_list) {
+ PrintDebug("\tPort: 0x%x (read=0x%p), (write=0x%p)\n", hook->port,
+ (void *)(addr_t)(hook->read),
+ (void *)(addr_t)(hook->write));
+ }
- return;
+ return;
}
#else
#include <palacios/vm_guest.h>
static addr_t create_generic_pt_page() {
- void * page = 0;
- page = V3_VAddr(V3_AllocPages(1));
- memset(page, 0, PAGE_SIZE);
+ void * page = 0;
+ page = V3_VAddr(V3_AllocPages(1));
+ memset(page, 0, PAGE_SIZE);
- return (addr_t)page;
+ return (addr_t)page;
}
// Inline handler functions for each cpu mode
addr_t v3_create_direct_passthrough_pts(struct guest_info * info) {
- return create_generic_pt_page();
+ return create_generic_pt_page();
}
int v3_handle_passthrough_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- v3_vm_cpu_mode_t mode = v3_get_cpu_mode(info);
-
- switch(mode) {
- case REAL:
- case PROTECTED:
- return handle_passthrough_pagefault_32(info, fault_addr, error_code);
- case PROTECTED_PAE:
- return handle_passthrough_pagefault_32pae(info, fault_addr, error_code);
- case LONG:
- break;
- case LONG_32_COMPAT:
- break;
- default:
- PrintError("Unknown CPU Mode\n");
- break;
- }
- return -1;
+ v3_vm_cpu_mode_t mode = v3_get_cpu_mode(info);
+
+ switch(mode) {
+ case REAL:
+ case PROTECTED:
+ return handle_passthrough_pagefault_32(info, fault_addr, error_code);
+
+ case PROTECTED_PAE:
+ case LONG:
+ case LONG_32_COMPAT:
+ // Long mode will only use 32PAE page tables...
+ return handle_passthrough_pagefault_32pae(info, fault_addr, error_code);
+
+ default:
+ PrintError("Unknown CPU Mode\n");
+ break;
+ }
+ return -1;
}
static inline int handle_passthrough_pagefault_32(struct guest_info * info,
addr_t fault_addr,
pf_error_t error_code) {
- // Check to see if pde and pte exist (create them if not)
- pde32_t * pde = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
- pte32_t * pte = NULL;
- addr_t host_addr = 0;
-
- int pde_index = PDE32_INDEX(fault_addr);
- int pte_index = PTE32_INDEX(fault_addr);
-
- struct v3_shadow_region * region = v3_get_shadow_region(info, fault_addr);
-
- if ((region == NULL) ||
- (region->host_type == SHDW_REGION_INVALID)) {
- PrintError("Invalid region in passthrough page fault 32, addr=%p\n",
- (void *)fault_addr);
- return -1;
- }
-
- host_addr = v3_get_shadow_addr(region, fault_addr);
-
- // Fix up the PDE entry
- if (pde[pde_index].present == 0) {
- pte = (pte32_t *)create_generic_pt_page();
+ // Check to see if pde and pte exist (create them if not)
+ pde32_t * pde = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+ pte32_t * pte = NULL;
+ addr_t host_addr = 0;
- pde[pde_index].present = 1;
- pde[pde_index].writable = 1;
- pde[pde_index].user_page = 1;
- pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
-
- } else {
- pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
- }
-
- // Fix up the PTE entry
- if (pte[pte_index].present == 0) {
-
- pte[pte_index].user_page = 1;
-
- if (region->host_type == SHDW_REGION_ALLOCATED) {
- // Full access
- pte[pte_index].present = 1;
- pte[pte_index].writable = 1;
-
- pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
- } else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
- // Only trap writes
- pte[pte_index].present = 1;
- pte[pte_index].writable = 0;
-
- pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
- } else if (region->host_type == SHDW_REGION_FULL_HOOK) {
- // trap all accesses
- return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
+ int pde_index = PDE32_INDEX(fault_addr);
+ int pte_index = PTE32_INDEX(fault_addr);
+
+ struct v3_shadow_region * region = v3_get_shadow_region(info, fault_addr);
+
+ if ((region == NULL) ||
+ (region->host_type == SHDW_REGION_INVALID)) {
+ PrintError("Invalid region in passthrough page fault 32, addr=%p\n",
+ (void *)fault_addr);
+ return -1;
+ }
+
+ host_addr = v3_get_shadow_addr(region, fault_addr);
+
+ // Fix up the PDE entry
+ if (pde[pde_index].present == 0) {
+ pte = (pte32_t *)create_generic_pt_page();
+
+ pde[pde_index].present = 1;
+ pde[pde_index].writable = 1;
+ pde[pde_index].user_page = 1;
+ pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
+
} else {
- PrintError("Unknown Region Type...\n");
- return -1;
+ pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
}
- }
-
- if ( (region->host_type == SHDW_REGION_WRITE_HOOK) &&
- (error_code.write == 1) ) {
- return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
- }
-
+ // Fix up the PTE entry
+ if (pte[pte_index].present == 0) {
+
+ pte[pte_index].user_page = 1;
+
+ if (region->host_type == SHDW_REGION_ALLOCATED) {
+ // Full access
+ pte[pte_index].present = 1;
+ pte[pte_index].writable = 1;
+
+ pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+ } else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
+ // Only trap writes
+ pte[pte_index].present = 1;
+ pte[pte_index].writable = 0;
+
+ pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+ } else if (region->host_type == SHDW_REGION_FULL_HOOK) {
+ // trap all accesses
+ return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
+ } else {
+ PrintError("Unknown Region Type...\n");
+ return -1;
+ }
+ }
+
+ if ( (region->host_type == SHDW_REGION_WRITE_HOOK) &&
+ (error_code.write == 1) ) {
+ return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
+ }
- return 0;
+
+ return 0;
}
static inline int handle_passthrough_pagefault_32pae(struct guest_info * info,
addr_t fault_addr,
pf_error_t error_code) {
- pdpe32pae_t * pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
- pde32pae_t * pde = NULL;
- pte32pae_t * pte = NULL;
- addr_t host_addr = 0;
+ pdpe32pae_t * pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
+ pde32pae_t * pde = NULL;
+ pte32pae_t * pte = NULL;
+ addr_t host_addr = 0;
- int pdpe_index = PDPE32PAE_INDEX(fault_addr);
- int pde_index = PDE32PAE_INDEX(fault_addr);
- int pte_index = PTE32PAE_INDEX(fault_addr);
+ int pdpe_index = PDPE32PAE_INDEX(fault_addr);
+ int pde_index = PDE32PAE_INDEX(fault_addr);
+ int pte_index = PTE32PAE_INDEX(fault_addr);
- struct v3_shadow_region * region = v3_get_shadow_region(info, fault_addr);
+ struct v3_shadow_region * region = v3_get_shadow_region(info, fault_addr);
- if ((region == NULL) ||
- (region->host_type == SHDW_REGION_INVALID)) {
- PrintError("Invalid region in passthrough page fault 32PAE, addr=%p\n",
- (void *)fault_addr);
- return -1;
- }
-
- host_addr = v3_get_shadow_addr(region, fault_addr);
-
- // Fix up the PDPE entry
- if (pdpe[pdpe_index].present == 0) {
- pde = (pde32pae_t *)create_generic_pt_page();
+ if ((region == NULL) ||
+ (region->host_type == SHDW_REGION_INVALID)) {
+ PrintError("Invalid region in passthrough page fault 32PAE, addr=%p\n",
+ (void *)fault_addr);
+ return -1;
+ }
+
+ host_addr = v3_get_shadow_addr(region, fault_addr);
+
+ // Fix up the PDPE entry
+ if (pdpe[pdpe_index].present == 0) {
+ pde = (pde32pae_t *)create_generic_pt_page();
- pdpe[pdpe_index].present = 1;
- // Set default PDPE Flags...
- pdpe[pdpe_index].pd_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pde));
- } else {
- pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr));
- }
+ pdpe[pdpe_index].present = 1;
+ // Set default PDPE Flags...
+ pdpe[pdpe_index].pd_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pde));
+ } else {
+ pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr));
+ }
- // Fix up the PDE entry
- if (pde[pde_index].present == 0) {
- pte = (pte32pae_t *)create_generic_pt_page();
+ // Fix up the PDE entry
+ if (pde[pde_index].present == 0) {
+ pte = (pte32pae_t *)create_generic_pt_page();
- pde[pde_index].present = 1;
- pde[pde_index].writable = 1;
- pde[pde_index].user_page = 1;
+ pde[pde_index].present = 1;
+ pde[pde_index].writable = 1;
+ pde[pde_index].user_page = 1;
- pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
- } else {
- pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
- }
+ pde[pde_index].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
+ } else {
+ pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
+ }
- // Fix up the PTE entry
- if (pte[pte_index].present == 0) {
- pte[pte_index].user_page = 1;
+ // Fix up the PTE entry
+ if (pte[pte_index].present == 0) {
+ pte[pte_index].user_page = 1;
- if (region->host_type == SHDW_REGION_ALLOCATED) {
- // Full access
- pte[pte_index].present = 1;
- pte[pte_index].writable = 1;
+ if (region->host_type == SHDW_REGION_ALLOCATED) {
+ // Full access
+ pte[pte_index].present = 1;
+ pte[pte_index].writable = 1;
- pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+ pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
- } else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
- // Only trap writes
- pte[pte_index].present = 1;
- pte[pte_index].writable = 0;
+ } else if (region->host_type == SHDW_REGION_WRITE_HOOK) {
+ // Only trap writes
+ pte[pte_index].present = 1;
+ pte[pte_index].writable = 0;
- pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
+ pte[pte_index].page_base_addr = PAGE_BASE_ADDR(host_addr);
- } else if (region->host_type == SHDW_REGION_FULL_HOOK) {
- // trap all accesses
- return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
+ } else if (region->host_type == SHDW_REGION_FULL_HOOK) {
+ // trap all accesses
+ return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
- } else {
- PrintError("Unknown Region Type...\n");
- return -1;
+ } else {
+ PrintError("Unknown Region Type...\n");
+ return -1;
+ }
}
- }
- if ( (region->host_type == SHDW_REGION_WRITE_HOOK) &&
- (error_code.write == 1) ) {
- return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
- }
+ if ( (region->host_type == SHDW_REGION_WRITE_HOOK) &&
+ (error_code.write == 1) ) {
+ return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
+ }
- return 0;
+ return 0;
}
addr_t write_gva, addr_t write_gpa, addr_t dst_addr,
int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
void * priv_data) {
- uint_t emulation_length = 0;
- addr_t tmp_rcx = 0;
- addr_t src_addr = 0;
-
- if (dec_instr->dst_operand.operand != write_gva) {
- PrintError("Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr->dst_operand.operand, (void *)write_gva);
- return -1;
- }
+ uint_t emulation_length = 0;
+ addr_t tmp_rcx = 0;
+ addr_t src_addr = 0;
+
+ if (dec_instr->dst_operand.operand != write_gva) {
+ PrintError("Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr->dst_operand.operand, (void *)write_gva);
+ return -1;
+ }
- emulation_length = ( (dec_instr->str_op_length < (0x1000 - PAGE_OFFSET_4KB(write_gva))) ?
- dec_instr->str_op_length :
- (0x1000 - PAGE_OFFSET_4KB(write_gva)));
+ emulation_length = ( (dec_instr->str_op_length < (0x1000 - PAGE_OFFSET_4KB(write_gva))) ?
+ dec_instr->str_op_length :
+ (0x1000 - PAGE_OFFSET_4KB(write_gva)));
- /* ** Fix emulation length so that it doesn't overrun over the src page either ** */
- tmp_rcx = emulation_length;
+ /* ** Fix emulation length so that it doesn't overrun over the src page either ** */
+ tmp_rcx = emulation_length;
- if (dec_instr->op_type == V3_OP_MOVS) {
-
- // figure out addresses here....
- if (info->mem_mode == PHYSICAL_MEM) {
- if (guest_pa_to_host_va(info, dec_instr->src_operand.operand, &src_addr) == -1) {
- PrintError("Could not translate write Source (Physical) to host VA\n");
- return -1;
- }
- } else {
- if (guest_va_to_host_va(info, dec_instr->src_operand.operand, &src_addr) == -1) {
- PrintError("Could not translate write Source (Virtual) to host VA\n");
- return -1;
- }
- }
-
- if (dec_instr->dst_operand.size == 1) {
- movs8((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
- } else if (dec_instr->dst_operand.size == 2) {
- movs16((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
- } else if (dec_instr->dst_operand.size == 4) {
- movs32((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ if (dec_instr->op_type == V3_OP_MOVS) {
+
+ // figure out addresses here....
+ if (info->mem_mode == PHYSICAL_MEM) {
+ if (guest_pa_to_host_va(info, dec_instr->src_operand.operand, &src_addr) == -1) {
+ PrintError("Could not translate write Source (Physical) to host VA\n");
+ return -1;
+ }
+ } else {
+ if (guest_va_to_host_va(info, dec_instr->src_operand.operand, &src_addr) == -1) {
+ PrintError("Could not translate write Source (Virtual) to host VA\n");
+ return -1;
+ }
+ }
+
+ if (dec_instr->dst_operand.size == 1) {
+ movs8((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else if (dec_instr->dst_operand.size == 2) {
+ movs16((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else if (dec_instr->dst_operand.size == 4) {
+ movs32((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
#ifdef __V3_64BIT__
- } else if (dec_instr->dst_operand.size == 8) {
- movs64((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else if (dec_instr->dst_operand.size == 8) {
+ movs64((addr_t *)&dst_addr, &src_addr, &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
#endif
- } else {
- PrintError("Invalid operand length\n");
- return -1;
- }
-
- info->vm_regs.rdi += emulation_length;
- info->vm_regs.rsi += emulation_length;
-
- // RCX is only modified if the rep prefix is present
- if (dec_instr->prefixes.rep == 1) {
- info->vm_regs.rcx -= emulation_length;
- }
-
- } else if (dec_instr->op_type == V3_OP_STOS) {
-
- if (dec_instr->dst_operand.size == 1) {
- stos8((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
- } else if (dec_instr->dst_operand.size == 2) {
- stos16((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
- } else if (dec_instr->dst_operand.size == 4) {
- stos32((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else {
+ PrintError("Invalid operand length\n");
+ return -1;
+ }
+
+ info->vm_regs.rdi += emulation_length;
+ info->vm_regs.rsi += emulation_length;
+
+ // RCX is only modified if the rep prefix is present
+ if (dec_instr->prefixes.rep == 1) {
+ info->vm_regs.rcx -= emulation_length;
+ }
+
+ } else if (dec_instr->op_type == V3_OP_STOS) {
+
+ if (dec_instr->dst_operand.size == 1) {
+ stos8((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else if (dec_instr->dst_operand.size == 2) {
+ stos16((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else if (dec_instr->dst_operand.size == 4) {
+ stos32((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
#ifdef __V3_64BIT__
- } else if (dec_instr->dst_operand.size == 8) {
- stos64((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
+ } else if (dec_instr->dst_operand.size == 8) {
+ stos64((addr_t *)&dst_addr, (addr_t *)&(info->vm_regs.rax), &tmp_rcx, (addr_t *)&(info->ctrl_regs.rflags));
#endif
- } else {
- PrintError("Invalid operand length\n");
- return -1;
- }
+ } else {
+ PrintError("Invalid operand length\n");
+ return -1;
+ }
- info->vm_regs.rdi += emulation_length;
+ info->vm_regs.rdi += emulation_length;
- // RCX is only modified if the rep prefix is present
- if (dec_instr->prefixes.rep == 1) {
- info->vm_regs.rcx -= emulation_length;
- }
+ // RCX is only modified if the rep prefix is present
+ if (dec_instr->prefixes.rep == 1) {
+ info->vm_regs.rcx -= emulation_length;
+ }
- } else {
- PrintError("Unimplemented String operation\n");
- return -1;
- }
+ } else {
+ PrintError("Unimplemented String operation\n");
+ return -1;
+ }
- if (write_fn(write_gpa, (void *)dst_addr, emulation_length, priv_data) != emulation_length) {
- PrintError("Did not fully read hooked data\n");
- return -1;
- }
+ if (write_fn(write_gpa, (void *)dst_addr, emulation_length, priv_data) != emulation_length) {
+ PrintError("Did not fully read hooked data\n");
+ return -1;
+ }
- if (emulation_length == dec_instr->str_op_length) {
- info->rip += dec_instr->instr_length;
- }
+ if (emulation_length == dec_instr->str_op_length) {
+ info->rip += dec_instr->instr_length;
+ }
- return emulation_length;
+ return emulation_length;
}
addr_t write_gva, addr_t write_gpa, addr_t dst_addr,
int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
void * priv_data) {
- addr_t src_addr = 0;
- addr_t em_dst_addr = 0;
- int src_op_len = 0;
- int dst_op_len = 0;
- PrintDebug("Emulating XCHG write\n");
-
- if (dec_instr->src_operand.type == MEM_OPERAND) {
- if (dec_instr->src_operand.operand != write_gva) {
- PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr->src_operand.operand, (void *)write_gva);
- return -1;
- }
+ addr_t src_addr = 0;
+ addr_t em_dst_addr = 0;
+ int src_op_len = 0;
+ int dst_op_len = 0;
+ PrintDebug("Emulating XCHG write\n");
+
+ if (dec_instr->src_operand.type == MEM_OPERAND) {
+ if (dec_instr->src_operand.operand != write_gva) {
+ PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr->src_operand.operand, (void *)write_gva);
+ return -1;
+ }
- src_addr = dst_addr;
- } else if (dec_instr->src_operand.type == REG_OPERAND) {
- src_addr = dec_instr->src_operand.operand;
- } else {
- src_addr = (addr_t)&(dec_instr->src_operand.operand);
- }
+ src_addr = dst_addr;
+ } else if (dec_instr->src_operand.type == REG_OPERAND) {
+ src_addr = dec_instr->src_operand.operand;
+ } else {
+ src_addr = (addr_t)&(dec_instr->src_operand.operand);
+ }
- if (dec_instr->dst_operand.type == MEM_OPERAND) {
- if (dec_instr->dst_operand.operand != write_gva) {
- PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr->dst_operand.operand, (void *)write_gva);
- return -1;
- }
+ if (dec_instr->dst_operand.type == MEM_OPERAND) {
+ if (dec_instr->dst_operand.operand != write_gva) {
+ PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr->dst_operand.operand, (void *)write_gva);
+ return -1;
+ }
- em_dst_addr = dst_addr;
- } else if (dec_instr->src_operand.type == REG_OPERAND) {
- em_dst_addr = dec_instr->src_operand.operand;
- } else {
- em_dst_addr = (addr_t)&(dec_instr->src_operand.operand);
- }
+ em_dst_addr = dst_addr;
+ } else if (dec_instr->src_operand.type == REG_OPERAND) {
+ em_dst_addr = dec_instr->src_operand.operand;
+ } else {
+ em_dst_addr = (addr_t)&(dec_instr->src_operand.operand);
+ }
- dst_op_len = dec_instr->dst_operand.size;
- src_op_len = dec_instr->src_operand.size;
+ dst_op_len = dec_instr->dst_operand.size;
+ src_op_len = dec_instr->src_operand.size;
- PrintDebug("Dst_Addr = %p, SRC operand = %p\n",
- (void *)dst_addr, (void *)src_addr);
+ PrintDebug("Dst_Addr = %p, SRC operand = %p\n",
+ (void *)dst_addr, (void *)src_addr);
- if (run_op(info, dec_instr->op_type, src_addr, em_dst_addr, src_op_len, dst_op_len) == -1) {
- PrintError("Instruction Emulation Failed\n");
- return -1;
- }
+ if (run_op(info, dec_instr->op_type, src_addr, em_dst_addr, src_op_len, dst_op_len) == -1) {
+ PrintError("Instruction Emulation Failed\n");
+ return -1;
+ }
- if (write_fn(write_gpa, (void *)dst_addr, dst_op_len, priv_data) != dst_op_len) {
- PrintError("Did not fully write hooked data\n");
- return -1;
- }
+ if (write_fn(write_gpa, (void *)dst_addr, dst_op_len, priv_data) != dst_op_len) {
+ PrintError("Did not fully write hooked data\n");
+ return -1;
+ }
- info->rip += dec_instr->instr_length;
+ info->rip += dec_instr->instr_length;
- return dst_op_len;
+ return dst_op_len;
}
int (*read_fn)(addr_t guest_addr, void * dst, uint_t length, void * priv_data),
int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
void * priv_data) {
- addr_t em_src_addr = 0;
- addr_t em_dst_addr = 0;
- int src_op_len = 0;
- int dst_op_len = 0;
-
- PrintDebug("Emulating XCHG Read\n");
-
- if (dec_instr->src_operand.type == MEM_OPERAND) {
- if (dec_instr->src_operand.operand != read_gva) {
- PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr->src_operand.operand, (void *)read_gva);
- return -1;
- }
+ addr_t em_src_addr = 0;
+ addr_t em_dst_addr = 0;
+ int src_op_len = 0;
+ int dst_op_len = 0;
+
+ PrintDebug("Emulating XCHG Read\n");
+
+ if (dec_instr->src_operand.type == MEM_OPERAND) {
+ if (dec_instr->src_operand.operand != read_gva) {
+ PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr->src_operand.operand, (void *)read_gva);
+ return -1;
+ }
- em_src_addr = src_addr;
- } else if (dec_instr->src_operand.type == REG_OPERAND) {
- em_src_addr = dec_instr->src_operand.operand;
- } else {
- em_src_addr = (addr_t)&(dec_instr->src_operand.operand);
- }
+ em_src_addr = src_addr;
+ } else if (dec_instr->src_operand.type == REG_OPERAND) {
+ em_src_addr = dec_instr->src_operand.operand;
+ } else {
+ em_src_addr = (addr_t)&(dec_instr->src_operand.operand);
+ }
- if (dec_instr->dst_operand.type == MEM_OPERAND) {
- if (dec_instr->dst_operand.operand != read_gva) {
- PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr->dst_operand.operand, (void *)read_gva);
- return -1;
- }
+ if (dec_instr->dst_operand.type == MEM_OPERAND) {
+ if (dec_instr->dst_operand.operand != read_gva) {
+ PrintError("XCHG: Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr->dst_operand.operand, (void *)read_gva);
+ return -1;
+ }
- em_dst_addr = src_addr;
- } else if (dec_instr->src_operand.type == REG_OPERAND) {
- em_dst_addr = dec_instr->src_operand.operand;
- } else {
- em_dst_addr = (addr_t)&(dec_instr->src_operand.operand);
- }
+ em_dst_addr = src_addr;
+ } else if (dec_instr->src_operand.type == REG_OPERAND) {
+ em_dst_addr = dec_instr->src_operand.operand;
+ } else {
+ em_dst_addr = (addr_t)&(dec_instr->src_operand.operand);
+ }
- dst_op_len = dec_instr->dst_operand.size;
- src_op_len = dec_instr->src_operand.size;
+ dst_op_len = dec_instr->dst_operand.size;
+ src_op_len = dec_instr->src_operand.size;
- PrintDebug("Dst_Addr = %p, SRC operand = %p\n",
- (void *)em_dst_addr, (void *)em_src_addr);
+ PrintDebug("Dst_Addr = %p, SRC operand = %p\n",
+ (void *)em_dst_addr, (void *)em_src_addr);
- if (read_fn(read_gpa, (void *)src_addr, src_op_len, priv_data) != src_op_len) {
- PrintError("Did not fully read hooked data\n");
- return -1;
- }
+ if (read_fn(read_gpa, (void *)src_addr, src_op_len, priv_data) != src_op_len) {
+ PrintError("Did not fully read hooked data\n");
+ return -1;
+ }
- if (run_op(info, dec_instr->op_type, em_src_addr, em_dst_addr, src_op_len, dst_op_len) == -1) {
- PrintError("Instruction Emulation Failed\n");
- return -1;
- }
+ if (run_op(info, dec_instr->op_type, em_src_addr, em_dst_addr, src_op_len, dst_op_len) == -1) {
+ PrintError("Instruction Emulation Failed\n");
+ return -1;
+ }
- if (write_fn(read_gpa, (void *)src_addr, dst_op_len, priv_data) != dst_op_len) {
- PrintError("Did not fully write hooked data\n");
- return -1;
- }
+ if (write_fn(read_gpa, (void *)src_addr, dst_op_len, priv_data) != dst_op_len) {
+ PrintError("Did not fully write hooked data\n");
+ return -1;
+ }
- info->rip += dec_instr->instr_length;
+ info->rip += dec_instr->instr_length;
- return dst_op_len;
+ return dst_op_len;
}
int v3_emulate_write_op(struct guest_info * info, addr_t write_gva, addr_t write_gpa, addr_t dst_addr,
- int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
- void * priv_data) {
- struct x86_instr dec_instr;
- uchar_t instr[15];
- int ret = 0;
- addr_t src_addr = 0;
- int src_op_len = 0;
- int dst_op_len = 0;
-
- PrintDebug("Emulating Write for instruction at %p\n", (void *)(addr_t)(info->rip));
- PrintDebug("GVA=%p\n", (void *)write_gva);
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (ret == -1) {
- return -1;
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Decoding Error\n");
- // Kick off single step emulator
- return -1;
- }
-
- /*
- * Instructions needing to be special cased.... *
- */
- if (dec_instr.is_str_op) {
- return emulate_string_write_op(info, &dec_instr, write_gva, write_gpa, dst_addr, write_fn, priv_data);
- } else if (dec_instr.op_type == V3_OP_XCHG) {
- return emulate_xchg_write_op(info, &dec_instr, write_gva, write_gpa, dst_addr, write_fn, priv_data);
- }
+ int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
+ void * priv_data) {
+ struct x86_instr dec_instr;
+ uchar_t instr[15];
+ int ret = 0;
+ addr_t src_addr = 0;
+ int src_op_len = 0;
+ int dst_op_len = 0;
+
+ PrintDebug("Emulating Write for instruction at %p\n", (void *)(addr_t)(info->rip));
+ PrintDebug("GVA=%p\n", (void *)write_gva);
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+ if (ret == -1) {
+ return -1;
+ }
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Decoding Error\n");
+ // Kick off single step emulator
+ return -1;
+ }
+
+ /*
+ * Instructions needing to be special cased.... *
+ */
+ if (dec_instr.is_str_op) {
+ return emulate_string_write_op(info, &dec_instr, write_gva, write_gpa, dst_addr, write_fn, priv_data);
+ } else if (dec_instr.op_type == V3_OP_XCHG) {
+ return emulate_xchg_write_op(info, &dec_instr, write_gva, write_gpa, dst_addr, write_fn, priv_data);
+ }
- if ((dec_instr.dst_operand.type != MEM_OPERAND) ||
- (dec_instr.dst_operand.operand != write_gva)) {
- PrintError("Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr.dst_operand.operand, (void *)write_gva);
- return -1;
- }
- if (dec_instr.src_operand.type == MEM_OPERAND) {
- if (info->mem_mode == PHYSICAL_MEM) {
- if (guest_pa_to_host_va(info, dec_instr.src_operand.operand, &src_addr) == -1) {
- PrintError("Could not translate write Source (Physical) to host VA\n");
+ if ((dec_instr.dst_operand.type != MEM_OPERAND) ||
+ (dec_instr.dst_operand.operand != write_gva)) {
+ PrintError("Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr.dst_operand.operand, (void *)write_gva);
return -1;
- }
+ }
+
+
+ if (dec_instr.src_operand.type == MEM_OPERAND) {
+ if (info->mem_mode == PHYSICAL_MEM) {
+ if (guest_pa_to_host_va(info, dec_instr.src_operand.operand, &src_addr) == -1) {
+ PrintError("Could not translate write Source (Physical) to host VA\n");
+ return -1;
+ }
+ } else {
+ if (guest_va_to_host_va(info, dec_instr.src_operand.operand, &src_addr) == -1) {
+ PrintError("Could not translate write Source (Virtual) to host VA\n");
+ return -1;
+ }
+ }
+ } else if (dec_instr.src_operand.type == REG_OPERAND) {
+ src_addr = dec_instr.src_operand.operand;
} else {
- if (guest_va_to_host_va(info, dec_instr.src_operand.operand, &src_addr) == -1) {
- PrintError("Could not translate write Source (Virtual) to host VA\n");
- return -1;
- }
+ src_addr = (addr_t)&(dec_instr.src_operand.operand);
}
- } else if (dec_instr.src_operand.type == REG_OPERAND) {
- src_addr = dec_instr.src_operand.operand;
- } else {
- src_addr = (addr_t)&(dec_instr.src_operand.operand);
- }
- dst_op_len = dec_instr.dst_operand.size;
- src_op_len = dec_instr.src_operand.size;
+ dst_op_len = dec_instr.dst_operand.size;
+ src_op_len = dec_instr.src_operand.size;
- PrintDebug("Dst_Addr = %p, SRC operand = %p\n",
- (void *)dst_addr, (void *)src_addr);
+ PrintDebug("Dst_Addr = %p, SRC operand = %p\n",
+ (void *)dst_addr, (void *)src_addr);
- if (run_op(info, dec_instr.op_type, src_addr, dst_addr, src_op_len, dst_op_len) == -1) {
- PrintError("Instruction Emulation Failed\n");
- return -1;
- }
+ if (run_op(info, dec_instr.op_type, src_addr, dst_addr, src_op_len, dst_op_len) == -1) {
+ PrintError("Instruction Emulation Failed\n");
+ return -1;
+ }
- if (write_fn(write_gpa, (void *)dst_addr, dst_op_len, priv_data) != dst_op_len) {
- PrintError("Did not fully write hooked data\n");
- return -1;
- }
+ if (write_fn(write_gpa, (void *)dst_addr, dst_op_len, priv_data) != dst_op_len) {
+ PrintError("Did not fully write hooked data\n");
+ return -1;
+ }
- info->rip += dec_instr.instr_length;
+ info->rip += dec_instr.instr_length;
- return dst_op_len;
+ return dst_op_len;
}
int (*read_fn)(addr_t guest_addr, void * dst, uint_t length, void * priv_data),
int (*write_fn)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
void * priv_data) {
- struct x86_instr dec_instr;
- uchar_t instr[15];
- int ret = 0;
- addr_t dst_addr = 0;
- int src_op_len = 0;
- int dst_op_len = 0;
-
- PrintDebug("Emulating Read for instruction at %p\n", (void *)(addr_t)(info->rip));
- PrintDebug("GVA=%p\n", (void *)read_gva);
-
- if (info->mem_mode == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (ret == -1) {
- return -1;
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Decoding Error\n");
- // Kick off single step emulator
- return -1;
- }
+ struct x86_instr dec_instr;
+ uchar_t instr[15];
+ int ret = 0;
+ addr_t dst_addr = 0;
+ int src_op_len = 0;
+ int dst_op_len = 0;
+
+ PrintDebug("Emulating Read for instruction at %p\n", (void *)(addr_t)(info->rip));
+ PrintDebug("GVA=%p\n", (void *)read_gva);
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+
+ if (ret == -1) {
+ return -1;
+ }
+
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Decoding Error\n");
+ // Kick off single step emulator
+ return -1;
+ }
- if (dec_instr.is_str_op) {
- PrintError("String operations not implemented on fully hooked regions\n");
- return -1;
- } else if (dec_instr.op_type == V3_OP_XCHG) {
- return emulate_xchg_read_op(info, &dec_instr, read_gva, read_gpa, src_addr, read_fn, write_fn, priv_data);
- }
-
-
- if ((dec_instr.src_operand.type != MEM_OPERAND) ||
- (dec_instr.src_operand.operand != read_gva)) {
- PrintError("Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
- (void *)dec_instr.src_operand.operand, (void *)read_gva);
- return -1;
- }
-
-
- if (dec_instr.dst_operand.type == MEM_OPERAND) {
- if (info->mem_mode == PHYSICAL_MEM) {
- if (guest_pa_to_host_va(info, dec_instr.dst_operand.operand, &dst_addr) == -1) {
- PrintError("Could not translate Read Destination (Physical) to host VA\n");
+ if (dec_instr.is_str_op) {
+ PrintError("String operations not implemented on fully hooked regions\n");
return -1;
- }
- } else {
- if (guest_va_to_host_va(info, dec_instr.dst_operand.operand, &dst_addr) == -1) {
- PrintError("Could not translate Read Destination (Virtual) to host VA\n");
+ } else if (dec_instr.op_type == V3_OP_XCHG) {
+ return emulate_xchg_read_op(info, &dec_instr, read_gva, read_gpa, src_addr, read_fn, write_fn, priv_data);
+ }
+
+
+ if ((dec_instr.src_operand.type != MEM_OPERAND) ||
+ (dec_instr.src_operand.operand != read_gva)) {
+ PrintError("Inconsistency between Pagefault and Instruction Decode XED_ADDR=%p, PF_ADDR=%p\n",
+ (void *)dec_instr.src_operand.operand, (void *)read_gva);
return -1;
- }
}
- } else if (dec_instr.dst_operand.type == REG_OPERAND) {
- dst_addr = dec_instr.dst_operand.operand;
- } else {
- dst_addr = (addr_t)&(dec_instr.dst_operand.operand);
- }
- src_op_len = dec_instr.src_operand.size;
- dst_op_len = dec_instr.dst_operand.size;
- PrintDebug("Dst_Addr = %p, SRC Addr = %p\n",
- (void *)dst_addr, (void *)src_addr);
+ if (dec_instr.dst_operand.type == MEM_OPERAND) {
+ if (info->mem_mode == PHYSICAL_MEM) {
+ if (guest_pa_to_host_va(info, dec_instr.dst_operand.operand, &dst_addr) == -1) {
+ PrintError("Could not translate Read Destination (Physical) to host VA\n");
+ return -1;
+ }
+ } else {
+ if (guest_va_to_host_va(info, dec_instr.dst_operand.operand, &dst_addr) == -1) {
+ PrintError("Could not translate Read Destination (Virtual) to host VA\n");
+ return -1;
+ }
+ }
+ } else if (dec_instr.dst_operand.type == REG_OPERAND) {
+ dst_addr = dec_instr.dst_operand.operand;
+ } else {
+ dst_addr = (addr_t)&(dec_instr.dst_operand.operand);
+ }
- if (read_fn(read_gpa, (void *)src_addr, src_op_len, priv_data) != src_op_len) {
- PrintError("Did not fully read hooked data\n");
- return -1;
- }
+ src_op_len = dec_instr.src_operand.size;
+ dst_op_len = dec_instr.dst_operand.size;
- if (run_op(info, dec_instr.op_type, src_addr, dst_addr, src_op_len, dst_op_len) == -1) {
- PrintError("Instruction Emulation Failed\n");
- return -1;
- }
+ PrintDebug("Dst_Addr = %p, SRC Addr = %p\n",
+ (void *)dst_addr, (void *)src_addr);
- info->rip += dec_instr.instr_length;
+ if (read_fn(read_gpa, (void *)src_addr, src_op_len, priv_data) != src_op_len) {
+ PrintError("Did not fully read hooked data\n");
+ return -1;
+ }
- return src_op_len;
+ if (run_op(info, dec_instr.op_type, src_addr, dst_addr, src_op_len, dst_op_len) == -1) {
+ PrintError("Instruction Emulation Failed\n");
+ return -1;
+ }
+
+ info->rip += dec_instr.instr_length;
+
+ return src_op_len;
}
static int run_op(struct guest_info * info, v3_op_type_t op_type, addr_t src_addr, addr_t dst_addr, int src_op_size, int dst_op_size) {
- if (src_op_size == 1) {
- PrintDebug("Executing 8 bit instruction\n");
-
- switch (op_type) {
- case V3_OP_ADC:
- adc8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_ADD:
- add8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_AND:
- and8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_OR:
- or8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_XOR:
- xor8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SUB:
- sub8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- case V3_OP_MOV:
- mov8((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
-
- case V3_OP_MOVZX:
- movzx8((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
- break;
- case V3_OP_MOVSX:
- movsx8((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
- break;
-
- case V3_OP_NOT:
- not8((addr_t *)dst_addr);
- break;
- case V3_OP_XCHG:
- xchg8((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
+ if (src_op_size == 1) {
+ PrintDebug("Executing 8 bit instruction\n");
+
+ switch (op_type) {
+ case V3_OP_ADC:
+ adc8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_ADD:
+ add8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_AND:
+ and8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_OR:
+ or8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_XOR:
+ xor8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SUB:
+ sub8((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ case V3_OP_MOV:
+ mov8((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
+
+ case V3_OP_MOVZX:
+ movzx8((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
+ break;
+ case V3_OP_MOVSX:
+ movsx8((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
+ break;
+
+ case V3_OP_NOT:
+ not8((addr_t *)dst_addr);
+ break;
+ case V3_OP_XCHG:
+ xchg8((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
- case V3_OP_INC:
- inc8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_DEC:
- dec8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_NEG:
- neg8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETB:
- setb8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETBE:
- setbe8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETL:
- setl8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETLE:
- setle8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNB:
- setnb8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNBE:
- setnbe8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNL:
- setnl8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNLE:
- setnle8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNO:
- setno8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNP:
- setnp8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNS:
- setns8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETNZ:
- setnz8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETO:
- seto8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETP:
- setp8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETS:
- sets8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SETZ:
- setz8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- default:
- PrintError("Unknown 8 bit instruction\n");
- return -1;
- }
-
- } else if (src_op_size == 2) {
- PrintDebug("Executing 16 bit instruction\n");
-
- switch (op_type) {
- case V3_OP_ADC:
- adc16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_ADD:
- add16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_AND:
- and16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_OR:
- or16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_XOR:
- xor16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SUB:
- sub16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
-
- case V3_OP_INC:
- inc16((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_DEC:
- dec16((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_NEG:
- neg16((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- case V3_OP_MOV:
- mov16((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
- case V3_OP_MOVZX:
- movzx16((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
- break;
- case V3_OP_MOVSX:
- movsx16((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
- break;
- case V3_OP_NOT:
- not16((addr_t *)dst_addr);
- break;
- case V3_OP_XCHG:
- xchg16((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
+ case V3_OP_INC:
+ inc8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_DEC:
+ dec8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_NEG:
+ neg8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETB:
+ setb8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETBE:
+ setbe8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETL:
+ setl8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETLE:
+ setle8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNB:
+ setnb8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNBE:
+ setnbe8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNL:
+ setnl8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNLE:
+ setnle8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNO:
+ setno8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNP:
+ setnp8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNS:
+ setns8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETNZ:
+ setnz8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETO:
+ seto8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETP:
+ setp8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETS:
+ sets8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SETZ:
+ setz8((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ default:
+ PrintError("Unknown 8 bit instruction\n");
+ return -1;
+ }
+
+ } else if (src_op_size == 2) {
+ PrintDebug("Executing 16 bit instruction\n");
+
+ switch (op_type) {
+ case V3_OP_ADC:
+ adc16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_ADD:
+ add16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_AND:
+ and16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_OR:
+ or16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_XOR:
+ xor16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SUB:
+ sub16((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+
+ case V3_OP_INC:
+ inc16((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_DEC:
+ dec16((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_NEG:
+ neg16((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ case V3_OP_MOV:
+ mov16((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
+ case V3_OP_MOVZX:
+ movzx16((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
+ break;
+ case V3_OP_MOVSX:
+ movsx16((addr_t *)dst_addr, (addr_t *)src_addr, dst_op_size);
+ break;
+ case V3_OP_NOT:
+ not16((addr_t *)dst_addr);
+ break;
+ case V3_OP_XCHG:
+ xchg16((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
- default:
- PrintError("Unknown 16 bit instruction\n");
- return -1;
- }
-
- } else if (src_op_size == 4) {
- PrintDebug("Executing 32 bit instruction\n");
-
- switch (op_type) {
- case V3_OP_ADC:
- adc32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_ADD:
- add32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_AND:
- and32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_OR:
- or32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_XOR:
- xor32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SUB:
- sub32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- case V3_OP_INC:
- inc32((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_DEC:
- dec32((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_NEG:
- neg32((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- case V3_OP_MOV:
- mov32((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
-
- case V3_OP_NOT:
- not32((addr_t *)dst_addr);
- break;
- case V3_OP_XCHG:
- xchg32((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
+ default:
+ PrintError("Unknown 16 bit instruction\n");
+ return -1;
+ }
+
+ } else if (src_op_size == 4) {
+ PrintDebug("Executing 32 bit instruction\n");
+
+ switch (op_type) {
+ case V3_OP_ADC:
+ adc32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_ADD:
+ add32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_AND:
+ and32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_OR:
+ or32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_XOR:
+ xor32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SUB:
+ sub32((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ case V3_OP_INC:
+ inc32((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_DEC:
+ dec32((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_NEG:
+ neg32((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ case V3_OP_MOV:
+ mov32((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
+
+ case V3_OP_NOT:
+ not32((addr_t *)dst_addr);
+ break;
+ case V3_OP_XCHG:
+ xchg32((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
- default:
- PrintError("Unknown 32 bit instruction\n");
- return -1;
- }
+ default:
+ PrintError("Unknown 32 bit instruction\n");
+ return -1;
+ }
#ifdef __V3_64BIT__
- } else if (src_op_size == 8) {
- PrintDebug("Executing 64 bit instruction\n");
-
- switch (op_type) {
- case V3_OP_ADC:
- adc64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_ADD:
- add64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_AND:
- and64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_OR:
- or64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_XOR:
- xor64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_SUB:
- sub64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- case V3_OP_INC:
- inc64((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_DEC:
- dec64((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
- case V3_OP_NEG:
- neg64((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
- break;
-
- case V3_OP_MOV:
- mov64((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
-
- case V3_OP_NOT:
- not64((addr_t *)dst_addr);
- break;
- case V3_OP_XCHG:
- xchg64((addr_t *)dst_addr, (addr_t *)src_addr);
- break;
+ } else if (src_op_size == 8) {
+ PrintDebug("Executing 64 bit instruction\n");
+
+ switch (op_type) {
+ case V3_OP_ADC:
+ adc64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_ADD:
+ add64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_AND:
+ and64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_OR:
+ or64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_XOR:
+ xor64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_SUB:
+ sub64((addr_t *)dst_addr, (addr_t *)src_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ case V3_OP_INC:
+ inc64((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_DEC:
+ dec64((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+ case V3_OP_NEG:
+ neg64((addr_t *)dst_addr, (addr_t *)&(info->ctrl_regs.rflags));
+ break;
+
+ case V3_OP_MOV:
+ mov64((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
+
+ case V3_OP_NOT:
+ not64((addr_t *)dst_addr);
+ break;
+ case V3_OP_XCHG:
+ xchg64((addr_t *)dst_addr, (addr_t *)src_addr);
+ break;
- default:
- PrintError("Unknown 64 bit instruction\n");
- return -1;
- }
+ default:
+ PrintError("Unknown 64 bit instruction\n");
+ return -1;
+ }
#endif
- } else {
- PrintError("Invalid Operation Size\n");
- return -1;
- }
+ } else {
+ PrintError("Invalid Operation Size\n");
+ return -1;
+ }
- return 0;
+ return 0;
}
struct hash_entry {
- addr_t key;
- addr_t value;
- uint_t hash;
- struct hash_entry * next;
+ addr_t key;
+ addr_t value;
+ uint_t hash;
+ struct hash_entry * next;
};
struct hashtable {
uint_t do_hash(struct hashtable * htable, addr_t key) {
- /* Aim to protect against poor hash functions by adding logic here
- * - logic taken from java 1.4 hashtable source */
- uint_t i = htable->hash_fn(key);
- i += ~(i << 9);
- i ^= ((i >> 14) | (i << 18)); /* >>> */
- i += (i << 4);
- i ^= ((i >> 10) | (i << 22)); /* >>> */
-
- return i;
+ /* Aim to protect against poor hash functions by adding logic here
+ * - logic taken from java 1.4 hashtable source */
+ uint_t i = htable->hash_fn(key);
+ i += ~(i << 9);
+ i ^= ((i >> 14) | (i << 18)); /* >>> */
+ i += (i << 4);
+ i ^= ((i >> 10) | (i << 22)); /* >>> */
+
+ return i;
}
#endif
ulong_t hash_long(ulong_t val, uint_t bits) {
- ulong_t hash = val;
+ ulong_t hash = val;
#ifdef __V3_64BIT__
- /* Sigh, gcc can't optimise this alone like it does for 32 bits. */
- ulong_t n = hash;
- n <<= 18;
- hash -= n;
- n <<= 33;
- hash -= n;
- n <<= 3;
- hash += n;
- n <<= 3;
- hash -= n;
- n <<= 4;
- hash += n;
- n <<= 2;
- hash += n;
+ /* Sigh, gcc can't optimise this alone like it does for 32 bits. */
+ ulong_t n = hash;
+ n <<= 18;
+ hash -= n;
+ n <<= 33;
+ hash -= n;
+ n <<= 3;
+ hash += n;
+ n <<= 3;
+ hash -= n;
+ n <<= 4;
+ hash += n;
+ n <<= 2;
+ hash += n;
#else
- /* On some cpus multiply is faster, on others gcc will do shifts */
- hash *= GOLDEN_RATIO_PRIME;
+ /* On some cpus multiply is faster, on others gcc will do shifts */
+ hash *= GOLDEN_RATIO_PRIME;
#endif
- /* High bits are more random, so use them. */
- return hash >> (BITS_PER_LONG - bits);
+ /* High bits are more random, so use them. */
+ return hash >> (BITS_PER_LONG - bits);
}
/* HASH GENERIC MEMORY BUFFER */
/* ELF HEADER HASH FUNCTION */
ulong_t hash_buffer(uchar_t * msg, uint_t length) {
- ulong_t hash = 0;
- ulong_t temp = 0;
- uint_t i;
-
- for (i = 0; i < length; i++) {
- hash = (hash << 4) + *(msg + i) + i;
- if ((temp = (hash & 0xF0000000))) {
- hash ^= (temp >> 24);
+ ulong_t hash = 0;
+ ulong_t temp = 0;
+ uint_t i;
+
+ for (i = 0; i < length; i++) {
+ hash = (hash << 4) + *(msg + i) + i;
+ if ((temp = (hash & 0xF0000000))) {
+ hash ^= (temp >> 24);
+ }
+ hash &= ~temp;
}
- hash &= ~temp;
- }
- return hash;
+ return hash;
}
/*****************************************************************************/
/* indexFor */
static inline uint_t indexFor(uint_t table_length, uint_t hash_value) {
- return (hash_value % table_length);
+ return (hash_value % table_length);
};
/* Only works if table_length == 2^N */
static void * tmp_realloc(void * old_ptr, uint_t old_size, uint_t new_size) {
- void * new_buf = V3_Malloc(new_size);
+ void * new_buf = V3_Malloc(new_size);
- if (new_buf == NULL) {
- return NULL;
- }
+ if (new_buf == NULL) {
+ return NULL;
+ }
- memcpy(new_buf, old_ptr, old_size);
- V3_Free(old_ptr);
+ memcpy(new_buf, old_ptr, old_size);
+ V3_Free(old_ptr);
- return new_buf;
+ return new_buf;
}
/*
-Credit for primes table: Aaron Krowne
- http://br.endernet.org/~akrowne/
- http://planetmath.org/encyclopedia/GoodHashTablePrimes.html
+ Credit for primes table: Aaron Krowne
+ http://br.endernet.org/~akrowne/
+ http://planetmath.org/encyclopedia/GoodHashTablePrimes.html
*/
static const uint_t primes[] = {
- 53, 97, 193, 389,
- 769, 1543, 3079, 6151,
- 12289, 24593, 49157, 98317,
- 196613, 393241, 786433, 1572869,
- 3145739, 6291469, 12582917, 25165843,
- 50331653, 100663319, 201326611, 402653189,
- 805306457, 1610612741 };
+ 53, 97, 193, 389,
+ 769, 1543, 3079, 6151,
+ 12289, 24593, 49157, 98317,
+ 196613, 393241, 786433, 1572869,
+ 3145739, 6291469, 12582917, 25165843,
+ 50331653, 100663319, 201326611, 402653189,
+ 805306457, 1610612741 };
const uint_t prime_table_length = sizeof(primes) / sizeof(primes[0]);
/* Check requested hashtable isn't too large */
if (min_size > (1u << 30)) {
- return NULL;
+ return NULL;
}
/* Enforce size as prime */
for (prime_index = 0; prime_index < prime_table_length; prime_index++) {
if (primes[prime_index] > min_size) {
- size = primes[prime_index];
- break;
+ size = primes[prime_index];
+ break;
}
}
htable = (struct hashtable *)V3_Malloc(sizeof(struct hashtable));
if (htable == NULL) {
- return NULL; /*oom*/
+ return NULL; /*oom*/
}
htable->table = (struct hash_entry **)V3_Malloc(sizeof(struct hash_entry*) * size);
if (htable->table == NULL) {
- V3_Free(htable);
- return NULL; /*oom*/
+ V3_Free(htable);
+ return NULL; /*oom*/
}
/* Check we're not hitting max capacity */
if (htable->prime_index == (prime_table_length - 1)) {
- return 0;
+ return 0;
}
new_size = primes[++(htable->prime_index)];
for (i = 0; i < htable->table_length; i++) {
- while ((tmp_entry = htable->table[i]) != NULL) {
- htable->table[i] = tmp_entry->next;
+ while ((tmp_entry = htable->table[i]) != NULL) {
+ htable->table[i] = tmp_entry->next;
- index = indexFor(new_size, tmp_entry->hash);
+ index = indexFor(new_size, tmp_entry->hash);
- tmp_entry->next = new_table[index];
+ tmp_entry->next = new_table[index];
- new_table[index] = tmp_entry;
- }
+ new_table[index] = tmp_entry;
+ }
}
V3_Free(htable->table);
htable->table = new_table;
} else {
- /* Plan B: realloc instead */
+ /* Plan B: realloc instead */
- //new_table = (struct hash_entry **)realloc(htable->table, new_size * sizeof(struct hash_entry *));
- new_table = (struct hash_entry **)tmp_realloc(htable->table, primes[htable->prime_index - 1],
- new_size * sizeof(struct hash_entry *));
+ //new_table = (struct hash_entry **)realloc(htable->table, new_size * sizeof(struct hash_entry *));
+ new_table = (struct hash_entry **)tmp_realloc(htable->table, primes[htable->prime_index - 1],
+ new_size * sizeof(struct hash_entry *));
- if (new_table == NULL) {
- (htable->prime_index)--;
- return 0;
- }
+ if (new_table == NULL) {
+ (htable->prime_index)--;
+ return 0;
+ }
- htable->table = new_table;
+ htable->table = new_table;
- memset(new_table[htable->table_length], 0, new_size - htable->table_length);
+ memset(new_table[htable->table_length], 0, new_size - htable->table_length);
- for (i = 0; i < htable->table_length; i++) {
+ for (i = 0; i < htable->table_length; i++) {
- for (entry_ptr = &(new_table[i]), tmp_entry = *entry_ptr;
- tmp_entry != NULL;
- tmp_entry = *entry_ptr) {
+ for (entry_ptr = &(new_table[i]), tmp_entry = *entry_ptr;
+ tmp_entry != NULL;
+ tmp_entry = *entry_ptr) {
- index = indexFor(new_size, tmp_entry->hash);
+ index = indexFor(new_size, tmp_entry->hash);
- if (i == index) {
- entry_ptr = &(tmp_entry->next);
- } else {
- *entry_ptr = tmp_entry->next;
- tmp_entry->next = new_table[index];
- new_table[index] = tmp_entry;
- }
+ if (i == index) {
+ entry_ptr = &(tmp_entry->next);
+ } else {
+ *entry_ptr = tmp_entry->next;
+ tmp_entry->next = new_table[index];
+ new_table[index] = tmp_entry;
+ }
+ }
}
- }
}
htable->table_length = new_size;
struct hash_entry * new_entry;
if (++(htable->entry_count) > htable->load_limit) {
- /* Ignore the return value. If expand fails, we should
- * still try cramming just this value into the existing table
- * -- we may not have memory for a larger table, but one more
- * element may be ok. Next time we insert, we'll try expanding again.*/
- hashtable_expand(htable);
+ /* Ignore the return value. If expand fails, we should
+ * still try cramming just this value into the existing table
+ * -- we may not have memory for a larger table, but one more
+ * element may be ok. Next time we insert, we'll try expanding again.*/
+ hashtable_expand(htable);
}
new_entry = (struct hash_entry *)V3_Malloc(sizeof(struct hash_entry));
if (new_entry == NULL) {
- (htable->entry_count)--;
- return 0; /*oom*/
+ (htable->entry_count)--;
+ return 0; /*oom*/
}
new_entry->hash = do_hash(htable, key);
/* Check hash value to short circuit heavier comparison */
if ((hash_value == tmp_entry->hash) && (htable->eq_fn(key, tmp_entry->key))) {
- if (free_value) {
- V3_Free((void *)(tmp_entry->value));
- }
+ if (free_value) {
+ V3_Free((void *)(tmp_entry->value));
+ }
- tmp_entry->value = value;
- return -1;
+ tmp_entry->value = value;
+ return -1;
}
tmp_entry = tmp_entry->next;
}
/* Check hash value to short circuit heavier comparison */
if ((hash_value == tmp_entry->hash) && (htable->eq_fn(key, tmp_entry->key))) {
- tmp_entry->value += value;
- return -1;
+ tmp_entry->value += value;
+ return -1;
}
tmp_entry = tmp_entry->next;
}
/* Check hash value to short circuit heavier comparison */
if ((hash_value == tmp_entry->hash) && (htable->eq_fn(key, tmp_entry->key))) {
- tmp_entry->value -= value;
- return -1;
+ tmp_entry->value -= value;
+ return -1;
}
tmp_entry = tmp_entry->next;
}
/*****************************************************************************/
/* returns value associated with key */
addr_t hashtable_search(struct hashtable * htable, addr_t key) {
- struct hash_entry * cursor;
- uint_t hash_value;
- uint_t index;
+ struct hash_entry * cursor;
+ uint_t hash_value;
+ uint_t index;
- hash_value = do_hash(htable, key);
+ hash_value = do_hash(htable, key);
- index = indexFor(htable->table_length, hash_value);
+ index = indexFor(htable->table_length, hash_value);
- cursor = htable->table[index];
+ cursor = htable->table[index];
- while (cursor != NULL) {
- /* Check hash value to short circuit heavier comparison */
- if ((hash_value == cursor->hash) &&
- (htable->eq_fn(key, cursor->key))) {
- return cursor->value;
- }
+ while (cursor != NULL) {
+ /* Check hash value to short circuit heavier comparison */
+ if ((hash_value == cursor->hash) &&
+ (htable->eq_fn(key, cursor->key))) {
+ return cursor->value;
+ }
- cursor = cursor->next;
- }
+ cursor = cursor->next;
+ }
- return (addr_t)NULL;
+ return (addr_t)NULL;
}
/*****************************************************************************/
/* returns value associated with key */
addr_t hashtable_remove(struct hashtable * htable, addr_t key, int free_key) {
- /* TODO: consider compacting the table when the load factor drops enough,
- * or provide a 'compact' method. */
+ /* TODO: consider compacting the table when the load factor drops enough,
+ * or provide a 'compact' method. */
- struct hash_entry * cursor;
- struct hash_entry ** entry_ptr;
- addr_t value;
- uint_t hash_value;
- uint_t index;
+ struct hash_entry * cursor;
+ struct hash_entry ** entry_ptr;
+ addr_t value;
+ uint_t hash_value;
+ uint_t index;
- hash_value = do_hash(htable, key);
+ hash_value = do_hash(htable, key);
- index = indexFor(htable->table_length, hash_value);
+ index = indexFor(htable->table_length, hash_value);
- entry_ptr = &(htable->table[index]);
- cursor = *entry_ptr;
+ entry_ptr = &(htable->table[index]);
+ cursor = *entry_ptr;
- while (cursor != NULL) {
- /* Check hash value to short circuit heavier comparison */
- if ((hash_value == cursor->hash) &&
- (htable->eq_fn(key, cursor->key))) {
+ while (cursor != NULL) {
+ /* Check hash value to short circuit heavier comparison */
+ if ((hash_value == cursor->hash) &&
+ (htable->eq_fn(key, cursor->key))) {
- *entry_ptr = cursor->next;
- htable->entry_count--;
- value = cursor->value;
+ *entry_ptr = cursor->next;
+ htable->entry_count--;
+ value = cursor->value;
- if (free_key) {
- freekey((void *)(cursor->key));
- }
- V3_Free(cursor);
+ if (free_key) {
+ freekey((void *)(cursor->key));
+ }
+ V3_Free(cursor);
- return value;
- }
+ return value;
+ }
- entry_ptr = &(cursor->next);
- cursor = cursor->next;
- }
- return (addr_t)NULL;
+ entry_ptr = &(cursor->next);
+ cursor = cursor->next;
+ }
+ return (addr_t)NULL;
}
/*****************************************************************************/
/* destroy */
void hashtable_destroy(struct hashtable * htable, int free_values, int free_keys) {
- uint_t i;
- struct hash_entry * cursor;;
- struct hash_entry **table = htable->table;
+ uint_t i;
+ struct hash_entry * cursor;;
+ struct hash_entry **table = htable->table;
- if (free_values) {
- for (i = 0; i < htable->table_length; i++) {
- cursor = table[i];
+ if (free_values) {
+ for (i = 0; i < htable->table_length; i++) {
+ cursor = table[i];
- while (cursor != NULL) {
- struct hash_entry * tmp;
-
- tmp = cursor;
- cursor = cursor->next;
-
- if (free_keys) {
- freekey((void *)(tmp->key));
+ while (cursor != NULL) {
+ struct hash_entry * tmp;
+
+ tmp = cursor;
+ cursor = cursor->next;
+
+ if (free_keys) {
+ freekey((void *)(tmp->key));
+ }
+ V3_Free((void *)(tmp->value));
+ V3_Free(tmp);
+ }
}
- V3_Free((void *)(tmp->value));
- V3_Free(tmp);
- }
- }
- } else {
- for (i = 0; i < htable->table_length; i++) {
- cursor = table[i];
+ } else {
+ for (i = 0; i < htable->table_length; i++) {
+ cursor = table[i];
- while (cursor != NULL) {
- struct hash_entry * tmp;
+ while (cursor != NULL) {
+ struct hash_entry * tmp;
- tmp = cursor;
- cursor = cursor->next;
+ tmp = cursor;
+ cursor = cursor->next;
- if (free_keys) {
- freekey((void *)(tmp->key));
+ if (free_keys) {
+ freekey((void *)(tmp->key));
+ }
+ V3_Free(tmp);
+ }
}
- V3_Free(tmp);
- }
}
- }
- V3_Free(htable->table);
- V3_Free(htable);
+ V3_Free(htable->table);
+ V3_Free(htable);
}
struct hashtable_iter * create_hashtable_iterator(struct hashtable * htable) {
- uint_t i;
- uint_t table_length;
+ uint_t i;
+ uint_t table_length;
- struct hashtable_iter * iter = (struct hashtable_iter *)V3_Malloc(sizeof(struct hashtable_iter));
+ struct hashtable_iter * iter = (struct hashtable_iter *)V3_Malloc(sizeof(struct hashtable_iter));
- if (iter == NULL) {
- return NULL;
- }
+ if (iter == NULL) {
+ return NULL;
+ }
- iter->htable = htable;
- iter->entry = NULL;
- iter->parent = NULL;
- table_length = htable->table_length;
- iter->index = table_length;
+ iter->htable = htable;
+ iter->entry = NULL;
+ iter->parent = NULL;
+ table_length = htable->table_length;
+ iter->index = table_length;
- if (htable->entry_count == 0) {
- return iter;
- }
+ if (htable->entry_count == 0) {
+ return iter;
+ }
- for (i = 0; i < table_length; i++) {
- if (htable->table[i] != NULL) {
- iter->entry = htable->table[i];
- iter->index = i;
- break;
+ for (i = 0; i < table_length; i++) {
+ if (htable->table[i] != NULL) {
+ iter->entry = htable->table[i];
+ iter->index = i;
+ break;
+ }
}
- }
- return iter;
+ return iter;
}
addr_t hashtable_get_iter_key(struct hashtable_iter * iter) {
- return iter->entry->key;
+ return iter->entry->key;
}
addr_t hashtable_get_iter_value(struct hashtable_iter * iter) {
- return iter->entry->value;
+ return iter->entry->value;
}
/* advance - advance the iterator to the next element
* returns zero if advanced to end of table */
int hashtable_iterator_advance(struct hashtable_iter * iter) {
- uint_t j;
- uint_t table_length;
- struct hash_entry ** table;
- struct hash_entry * next;
+ uint_t j;
+ uint_t table_length;
+ struct hash_entry ** table;
+ struct hash_entry * next;
- if (iter->entry == NULL) {
- return 0; /* stupidity check */
- }
+ if (iter->entry == NULL) {
+ return 0; /* stupidity check */
+ }
- next = iter->entry->next;
+ next = iter->entry->next;
- if (next != NULL) {
- iter->parent = iter->entry;
- iter->entry = next;
- return -1;
- }
+ if (next != NULL) {
+ iter->parent = iter->entry;
+ iter->entry = next;
+ return -1;
+ }
- table_length = iter->htable->table_length;
- iter->parent = NULL;
+ table_length = iter->htable->table_length;
+ iter->parent = NULL;
- if (table_length <= (j = ++(iter->index))) {
- iter->entry = NULL;
- return 0;
- }
+ if (table_length <= (j = ++(iter->index))) {
+ iter->entry = NULL;
+ return 0;
+ }
- table = iter->htable->table;
+ table = iter->htable->table;
- while ((next = table[j]) == NULL) {
- if (++j >= table_length) {
- iter->index = table_length;
- iter->entry = NULL;
- return 0;
+ while ((next = table[j]) == NULL) {
+ if (++j >= table_length) {
+ iter->index = table_length;
+ iter->entry = NULL;
+ return 0;
+ }
}
- }
- iter->index = j;
- iter->entry = next;
+ iter->index = j;
+ iter->entry = next;
- return -1;
+ return -1;
}
* beware memory leaks if you don't.
* Returns zero if end of iteration. */
int hashtable_iterator_remove(struct hashtable_iter * iter, int free_key) {
- struct hash_entry * remember_entry;
- struct hash_entry * remember_parent;
- int ret;
-
- /* Do the removal */
- if ((iter->parent) == NULL) {
- /* element is head of a chain */
- iter->htable->table[iter->index] = iter->entry->next;
- } else {
- /* element is mid-chain */
- iter->parent->next = iter->entry->next;
- }
+ struct hash_entry * remember_entry;
+ struct hash_entry * remember_parent;
+ int ret;
+
+ /* Do the removal */
+ if ((iter->parent) == NULL) {
+ /* element is head of a chain */
+ iter->htable->table[iter->index] = iter->entry->next;
+ } else {
+ /* element is mid-chain */
+ iter->parent->next = iter->entry->next;
+ }
- /* itr->e is now outside the hashtable */
- remember_entry = iter->entry;
- iter->htable->entry_count--;
- if (free_key) {
- freekey((void *)(remember_entry->key));
- }
+ /* itr->e is now outside the hashtable */
+ remember_entry = iter->entry;
+ iter->htable->entry_count--;
+ if (free_key) {
+ freekey((void *)(remember_entry->key));
+ }
- /* Advance the iterator, correcting the parent */
- remember_parent = iter->parent;
- ret = hashtable_iterator_advance(iter);
+ /* Advance the iterator, correcting the parent */
+ remember_parent = iter->parent;
+ ret = hashtable_iterator_advance(iter);
- if (iter->parent == remember_entry) {
- iter->parent = remember_parent;
- }
+ if (iter->parent == remember_entry) {
+ iter->parent = remember_parent;
+ }
- V3_Free(remember_entry);
- return ret;
+ V3_Free(remember_entry);
+ return ret;
}
/* returns zero if not found */
int hashtable_iterator_search(struct hashtable_iter * iter,
struct hashtable * htable, addr_t key) {
- struct hash_entry * entry;
- struct hash_entry * parent;
- uint_t hash_value;
- uint_t index;
+ struct hash_entry * entry;
+ struct hash_entry * parent;
+ uint_t hash_value;
+ uint_t index;
- hash_value = do_hash(htable, key);
- index = indexFor(htable->table_length, hash_value);
+ hash_value = do_hash(htable, key);
+ index = indexFor(htable->table_length, hash_value);
- entry = htable->table[index];
- parent = NULL;
+ entry = htable->table[index];
+ parent = NULL;
- while (entry != NULL) {
- /* Check hash value to short circuit heavier comparison */
- if ((hash_value == entry->hash) &&
- (htable->eq_fn(key, entry->key))) {
- iter->index = index;
- iter->entry = entry;
- iter->parent = parent;
- iter->htable = htable;
- return -1;
+ while (entry != NULL) {
+ /* Check hash value to short circuit heavier comparison */
+ if ((hash_value == entry->hash) &&
+ (htable->eq_fn(key, entry->key))) {
+ iter->index = index;
+ iter->entry = entry;
+ iter->parent = parent;
+ iter->htable = htable;
+ return -1;
+ }
+ parent = entry;
+ entry = entry->next;
}
- parent = entry;
- entry = entry->next;
- }
- return 0;
+ return 0;
}
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
+ */
int v3_init_host_events(struct guest_info * info) {
- struct v3_host_events * host_evts = &(info->host_event_hooks);
+ struct v3_host_events * host_evts = &(info->host_event_hooks);
- INIT_LIST_HEAD(&(host_evts->keyboard_events));
- INIT_LIST_HEAD(&(host_evts->mouse_events));
- INIT_LIST_HEAD(&(host_evts->timer_events));
+ INIT_LIST_HEAD(&(host_evts->keyboard_events));
+ INIT_LIST_HEAD(&(host_evts->mouse_events));
+ INIT_LIST_HEAD(&(host_evts->timer_events));
- return 0;
+ return 0;
}
union v3_host_event_handler cb,
void * private_data) {
- struct v3_host_events * host_evts = &(info->host_event_hooks);
- struct v3_host_event_hook * hook = NULL;
-
- hook = (struct v3_host_event_hook *)V3_Malloc(sizeof(struct v3_host_event_hook));
- if (hook == NULL) {
- PrintError("Could not allocate event hook\n");
- return -1;
- }
-
- hook->cb = cb;
- hook->private_data = private_data;
-
- switch (event_type) {
- case HOST_KEYBOARD_EVT:
- list_add(&(hook->link), &(host_evts->keyboard_events));
- break;
- case HOST_MOUSE_EVT:
- list_add(&(hook->link), &(host_evts->mouse_events));
- break;
- case HOST_TIMER_EVT:
- list_add(&(hook->link), &(host_evts->timer_events));
- break;
- }
-
- return 0;
+ struct v3_host_events * host_evts = &(info->host_event_hooks);
+ struct v3_host_event_hook * hook = NULL;
+
+ hook = (struct v3_host_event_hook *)V3_Malloc(sizeof(struct v3_host_event_hook));
+ if (hook == NULL) {
+ PrintError("Could not allocate event hook\n");
+ return -1;
+ }
+
+ hook->cb = cb;
+ hook->private_data = private_data;
+
+ switch (event_type) {
+ case HOST_KEYBOARD_EVT:
+ list_add(&(hook->link), &(host_evts->keyboard_events));
+ break;
+ case HOST_MOUSE_EVT:
+ list_add(&(hook->link), &(host_evts->mouse_events));
+ break;
+ case HOST_TIMER_EVT:
+ list_add(&(hook->link), &(host_evts->timer_events));
+ break;
+ }
+
+ return 0;
}
int v3_deliver_keyboard_event(struct guest_info * info,
struct v3_keyboard_event * evt) {
- struct v3_host_events * host_evts = &(info->host_event_hooks);
- struct v3_host_event_hook * hook = NULL;
+ struct v3_host_events * host_evts = &(info->host_event_hooks);
+ struct v3_host_event_hook * hook = NULL;
- list_for_each_entry(hook, &(host_evts->keyboard_events), link) {
- if (hook->cb.keyboard_handler(info, evt, hook->private_data) == -1) {
- return -1;
+ list_for_each_entry(hook, &(host_evts->keyboard_events), link) {
+ if (hook->cb.keyboard_handler(info, evt, hook->private_data) == -1) {
+ return -1;
+ }
}
- }
- return 0;
+ return 0;
}
int v3_deliver_mouse_event(struct guest_info * info,
struct v3_mouse_event * evt) {
- struct v3_host_events * host_evts = &(info->host_event_hooks);
- struct v3_host_event_hook * hook = NULL;
+ struct v3_host_events * host_evts = &(info->host_event_hooks);
+ struct v3_host_event_hook * hook = NULL;
- list_for_each_entry(hook, &(host_evts->mouse_events), link) {
- if (hook->cb.mouse_handler(info, evt, hook->private_data) == -1) {
- return -1;
+ list_for_each_entry(hook, &(host_evts->mouse_events), link) {
+ if (hook->cb.mouse_handler(info, evt, hook->private_data) == -1) {
+ return -1;
+ }
}
- }
- return 0;
+ return 0;
}
int v3_deliver_timer_event(struct guest_info * info,
struct v3_timer_event * evt) {
- struct v3_host_events * host_evts = &(info->host_event_hooks);
- struct v3_host_event_hook * hook = NULL;
+ struct v3_host_events * host_evts = &(info->host_event_hooks);
+ struct v3_host_event_hook * hook = NULL;
- list_for_each_entry(hook, &(host_evts->timer_events), link) {
- if (hook->cb.timer_handler(info, evt, hook->private_data) == -1) {
- return -1;
+ list_for_each_entry(hook, &(host_evts->timer_events), link) {
+ if (hook->cb.timer_handler(info, evt, hook->private_data) == -1) {
+ return -1;
+ }
}
- }
- return 0;
+ return 0;
}
void v3_init_hypercall_map(struct guest_info * info) {
- info->hcall_map.rb_node = NULL;
+ info->hcall_map.rb_node = NULL;
}
struct hypercall {
- uint_t id;
+ uint_t id;
- int (*hcall_fn)(struct guest_info * info, uint_t hcall_id, void * priv_data);
- void * priv_data;
+ int (*hcall_fn)(struct guest_info * info, uint_t hcall_id, void * priv_data);
+ void * priv_data;
- struct rb_node tree_node;
+ struct rb_node tree_node;
};
static inline struct hypercall * __insert_hypercall(struct guest_info * info, struct hypercall * hcall) {
- struct rb_node ** p = &(info->hcall_map.rb_node);
- struct rb_node * parent = NULL;
- struct hypercall * tmp_hcall = NULL;
-
- while (*p) {
- parent = *p;
- tmp_hcall = rb_entry(parent, struct hypercall, tree_node);
-
- if (hcall->id < tmp_hcall->id) {
- p = &(*p)->rb_left;
- } else if (hcall->id > tmp_hcall->id) {
- p = &(*p)->rb_right;
- } else {
- return tmp_hcall;
+ struct rb_node ** p = &(info->hcall_map.rb_node);
+ struct rb_node * parent = NULL;
+ struct hypercall * tmp_hcall = NULL;
+
+ while (*p) {
+ parent = *p;
+ tmp_hcall = rb_entry(parent, struct hypercall, tree_node);
+
+ if (hcall->id < tmp_hcall->id) {
+ p = &(*p)->rb_left;
+ } else if (hcall->id > tmp_hcall->id) {
+ p = &(*p)->rb_right;
+ } else {
+ return tmp_hcall;
+ }
}
- }
- rb_link_node(&(hcall->tree_node), parent, p);
+ rb_link_node(&(hcall->tree_node), parent, p);
- return NULL;
+ return NULL;
}
static inline struct hypercall * insert_hypercall(struct guest_info * info, struct hypercall * hcall) {
- struct hypercall * ret;
+ struct hypercall * ret;
- if ((ret = __insert_hypercall(info, hcall))) {
- return ret;
- }
+ if ((ret = __insert_hypercall(info, hcall))) {
+ return ret;
+ }
- v3_rb_insert_color(&(hcall->tree_node), &(info->hcall_map));
+ v3_rb_insert_color(&(hcall->tree_node), &(info->hcall_map));
- return NULL;
+ return NULL;
}
static struct hypercall * get_hypercall(struct guest_info * info, uint_t id) {
- struct rb_node * n = info->hcall_map.rb_node;
- struct hypercall * hcall = NULL;
+ struct rb_node * n = info->hcall_map.rb_node;
+ struct hypercall * hcall = NULL;
- while (n) {
- hcall = rb_entry(n, struct hypercall, tree_node);
+ while (n) {
+ hcall = rb_entry(n, struct hypercall, tree_node);
- if (id < hcall->id) {
- n = n->rb_left;
- } else if (id > hcall->id) {
- n = n->rb_right;
- } else {
- return hcall;
+ if (id < hcall->id) {
+ n = n->rb_left;
+ } else if (id > hcall->id) {
+ n = n->rb_right;
+ } else {
+ return hcall;
+ }
}
- }
- return NULL;
+ return NULL;
}
int (*hypercall)(struct guest_info * info, uint_t hcall_id, void * priv_data),
void * priv_data) {
- struct hypercall * hcall = (struct hypercall *)V3_Malloc(sizeof(struct hypercall));
+ struct hypercall * hcall = (struct hypercall *)V3_Malloc(sizeof(struct hypercall));
- hcall->id = hypercall_id;
- hcall->priv_data = priv_data;
- hcall->hcall_fn = hypercall;
+ hcall->id = hypercall_id;
+ hcall->priv_data = priv_data;
+ hcall->hcall_fn = hypercall;
- if (insert_hypercall(info, hcall)) {
- V3_Free(hcall);
- return -1;
- }
+ if (insert_hypercall(info, hcall)) {
+ V3_Free(hcall);
+ return -1;
+ }
- return 0;
+ return 0;
}
int v3_handle_hypercall(struct guest_info * info) {
- uint_t hypercall_id = *(uint_t *)&info->vm_regs.rax;
+ uint_t hypercall_id = *(uint_t *)&info->vm_regs.rax;
- struct hypercall * hcall = get_hypercall(info, hypercall_id);
+ struct hypercall * hcall = get_hypercall(info, hypercall_id);
- if (!hcall) {
- PrintError("Invalid Hypercall (%d not registered)\n", hypercall_id);
- return -1;
- }
+ if (!hcall) {
+ PrintError("Invalid Hypercall (%d not registered)\n", hypercall_id);
+ return -1;
+ }
- return hcall->hcall_fn(info, hypercall_id, hcall->priv_data);
+ return hcall->hcall_fn(info, hypercall_id, hcall->priv_data);
}
static struct v3_ringbuf * func_ring = NULL;
struct instrumented_func {
- ullong_t time;
- uint_t exiting;
- void * called_fn;
- void * calling_fn;
+ ullong_t time;
+ uint_t exiting;
+ void * called_fn;
+ void * calling_fn;
} __attribute__((packed));
void __cyg_profile_func_exit(void * this, void * callsite) __attribute__((__no_instrument_function__));
void v3_init_instrumentation() {
- PrintDebug("Creating Ring Buffer (unit size = %d)\n", (uint_t)sizeof(struct instrumented_func));
- // initialize
- func_ring = v3_create_ringbuf(sizeof(struct instrumented_func) * RING_SIZE); //dequeue at every 4095
+ PrintDebug("Creating Ring Buffer (unit size = %d)\n", (uint_t)sizeof(struct instrumented_func));
+ // initialize
+ func_ring = v3_create_ringbuf(sizeof(struct instrumented_func) * RING_SIZE); //dequeue at every 4095
}
- __attribute__((__no_instrument_function__))
-void __cyg_profile_func_enter(void * this, void * callsite) {
+__attribute__((__no_instrument_function__))
+ void __cyg_profile_func_enter(void * this, void * callsite) {
- if (func_ring != NULL) {
+ if (func_ring != NULL) {
- struct instrumented_func tmp_fn;
- ullong_t now = 0;
+ struct instrumented_func tmp_fn;
+ ullong_t now = 0;
- rdtscll(now);
+ rdtscll(now);
- //PrintDebug("Entering Function\n");
+ //PrintDebug("Entering Function\n");
- if (v3_ringbuf_avail_space(func_ring) < sizeof(struct instrumented_func)) {
- print_instrumentation();
- }
+ if (v3_ringbuf_avail_space(func_ring) < sizeof(struct instrumented_func)) {
+ print_instrumentation();
+ }
- tmp_fn.time = now - last; // current tsc
- tmp_fn.exiting = 0; //enter to be 0
- tmp_fn.called_fn = this; //this
- tmp_fn.calling_fn = callsite; //callsite
+ tmp_fn.time = now - last; // current tsc
+ tmp_fn.exiting = 0; //enter to be 0
+ tmp_fn.called_fn = this; //this
+ tmp_fn.calling_fn = callsite; //callsite
- // PrintDebug("Writing Function: fn_data=%p, size=%d\n",
- // (void *)&tmp_fn, (uint_t)sizeof(struct instrumented_func));
- v3_ringbuf_write(func_ring, (uchar_t *)&tmp_fn, sizeof(struct instrumented_func));
+ // PrintDebug("Writing Function: fn_data=%p, size=%d\n",
+ // (void *)&tmp_fn, (uint_t)sizeof(struct instrumented_func));
+ v3_ringbuf_write(func_ring, (uchar_t *)&tmp_fn, sizeof(struct instrumented_func));
- rdtscll(last);
- }
+ rdtscll(last);
+ }
}
- __attribute__((__no_instrument_function__))
-void __cyg_profile_func_exit(void * this, void * callsite){
+__attribute__((__no_instrument_function__))
+ void __cyg_profile_func_exit(void * this, void * callsite){
- if (func_ring != NULL) {
+ if (func_ring != NULL) {
- struct instrumented_func tmp_fn;
- ullong_t now = 0;
+ struct instrumented_func tmp_fn;
+ ullong_t now = 0;
- rdtscll(now);
+ rdtscll(now);
- // PrintDebug("Exiting Function\n");
+ // PrintDebug("Exiting Function\n");
- if (v3_ringbuf_avail_space(func_ring) < sizeof(struct instrumented_func)) {
- print_instrumentation();
- }
+ if (v3_ringbuf_avail_space(func_ring) < sizeof(struct instrumented_func)) {
+ print_instrumentation();
+ }
- tmp_fn.time = now - last; // current tsc
- tmp_fn.exiting = 1; //exit to be 0
- tmp_fn.called_fn = this; //this
- tmp_fn.calling_fn = callsite; //callsite
-
- // PrintDebug("Writing Function: fn_data=%p, size=%d\n",
- // (void *)&tmp_fn, (uint_t)sizeof(struct instrumented_func));
- v3_ringbuf_write(func_ring, (uchar_t *)&tmp_fn, sizeof(struct instrumented_func));
+ tmp_fn.time = now - last; // current tsc
+ tmp_fn.exiting = 1; //exit to be 0
+ tmp_fn.called_fn = this; //this
+ tmp_fn.calling_fn = callsite; //callsite
+
+ // PrintDebug("Writing Function: fn_data=%p, size=%d\n",
+ // (void *)&tmp_fn, (uint_t)sizeof(struct instrumented_func));
+ v3_ringbuf_write(func_ring, (uchar_t *)&tmp_fn, sizeof(struct instrumented_func));
- rdtscll(last);
- }
+ rdtscll(last);
+ }
}
static void print_instrumentation() {
- struct instrumented_func tmp_fn;
+ struct instrumented_func tmp_fn;
- // PrintDebug("Printing Instrumentation\n");
- while (v3_ringbuf_data_len(func_ring) >= sizeof(struct instrumented_func)) {
+ // PrintDebug("Printing Instrumentation\n");
+ while (v3_ringbuf_data_len(func_ring) >= sizeof(struct instrumented_func)) {
- v3_ringbuf_read(func_ring, (uchar_t *)&tmp_fn, sizeof(struct instrumented_func));
+ v3_ringbuf_read(func_ring, (uchar_t *)&tmp_fn, sizeof(struct instrumented_func));
- PrintDebug("CYG_PROF: %d %p %p %p\n",
- tmp_fn.exiting,
- (void *)(addr_t)(tmp_fn.time),
- tmp_fn.called_fn,
- tmp_fn.calling_fn);
- }
+ PrintDebug("CYG_PROF: %d %p %p %p\n",
+ tmp_fn.exiting,
+ (void *)(addr_t)(tmp_fn.time),
+ tmp_fn.called_fn,
+ tmp_fn.calling_fn);
+ }
}
struct intr_controller {
- struct intr_ctrl_ops * ctrl_ops;
+ struct intr_ctrl_ops * ctrl_ops;
- void * priv_data;
- struct list_head ctrl_node;
+ void * priv_data;
+ struct list_head ctrl_node;
};
void v3_init_interrupt_state(struct guest_info * info) {
- info->intr_state.excp_pending = 0;
- info->intr_state.excp_num = 0;
- info->intr_state.excp_error_code = 0;
+ info->intr_state.excp_pending = 0;
+ info->intr_state.excp_num = 0;
+ info->intr_state.excp_error_code = 0;
- INIT_LIST_HEAD(&(info->intr_state.controller_list));
+ INIT_LIST_HEAD(&(info->intr_state.controller_list));
- memset((uchar_t *)(info->intr_state.hooks), 0, sizeof(struct v3_irq_hook *) * 256);
+ memset((uchar_t *)(info->intr_state.hooks), 0, sizeof(struct v3_irq_hook *) * 256);
}
void v3_register_intr_controller(struct guest_info * info, struct intr_ctrl_ops * ops, void * state) {
- struct intr_controller * ctrlr = (struct intr_controller *)V3_Malloc(sizeof(struct intr_controller));
+ struct intr_controller * ctrlr = (struct intr_controller *)V3_Malloc(sizeof(struct intr_controller));
- ctrlr->priv_data = state;
- ctrlr->ctrl_ops = ops;
+ ctrlr->priv_data = state;
+ ctrlr->ctrl_ops = ops;
- list_add(&(ctrlr->ctrl_node), &(info->intr_state.controller_list));
+ list_add(&(ctrlr->ctrl_node), &(info->intr_state.controller_list));
}
static inline struct v3_irq_hook * get_irq_hook(struct guest_info * info, uint_t irq) {
- V3_ASSERT(irq <= 256);
- return info->intr_state.hooks[irq];
+ V3_ASSERT(irq <= 256);
+ return info->intr_state.hooks[irq];
}
int (*handler)(struct guest_info * info, struct v3_interrupt * intr, void * priv_data),
void * priv_data)
{
- struct v3_irq_hook * hook = (struct v3_irq_hook *)V3_Malloc(sizeof(struct v3_irq_hook));
+ struct v3_irq_hook * hook = (struct v3_irq_hook *)V3_Malloc(sizeof(struct v3_irq_hook));
- if (hook == NULL) {
- return -1;
- }
+ if (hook == NULL) {
+ return -1;
+ }
- if (get_irq_hook(info, irq) != NULL) {
- PrintError("IRQ %d already hooked\n", irq);
- return -1;
- }
+ if (get_irq_hook(info, irq) != NULL) {
+ PrintError("IRQ %d already hooked\n", irq);
+ return -1;
+ }
- hook->handler = handler;
- hook->priv_data = priv_data;
+ hook->handler = handler;
+ hook->priv_data = priv_data;
- info->intr_state.hooks[irq] = hook;
-
- if (V3_Hook_Interrupt(info, irq)) {
- PrintError("hook_irq: failed to hook irq %d\n", irq);
- return -1;
- } else {
- PrintDebug("hook_irq: hooked irq %d\n", irq);
- return 0;
- }
+ info->intr_state.hooks[irq] = hook;
+
+ if (V3_Hook_Interrupt(info, irq)) {
+ PrintError("hook_irq: failed to hook irq %d\n", irq);
+ return -1;
+ } else {
+ PrintDebug("hook_irq: hooked irq %d\n", irq);
+ return 0;
+ }
}
static int passthrough_irq_handler(struct guest_info * info, struct v3_interrupt * intr, void * priv_data)
{
- PrintDebug("[passthrough_irq_handler] raise_irq=%d (guest=0x%p)\n",
- intr->irq, (void *)info);
- return v3_raise_irq(info, intr->irq);
+ PrintDebug("[passthrough_irq_handler] raise_irq=%d (guest=0x%p)\n",
+ intr->irq, (void *)info);
+ return v3_raise_irq(info, intr->irq);
}
int v3_hook_passthrough_irq(struct guest_info * info, uint_t irq)
{
- int rc = v3_hook_irq(info, irq, passthrough_irq_handler, NULL);
+ int rc = v3_hook_irq(info, irq, passthrough_irq_handler, NULL);
- if (rc) {
- PrintError("guest_irq_injection: failed to hook irq 0x%x (guest=0x%p)\n", irq, (void *)info);
- return -1;
- } else {
- PrintDebug("guest_irq_injection: hooked irq 0x%x (guest=0x%p)\n", irq, (void *)info);
- return 0;
- }
+ if (rc) {
+ PrintError("guest_irq_injection: failed to hook irq 0x%x (guest=0x%p)\n", irq, (void *)info);
+ return -1;
+ } else {
+ PrintDebug("guest_irq_injection: hooked irq 0x%x (guest=0x%p)\n", irq, (void *)info);
+ return 0;
+ }
}
int v3_deliver_irq(struct guest_info * info, struct v3_interrupt * intr) {
- PrintDebug("v3_deliver_irq: irq=%d state=0x%p, \n", intr->irq, (void *)intr);
+ PrintDebug("v3_deliver_irq: irq=%d state=0x%p, \n", intr->irq, (void *)intr);
- struct v3_irq_hook * hook = get_irq_hook(info, intr->irq);
+ struct v3_irq_hook * hook = get_irq_hook(info, intr->irq);
- if (hook == NULL) {
- PrintError("Attempting to deliver interrupt to non registered hook(irq=%d)\n", intr->irq);
- return -1;
- }
+ if (hook == NULL) {
+ PrintError("Attempting to deliver interrupt to non registered hook(irq=%d)\n", intr->irq);
+ return -1;
+ }
- return hook->handler(info, intr, hook->priv_data);
+ return hook->handler(info, intr, hook->priv_data);
}
int v3_raise_exception_with_error(struct guest_info * info, uint_t excp, uint_t error_code) {
- struct v3_intr_state * intr_state = &(info->intr_state);
-
- if (intr_state->excp_pending == 0) {
- intr_state->excp_pending = 1;
- intr_state->excp_num = excp;
- intr_state->excp_error_code = error_code;
- intr_state->excp_error_code_valid = 1;
- PrintDebug("[v3_raise_exception_with_error] error code: %x\n", error_code);
- } else {
- PrintError("exception already pending, currently not implemented\n");
- return -1;
- }
-
- return 0;
+ struct v3_intr_state * intr_state = &(info->intr_state);
+
+ if (intr_state->excp_pending == 0) {
+ intr_state->excp_pending = 1;
+ intr_state->excp_num = excp;
+ intr_state->excp_error_code = error_code;
+ intr_state->excp_error_code_valid = 1;
+ PrintDebug("[v3_raise_exception_with_error] error code: %x\n", error_code);
+ } else {
+ PrintError("exception already pending, currently not implemented\n");
+ return -1;
+ }
+
+ return 0;
}
int v3_raise_exception(struct guest_info * info, uint_t excp) {
- struct v3_intr_state * intr_state = &(info->intr_state);
- PrintDebug("[v3_raise_exception]\n");
- if (intr_state->excp_pending == 0) {
- intr_state->excp_pending = 1;
- intr_state->excp_num = excp;
- intr_state->excp_error_code = 0;
- intr_state->excp_error_code_valid = 0;
- } else {
- PrintError("exception already pending, currently not implemented\n");
- return -1;
- }
-
- return 0;
+ struct v3_intr_state * intr_state = &(info->intr_state);
+ PrintDebug("[v3_raise_exception]\n");
+ if (intr_state->excp_pending == 0) {
+ intr_state->excp_pending = 1;
+ intr_state->excp_num = excp;
+ intr_state->excp_error_code = 0;
+ intr_state->excp_error_code_valid = 0;
+ } else {
+ PrintError("exception already pending, currently not implemented\n");
+ return -1;
+ }
+
+ return 0;
}
int v3_lower_irq(struct guest_info * info, int irq) {
- struct intr_controller * ctrl = NULL;
- struct v3_intr_state * intr_state = &(info->intr_state);
+ struct intr_controller * ctrl = NULL;
+ struct v3_intr_state * intr_state = &(info->intr_state);
- PrintDebug("[v3_lower_irq]\n");
+ PrintDebug("[v3_lower_irq]\n");
- list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
- ctrl->ctrl_ops->lower_intr(ctrl->priv_data, irq);
- }
+ list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
+ ctrl->ctrl_ops->lower_intr(ctrl->priv_data, irq);
+ }
- return 0;
+ return 0;
}
int v3_raise_irq(struct guest_info * info, int irq) {
- struct intr_controller * ctrl = NULL;
- struct v3_intr_state * intr_state = &(info->intr_state);
+ struct intr_controller * ctrl = NULL;
+ struct v3_intr_state * intr_state = &(info->intr_state);
- PrintDebug("[v3_raise_irq (%d)]\n", irq);
+ PrintDebug("[v3_raise_irq (%d)]\n", irq);
- list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
- ctrl->ctrl_ops->raise_intr(ctrl->priv_data, irq);
- }
+ list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
+ ctrl->ctrl_ops->raise_intr(ctrl->priv_data, irq);
+ }
- return 0;
+ return 0;
}
int v3_intr_pending(struct guest_info * info) {
- struct v3_intr_state * intr_state = &(info->intr_state);
+ struct v3_intr_state * intr_state = &(info->intr_state);
- // PrintDebug("[intr_pending]\n");
- if (intr_state->excp_pending == 1) {
- return 1;
- } else {
- struct intr_controller * ctrl = NULL;
-
- list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
- if (ctrl->ctrl_ops->intr_pending(ctrl->priv_data) == 1) {
+ // PrintDebug("[intr_pending]\n");
+ if (intr_state->excp_pending == 1) {
return 1;
- }
+ } else {
+ struct intr_controller * ctrl = NULL;
+
+ list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
+ if (ctrl->ctrl_ops->intr_pending(ctrl->priv_data) == 1) {
+ return 1;
+ }
+ }
}
- }
- return 0;
+ return 0;
}
uint_t v3_get_intr_number(struct guest_info * info) {
- struct v3_intr_state * intr_state = &(info->intr_state);
+ struct v3_intr_state * intr_state = &(info->intr_state);
- if (intr_state->excp_pending == 1) {
- return intr_state->excp_num;
- } else {
- struct intr_controller * ctrl = NULL;
+ if (intr_state->excp_pending == 1) {
+ return intr_state->excp_num;
+ } else {
+ struct intr_controller * ctrl = NULL;
- list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
- if (ctrl->ctrl_ops->intr_pending(ctrl->priv_data)) {
- uint_t intr_num = ctrl->ctrl_ops->get_intr_number(ctrl->priv_data);
+ list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
+ if (ctrl->ctrl_ops->intr_pending(ctrl->priv_data)) {
+ uint_t intr_num = ctrl->ctrl_ops->get_intr_number(ctrl->priv_data);
- PrintDebug("[get_intr_number] intr_number = %d\n", intr_num);
+ PrintDebug("[get_intr_number] intr_number = %d\n", intr_num);
- return intr_num;
- }
+ return intr_num;
+ }
+ }
}
- }
- return 0;
+ return 0;
}
intr_type_t v3_get_intr_type(struct guest_info * info) {
- struct v3_intr_state * intr_state = &(info->intr_state);
-
- if (intr_state->excp_pending) {
- PrintDebug("[get_intr_type] Exception\n");
- return EXCEPTION;
- } else {
- struct intr_controller * ctrl = NULL;
-
- list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
- if (ctrl->ctrl_ops->intr_pending(ctrl->priv_data) == 1) {
- PrintDebug("[get_intr_type] External_irq\n");
- return EXTERNAL_IRQ;
- }
+ struct v3_intr_state * intr_state = &(info->intr_state);
+
+ if (intr_state->excp_pending) {
+ PrintDebug("[get_intr_type] Exception\n");
+ return EXCEPTION;
+ } else {
+ struct intr_controller * ctrl = NULL;
+
+ list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
+ if (ctrl->ctrl_ops->intr_pending(ctrl->priv_data) == 1) {
+ PrintDebug("[get_intr_type] External_irq\n");
+ return EXTERNAL_IRQ;
+ }
+ }
}
- }
- PrintDebug("[get_intr_type] Invalid_Intr\n");
- return INVALID_INTR;
+ PrintDebug("[get_intr_type] Invalid_Intr\n");
+ return INVALID_INTR;
}
int v3_injecting_intr(struct guest_info * info, uint_t intr_num, intr_type_t type) {
- struct v3_intr_state * intr_state = &(info->intr_state);
-
- if (type == EXCEPTION) {
- PrintDebug("[injecting_intr] Exception\n");
- intr_state->excp_pending = 0;
- intr_state->excp_num = 0;
- intr_state->excp_error_code = 0;
- intr_state->excp_error_code_valid = 0;
+ struct v3_intr_state * intr_state = &(info->intr_state);
+
+ if (type == EXCEPTION) {
+ PrintDebug("[injecting_intr] Exception\n");
+ intr_state->excp_pending = 0;
+ intr_state->excp_num = 0;
+ intr_state->excp_error_code = 0;
+ intr_state->excp_error_code_valid = 0;
- } else if (type == EXTERNAL_IRQ) {
- struct intr_controller * ctrl = NULL;
+ } else if (type == EXTERNAL_IRQ) {
+ struct intr_controller * ctrl = NULL;
- PrintDebug("[injecting_intr] External_Irq with intr_num = %x\n", intr_num);
- list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
- ctrl->ctrl_ops->begin_irq(ctrl->priv_data, intr_num);
+ PrintDebug("[injecting_intr] External_Irq with intr_num = %x\n", intr_num);
+ list_for_each_entry(ctrl, &(intr_state->controller_list), ctrl_node) {
+ ctrl->ctrl_ops->begin_irq(ctrl->priv_data, intr_num);
+ }
}
- }
- return 0;
+ return 0;
}
void v3_init_shadow_map(struct guest_info * info) {
- v3_shdw_map_t * map = &(info->mem_map);
+ v3_shdw_map_t * map = &(info->mem_map);
- map->shdw_regions.rb_node = NULL;
- map->hook_hva = (addr_t)V3_VAddr(V3_AllocPages(1));
+ map->shdw_regions.rb_node = NULL;
+ map->hook_hva = (addr_t)V3_VAddr(V3_AllocPages(1));
}
void v3_delete_shadow_map(struct guest_info * info) {
- struct rb_node * node = v3_rb_first(&(info->mem_map.shdw_regions));
- struct v3_shadow_region * reg;
- struct rb_node * tmp_node = NULL;
+ struct rb_node * node = v3_rb_first(&(info->mem_map.shdw_regions));
+ struct v3_shadow_region * reg;
+ struct rb_node * tmp_node = NULL;
- while (node) {
- reg = rb_entry(node, struct v3_shadow_region, tree_node);
- tmp_node = node;
- node = v3_rb_next(node);
+ while (node) {
+ reg = rb_entry(node, struct v3_shadow_region, tree_node);
+ tmp_node = node;
+ node = v3_rb_next(node);
- v3_delete_shadow_region(info, reg);
- }
+ v3_delete_shadow_region(info, reg);
+ }
}
addr_t guest_addr_end,
addr_t host_addr)
{
- struct v3_shadow_region * entry = (struct v3_shadow_region *)V3_Malloc(sizeof(struct v3_shadow_region));
-
- entry->guest_start = guest_addr_start;
- entry->guest_end = guest_addr_end;
- entry->host_type = SHDW_REGION_ALLOCATED;
- entry->host_addr = host_addr;
- entry->write_hook = NULL;
- entry->read_hook = NULL;
- entry->priv_data = NULL;
-
- if (insert_shadow_region(info, entry)) {
- V3_Free(entry);
- return -1;
- }
-
- return 0;
+ struct v3_shadow_region * entry = (struct v3_shadow_region *)V3_Malloc(sizeof(struct v3_shadow_region));
+
+ entry->guest_start = guest_addr_start;
+ entry->guest_end = guest_addr_end;
+ entry->host_type = SHDW_REGION_ALLOCATED;
+ entry->host_addr = host_addr;
+ entry->write_hook = NULL;
+ entry->read_hook = NULL;
+ entry->priv_data = NULL;
+
+ if (insert_shadow_region(info, entry)) {
+ V3_Free(entry);
+ return -1;
+ }
+
+ return 0;
}
int (*write)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
void * priv_data) {
- struct v3_shadow_region * entry = (struct v3_shadow_region *)V3_Malloc(sizeof(struct v3_shadow_region));
+ struct v3_shadow_region * entry = (struct v3_shadow_region *)V3_Malloc(sizeof(struct v3_shadow_region));
- entry->guest_start = guest_addr_start;
- entry->guest_end = guest_addr_end;
- entry->host_type = SHDW_REGION_WRITE_HOOK;
- entry->host_addr = host_addr;
- entry->write_hook = write;
- entry->read_hook = NULL;
- entry->priv_data = priv_data;
+ entry->guest_start = guest_addr_start;
+ entry->guest_end = guest_addr_end;
+ entry->host_type = SHDW_REGION_WRITE_HOOK;
+ entry->host_addr = host_addr;
+ entry->write_hook = write;
+ entry->read_hook = NULL;
+ entry->priv_data = priv_data;
- if (insert_shadow_region(info, entry)) {
- V3_Free(entry);
- return -1;
- }
+ if (insert_shadow_region(info, entry)) {
+ V3_Free(entry);
+ return -1;
+ }
- return 0;
+ return 0;
}
int v3_hook_full_mem(struct guest_info * info, addr_t guest_addr_start, addr_t guest_addr_end,
int (*write)(addr_t guest_addr, void * src, uint_t length, void * priv_data),
void * priv_data) {
- struct v3_shadow_region * entry = (struct v3_shadow_region *)V3_Malloc(sizeof(struct v3_shadow_region));
-
- entry->guest_start = guest_addr_start;
- entry->guest_end = guest_addr_end;
- entry->host_type = SHDW_REGION_FULL_HOOK;
- entry->host_addr = (addr_t)NULL;
- entry->write_hook = write;
- entry->read_hook = read;
- entry->priv_data = priv_data;
+ struct v3_shadow_region * entry = (struct v3_shadow_region *)V3_Malloc(sizeof(struct v3_shadow_region));
+
+ entry->guest_start = guest_addr_start;
+ entry->guest_end = guest_addr_end;
+ entry->host_type = SHDW_REGION_FULL_HOOK;
+ entry->host_addr = (addr_t)NULL;
+ entry->write_hook = write;
+ entry->read_hook = read;
+ entry->priv_data = priv_data;
- if (insert_shadow_region(info, entry)) {
- V3_Free(entry);
- return -1;
- }
+ if (insert_shadow_region(info, entry)) {
+ V3_Free(entry);
+ return -1;
+ }
- return 0;
+ return 0;
}
static inline
struct v3_shadow_region * __insert_shadow_region(struct guest_info * info,
struct v3_shadow_region * region) {
- struct rb_node ** p = &(info->mem_map.shdw_regions.rb_node);
- struct rb_node * parent = NULL;
- struct v3_shadow_region * tmp_region;
-
- while (*p) {
- parent = *p;
- tmp_region = rb_entry(parent, struct v3_shadow_region, tree_node);
-
- if (region->guest_end <= tmp_region->guest_start) {
- p = &(*p)->rb_left;
- } else if (region->guest_start >= tmp_region->guest_end) {
- p = &(*p)->rb_right;
- } else {
- return tmp_region;
+ struct rb_node ** p = &(info->mem_map.shdw_regions.rb_node);
+ struct rb_node * parent = NULL;
+ struct v3_shadow_region * tmp_region;
+
+ while (*p) {
+ parent = *p;
+ tmp_region = rb_entry(parent, struct v3_shadow_region, tree_node);
+
+ if (region->guest_end <= tmp_region->guest_start) {
+ p = &(*p)->rb_left;
+ } else if (region->guest_start >= tmp_region->guest_end) {
+ p = &(*p)->rb_right;
+ } else {
+ return tmp_region;
+ }
}
- }
- rb_link_node(&(region->tree_node), parent, p);
+ rb_link_node(&(region->tree_node), parent, p);
- return NULL;
+ return NULL;
}
static inline
struct v3_shadow_region * insert_shadow_region(struct guest_info * info,
struct v3_shadow_region * region) {
- struct v3_shadow_region * ret;
+ struct v3_shadow_region * ret;
- if ((ret = __insert_shadow_region(info, region))) {
- return ret;
- }
+ if ((ret = __insert_shadow_region(info, region))) {
+ return ret;
+ }
- v3_rb_insert_color(&(region->tree_node), &(info->mem_map.shdw_regions));
+ v3_rb_insert_color(&(region->tree_node), &(info->mem_map.shdw_regions));
- return NULL;
+ return NULL;
}
addr_t fault_gva, addr_t fault_gpa,
pf_error_t access_info)
{
- struct v3_shadow_region * reg = v3_get_shadow_region(info, fault_gpa);
+ struct v3_shadow_region * reg = v3_get_shadow_region(info, fault_gpa);
- PrintDebug("Handling Special Page Fault\n");
+ PrintDebug("Handling Special Page Fault\n");
- switch (reg->host_type) {
- case SHDW_REGION_WRITE_HOOK:
- return v3_handle_mem_wr_hook(info, fault_gva, fault_gpa, reg, access_info);
- case SHDW_REGION_FULL_HOOK:
- return v3_handle_mem_full_hook(info, fault_gva, fault_gpa, reg, access_info);
- default:
- return -1;
- }
+ switch (reg->host_type) {
+ case SHDW_REGION_WRITE_HOOK:
+ return v3_handle_mem_wr_hook(info, fault_gva, fault_gpa, reg, access_info);
+ case SHDW_REGION_FULL_HOOK:
+ return v3_handle_mem_full_hook(info, fault_gva, fault_gpa, reg, access_info);
+ default:
+ return -1;
+ }
- return 0;
+ return 0;
}
int v3_handle_mem_wr_hook(struct guest_info * info, addr_t guest_va, addr_t guest_pa,
struct v3_shadow_region * reg, pf_error_t access_info) {
- addr_t dst_addr = (addr_t)V3_VAddr((void *)v3_get_shadow_addr(reg, guest_pa));
+ addr_t dst_addr = (addr_t)V3_VAddr((void *)v3_get_shadow_addr(reg, guest_pa));
- if (v3_emulate_write_op(info, guest_va, guest_pa, dst_addr, reg->write_hook, reg->priv_data) == -1) {
- PrintError("Write hook emulation failed\n");
- return -1;
- }
+ if (v3_emulate_write_op(info, guest_va, guest_pa, dst_addr, reg->write_hook, reg->priv_data) == -1) {
+ PrintError("Write hook emulation failed\n");
+ return -1;
+ }
- return 0;
+ return 0;
}
int v3_handle_mem_full_hook(struct guest_info * info, addr_t guest_va, addr_t guest_pa,
struct v3_shadow_region * reg, pf_error_t access_info) {
- addr_t op_addr = info->mem_map.hook_hva;
+ addr_t op_addr = info->mem_map.hook_hva;
- if (access_info.write == 1) {
- if (v3_emulate_write_op(info, guest_va, guest_pa, op_addr, reg->write_hook, reg->priv_data) == -1) {
- PrintError("Write Full Hook emulation failed\n");
- return -1;
- }
- } else {
- if (v3_emulate_read_op(info, guest_va, guest_pa, op_addr, reg->read_hook, reg->write_hook, reg->priv_data) == -1) {
- PrintError("Read Full Hook emulation failed\n");
- return -1;
+ if (access_info.write == 1) {
+ if (v3_emulate_write_op(info, guest_va, guest_pa, op_addr, reg->write_hook, reg->priv_data) == -1) {
+ PrintError("Write Full Hook emulation failed\n");
+ return -1;
+ }
+ } else {
+ if (v3_emulate_read_op(info, guest_va, guest_pa, op_addr, reg->read_hook, reg->write_hook, reg->priv_data) == -1) {
+ PrintError("Read Full Hook emulation failed\n");
+ return -1;
+ }
}
- }
- return 0;
+ return 0;
}
struct v3_shadow_region * v3_get_shadow_region(struct guest_info * info, addr_t guest_addr) {
- struct rb_node * n = info->mem_map.shdw_regions.rb_node;
- struct v3_shadow_region * reg = NULL;
-
- while (n) {
- reg = rb_entry(n, struct v3_shadow_region, tree_node);
-
- if (guest_addr < reg->guest_start) {
- n = n->rb_left;
- } else if (guest_addr >= reg->guest_end) {
- n = n->rb_right;
- } else {
- return reg;
+ struct rb_node * n = info->mem_map.shdw_regions.rb_node;
+ struct v3_shadow_region * reg = NULL;
+
+ while (n) {
+ reg = rb_entry(n, struct v3_shadow_region, tree_node);
+
+ if (guest_addr < reg->guest_start) {
+ n = n->rb_left;
+ } else if (guest_addr >= reg->guest_end) {
+ n = n->rb_right;
+ } else {
+ return reg;
+ }
}
- }
- return NULL;
+ return NULL;
}
addr_t v3_get_shadow_addr(struct v3_shadow_region * reg, addr_t guest_addr) {
- if ( (reg) &&
- (reg->host_type != SHDW_REGION_FULL_HOOK) &&
- (reg->host_type != SHDW_REGION_INVALID) ) {
- return (guest_addr - reg->guest_start) + reg->host_addr;
- } else {
- PrintError("MEM Region Invalid\n");
- return 0;
- }
+ if ( (reg) &&
+ (reg->host_type != SHDW_REGION_FULL_HOOK) &&
+ (reg->host_type != SHDW_REGION_INVALID) ) {
+ return (guest_addr - reg->guest_start) + reg->host_addr;
+ } else {
+ PrintError("MEM Region Invalid\n");
+ return 0;
+ }
}
void v3_delete_shadow_region(struct guest_info * info, struct v3_shadow_region * reg) {
- if (reg != NULL) {
- v3_rb_erase(&(reg->tree_node), &(info->mem_map.shdw_regions));
+ if (reg != NULL) {
+ v3_rb_erase(&(reg->tree_node), &(info->mem_map.shdw_regions));
- V3_Free(reg);
- }
+ V3_Free(reg);
+ }
}
void print_shadow_map(struct guest_info * info) {
- struct rb_node * node = v3_rb_first(&(info->mem_map.shdw_regions));
- struct v3_shadow_region * reg;
- int i = 0;
+ struct rb_node * node = v3_rb_first(&(info->mem_map.shdw_regions));
+ struct v3_shadow_region * reg;
+ int i = 0;
- PrintDebug("Memory Layout:\n");
+ PrintDebug("Memory Layout:\n");
- do {
- reg = rb_entry(node, struct v3_shadow_region, tree_node);
+ do {
+ reg = rb_entry(node, struct v3_shadow_region, tree_node);
- PrintDebug("%d: 0x%p - 0x%p -> 0x%p\n", i,
- (void *)(reg->guest_start),
- (void *)(reg->guest_end - 1),
- (void *)(reg->host_addr));
+ PrintDebug("%d: 0x%p - 0x%p -> 0x%p\n", i,
+ (void *)(reg->guest_start),
+ (void *)(reg->guest_end - 1),
+ (void *)(reg->host_addr));
- PrintDebug("\t(%s) (WriteHook = 0x%p) (ReadHook = 0x%p)\n",
- v3_shdw_region_type_to_str(reg->host_type),
- (void *)(reg->write_hook),
- (void *)(reg->read_hook));
+ PrintDebug("\t(%s) (WriteHook = 0x%p) (ReadHook = 0x%p)\n",
+ v3_shdw_region_type_to_str(reg->host_type),
+ (void *)(reg->write_hook),
+ (void *)(reg->read_hook));
- i++;
- } while ((node = v3_rb_next(node)));
+ i++;
+ } while ((node = v3_rb_next(node)));
}
const uchar_t * v3_shdw_region_type_to_str(v3_shdw_region_type_t type) {
- switch (type) {
- case SHDW_REGION_WRITE_HOOK:
- return SHDW_REGION_WRITE_HOOK_STR;
- case SHDW_REGION_FULL_HOOK:
- return SHDW_REGION_FULL_HOOK_STR;
- case SHDW_REGION_ALLOCATED:
- return SHDW_REGION_ALLOCATED_STR;
- default:
- return SHDW_REGION_INVALID_STR;
- }
+ switch (type) {
+ case SHDW_REGION_WRITE_HOOK:
+ return SHDW_REGION_WRITE_HOOK_STR;
+ case SHDW_REGION_FULL_HOOK:
+ return SHDW_REGION_FULL_HOOK_STR;
+ case SHDW_REGION_ALLOCATED:
+ return SHDW_REGION_ALLOCATED_STR;
+ default:
+ return SHDW_REGION_INVALID_STR;
+ }
}
void v3_init_msr_map(struct guest_info * info) {
- struct v3_msr_map * msr_map = &(info->msr_map);
+ struct v3_msr_map * msr_map = &(info->msr_map);
- INIT_LIST_HEAD(&(msr_map->hook_list));
- msr_map->num_hooks = 0;
+ INIT_LIST_HEAD(&(msr_map->hook_list));
+ msr_map->num_hooks = 0;
}
int (*write)(uint_t msr, struct v3_msr src, void * priv_data),
void * priv_data) {
- struct v3_msr_map * msr_map = &(info->msr_map);
- struct v3_msr_hook * hook = NULL;
+ struct v3_msr_map * msr_map = &(info->msr_map);
+ struct v3_msr_hook * hook = NULL;
- hook = (struct v3_msr_hook *)V3_Malloc(sizeof(struct v3_msr_hook));
- if (hook == NULL) {
- PrintError("Could not allocate msr hook for MSR %d\n", msr);
- return -1;
- }
+ hook = (struct v3_msr_hook *)V3_Malloc(sizeof(struct v3_msr_hook));
+ if (hook == NULL) {
+ PrintError("Could not allocate msr hook for MSR %d\n", msr);
+ return -1;
+ }
- hook->read = read;
- hook->write = write;
- hook->msr = msr;
- hook->priv_data = priv_data;
+ hook->read = read;
+ hook->write = write;
+ hook->msr = msr;
+ hook->priv_data = priv_data;
- msr_map->num_hooks++;
+ msr_map->num_hooks++;
- list_add(&(hook->link), &(msr_map->hook_list));
+ list_add(&(hook->link), &(msr_map->hook_list));
- return 0;
+ return 0;
}
int v3_unhook_msr(struct guest_info * info, uint_t msr) {
- return -1;
+ return -1;
}
struct v3_msr_hook * v3_get_msr_hook(struct guest_info * info, uint_t msr) {
- struct v3_msr_map * msr_map = &(info->msr_map);
- struct v3_msr_hook * hook = NULL;
+ struct v3_msr_map * msr_map = &(info->msr_map);
+ struct v3_msr_hook * hook = NULL;
- list_for_each_entry(hook, &(msr_map->hook_list), link) {
- if (hook->msr == msr) {
- return hook;
+ list_for_each_entry(hook, &(msr_map->hook_list), link) {
+ if (hook->msr == msr) {
+ return hook;
+ }
}
- }
- return NULL;
+ return NULL;
}
void v3_print_msr_map(struct guest_info * info) {
- struct v3_msr_map * msr_map = &(info->msr_map);
- struct v3_msr_hook * hook = NULL;
+ struct v3_msr_map * msr_map = &(info->msr_map);
+ struct v3_msr_hook * hook = NULL;
- list_for_each_entry(hook, &(msr_map->hook_list), link) {
- PrintDebug("MSR HOOK (MSR=%d) (read=0x%p) (write=0x%p)\n",
- hook->msr, hook->read, hook->write);
- }
+ list_for_each_entry(hook, &(msr_map->hook_list), link) {
+ PrintDebug("MSR HOOK (MSR=%d) (read=0x%p) (write=0x%p)\n",
+ hook->msr, hook->read, hook->write);
+ }
}
void delete_page_tables_32(pde32_t * pde) {
- int i;
+ int i;
- if (pde == NULL) {
- return;
- }
- PrintDebug("Deleting Page Tables -- PDE (%p)\n", pde);
+ if (pde == NULL) {
+ return;
+ }
+ PrintDebug("Deleting Page Tables -- PDE (%p)\n", pde);
- for (i = 0; (i < MAX_PDE32_ENTRIES); i++) {
- if (pde[i].present) {
- // We double cast, first to an addr_t to handle 64 bit issues, then to the pointer
+ for (i = 0; (i < MAX_PDE32_ENTRIES); i++) {
+ if (pde[i].present) {
+ // We double cast, first to an addr_t to handle 64 bit issues, then to the pointer
- pte32_t * pte = (pte32_t *)((addr_t)(uint_t)(pde[i].pt_base_addr << PAGE_POWER));
+ pte32_t * pte = (pte32_t *)((addr_t)(uint_t)(pde[i].pt_base_addr << PAGE_POWER));
- V3_FreePage(pte);
+ V3_FreePage(pte);
+ }
}
- }
- V3_FreePage(V3_PAddr(pde));
+ V3_FreePage(V3_PAddr(pde));
}
void delete_page_tables_32PAE(pdpe32pae_t * pdpe) {
- PrintError("Unimplemented function\n");
+ PrintError("Unimplemented function\n");
}
void delete_page_tables_64(pml4e64_t * pml4) {
- PrintError("Unimplemented function\n");
+ PrintError("Unimplemented function\n");
}
static int translate_pt_32_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- addr_t * paddr = (addr_t *)private_data;
-
- switch (type) {
- case PAGE_PD32:
- case PAGE_PT32:
- return 0;
- case PAGE_4MB:
- *paddr = page_pa + PAGE_OFFSET_4MB(vaddr);
- return 0;
- case PAGE_4KB:
- *paddr = page_pa + PAGE_OFFSET_4KB(vaddr);
- return 0;
- default:
- PrintError("Inavlid page type (%s) in tranlate pt 32 callback\n", v3_page_type_to_str(type));
- return -1;
- }
+ addr_t * paddr = (addr_t *)private_data;
+
+ switch (type) {
+ case PAGE_PD32:
+ case PAGE_PT32:
+ return 0;
+ case PAGE_4MB:
+ *paddr = page_pa + PAGE_OFFSET_4MB(vaddr);
+ return 0;
+ case PAGE_4KB:
+ *paddr = page_pa + PAGE_OFFSET_4KB(vaddr);
+ return 0;
+ default:
+ PrintError("Inavlid page type (%s) in tranlate pt 32 callback\n", v3_page_type_to_str(type));
+ return -1;
+ }
}
static int translate_pt_32pae_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- addr_t * paddr = (addr_t *)private_data;
+ addr_t * paddr = (addr_t *)private_data;
- switch (type) {
- case PAGE_PDP32PAE:
- case PAGE_PD32PAE:
- case PAGE_PT32PAE:
- return 0;
- case PAGE_2MB:
- *paddr = page_pa + PAGE_OFFSET_2MB(vaddr);
- return 0;
- case PAGE_4KB:
- *paddr = page_pa + PAGE_OFFSET_4KB(vaddr);
- return 0;
- default:
- PrintError("Inavlid page type (%s) in translate pt 32pae callback\n", v3_page_type_to_str(type));
- return -1;
- }
+ switch (type) {
+ case PAGE_PDP32PAE:
+ case PAGE_PD32PAE:
+ case PAGE_PT32PAE:
+ return 0;
+ case PAGE_2MB:
+ *paddr = page_pa + PAGE_OFFSET_2MB(vaddr);
+ return 0;
+ case PAGE_4KB:
+ *paddr = page_pa + PAGE_OFFSET_4KB(vaddr);
+ return 0;
+ default:
+ PrintError("Inavlid page type (%s) in translate pt 32pae callback\n", v3_page_type_to_str(type));
+ return -1;
+ }
}
static int translate_pt_64_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- addr_t * paddr = (addr_t *)private_data;
-
- switch (type) {
- case PAGE_PML464:
- case PAGE_PDP64:
- case PAGE_PD64:
- case PAGE_PT64:
- return 0;
- case PAGE_1GB:
- *paddr = page_pa + PAGE_OFFSET_1GB(vaddr);
- return 0;
- case PAGE_2MB:
- *paddr = page_pa + PAGE_OFFSET_2MB(vaddr);
- return 0;
- case PAGE_4KB:
- *paddr = page_pa + PAGE_OFFSET_4KB(vaddr);
- return 0;
- default:
- PrintError("Inavlid page type (%s) in translate pt 64 callback\n", v3_page_type_to_str(type));
- return -1;
- }
+ addr_t * paddr = (addr_t *)private_data;
+
+ switch (type) {
+ case PAGE_PML464:
+ case PAGE_PDP64:
+ case PAGE_PD64:
+ case PAGE_PT64:
+ return 0;
+ case PAGE_1GB:
+ *paddr = page_pa + PAGE_OFFSET_1GB(vaddr);
+ return 0;
+ case PAGE_2MB:
+ *paddr = page_pa + PAGE_OFFSET_2MB(vaddr);
+ return 0;
+ case PAGE_4KB:
+ *paddr = page_pa + PAGE_OFFSET_4KB(vaddr);
+ return 0;
+ default:
+ PrintError("Inavlid page type (%s) in translate pt 64 callback\n", v3_page_type_to_str(type));
+ return -1;
+ }
}
int v3_translate_host_pt_32(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr, addr_t * paddr) {
- return v3_drill_host_pt_32(info, host_cr3, vaddr, translate_pt_32_cb, paddr);
+ return v3_drill_host_pt_32(info, host_cr3, vaddr, translate_pt_32_cb, paddr);
}
int v3_translate_guest_pt_32(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr, addr_t * paddr) {
- return v3_drill_guest_pt_32(info, guest_cr3, vaddr, translate_pt_32_cb, paddr);
+ return v3_drill_guest_pt_32(info, guest_cr3, vaddr, translate_pt_32_cb, paddr);
}
int v3_translate_host_pt_32pae(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr, addr_t * paddr) {
- return v3_drill_host_pt_32pae(info, host_cr3, vaddr, translate_pt_32pae_cb, paddr);
+ return v3_drill_host_pt_32pae(info, host_cr3, vaddr, translate_pt_32pae_cb, paddr);
}
int v3_translate_guest_pt_32pae(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr, addr_t * paddr) {
- return v3_drill_guest_pt_32pae(info, guest_cr3, vaddr, translate_pt_32pae_cb, paddr);
+ return v3_drill_guest_pt_32pae(info, guest_cr3, vaddr, translate_pt_32pae_cb, paddr);
}
int v3_translate_host_pt_64(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr, addr_t * paddr) {
- return v3_drill_host_pt_64(info, host_cr3, vaddr, translate_pt_64_cb, paddr);
+ return v3_drill_host_pt_64(info, host_cr3, vaddr, translate_pt_64_cb, paddr);
}
int v3_translate_guest_pt_64(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr, addr_t * paddr) {
- return v3_drill_guest_pt_64(info, guest_cr3, vaddr, translate_pt_64_cb, paddr);
+ return v3_drill_guest_pt_64(info, guest_cr3, vaddr, translate_pt_64_cb, paddr);
}
struct pt_find_data {
- page_type_t type;
- addr_t * pt_page_ptr;
- addr_t * pt_page_pa;
+ page_type_t type;
+ addr_t * pt_page_ptr;
+ addr_t * pt_page_pa;
};
static int find_pt_cb(struct guest_info * info, page_type_t type, addr_t vaddr,
addr_t page_ptr, addr_t page_pa, void * private_data) {
- struct pt_find_data * pt_data = (struct pt_find_data *)private_data;
+ struct pt_find_data * pt_data = (struct pt_find_data *)private_data;
- PrintDebug("FIND_PT Type=%s, page_pa = %p\n",
- v3_page_type_to_str(type),
- (void *)page_pa);
+ PrintDebug("FIND_PT Type=%s, page_pa = %p\n",
+ v3_page_type_to_str(type),
+ (void *)page_pa);
- if (type == pt_data->type) {
- *(pt_data->pt_page_ptr) = page_ptr;
- *(pt_data->pt_page_pa) = page_pa;
- return 1;
- }
+ if (type == pt_data->type) {
+ *(pt_data->pt_page_ptr) = page_ptr;
+ *(pt_data->pt_page_pa) = page_pa;
+ return 1;
+ }
- return 0;
+ return 0;
}
int v3_find_host_pt_32_page(struct guest_info * info, v3_reg_t host_cr3, page_type_t type, addr_t vaddr,
addr_t * page_ptr, addr_t * page_pa) {
- struct pt_find_data data;
+ struct pt_find_data data;
- data.type = type;
- data.pt_page_ptr = page_ptr;
- data.pt_page_pa = page_pa;
+ data.type = type;
+ data.pt_page_ptr = page_ptr;
+ data.pt_page_pa = page_pa;
- return v3_drill_host_pt_32(info, host_cr3, vaddr, find_pt_cb, &data);
+ return v3_drill_host_pt_32(info, host_cr3, vaddr, find_pt_cb, &data);
}
int v3_find_host_pt_32pae_page(struct guest_info * info, v3_reg_t host_cr3, page_type_t type, addr_t vaddr,
addr_t * page_ptr, addr_t * page_pa) {
- struct pt_find_data data;
+ struct pt_find_data data;
- data.type = type;
- data.pt_page_ptr = page_ptr;
- data.pt_page_pa = page_pa;
+ data.type = type;
+ data.pt_page_ptr = page_ptr;
+ data.pt_page_pa = page_pa;
- return v3_drill_host_pt_32pae(info, host_cr3, vaddr, find_pt_cb, &data);
+ return v3_drill_host_pt_32pae(info, host_cr3, vaddr, find_pt_cb, &data);
}
int v3_find_host_pt_64_page(struct guest_info * info, v3_reg_t host_cr3, page_type_t type, addr_t vaddr,
addr_t * page_ptr, addr_t * page_pa) {
- struct pt_find_data data;
+ struct pt_find_data data;
- data.type = type;
- data.pt_page_ptr = page_ptr;
- data.pt_page_pa = page_pa;
+ data.type = type;
+ data.pt_page_ptr = page_ptr;
+ data.pt_page_pa = page_pa;
- return v3_drill_host_pt_64(info, host_cr3, vaddr, find_pt_cb, &data);
+ return v3_drill_host_pt_64(info, host_cr3, vaddr, find_pt_cb, &data);
}
int v3_find_guest_pt_32_page(struct guest_info * info, v3_reg_t guest_cr3, page_type_t type, addr_t vaddr,
addr_t * page_ptr, addr_t * page_pa) {
- struct pt_find_data data;
+ struct pt_find_data data;
- data.type = type;
- data.pt_page_ptr = page_ptr;
- data.pt_page_pa = page_pa;
+ data.type = type;
+ data.pt_page_ptr = page_ptr;
+ data.pt_page_pa = page_pa;
- return v3_drill_guest_pt_32(info, guest_cr3, vaddr, find_pt_cb, &data);
+ return v3_drill_guest_pt_32(info, guest_cr3, vaddr, find_pt_cb, &data);
}
int v3_find_guest_pt_32pae_page(struct guest_info * info, v3_reg_t guest_cr3, page_type_t type, addr_t vaddr,
addr_t * page_ptr, addr_t * page_pa) {
- struct pt_find_data data;
+ struct pt_find_data data;
- data.type = type;
- data.pt_page_ptr = page_ptr;
- data.pt_page_pa = page_pa;
+ data.type = type;
+ data.pt_page_ptr = page_ptr;
+ data.pt_page_pa = page_pa;
- return v3_drill_guest_pt_32pae(info, guest_cr3, vaddr, find_pt_cb, &data);
+ return v3_drill_guest_pt_32pae(info, guest_cr3, vaddr, find_pt_cb, &data);
}
int v3_find_guest_pt_64_page(struct guest_info * info, v3_reg_t guest_cr3, page_type_t type, addr_t vaddr,
addr_t * page_ptr, addr_t * page_pa) {
- struct pt_find_data data;
+ struct pt_find_data data;
- data.type = type;
- data.pt_page_ptr = page_ptr;
- data.pt_page_pa = page_pa;
+ data.type = type;
+ data.pt_page_ptr = page_ptr;
+ data.pt_page_pa = page_pa;
- return v3_drill_guest_pt_64(info, guest_cr3, vaddr, find_pt_cb, &data);
+ return v3_drill_guest_pt_64(info, guest_cr3, vaddr, find_pt_cb, &data);
}
struct pt_check_data {
- pf_error_t access_type;
- pt_access_status_t * access_status;
+ pf_error_t access_type;
+ pt_access_status_t * access_status;
};
static int check_pt_32_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- struct pt_check_data * chk_data = (struct pt_check_data *)private_data;
-
- switch (type) {
- case PAGE_PD32:
- *(chk_data->access_status) = v3_can_access_pde32((pde32_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_PT32:
- *(chk_data->access_status) = v3_can_access_pte32((pte32_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_4MB:
- case PAGE_4KB:
- return 0;
- default:
- PrintError("Inavlid page type (%s) in check pt 32 callback\n", v3_page_type_to_str(type));
- return -1;
- }
+ struct pt_check_data * chk_data = (struct pt_check_data *)private_data;
+
+ switch (type) {
+ case PAGE_PD32:
+ *(chk_data->access_status) = v3_can_access_pde32((pde32_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_PT32:
+ *(chk_data->access_status) = v3_can_access_pte32((pte32_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_4MB:
+ case PAGE_4KB:
+ return 0;
+ default:
+ PrintError("Inavlid page type (%s) in check pt 32 callback\n", v3_page_type_to_str(type));
+ return -1;
+ }
- if (chk_data->access_status != PT_ACCESS_OK) {
- return 1;
- }
+ if (chk_data->access_status != PT_ACCESS_OK) {
+ return 1;
+ }
- return 0;
+ return 0;
}
static int check_pt_32pae_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- struct pt_check_data * chk_data = (struct pt_check_data *)private_data;
-
- switch (type) {
- case PAGE_PDP32PAE:
- *(chk_data->access_status) = v3_can_access_pdpe32pae((pdpe32pae_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_PD32PAE:
- *(chk_data->access_status) = v3_can_access_pde32pae((pde32pae_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_PT32PAE:
- *(chk_data->access_status) = v3_can_access_pte32pae((pte32pae_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_2MB:
- case PAGE_4KB:
- return 0;
- default:
- PrintError("Inavlid page type (%s) in check pt 32pae callback\n", v3_page_type_to_str(type));
- return -1;
- }
+ struct pt_check_data * chk_data = (struct pt_check_data *)private_data;
+
+ switch (type) {
+ case PAGE_PDP32PAE:
+ *(chk_data->access_status) = v3_can_access_pdpe32pae((pdpe32pae_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_PD32PAE:
+ *(chk_data->access_status) = v3_can_access_pde32pae((pde32pae_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_PT32PAE:
+ *(chk_data->access_status) = v3_can_access_pte32pae((pte32pae_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_2MB:
+ case PAGE_4KB:
+ return 0;
+ default:
+ PrintError("Inavlid page type (%s) in check pt 32pae callback\n", v3_page_type_to_str(type));
+ return -1;
+ }
- if (chk_data->access_status != PT_ACCESS_OK) {
- return 1;
- }
+ if (chk_data->access_status != PT_ACCESS_OK) {
+ return 1;
+ }
- return 0;
+ return 0;
}
static int check_pt_64_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- struct pt_check_data * chk_data = (struct pt_check_data *)private_data;
-
- switch (type) {
- case PAGE_PML464:
- *(chk_data->access_status) = v3_can_access_pml4e64((pml4e64_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_PDP64:
- *(chk_data->access_status) = v3_can_access_pdpe64((pdpe64_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_PD64:
- *(chk_data->access_status) = v3_can_access_pde64((pde64_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_PT64:
- *(chk_data->access_status) = v3_can_access_pte64((pte64_t *)page_ptr, vaddr, chk_data->access_type);
- break;
- case PAGE_1GB:
- case PAGE_2MB:
- case PAGE_4KB:
- return 0;
- default:
- PrintError("Inavlid page type (%s) in check pt 64 callback\n", v3_page_type_to_str(type));
- return -1;
- }
+ struct pt_check_data * chk_data = (struct pt_check_data *)private_data;
+
+ switch (type) {
+ case PAGE_PML464:
+ *(chk_data->access_status) = v3_can_access_pml4e64((pml4e64_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_PDP64:
+ *(chk_data->access_status) = v3_can_access_pdpe64((pdpe64_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_PD64:
+ *(chk_data->access_status) = v3_can_access_pde64((pde64_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_PT64:
+ *(chk_data->access_status) = v3_can_access_pte64((pte64_t *)page_ptr, vaddr, chk_data->access_type);
+ break;
+ case PAGE_1GB:
+ case PAGE_2MB:
+ case PAGE_4KB:
+ return 0;
+ default:
+ PrintError("Inavlid page type (%s) in check pt 64 callback\n", v3_page_type_to_str(type));
+ return -1;
+ }
- if (chk_data->access_status != PT_ACCESS_OK) {
- return 1;
- }
+ if (chk_data->access_status != PT_ACCESS_OK) {
+ return 1;
+ }
- return 0;
+ return 0;
}
int v3_check_host_pt_32(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr, pf_error_t access_type, pt_access_status_t * access_status) {
- struct pt_check_data access_data;
+ struct pt_check_data access_data;
- access_data.access_type = access_type;
- access_data.access_status = access_status;
+ access_data.access_type = access_type;
+ access_data.access_status = access_status;
- return v3_drill_host_pt_32(info, host_cr3, vaddr, check_pt_32_cb, &access_data);
+ return v3_drill_host_pt_32(info, host_cr3, vaddr, check_pt_32_cb, &access_data);
}
int v3_check_host_pt_32pae(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr, pf_error_t access_type, pt_access_status_t * access_status) {
- struct pt_check_data access_data;
+ struct pt_check_data access_data;
- access_data.access_type = access_type;
- access_data.access_status = access_status;
+ access_data.access_type = access_type;
+ access_data.access_status = access_status;
- return v3_drill_host_pt_32pae(info, host_cr3, vaddr, check_pt_32pae_cb, &access_data);
+ return v3_drill_host_pt_32pae(info, host_cr3, vaddr, check_pt_32pae_cb, &access_data);
}
int v3_check_host_pt_64(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr, pf_error_t access_type, pt_access_status_t * access_status) {
- struct pt_check_data access_data;
+ struct pt_check_data access_data;
- access_data.access_type = access_type;
- access_data.access_status = access_status;
+ access_data.access_type = access_type;
+ access_data.access_status = access_status;
- return v3_drill_host_pt_64(info, host_cr3, vaddr, check_pt_64_cb, &access_data);
+ return v3_drill_host_pt_64(info, host_cr3, vaddr, check_pt_64_cb, &access_data);
}
int v3_check_guest_pt_32(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
pf_error_t access_type, pt_access_status_t * access_status) {
- struct pt_check_data access_data;
+ struct pt_check_data access_data;
- access_data.access_type = access_type;
- access_data.access_status = access_status;
+ access_data.access_type = access_type;
+ access_data.access_status = access_status;
- return v3_drill_guest_pt_32(info, guest_cr3, vaddr, check_pt_32_cb, &access_data);
+ return v3_drill_guest_pt_32(info, guest_cr3, vaddr, check_pt_32_cb, &access_data);
}
int v3_check_guest_pt_32pae(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
pf_error_t access_type, pt_access_status_t * access_status) {
- struct pt_check_data access_data;
+ struct pt_check_data access_data;
- access_data.access_type = access_type;
- access_data.access_status = access_status;
+ access_data.access_type = access_type;
+ access_data.access_status = access_status;
- return v3_drill_guest_pt_32pae(info, guest_cr3, vaddr, check_pt_32pae_cb, &access_data);
+ return v3_drill_guest_pt_32pae(info, guest_cr3, vaddr, check_pt_32pae_cb, &access_data);
}
int v3_check_guest_pt_64(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
pf_error_t access_type, pt_access_status_t * access_status) {
- struct pt_check_data access_data;
+ struct pt_check_data access_data;
- access_data.access_type = access_type;
- access_data.access_status = access_status;
+ access_data.access_type = access_type;
+ access_data.access_status = access_status;
- return v3_drill_guest_pt_64(info, guest_cr3, vaddr, check_pt_64_cb, &access_data);
+ return v3_drill_guest_pt_64(info, guest_cr3, vaddr, check_pt_64_cb, &access_data);
}
static int get_data_page_type_cb(struct guest_info * info, page_type_t type,
addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- switch (type) {
- case PAGE_4KB:
- case PAGE_2MB:
- case PAGE_4MB:
- case PAGE_1GB:
- return 1;
- default:
- return 0;
- }
+ switch (type) {
+ case PAGE_4KB:
+ case PAGE_2MB:
+ case PAGE_4MB:
+ case PAGE_1GB:
+ return 1;
+ default:
+ return 0;
+ }
}
page_type_t v3_get_guest_data_page_type_32(struct guest_info * info, v3_reg_t cr3, addr_t vaddr) {
- return v3_drill_guest_pt_32(info, cr3, vaddr, get_data_page_type_cb, NULL);
+ return v3_drill_guest_pt_32(info, cr3, vaddr, get_data_page_type_cb, NULL);
}
page_type_t v3_get_guest_data_page_type_32pae(struct guest_info * info, v3_reg_t cr3, addr_t vaddr) {
- return v3_drill_guest_pt_32pae(info, cr3, vaddr, get_data_page_type_cb, NULL);
+ return v3_drill_guest_pt_32pae(info, cr3, vaddr, get_data_page_type_cb, NULL);
}
page_type_t v3_get_guest_data_page_type_64(struct guest_info * info, v3_reg_t cr3, addr_t vaddr) {
- return v3_drill_guest_pt_64(info, cr3, vaddr, get_data_page_type_cb, NULL);
+ return v3_drill_guest_pt_64(info, cr3, vaddr, get_data_page_type_cb, NULL);
}
page_type_t v3_get_host_data_page_type_32(struct guest_info * info, v3_reg_t cr3, addr_t vaddr) {
- return v3_drill_host_pt_32(info, cr3, vaddr, get_data_page_type_cb, NULL);
+ return v3_drill_host_pt_32(info, cr3, vaddr, get_data_page_type_cb, NULL);
}
page_type_t v3_get_host_data_page_type_32pae(struct guest_info * info, v3_reg_t cr3, addr_t vaddr) {
- return v3_drill_host_pt_32pae(info, cr3, vaddr, get_data_page_type_cb, NULL);
+ return v3_drill_host_pt_32pae(info, cr3, vaddr, get_data_page_type_cb, NULL);
}
page_type_t v3_get_host_data_page_type_64(struct guest_info * info, v3_reg_t cr3, addr_t vaddr) {
- return v3_drill_host_pt_64(info, cr3, vaddr, get_data_page_type_cb, NULL);
+ return v3_drill_host_pt_64(info, cr3, vaddr, get_data_page_type_cb, NULL);
}
**/
static pt_entry_type_t pde32_lookup(pde32_t * pd, addr_t addr, addr_t * entry) {
- pde32_t * pde_entry = &(pd[PDE32_INDEX(addr)]);
+ pde32_t * pde_entry = &(pd[PDE32_INDEX(addr)]);
- if (!pde_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else if (pde_entry->large_page) {
- pde32_4MB_t * large_pde = (pde32_4MB_t *)pde_entry;
+ if (!pde_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else if (pde_entry->large_page) {
+ pde32_4MB_t * large_pde = (pde32_4MB_t *)pde_entry;
- *entry = BASE_TO_PAGE_ADDR_4MB(large_pde->page_base_addr);
+ *entry = BASE_TO_PAGE_ADDR_4MB(large_pde->page_base_addr);
- return PT_ENTRY_LARGE_PAGE;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pde_entry->pt_base_addr);
- return PT_ENTRY_PAGE;
- }
+ return PT_ENTRY_LARGE_PAGE;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pde_entry->pt_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
/* Takes a virtual addr (addr) and returns the physical addr (entry) as defined in the page table
*/
static pt_entry_type_t pte32_lookup(pte32_t * pt, addr_t addr, addr_t * entry) {
- pte32_t * pte_entry = &(pt[PTE32_INDEX(addr)]);
+ pte32_t * pte_entry = &(pt[PTE32_INDEX(addr)]);
- if (!pte_entry->present) {
- *entry = 0;
- // PrintDebug("Lookup at non present page (index=%d)\n", PTE32_INDEX(addr));
- return PT_ENTRY_NOT_PRESENT;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pte_entry->page_base_addr);
+ if (!pte_entry->present) {
+ *entry = 0;
+ // PrintDebug("Lookup at non present page (index=%d)\n", PTE32_INDEX(addr));
+ return PT_ENTRY_NOT_PRESENT;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pte_entry->page_base_addr);
- return PT_ENTRY_PAGE;
- }
+ return PT_ENTRY_PAGE;
+ }
}
*
**/
static pt_entry_type_t pdpe32pae_lookup(pdpe32pae_t * pdp, addr_t addr, addr_t * entry) {
- pdpe32pae_t * pdpe_entry = &(pdp[PDPE32PAE_INDEX(addr)]);
+ pdpe32pae_t * pdpe_entry = &(pdp[PDPE32PAE_INDEX(addr)]);
- if (!pdpe_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pdpe_entry->pd_base_addr);
- return PT_ENTRY_PAGE;
- }
+ if (!pdpe_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pdpe_entry->pd_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
static pt_entry_type_t pde32pae_lookup(pde32pae_t * pd, addr_t addr, addr_t * entry) {
- pde32pae_t * pde_entry = &(pd[PDE32PAE_INDEX(addr)]);
+ pde32pae_t * pde_entry = &(pd[PDE32PAE_INDEX(addr)]);
- if (!pde_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else if (pde_entry->large_page) {
- pde32pae_2MB_t * large_pde = (pde32pae_2MB_t *)pde_entry;
+ if (!pde_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else if (pde_entry->large_page) {
+ pde32pae_2MB_t * large_pde = (pde32pae_2MB_t *)pde_entry;
- *entry = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
+ *entry = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
- return PT_ENTRY_LARGE_PAGE;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pde_entry->pt_base_addr);
- return PT_ENTRY_PAGE;
- }
+ return PT_ENTRY_LARGE_PAGE;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pde_entry->pt_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
static pt_entry_type_t pte32pae_lookup(pte32pae_t * pt, addr_t addr, addr_t * entry) {
- pte32pae_t * pte_entry = &(pt[PTE32PAE_INDEX(addr)]);
+ pte32pae_t * pte_entry = &(pt[PTE32PAE_INDEX(addr)]);
- if (!pte_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pte_entry->page_base_addr);
- return PT_ENTRY_PAGE;
- }
+ if (!pte_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pte_entry->page_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
*
**/
static pt_entry_type_t pml4e64_lookup(pml4e64_t * pml, addr_t addr, addr_t * entry) {
- pml4e64_t * pml_entry = &(pml[PML4E64_INDEX(addr)]);
+ pml4e64_t * pml_entry = &(pml[PML4E64_INDEX(addr)]);
- if (!pml_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pml_entry->pdp_base_addr);
- return PT_ENTRY_PAGE;
- }
+ if (!pml_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pml_entry->pdp_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
static pt_entry_type_t pdpe64_lookup(pdpe64_t * pdp, addr_t addr, addr_t * entry) {
- pdpe64_t * pdpe_entry = &(pdp[PDPE64_INDEX(addr)]);
+ pdpe64_t * pdpe_entry = &(pdp[PDPE64_INDEX(addr)]);
- if (!pdpe_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else if (pdpe_entry->large_page) {
- PrintError("1 Gigabyte pages not supported\n");
- V3_ASSERT(0);
- return -1;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pdpe_entry->pd_base_addr);
- return PT_ENTRY_PAGE;
- }
+ if (!pdpe_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else if (pdpe_entry->large_page) {
+ PrintError("1 Gigabyte pages not supported\n");
+ V3_ASSERT(0);
+ return -1;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pdpe_entry->pd_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
static pt_entry_type_t pde64_lookup(pde64_t * pd, addr_t addr, addr_t * entry) {
- pde64_t * pde_entry = &(pd[PDE64_INDEX(addr)]);
+ pde64_t * pde_entry = &(pd[PDE64_INDEX(addr)]);
- if (!pde_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else if (pde_entry->large_page) {
- pde64_2MB_t * large_pde = (pde64_2MB_t *)pde_entry;
+ if (!pde_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else if (pde_entry->large_page) {
+ pde64_2MB_t * large_pde = (pde64_2MB_t *)pde_entry;
- *entry = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
+ *entry = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
- return PT_ENTRY_LARGE_PAGE;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pde_entry->pt_base_addr);
- return PT_ENTRY_PAGE;
- }
+ return PT_ENTRY_LARGE_PAGE;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pde_entry->pt_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
static pt_entry_type_t pte64_lookup(pte64_t * pt, addr_t addr, addr_t * entry) {
- pte64_t * pte_entry = &(pt[PTE64_INDEX(addr)]);
+ pte64_t * pte_entry = &(pt[PTE64_INDEX(addr)]);
- if (!pte_entry->present) {
- *entry = 0;
- return PT_ENTRY_NOT_PRESENT;
- } else {
- *entry = BASE_TO_PAGE_ADDR(pte_entry->page_base_addr);
- return PT_ENTRY_PAGE;
- }
+ if (!pte_entry->present) {
+ *entry = 0;
+ return PT_ENTRY_NOT_PRESENT;
+ } else {
+ *entry = BASE_TO_PAGE_ADDR(pte_entry->page_base_addr);
+ return PT_ENTRY_PAGE;
+ }
}
static pt_access_status_t can_access_pt_entry(gen_pt_t * pt, pf_error_t access_type) {
- if (pt->present == 0) {
- return PT_ACCESS_NOT_PRESENT;
- } else if ((pt->writable == 0) && (access_type.write == 1)) {
- return PT_ACCESS_WRITE_ERROR;
- } else if ((pt->user_page == 0) && (access_type.user == 1)) {
- // Check CR0.WP?
- return PT_ACCESS_USER_ERROR;
- }
+ if (pt->present == 0) {
+ return PT_ACCESS_NOT_PRESENT;
+ } else if ((pt->writable == 0) && (access_type.write == 1)) {
+ return PT_ACCESS_WRITE_ERROR;
+ } else if ((pt->user_page == 0) && (access_type.user == 1)) {
+ // Check CR0.WP?
+ return PT_ACCESS_USER_ERROR;
+ }
- return PT_ACCESS_OK;
+ return PT_ACCESS_OK;
}
* 32 bit access checks
*/
pt_access_status_t inline v3_can_access_pde32(pde32_t * pde, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pde[PDE32_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pde[PDE32_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
pt_access_status_t inline v3_can_access_pte32(pte32_t * pte, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pte[PTE32_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pte[PTE32_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
* 32 bit PAE access checks
*/
pt_access_status_t inline v3_can_access_pdpe32pae(pdpe32pae_t * pdpe, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pdpe[PDPE32PAE_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pdpe[PDPE32PAE_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
pt_access_status_t inline v3_can_access_pde32pae(pde32pae_t * pde, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pde[PDE32PAE_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pde[PDE32PAE_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
pt_access_status_t inline v3_can_access_pte32pae(pte32pae_t * pte, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pte[PTE32PAE_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pte[PTE32PAE_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
/*
* 64 Bit access checks
*/
pt_access_status_t inline v3_can_access_pml4e64(pml4e64_t * pmle, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pmle[PML4E64_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pmle[PML4E64_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
pt_access_status_t inline v3_can_access_pdpe64(pdpe64_t * pdpe, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pdpe[PDPE64_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pdpe[PDPE64_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
pt_access_status_t inline v3_can_access_pde64(pde64_t * pde, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pde[PDE64_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pde[PDE64_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
pt_access_status_t inline v3_can_access_pte64(pte64_t * pte, addr_t addr, pf_error_t access_type) {
- gen_pt_t * entry = (gen_pt_t *)&pte[PTE64_INDEX(addr)];
- return can_access_pt_entry(entry, access_type);
+ gen_pt_t * entry = (gen_pt_t *)&pte[PTE64_INDEX(addr)];
+ return can_access_pt_entry(entry, access_type);
}
-
-
-
-
-/* We generate a page table to correspond to a given memory layout
- * pulling pages from the mem_list when necessary
- * If there are any gaps in the layout, we add them as unmapped pages
- */
-pde32_t * create_passthrough_pts_32(struct guest_info * guest_info) {
- addr_t current_page_addr = 0;
- int i, j;
-
- pde32_t * pde = V3_VAddr(V3_AllocPages(1));
-
- for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
- int pte_present = 0;
- pte32_t * pte = V3_VAddr(V3_AllocPages(1));
-
-
- for (j = 0; j < MAX_PTE32_ENTRIES; j++) {
- struct v3_shadow_region * region = v3_get_shadow_region(guest_info, current_page_addr);
-
- if (!region ||
- (region->host_type == SHDW_REGION_FULL_HOOK)) {
- pte[j].present = 0;
- pte[j].writable = 0;
- pte[j].user_page = 0;
- pte[j].write_through = 0;
- pte[j].cache_disable = 0;
- pte[j].accessed = 0;
- pte[j].dirty = 0;
- pte[j].pte_attr = 0;
- pte[j].global_page = 0;
- pte[j].vmm_info = 0;
- pte[j].page_base_addr = 0;
- } else {
- addr_t host_addr;
- pte[j].present = 1;
-
- if (region->host_type == SHDW_REGION_WRITE_HOOK) {
- pte[j].writable = 0;
- PrintDebug("Marking Write hook host_addr %p as RO\n", (void *)current_page_addr);
- } else {
- pte[j].writable = 1;
- }
-
- pte[j].user_page = 1;
- pte[j].write_through = 0;
- pte[j].cache_disable = 0;
- pte[j].accessed = 0;
- pte[j].dirty = 0;
- pte[j].pte_attr = 0;
- pte[j].global_page = 0;
- pte[j].vmm_info = 0;
-
- if (guest_pa_to_host_pa(guest_info, current_page_addr, &host_addr) == -1) {
- // BIG ERROR
- // PANIC
- return NULL;
- }
-
- pte[j].page_base_addr = host_addr >> 12;
-
- pte_present = 1;
- }
-
- current_page_addr += PAGE_SIZE;
- }
-
- if (pte_present == 0) {
- V3_FreePage(V3_PAddr(pte));
-
- pde[i].present = 0;
- pde[i].writable = 0;
- pde[i].user_page = 0;
- pde[i].write_through = 0;
- pde[i].cache_disable = 0;
- pde[i].accessed = 0;
- pde[i].reserved = 0;
- pde[i].large_page = 0;
- pde[i].global_page = 0;
- pde[i].vmm_info = 0;
- pde[i].pt_base_addr = 0;
- } else {
- pde[i].present = 1;
- pde[i].writable = 1;
- pde[i].user_page = 1;
- pde[i].write_through = 0;
- pde[i].cache_disable = 0;
- pde[i].accessed = 0;
- pde[i].reserved = 0;
- pde[i].large_page = 0;
- pde[i].global_page = 0;
- pde[i].vmm_info = 0;
- pde[i].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
+int v3_drill_host_pt_32(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr,
+ int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
+ void * private_data) {
+ pde32_t * host_pde = (pde32_t *)CR3_TO_PDE32_VA(host_cr3);
+ addr_t host_pde_pa = CR3_TO_PDE32_PA(host_cr3);
+ addr_t host_pte_pa = 0;
+ addr_t page_pa = 0;
+ int ret;
+
+ if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)host_pde, host_pde_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PD32;
}
- }
-
- return pde;
-}
-
-
-/* We generate a page table to correspond to a given memory layout
- * pulling pages from the mem_list when necessary
- * If there are any gaps in the layout, we add them as unmapped pages
- */
-pdpe32pae_t * create_passthrough_pts_32PAE(struct guest_info * guest_info) {
- addr_t current_page_addr = 0;
- int i, j, k;
-
- pdpe32pae_t * pdpe = V3_VAddr(V3_AllocPages(1));
- memset(pdpe, 0, PAGE_SIZE);
-
- for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
- int pde_present = 0;
- pde32pae_t * pde = V3_VAddr(V3_AllocPages(1));
-
- for (j = 0; j < MAX_PDE32PAE_ENTRIES; j++) {
-
-
- int pte_present = 0;
- pte32pae_t * pte = V3_VAddr(V3_AllocPages(1));
-
-
- for (k = 0; k < MAX_PTE32PAE_ENTRIES; k++) {
- struct v3_shadow_region * region = v3_get_shadow_region(guest_info, current_page_addr);
-
- if (!region ||
- (region->host_type == SHDW_REGION_FULL_HOOK)) {
- pte[k].present = 0;
- pte[k].writable = 0;
- pte[k].user_page = 0;
- pte[k].write_through = 0;
- pte[k].cache_disable = 0;
- pte[k].accessed = 0;
- pte[k].dirty = 0;
- pte[k].pte_attr = 0;
- pte[k].global_page = 0;
- pte[k].vmm_info = 0;
- pte[k].page_base_addr = 0;
- pte[k].rsvd = 0;
- } else {
- addr_t host_addr;
- pte[k].present = 1;
-
- if (region->host_type == SHDW_REGION_WRITE_HOOK) {
- pte[k].writable = 0;
- } else {
- pte[k].writable = 1;
- }
-
- pte[k].user_page = 1;
- pte[k].write_through = 0;
- pte[k].cache_disable = 0;
- pte[k].accessed = 0;
- pte[k].dirty = 0;
- pte[k].pte_attr = 0;
- pte[k].global_page = 0;
- pte[k].vmm_info = 0;
-
- if (guest_pa_to_host_pa(guest_info, current_page_addr, &host_addr) == -1) {
- // BIG ERROR
- // PANIC
- return NULL;
- }
-
- pte[k].page_base_addr = host_addr >> 12;
- pte[k].rsvd = 0;
-
- pte_present = 1;
- }
-
- current_page_addr += PAGE_SIZE;
- }
-
- if (pte_present == 0) {
- V3_FreePage(V3_PAddr(pte));
-
- pde[j].present = 0;
- pde[j].writable = 0;
- pde[j].user_page = 0;
- pde[j].write_through = 0;
- pde[j].cache_disable = 0;
- pde[j].accessed = 0;
- pde[j].avail = 0;
- pde[j].large_page = 0;
- pde[j].global_page = 0;
- pde[j].vmm_info = 0;
- pde[j].pt_base_addr = 0;
- pde[j].rsvd = 0;
- } else {
- pde[j].present = 1;
- pde[j].writable = 1;
- pde[j].user_page = 1;
- pde[j].write_through = 0;
- pde[j].cache_disable = 0;
- pde[j].accessed = 0;
- pde[j].avail = 0;
- pde[j].large_page = 0;
- pde[j].global_page = 0;
- pde[j].vmm_info = 0;
- pde[j].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
- pde[j].rsvd = 0;
-
- pde_present = 1;
- }
-
- }
-
- if (pde_present == 0) {
- V3_FreePage(V3_PAddr(pde));
-
- pdpe[i].present = 0;
- pdpe[i].rsvd = 0;
- pdpe[i].write_through = 0;
- pdpe[i].cache_disable = 0;
- pdpe[i].accessed = 0;
- pdpe[i].avail = 0;
- pdpe[i].rsvd2 = 0;
- pdpe[i].vmm_info = 0;
- pdpe[i].pd_base_addr = 0;
- pdpe[i].rsvd3 = 0;
- } else {
- pdpe[i].present = 1;
- pdpe[i].rsvd = 0;
- pdpe[i].write_through = 0;
- pdpe[i].cache_disable = 0;
- pdpe[i].accessed = 0;
- pdpe[i].avail = 0;
- pdpe[i].rsvd2 = 0;
- pdpe[i].vmm_info = 0;
- pdpe[i].pd_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pde));
- pdpe[i].rsvd3 = 0;
- }
+ switch (pde32_lookup(host_pde, vaddr, &host_pte_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ if ((ret == callback(info, PAGE_4MB, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4MB;
+ }
+ return 0;
+ case PT_ENTRY_PAGE:
+ if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PT32;
+ }
- }
-
-
- return pdpe;
-}
-
-
-
-
-
-
-pml4e64_t * create_passthrough_pts_64(struct guest_info * info) {
- addr_t current_page_addr = 0;
- int i, j, k, m;
-
- pml4e64_t * pml = V3_VAddr(V3_AllocPages(1));
-
- for (i = 0; i < 1; i++) {
- int pdpe_present = 0;
- pdpe64_t * pdpe = V3_VAddr(V3_AllocPages(1));
-
- for (j = 0; j < 20; j++) {
- int pde_present = 0;
- pde64_t * pde = V3_VAddr(V3_AllocPages(1));
-
- for (k = 0; k < MAX_PDE64_ENTRIES; k++) {
- int pte_present = 0;
- pte64_t * pte = V3_VAddr(V3_AllocPages(1));
-
-
- for (m = 0; m < MAX_PTE64_ENTRIES; m++) {
- struct v3_shadow_region * region = v3_get_shadow_region(info, current_page_addr);
-
-
-
- if (!region ||
- (region->host_type == SHDW_REGION_FULL_HOOK)) {
- pte[m].present = 0;
- pte[m].writable = 0;
- pte[m].user_page = 0;
- pte[m].write_through = 0;
- pte[m].cache_disable = 0;
- pte[m].accessed = 0;
- pte[m].dirty = 0;
- pte[m].pte_attr = 0;
- pte[m].global_page = 0;
- pte[m].vmm_info = 0;
- pte[m].page_base_addr = 0;
- } else {
- addr_t host_addr;
- pte[m].present = 1;
-
- if (region->host_type == SHDW_REGION_WRITE_HOOK) {
- pte[m].writable = 0;
+ if (pte32_lookup(V3_VAddr((void *)host_pte_pa), vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
+ return -1;
} else {
- pte[m].writable = 1;
- }
-
- pte[m].user_page = 1;
- pte[m].write_through = 0;
- pte[m].cache_disable = 0;
- pte[m].accessed = 0;
- pte[m].dirty = 0;
- pte[m].pte_attr = 0;
- pte[m].global_page = 0;
- pte[m].vmm_info = 0;
-
- if (guest_pa_to_host_pa(info, current_page_addr, &host_addr) == -1) {
- // BIG ERROR
- // PANIC
- return NULL;
+ if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)PAGE_BASE_ADDR(page_pa)), page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4KB;
+ }
+ return 0;
}
-
- pte[m].page_base_addr = PAGE_BASE_ADDR(host_addr);
-
- //PrintPTE64(current_page_addr, &(pte[m]));
-
- pte_present = 1;
- }
-
-
-
-
- current_page_addr += PAGE_SIZE;
- }
-
- if (pte_present == 0) {
- V3_FreePage(V3_PAddr(pte));
-
- pde[k].present = 0;
- pde[k].writable = 0;
- pde[k].user_page = 0;
- pde[k].write_through = 0;
- pde[k].cache_disable = 0;
- pde[k].accessed = 0;
- pde[k].avail = 0;
- pde[k].large_page = 0;
- //pde[k].global_page = 0;
- pde[k].vmm_info = 0;
- pde[k].pt_base_addr = 0;
- } else {
- pde[k].present = 1;
- pde[k].writable = 1;
- pde[k].user_page = 1;
- pde[k].write_through = 0;
- pde[k].cache_disable = 0;
- pde[k].accessed = 0;
- pde[k].avail = 0;
- pde[k].large_page = 0;
- //pde[k].global_page = 0;
- pde[k].vmm_info = 0;
- pde[k].pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pte));
-
- pde_present = 1;
- }
- }
-
- if (pde_present == 0) {
- V3_FreePage(V3_PAddr(pde));
-
- pdpe[j].present = 0;
- pdpe[j].writable = 0;
- pdpe[j].user_page = 0;
- pdpe[j].write_through = 0;
- pdpe[j].cache_disable = 0;
- pdpe[j].accessed = 0;
- pdpe[j].avail = 0;
- pdpe[j].large_page = 0;
- //pdpe[j].global_page = 0;
- pdpe[j].vmm_info = 0;
- pdpe[j].pd_base_addr = 0;
- } else {
- pdpe[j].present = 1;
- pdpe[j].writable = 1;
- pdpe[j].user_page = 1;
- pdpe[j].write_through = 0;
- pdpe[j].cache_disable = 0;
- pdpe[j].accessed = 0;
- pdpe[j].avail = 0;
- pdpe[j].large_page = 0;
- //pdpe[j].global_page = 0;
- pdpe[j].vmm_info = 0;
- pdpe[j].pd_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pde));
-
-
- pdpe_present = 1;
- }
-
}
-
- PrintDebug("PML index=%d\n", i);
-
- if (pdpe_present == 0) {
- V3_FreePage(V3_PAddr(pdpe));
-
- pml[i].present = 0;
- pml[i].writable = 0;
- pml[i].user_page = 0;
- pml[i].write_through = 0;
- pml[i].cache_disable = 0;
- pml[i].accessed = 0;
- pml[i].reserved = 0;
- //pml[i].large_page = 0;
- //pml[i].global_page = 0;
- pml[i].vmm_info = 0;
- pml[i].pdp_base_addr = 0;
- } else {
- pml[i].present = 1;
- pml[i].writable = 1;
- pml[i].user_page = 1;
- pml[i].write_through = 0;
- pml[i].cache_disable = 0;
- pml[i].accessed = 0;
- pml[i].reserved = 0;
- //pml[i].large_page = 0;
- //pml[i].global_page = 0;
- pml[i].vmm_info = 0;
- pml[i].pdp_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(pdpe));
- }
- }
-
- return pml;
-}
-
-
-int v3_drill_host_pt_32(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr,
- int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
- void * private_data) {
- pde32_t * host_pde = (pde32_t *)CR3_TO_PDE32_VA(host_cr3);
- addr_t host_pde_pa = CR3_TO_PDE32_PA(host_cr3);
- addr_t host_pte_pa = 0;
- addr_t page_pa = 0;
- int ret;
-
- if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)host_pde, host_pde_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PD32;
- }
-
- switch (pde32_lookup(host_pde, vaddr, &host_pte_pa)) {
- case PT_ENTRY_NOT_PRESENT:
return -1;
- case PT_ENTRY_LARGE_PAGE:
- if ((ret == callback(info, PAGE_4MB, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4MB;
- }
- return 0;
- case PT_ENTRY_PAGE:
- if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PT32;
- }
-
- if (pte32_lookup(V3_VAddr((void *)host_pte_pa), vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
- return -1;
- } else {
- if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)PAGE_BASE_ADDR(page_pa)), page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4KB;
- }
- return 0;
- }
- }
- return -1;
}
int v3_drill_host_pt_32pae(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- pdpe32pae_t * host_pdpe = (pdpe32pae_t *)CR3_TO_PDPE32PAE_VA(host_cr3);
- addr_t host_pdpe_pa = CR3_TO_PDPE32PAE_PA(host_cr3);
- addr_t host_pde_pa = 0;
- addr_t host_pte_pa = 0;
- addr_t page_pa = 0;
- int ret;
-
- if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)host_pdpe, host_pdpe_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PDP32PAE;
- }
-
- switch (pdpe32pae_lookup(host_pdpe, vaddr, &host_pde_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_PAGE:
-
- if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)V3_VAddr((void *)host_pde_pa), host_pde_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PD32PAE;
+ pdpe32pae_t * host_pdpe = (pdpe32pae_t *)CR3_TO_PDPE32PAE_VA(host_cr3);
+ addr_t host_pdpe_pa = CR3_TO_PDPE32PAE_PA(host_cr3);
+ addr_t host_pde_pa = 0;
+ addr_t host_pte_pa = 0;
+ addr_t page_pa = 0;
+ int ret;
+
+ if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)host_pdpe, host_pdpe_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PDP32PAE;
}
+
+ switch (pdpe32pae_lookup(host_pdpe, vaddr, &host_pde_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_PAGE:
+
+ if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)V3_VAddr((void *)host_pde_pa), host_pde_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PD32PAE;
+ }
- switch (pde32pae_lookup(V3_VAddr((void *)host_pde_pa), vaddr, &host_pte_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- if ((ret == callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_2MB;
- }
- return 0;
- case PT_ENTRY_PAGE:
- if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PT32PAE;
- }
-
- if (pte32pae_lookup(V3_VAddr((void *)host_pte_pa), vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
- return -1;
- } else {
- if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)PAGE_BASE_ADDR(page_pa)), page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4KB;
- }
- return 0;
- }
+ switch (pde32pae_lookup(V3_VAddr((void *)host_pde_pa), vaddr, &host_pte_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ if ((ret == callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_2MB;
+ }
+ return 0;
+ case PT_ENTRY_PAGE:
+ if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PT32PAE;
+ }
+
+ if (pte32pae_lookup(V3_VAddr((void *)host_pte_pa), vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
+ return -1;
+ } else {
+ if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)PAGE_BASE_ADDR(page_pa)), page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4KB;
+ }
+ return 0;
+ }
+ }
+ default:
+ return -1;
}
- default:
- return -1;
- }
- // should never get here
- return -1;
+ // should never get here
+ return -1;
}
int v3_drill_host_pt_64(struct guest_info * info, v3_reg_t host_cr3, addr_t vaddr,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- pml4e64_t * host_pmle = (pml4e64_t *)CR3_TO_PML4E64_VA(host_cr3);
- addr_t host_pmle_pa = CR3_TO_PML4E64_PA(host_cr3);
- addr_t host_pdpe_pa = 0;
- addr_t host_pde_pa = 0;
- addr_t host_pte_pa = 0;
- addr_t page_pa = 0;
- int ret;
-
- if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)host_pmle, host_pmle_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PML464;
- }
-
- switch(pml4e64_lookup(host_pmle, vaddr, &host_pdpe_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_PAGE:
-
- if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)V3_VAddr((void *)host_pdpe_pa), host_pdpe_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PDP64;
+ pml4e64_t * host_pmle = (pml4e64_t *)CR3_TO_PML4E64_VA(host_cr3);
+ addr_t host_pmle_pa = CR3_TO_PML4E64_PA(host_cr3);
+ addr_t host_pdpe_pa = 0;
+ addr_t host_pde_pa = 0;
+ addr_t host_pte_pa = 0;
+ addr_t page_pa = 0;
+ int ret;
+
+ if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)host_pmle, host_pmle_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PML464;
}
- switch(pdpe64_lookup(V3_VAddr((void *)host_pdpe_pa), vaddr, &host_pde_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- if ((ret == callback(info, PAGE_1GB, vaddr, (addr_t)V3_VAddr((void *)host_pde_pa), host_pde_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_1GB;
- }
- PrintError("1 Gigabyte Pages not supported\n");
- return 0;
- case PT_ENTRY_PAGE:
-
- if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)V3_VAddr((void *)host_pde_pa), host_pde_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PD64;
- }
-
- switch (pde64_lookup(V3_VAddr((void *)host_pde_pa), vaddr, &host_pte_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- if ((ret == callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_2MB;
- }
- return 0;
- case PT_ENTRY_PAGE:
+ switch(pml4e64_lookup(host_pmle, vaddr, &host_pdpe_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_PAGE:
- if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PT64;
- }
+ if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)V3_VAddr((void *)host_pdpe_pa), host_pdpe_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PDP64;
+ }
- if (pte64_lookup(V3_VAddr((void *)host_pte_pa), vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
- return -1;
- } else {
- if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)PAGE_BASE_ADDR(page_pa)), page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4KB;
- }
- return 0;
- }
- }
+ switch(pdpe64_lookup(V3_VAddr((void *)host_pdpe_pa), vaddr, &host_pde_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ if ((ret == callback(info, PAGE_1GB, vaddr, (addr_t)V3_VAddr((void *)host_pde_pa), host_pde_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_1GB;
+ }
+ PrintError("1 Gigabyte Pages not supported\n");
+ return 0;
+ case PT_ENTRY_PAGE:
+
+ if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)V3_VAddr((void *)host_pde_pa), host_pde_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PD64;
+ }
+
+ switch (pde64_lookup(V3_VAddr((void *)host_pde_pa), vaddr, &host_pte_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ if ((ret == callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_2MB;
+ }
+ return 0;
+ case PT_ENTRY_PAGE:
+
+ if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)V3_VAddr((void *)host_pte_pa), host_pte_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PT64;
+ }
+
+ if (pte64_lookup(V3_VAddr((void *)host_pte_pa), vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
+ return -1;
+ } else {
+ if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)PAGE_BASE_ADDR(page_pa)), page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4KB;
+ }
+ return 0;
+ }
+ }
+ }
+ default:
+ return -1;
}
- default:
+ // should never get here
return -1;
- }
- // should never get here
- return -1;
}
int v3_drill_guest_pt_32(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- addr_t guest_pde_pa = CR3_TO_PDE32_PA(guest_cr3);
- pde32_t * guest_pde = NULL;
- addr_t guest_pte_pa = 0;
- int ret;
+ addr_t guest_pde_pa = CR3_TO_PDE32_PA(guest_cr3);
+ pde32_t * guest_pde = NULL;
+ addr_t guest_pte_pa = 0;
+ int ret;
- if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
- PrintError("Could not get virtual address of Guest PDE32 (PA=%p)\n",
- (void *)guest_pde_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
+ PrintError("Could not get virtual address of Guest PDE32 (PA=%p)\n",
+ (void *)guest_pde_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PD32;
- }
+ if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PD32;
+ }
- switch (pde32_lookup(guest_pde, vaddr, &guest_pte_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- {
- addr_t large_page_pa = (addr_t)guest_pte_pa;
- addr_t large_page_va = 0;
+ switch (pde32_lookup(guest_pde, vaddr, &guest_pte_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ {
+ addr_t large_page_pa = (addr_t)guest_pte_pa;
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintError("Could not get virtual address of Guest Page 4MB (PA=%p)\n",
- (void *)large_page_va);
- return -1;
- }
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintError("Could not get virtual address of Guest Page 4MB (PA=%p)\n",
+ (void *)large_page_va);
+ return -1;
+ }
- if ((ret == callback(info, PAGE_4MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4MB;
- }
- return 0;
- }
- case PT_ENTRY_PAGE:
- {
- pte32_t * guest_pte = NULL;
- addr_t page_pa;
-
- if (guest_pa_to_host_va(info, guest_pte_pa, (addr_t*)&guest_pte) == -1) {
- PrintError("Could not get virtual address of Guest PTE32 (PA=%p)\n",
- (void *)guest_pte_pa);
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)guest_pte, guest_pte_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PT32;
- }
-
- if (pte32_lookup(guest_pte, vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
- return -1;
- } else {
- addr_t page_va;
-
- if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
- PrintError("Could not get virtual address of Guest Page 4KB (PA=%p)\n",
- (void *)page_pa);
- return -1;
- }
+ if ((ret == callback(info, PAGE_4MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4MB;
+ }
+ return 0;
+ }
+ case PT_ENTRY_PAGE:
+ {
+ pte32_t * guest_pte = NULL;
+ addr_t page_pa;
- if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4KB;
- }
- return 0;
- }
+ if (guest_pa_to_host_va(info, guest_pte_pa, (addr_t*)&guest_pte) == -1) {
+ PrintError("Could not get virtual address of Guest PTE32 (PA=%p)\n",
+ (void *)guest_pte_pa);
+ return -1;
+ }
+
+ if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)guest_pte, guest_pte_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PT32;
+ }
+
+ if (pte32_lookup(guest_pte, vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
+ return -1;
+ } else {
+ addr_t page_va;
+
+ if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
+ PrintError("Could not get virtual address of Guest Page 4KB (PA=%p)\n",
+ (void *)page_pa);
+ return -1;
+ }
+
+ if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4KB;
+ }
+ return 0;
+ }
+ }
}
- }
- // should never get here
- PrintError("End of drill function (guest 32)... Should never have gotten here...\n");
- return -1;
+ // should never get here
+ PrintError("End of drill function (guest 32)... Should never have gotten here...\n");
+ return -1;
}
int v3_drill_guest_pt_32pae(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
- int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
- void * private_data) {
- addr_t guest_pdpe_pa = CR3_TO_PDPE32PAE_PA(guest_cr3);
- pdpe32pae_t * guest_pdpe = 0;
- addr_t guest_pde_pa = 0;
- int ret = 0;
-
- if (guest_pa_to_host_va(info, guest_pdpe_pa, (addr_t*)&guest_pdpe) == -1) {
- PrintError("Could not get virtual address of Guest PDPE32PAE (PA=%p)\n",
- (void *)guest_pdpe_pa);
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)guest_pdpe, guest_pdpe_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PDP32PAE;
- }
-
- switch (pdpe32pae_lookup(guest_pdpe, vaddr, &guest_pde_pa))
- {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_PAGE:
- {
- pde32pae_t * guest_pde = NULL;
- addr_t guest_pte_pa = 0;
+ int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
+ void * private_data) {
+ addr_t guest_pdpe_pa = CR3_TO_PDPE32PAE_PA(guest_cr3);
+ pdpe32pae_t * guest_pdpe = 0;
+ addr_t guest_pde_pa = 0;
+ int ret = 0;
+
+ if (guest_pa_to_host_va(info, guest_pdpe_pa, (addr_t*)&guest_pdpe) == -1) {
+ PrintError("Could not get virtual address of Guest PDPE32PAE (PA=%p)\n",
+ (void *)guest_pdpe_pa);
+ return -1;
+ }
+
+ if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)guest_pdpe, guest_pdpe_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PDP32PAE;
+ }
+
+ switch (pdpe32pae_lookup(guest_pdpe, vaddr, &guest_pde_pa))
+ {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_PAGE:
+ {
+ pde32pae_t * guest_pde = NULL;
+ addr_t guest_pte_pa = 0;
- if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
- PrintError("Could not get virtual Address of Guest PDE32PAE (PA=%p)\n",
- (void *)guest_pde_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
+ PrintError("Could not get virtual Address of Guest PDE32PAE (PA=%p)\n",
+ (void *)guest_pde_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PD32PAE;
- }
+ if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PD32PAE;
+ }
- switch (pde32pae_lookup(guest_pde, vaddr, &guest_pte_pa))
- {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- {
- addr_t large_page_pa = (addr_t)guest_pte_pa;
- addr_t large_page_va = 0;
+ switch (pde32pae_lookup(guest_pde, vaddr, &guest_pte_pa))
+ {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ {
+ addr_t large_page_pa = (addr_t)guest_pte_pa;
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest Page 2MB (PA=%p)\n",
- (void *)large_page_va);
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest Page 2MB (PA=%p)\n",
+ (void *)large_page_va);
- }
+ }
- if ((ret == callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_2MB;
- }
- return 0;
- }
- case PT_ENTRY_PAGE:
- {
- pte32pae_t * guest_pte = NULL;
- addr_t page_pa;
-
- if (guest_pa_to_host_va(info, guest_pte_pa, (addr_t *)&guest_pte) == -1) {
- PrintError("Could not get virtual Address of Guest PTE32PAE (PA=%p)\n",
- (void *)guest_pte_pa);
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)guest_pte, guest_pte_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PT32PAE;
- }
-
- if (pte32pae_lookup(guest_pte, vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
- return -1;
- } else {
- addr_t page_va;
+ if ((ret == callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_2MB;
+ }
+ return 0;
+ }
+ case PT_ENTRY_PAGE:
+ {
+ pte32pae_t * guest_pte = NULL;
+ addr_t page_pa;
+
+ if (guest_pa_to_host_va(info, guest_pte_pa, (addr_t *)&guest_pte) == -1) {
+ PrintError("Could not get virtual Address of Guest PTE32PAE (PA=%p)\n",
+ (void *)guest_pte_pa);
+ return -1;
+ }
+
+ if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)guest_pte, guest_pte_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PT32PAE;
+ }
+
+ if (pte32pae_lookup(guest_pte, vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
+ return -1;
+ } else {
+ addr_t page_va;
- if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
- PrintError("Could not get virtual address of Guest Page 4KB (PA=%p)\n",
- (void *)page_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
+ PrintError("Could not get virtual address of Guest Page 4KB (PA=%p)\n",
+ (void *)page_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4KB;
+ if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4KB;
+ }
+ return 0;
+ }
+ }
+ }
}
- return 0;
- }
- }
- }
- }
- default:
- PrintError("Invalid page type for PD32PAE\n");
- return -1;
- }
+ default:
+ PrintError("Invalid page type for PD32PAE\n");
+ return -1;
+ }
- // should never get here
- PrintError("End of drill function (guest 32pae)... Should never have gotten here...\n");
- return -1;
+ // should never get here
+ PrintError("End of drill function (guest 32pae)... Should never have gotten here...\n");
+ return -1;
}
int v3_drill_guest_pt_64(struct guest_info * info, v3_reg_t guest_cr3, addr_t vaddr,
- int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
- void * private_data) {
- addr_t guest_pml4_pa = CR3_TO_PML4E64_PA(guest_cr3);
- pml4e64_t * guest_pmle = 0;
- addr_t guest_pdpe_pa = 0;
- int ret = 0;
-
- if (guest_pa_to_host_va(info, guest_pml4_pa, (addr_t*)&guest_pmle) == -1) {
- PrintError("Could not get virtual address of Guest PML4E64 (PA=%p)\n",
- (void *)guest_pml4_pa);
- return -1;
- }
+ int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
+ void * private_data) {
+ addr_t guest_pml4_pa = CR3_TO_PML4E64_PA(guest_cr3);
+ pml4e64_t * guest_pmle = 0;
+ addr_t guest_pdpe_pa = 0;
+ int ret = 0;
+
+ if (guest_pa_to_host_va(info, guest_pml4_pa, (addr_t*)&guest_pmle) == -1) {
+ PrintError("Could not get virtual address of Guest PML4E64 (PA=%p)\n",
+ (void *)guest_pml4_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)guest_pmle, guest_pml4_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PML464;
- }
+ if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)guest_pmle, guest_pml4_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PML464;
+ }
- switch (pml4e64_lookup(guest_pmle, vaddr, &guest_pdpe_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_PAGE:
- {
- pdpe64_t * guest_pdp = NULL;
- addr_t guest_pde_pa = 0;
+ switch (pml4e64_lookup(guest_pmle, vaddr, &guest_pdpe_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_PAGE:
+ {
+ pdpe64_t * guest_pdp = NULL;
+ addr_t guest_pde_pa = 0;
- if (guest_pa_to_host_va(info, guest_pdpe_pa, (addr_t *)&guest_pdp) == -1) {
- PrintError("Could not get virtual address of Guest PDPE64 (PA=%p)\n",
- (void *)guest_pdpe_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, guest_pdpe_pa, (addr_t *)&guest_pdp) == -1) {
+ PrintError("Could not get virtual address of Guest PDPE64 (PA=%p)\n",
+ (void *)guest_pdpe_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)guest_pdp, guest_pdpe_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PDP64;
- }
+ if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)guest_pdp, guest_pdpe_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PDP64;
+ }
- switch (pdpe64_lookup(guest_pdp, vaddr, &guest_pde_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- {
- addr_t large_page_pa = (addr_t)guest_pde_pa;
- addr_t large_page_va = 0;
+ switch (pdpe64_lookup(guest_pdp, vaddr, &guest_pde_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ {
+ addr_t large_page_pa = (addr_t)guest_pde_pa;
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest Page 1GB (PA=%p)\n",
- (void *)large_page_va);
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest Page 1GB (PA=%p)\n",
+ (void *)large_page_va);
- }
+ }
- if ((ret == callback(info, PAGE_1GB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_1GB;
- }
- PrintError("1 Gigabyte Pages not supported\n");
- return 0;
- }
- case PT_ENTRY_PAGE:
- {
- pde64_t * guest_pde = NULL;
- addr_t guest_pte_pa = 0;
-
- if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
- PrintError("Could not get virtual address of guest PDE64 (PA=%p)\n",
- (void *)guest_pde_pa);
- return -1;
- }
+ if ((ret == callback(info, PAGE_1GB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_1GB;
+ }
+ PrintError("1 Gigabyte Pages not supported\n");
+ return 0;
+ }
+ case PT_ENTRY_PAGE:
+ {
+ pde64_t * guest_pde = NULL;
+ addr_t guest_pte_pa = 0;
+
+ if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
+ PrintError("Could not get virtual address of guest PDE64 (PA=%p)\n",
+ (void *)guest_pde_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_PD64;
- }
-
- switch (pde64_lookup(guest_pde, vaddr, &guest_pte_pa)) {
- case PT_ENTRY_NOT_PRESENT:
- return -1;
- case PT_ENTRY_LARGE_PAGE:
- {
- addr_t large_page_pa = (addr_t)guest_pte_pa;
- addr_t large_page_va = 0;
+ if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_PD64;
+ }
+
+ switch (pde64_lookup(guest_pde, vaddr, &guest_pte_pa)) {
+ case PT_ENTRY_NOT_PRESENT:
+ return -1;
+ case PT_ENTRY_LARGE_PAGE:
+ {
+ addr_t large_page_pa = (addr_t)guest_pte_pa;
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest Page 2MB (PA=%p)\n",
- (void *)large_page_va);
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest Page 2MB (PA=%p)\n",
+ (void *)large_page_va);
- }
+ }
- if ((ret == callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_2MB;
- }
- return 0;
- }
- case PT_ENTRY_PAGE:
- {
- pte64_t * guest_pte = NULL;
- addr_t page_pa;
+ if ((ret == callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_2MB;
+ }
+ return 0;
+ }
+ case PT_ENTRY_PAGE:
+ {
+ pte64_t * guest_pte = NULL;
+ addr_t page_pa;
- if (guest_pa_to_host_va(info, guest_pte_pa, (addr_t *)&guest_pte) == -1) {
- PrintError("Could not get virtual address of guest PTE64 (PA=%p)\n",
- (void *)guest_pte_pa);
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)guest_pte, guest_pte_pa, private_data) != 0)) {
- return (ret == -1) ? -1 : PAGE_PT64;
- }
+ if (guest_pa_to_host_va(info, guest_pte_pa, (addr_t *)&guest_pte) == -1) {
+ PrintError("Could not get virtual address of guest PTE64 (PA=%p)\n",
+ (void *)guest_pte_pa);
+ return -1;
+ }
+
+ if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)guest_pte, guest_pte_pa, private_data) != 0)) {
+ return (ret == -1) ? -1 : PAGE_PT64;
+ }
- if (pte64_lookup(guest_pte, vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
- return -1;
- } else {
- addr_t page_va;
+ if (pte64_lookup(guest_pte, vaddr, &page_pa) == PT_ENTRY_NOT_PRESENT) {
+ return -1;
+ } else {
+ addr_t page_va;
- if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
- PrintError("Could not get virtual address of Guest Page 4KB (PA=%p)\n",
- (void *)page_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
+ PrintError("Could not get virtual address of Guest Page 4KB (PA=%p)\n",
+ (void *)page_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
- return (ret == -1) ? -1 : PAGE_4KB;
+ if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
+ return (ret == -1) ? -1 : PAGE_4KB;
+ }
+
+ return 0;
+ }
+ }
+ }
+ }
}
-
- return 0;
- }
}
- }
- }
- }
+ default:
+ return -1;
}
- default:
- return -1;
- }
- // should never get here
- PrintError("End of drill function (guest 64)... Should never have gotten here...\n");
- return -1;
+ // should never get here
+ PrintError("End of drill function (guest 64)... Should never have gotten here...\n");
+ return -1;
}
int v3_walk_guest_pt_32(struct guest_info * info, v3_reg_t guest_cr3,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- addr_t guest_pde_pa = CR3_TO_PDE32_PA(guest_cr3);
- pde32_t * guest_pde = NULL;
- int i, j;
- addr_t vaddr = 0;
- int ret = 0;
-
- if (!callback) {
- PrintError("Call back was not specified\n");
- return -1;
- }
+ addr_t guest_pde_pa = CR3_TO_PDE32_PA(guest_cr3);
+ pde32_t * guest_pde = NULL;
+ int i, j;
+ addr_t vaddr = 0;
+ int ret = 0;
+
+ if (!callback) {
+ PrintError("Call back was not specified\n");
+ return -1;
+ }
- if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
- PrintError("Could not get virtual address of Guest PDE32 (PA=%p)\n",
- (void *)guest_pde_pa);
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
- return ret;
- }
-
- for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
- if (guest_pde[i].present) {
- if (guest_pde[i].large_page) {
- pde32_4MB_t * large_pde = (pde32_4MB_t *)&(guest_pde[i]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_4MB(large_pde->page_base_addr);
- addr_t large_page_va = 0;
-
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 4MB Page (PA=%p)\n",
- (void *)large_page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- large_page_va = 0;
- }
+ if (guest_pa_to_host_va(info, guest_pde_pa, (addr_t *)&guest_pde) == -1) {
+ PrintError("Could not get virtual address of Guest PDE32 (PA=%p)\n",
+ (void *)guest_pde_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_4MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)guest_pde, guest_pde_pa, private_data)) != 0) {
+ return ret;
+ }
- vaddr += PAGE_SIZE_4MB;
- } else {
- addr_t pte_pa = BASE_TO_PAGE_ADDR(guest_pde[i].pt_base_addr);
- pte32_t * tmp_pte = NULL;
+ for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
+ if (guest_pde[i].present) {
+ if (guest_pde[i].large_page) {
+ pde32_4MB_t * large_pde = (pde32_4MB_t *)&(guest_pde[i]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_4MB(large_pde->page_base_addr);
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, pte_pa, (addr_t *)&tmp_pte) == -1) {
- PrintError("Could not get virtual address of Guest PTE32 (PA=%p)\n",
- (void *)pte_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 4MB Page (PA=%p)\n",
+ (void *)large_page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ large_page_va = 0;
+ }
- if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_4MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ vaddr += PAGE_SIZE_4MB;
+ } else {
+ addr_t pte_pa = BASE_TO_PAGE_ADDR(guest_pde[i].pt_base_addr);
+ pte32_t * tmp_pte = NULL;
- for (j = 0; j < MAX_PTE32_ENTRIES; j++) {
- if (tmp_pte[j].present) {
- addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[j].page_base_addr);
- addr_t page_va = 0;
+ if (guest_pa_to_host_va(info, pte_pa, (addr_t *)&tmp_pte) == -1) {
+ PrintError("Could not get virtual address of Guest PTE32 (PA=%p)\n",
+ (void *)pte_pa);
+ return -1;
+ }
- if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 4KB Page (PA=%p)\n",
- (void *)page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- page_va = 0;
- }
+ if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ for (j = 0; j < MAX_PTE32_ENTRIES; j++) {
+ if (tmp_pte[j].present) {
+ addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[j].page_base_addr);
+ addr_t page_va = 0;
+
+ if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 4KB Page (PA=%p)\n",
+ (void *)page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ page_va = 0;
+ }
- if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
- return ret;
- }
- }
+ if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
+ return ret;
+ }
+ }
- vaddr += PAGE_SIZE_4KB;
+ vaddr += PAGE_SIZE_4KB;
+ }
+ }
+ } else {
+ vaddr += PAGE_SIZE_4MB;
}
- }
- } else {
- vaddr += PAGE_SIZE_4MB;
}
- }
- return 0;
+ return 0;
}
int v3_walk_guest_pt_32pae(struct guest_info * info, v3_reg_t guest_cr3,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- addr_t guest_pdpe_pa = CR3_TO_PDPE32PAE_PA(guest_cr3);
- pdpe32pae_t * guest_pdpe = NULL;
- int i, j, k;
- addr_t vaddr = 0;
- int ret = 0;
-
- if (!callback) {
- PrintError("Call back was not specified\n");
- return -1;
- }
-
- if (guest_pa_to_host_va(info, guest_pdpe_pa, (addr_t *)&guest_pdpe) == -1) {
- PrintError("Could not get virtual address of Guest PDPE32PAE (PA=%p)\n",
- (void *)guest_pdpe_pa);
- return -1;
- }
+ addr_t guest_pdpe_pa = CR3_TO_PDPE32PAE_PA(guest_cr3);
+ pdpe32pae_t * guest_pdpe = NULL;
+ int i, j, k;
+ addr_t vaddr = 0;
+ int ret = 0;
+
+ if (!callback) {
+ PrintError("Call back was not specified\n");
+ return -1;
+ }
-
- if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)guest_pdpe, guest_pdpe_pa, private_data)) != 0) {
- return ret;
- }
-
- for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
- if (guest_pdpe[i].present) {
- addr_t pde_pa = BASE_TO_PAGE_ADDR(guest_pdpe[i].pd_base_addr);
- pde32pae_t * tmp_pde = NULL;
-
- if (guest_pa_to_host_va(info, pde_pa, (addr_t *)&tmp_pde) == -1) {
- PrintError("Could not get virtual address of Guest PDE32PAE (PA=%p)\n",
- (void *)pde_pa);
+ if (guest_pa_to_host_va(info, guest_pdpe_pa, (addr_t *)&guest_pdpe) == -1) {
+ PrintError("Could not get virtual address of Guest PDPE32PAE (PA=%p)\n",
+ (void *)guest_pdpe_pa);
return -1;
- }
+ }
- if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
+
+ if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)guest_pdpe, guest_pdpe_pa, private_data)) != 0) {
return ret;
- }
+ }
+
+ for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
+ if (guest_pdpe[i].present) {
+ addr_t pde_pa = BASE_TO_PAGE_ADDR(guest_pdpe[i].pd_base_addr);
+ pde32pae_t * tmp_pde = NULL;
+
+ if (guest_pa_to_host_va(info, pde_pa, (addr_t *)&tmp_pde) == -1) {
+ PrintError("Could not get virtual address of Guest PDE32PAE (PA=%p)\n",
+ (void *)pde_pa);
+ return -1;
+ }
+
+ if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
+ return ret;
+ }
- for (j = 0; j < MAX_PDE32PAE_ENTRIES; j++) {
- if (tmp_pde[j].present) {
- if (tmp_pde[j].large_page) {
- pde32pae_2MB_t * large_pde = (pde32pae_2MB_t *)&(tmp_pde[j]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
- addr_t large_page_va = 0;
+ for (j = 0; j < MAX_PDE32PAE_ENTRIES; j++) {
+ if (tmp_pde[j].present) {
+ if (tmp_pde[j].large_page) {
+ pde32pae_2MB_t * large_pde = (pde32pae_2MB_t *)&(tmp_pde[j]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 2MB Page (PA=%p)\n",
- (void *)large_page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- large_page_va = 0;
- }
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 2MB Page (PA=%p)\n",
+ (void *)large_page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ large_page_va = 0;
+ }
- if ((ret = callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return ret;
- }
-
- vaddr += PAGE_SIZE_2MB;
- } else {
- addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[j].pt_base_addr);
- pte32pae_t * tmp_pte = NULL;
+ if ((ret = callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ vaddr += PAGE_SIZE_2MB;
+ } else {
+ addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[j].pt_base_addr);
+ pte32pae_t * tmp_pte = NULL;
- if (guest_pa_to_host_va(info, pte_pa, (addr_t *)&tmp_pte) == -1) {
- PrintError("Could not get virtual address of Guest PTE32PAE (PA=%p)\n",
- (void *)pte_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, pte_pa, (addr_t *)&tmp_pte) == -1) {
+ PrintError("Could not get virtual address of Guest PTE32PAE (PA=%p)\n",
+ (void *)pte_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
+ return ret;
+ }
- for (k = 0; k < MAX_PTE32PAE_ENTRIES; k++) {
- if (tmp_pte[k].present) {
- addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[k].page_base_addr);
- addr_t page_va = 0;
+ for (k = 0; k < MAX_PTE32PAE_ENTRIES; k++) {
+ if (tmp_pte[k].present) {
+ addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[k].page_base_addr);
+ addr_t page_va = 0;
- if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 4KB Page (PA=%p)\n",
- (void *)page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- page_va = 0;
- }
+ if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 4KB Page (PA=%p)\n",
+ (void *)page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ page_va = 0;
+ }
- if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
- return ret;
- }
- }
+ if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
+ return ret;
+ }
+ }
- vaddr += PAGE_SIZE_4KB;
+ vaddr += PAGE_SIZE_4KB;
+ }
+ }
+ } else {
+ vaddr += PAGE_SIZE_2MB;
+ }
}
- }
} else {
- vaddr += PAGE_SIZE_2MB;
+ vaddr += PAGE_SIZE_2MB * MAX_PDE32PAE_ENTRIES;
}
- }
- } else {
- vaddr += PAGE_SIZE_2MB * MAX_PDE32PAE_ENTRIES;
}
- }
- return 0;
+ return 0;
}
int v3_walk_guest_pt_64(struct guest_info * info, v3_reg_t guest_cr3,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- addr_t guest_pml_pa = CR3_TO_PML4E64_PA(guest_cr3);
- pml4e64_t * guest_pml = NULL;
- int i, j, k, m;
- addr_t vaddr = 0;
- int ret = 0;
-
- if (!callback) {
- PrintError("Call back was not specified\n");
- return -1;
- }
+ addr_t guest_pml_pa = CR3_TO_PML4E64_PA(guest_cr3);
+ pml4e64_t * guest_pml = NULL;
+ int i, j, k, m;
+ addr_t vaddr = 0;
+ int ret = 0;
+
+ if (!callback) {
+ PrintError("Call back was not specified\n");
+ return -1;
+ }
- if (guest_pa_to_host_va(info, guest_pml_pa, (addr_t *)&guest_pml) == -1) {
- PrintError("Could not get virtual address of Guest PML464 (PA=%p)\n",
- (void *)guest_pml);
- return -1;
- }
+ if (guest_pa_to_host_va(info, guest_pml_pa, (addr_t *)&guest_pml) == -1) {
+ PrintError("Could not get virtual address of Guest PML464 (PA=%p)\n",
+ (void *)guest_pml);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)guest_pml, guest_pml_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)guest_pml, guest_pml_pa, private_data)) != 0) {
+ return ret;
+ }
- for (i = 0; i < MAX_PML4E64_ENTRIES; i++) {
- if (guest_pml[i].present) {
- addr_t pdpe_pa = BASE_TO_PAGE_ADDR(guest_pml[i].pdp_base_addr);
- pdpe64_t * tmp_pdpe = NULL;
-
+ for (i = 0; i < MAX_PML4E64_ENTRIES; i++) {
+ if (guest_pml[i].present) {
+ addr_t pdpe_pa = BASE_TO_PAGE_ADDR(guest_pml[i].pdp_base_addr);
+ pdpe64_t * tmp_pdpe = NULL;
- if (guest_pa_to_host_va(info, pdpe_pa, (addr_t *)&tmp_pdpe) == -1) {
- PrintError("Could not get virtual address of Guest PDPE64 (PA=%p)\n",
- (void *)pdpe_pa);
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)tmp_pdpe, pdpe_pa, private_data)) != 0) {
- return ret;
- }
- for (j = 0; j < MAX_PDPE64_ENTRIES; j++) {
- if (tmp_pdpe[j].present) {
- if (tmp_pdpe[j].large_page) {
- pdpe64_1GB_t * large_pdpe = (pdpe64_1GB_t *)&(tmp_pdpe[j]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_1GB(large_pdpe->page_base_addr);
- addr_t large_page_va = 0;
-
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 1GB page (PA=%p)\n",
- (void *)large_page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- large_page_va = 0;
+ if (guest_pa_to_host_va(info, pdpe_pa, (addr_t *)&tmp_pdpe) == -1) {
+ PrintError("Could not get virtual address of Guest PDPE64 (PA=%p)\n",
+ (void *)pdpe_pa);
+ return -1;
}
-
- if ((ret = callback(info, PAGE_1GB, vaddr, (addr_t)large_page_va, large_page_pa, private_data)) != 0) {
- return ret;
+
+ if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)tmp_pdpe, pdpe_pa, private_data)) != 0) {
+ return ret;
}
-
- vaddr += PAGE_SIZE_1GB;
- } else {
- addr_t pde_pa = BASE_TO_PAGE_ADDR(tmp_pdpe[j].pd_base_addr);
- pde64_t * tmp_pde = NULL;
+
+ for (j = 0; j < MAX_PDPE64_ENTRIES; j++) {
+ if (tmp_pdpe[j].present) {
+ if (tmp_pdpe[j].large_page) {
+ pdpe64_1GB_t * large_pdpe = (pdpe64_1GB_t *)&(tmp_pdpe[j]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_1GB(large_pdpe->page_base_addr);
+ addr_t large_page_va = 0;
+
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 1GB page (PA=%p)\n",
+ (void *)large_page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ large_page_va = 0;
+ }
+
+ if ((ret = callback(info, PAGE_1GB, vaddr, (addr_t)large_page_va, large_page_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ vaddr += PAGE_SIZE_1GB;
+ } else {
+ addr_t pde_pa = BASE_TO_PAGE_ADDR(tmp_pdpe[j].pd_base_addr);
+ pde64_t * tmp_pde = NULL;
- if (guest_pa_to_host_va(info, pde_pa, (addr_t *)&tmp_pde) == -1) {
- PrintError("Could not get virtual address of Guest PDE64 (PA=%p)\n",
- (void *)pde_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, pde_pa, (addr_t *)&tmp_pde) == -1) {
+ PrintError("Could not get virtual address of Guest PDE64 (PA=%p)\n",
+ (void *)pde_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
+ return ret;
+ }
- for (k = 0; k < MAX_PDE64_ENTRIES; k++) {
- if (tmp_pde[k].present) {
- if (tmp_pde[k].large_page) {
- pde64_2MB_t * large_pde = (pde64_2MB_t *)&(tmp_pde[k]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
- addr_t large_page_va = 0;
+ for (k = 0; k < MAX_PDE64_ENTRIES; k++) {
+ if (tmp_pde[k].present) {
+ if (tmp_pde[k].large_page) {
+ pde64_2MB_t * large_pde = (pde64_2MB_t *)&(tmp_pde[k]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
+ addr_t large_page_va = 0;
- if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 2MB page (PA=%p)\n",
- (void *)large_page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- large_page_va = 0;
- }
+ if (guest_pa_to_host_va(info, large_page_pa, &large_page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 2MB page (PA=%p)\n",
+ (void *)large_page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ large_page_va = 0;
+ }
- if ((ret = callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
- return ret;
- }
-
- vaddr += PAGE_SIZE_2MB;
- } else {
- addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[k].pt_base_addr);
- pte64_t * tmp_pte = NULL;
+ if ((ret = callback(info, PAGE_2MB, vaddr, large_page_va, large_page_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ vaddr += PAGE_SIZE_2MB;
+ } else {
+ addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[k].pt_base_addr);
+ pte64_t * tmp_pte = NULL;
- if (guest_pa_to_host_va(info, pte_pa, (addr_t *)&tmp_pte) == -1) {
- PrintError("Could not get virtual address of Guest PTE64 (PA=%p)\n",
- (void *)pte_pa);
- return -1;
- }
+ if (guest_pa_to_host_va(info, pte_pa, (addr_t *)&tmp_pte) == -1) {
+ PrintError("Could not get virtual address of Guest PTE64 (PA=%p)\n",
+ (void *)pte_pa);
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
+ return ret;
+ }
- for (m = 0; m < MAX_PTE64_ENTRIES; m++) {
- if (tmp_pte[m].present) {
- addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[m].page_base_addr);
- addr_t page_va = 0;
+ for (m = 0; m < MAX_PTE64_ENTRIES; m++) {
+ if (tmp_pte[m].present) {
+ addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[m].page_base_addr);
+ addr_t page_va = 0;
- if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
- PrintDebug("Could not get virtual address of Guest 4KB Page (PA=%p)\n",
- (void *)page_pa);
- // We'll let it through for data pages because they may be unmapped or hooked
- page_va = 0;
- }
+ if (guest_pa_to_host_va(info, page_pa, &page_va) == -1) {
+ PrintDebug("Could not get virtual address of Guest 4KB Page (PA=%p)\n",
+ (void *)page_pa);
+ // We'll let it through for data pages because they may be unmapped or hooked
+ page_va = 0;
+ }
- if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_4KB, vaddr, page_va, page_pa, private_data)) != 0) {
+ return ret;
+ }
+ }
+
+ vaddr += PAGE_SIZE_4KB;
+ }
+ }
+ } else {
+ vaddr += PAGE_SIZE_2MB;
+ }
+ }
}
-
- vaddr += PAGE_SIZE_4KB;
- }
+ } else {
+ vaddr += PAGE_SIZE_1GB;
}
- } else {
- vaddr += PAGE_SIZE_2MB;
- }
}
- }
} else {
- vaddr += PAGE_SIZE_1GB;
+ vaddr += ((ullong_t)PAGE_SIZE_1GB * (ullong_t)MAX_PDPE64_ENTRIES);
}
- }
- } else {
- vaddr += ((ullong_t)PAGE_SIZE_1GB * (ullong_t)MAX_PDPE64_ENTRIES);
}
- }
- return 0;
+ return 0;
}
int v3_walk_host_pt_32(struct guest_info * info, v3_reg_t host_cr3,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- pde32_t * host_pde = (pde32_t *)CR3_TO_PDE32_VA(host_cr3);
- addr_t pde_pa = CR3_TO_PDE32_PA(host_cr3);
- int i, j;
- addr_t vaddr = 0;
- int ret = 0;
-
- if (!callback) {
- PrintError("Call back was not specified\n");
- return -1;
- }
+ pde32_t * host_pde = (pde32_t *)CR3_TO_PDE32_VA(host_cr3);
+ addr_t pde_pa = CR3_TO_PDE32_PA(host_cr3);
+ int i, j;
+ addr_t vaddr = 0;
+ int ret = 0;
+
+ if (!callback) {
+ PrintError("Call back was not specified\n");
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)host_pde, pde_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PD32, vaddr, (addr_t)host_pde, pde_pa, private_data)) != 0) {
+ return ret;
+ }
- for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
- if (host_pde[i].present) {
- if (host_pde[i].large_page) {
- pde32_4MB_t * large_pde = (pde32_4MB_t *)&(host_pde[i]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_4MB(large_pde->page_base_addr);
+ for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
+ if (host_pde[i].present) {
+ if (host_pde[i].large_page) {
+ pde32_4MB_t * large_pde = (pde32_4MB_t *)&(host_pde[i]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_4MB(large_pde->page_base_addr);
- if ((ret = callback(info, PAGE_4MB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_4MB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
+ return ret;
+ }
- vaddr += PAGE_SIZE_4MB;
- } else {
- addr_t pte_pa = BASE_TO_PAGE_ADDR(host_pde[i].pt_base_addr);
- pte32_t * tmp_pte = (pte32_t *)V3_VAddr((void *)pte_pa);
+ vaddr += PAGE_SIZE_4MB;
+ } else {
+ addr_t pte_pa = BASE_TO_PAGE_ADDR(host_pde[i].pt_base_addr);
+ pte32_t * tmp_pte = (pte32_t *)V3_VAddr((void *)pte_pa);
- if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PT32, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
+ return ret;
+ }
- for (j = 0; j < MAX_PTE32_ENTRIES; j++) {
- if (tmp_pte[j].present) {
- addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[j].page_base_addr);
- if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)page_pa), page_pa, private_data)) != 0) {
- return ret;
- }
- }
+ for (j = 0; j < MAX_PTE32_ENTRIES; j++) {
+ if (tmp_pte[j].present) {
+ addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[j].page_base_addr);
+ if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)page_pa), page_pa, private_data)) != 0) {
+ return ret;
+ }
+ }
- vaddr += PAGE_SIZE_4KB;
+ vaddr += PAGE_SIZE_4KB;
+ }
+ }
+ } else {
+ vaddr += PAGE_SIZE_4MB;
}
- }
- } else {
- vaddr += PAGE_SIZE_4MB;
}
- }
- return 0;
+ return 0;
}
int v3_walk_host_pt_32pae(struct guest_info * info, v3_reg_t host_cr3,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- pdpe32pae_t * host_pdpe = (pdpe32pae_t *)CR3_TO_PDPE32PAE_VA(host_cr3);
- addr_t pdpe_pa = CR3_TO_PDPE32PAE_PA(host_cr3);
- int i, j, k;
- addr_t vaddr = 0;
- int ret = 0;
-
- if (!callback) {
- PrintError("Callback was not specified\n");
- return -1;
- }
+ pdpe32pae_t * host_pdpe = (pdpe32pae_t *)CR3_TO_PDPE32PAE_VA(host_cr3);
+ addr_t pdpe_pa = CR3_TO_PDPE32PAE_PA(host_cr3);
+ int i, j, k;
+ addr_t vaddr = 0;
+ int ret = 0;
+
+ if (!callback) {
+ PrintError("Callback was not specified\n");
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)host_pdpe, pdpe_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PDP32PAE, vaddr, (addr_t)host_pdpe, pdpe_pa, private_data)) != 0) {
+ return ret;
+ }
- for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
- if (host_pdpe[i].present) {
- addr_t pde_pa = BASE_TO_PAGE_ADDR(host_pdpe[i].pd_base_addr);
- pde32pae_t * tmp_pde = (pde32pae_t *)V3_VAddr((void *)pde_pa);
+ for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
+ if (host_pdpe[i].present) {
+ addr_t pde_pa = BASE_TO_PAGE_ADDR(host_pdpe[i].pd_base_addr);
+ pde32pae_t * tmp_pde = (pde32pae_t *)V3_VAddr((void *)pde_pa);
- if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PD32PAE, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
+ return ret;
+ }
- for (j = 0; j < MAX_PDE32PAE_ENTRIES; j++) {
- if (tmp_pde[j].present) {
+ for (j = 0; j < MAX_PDE32PAE_ENTRIES; j++) {
+ if (tmp_pde[j].present) {
- if (tmp_pde[j].large_page) {
- pde32pae_2MB_t * large_pde = (pde32pae_2MB_t *)&(tmp_pde[j]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
-
- if ((ret = callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
- return ret;
- }
-
- vaddr += PAGE_SIZE_2MB;
- } else {
- addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[j].pt_base_addr);
- pte32pae_t * tmp_pte = (pte32pae_t *)V3_VAddr((void *)pte_pa);
+ if (tmp_pde[j].large_page) {
+ pde32pae_2MB_t * large_pde = (pde32pae_2MB_t *)&(tmp_pde[j]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
+
+ if ((ret = callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ vaddr += PAGE_SIZE_2MB;
+ } else {
+ addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[j].pt_base_addr);
+ pte32pae_t * tmp_pte = (pte32pae_t *)V3_VAddr((void *)pte_pa);
- if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_PT32PAE, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
+ return ret;
+ }
- for (k = 0; k < MAX_PTE32PAE_ENTRIES; k++) {
- if (tmp_pte[k].present) {
- addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[k].page_base_addr);
- if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)page_pa), page_pa, private_data)) != 0) {
- return ret;
+ for (k = 0; k < MAX_PTE32PAE_ENTRIES; k++) {
+ if (tmp_pte[k].present) {
+ addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[k].page_base_addr);
+ if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)page_pa), page_pa, private_data)) != 0) {
+ return ret;
+ }
+ }
+
+ vaddr += PAGE_SIZE_4KB;
+ }
+ }
+ } else {
+ vaddr += PAGE_SIZE_2MB;
}
- }
-
- vaddr += PAGE_SIZE_4KB;
}
- }
} else {
- vaddr += PAGE_SIZE_2MB;
+ vaddr += PAGE_SIZE_2MB * MAX_PDE32PAE_ENTRIES;
}
- }
- } else {
- vaddr += PAGE_SIZE_2MB * MAX_PDE32PAE_ENTRIES;
}
- }
- return 0;
+ return 0;
}
int v3_walk_host_pt_64(struct guest_info * info, v3_reg_t host_cr3,
int (*callback)(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data),
void * private_data) {
- pml4e64_t * host_pml = (pml4e64_t *)CR3_TO_PML4E64_VA(host_cr3);
- addr_t pml_pa = CR3_TO_PML4E64_PA(host_cr3);
- int i, j, k, m;
- addr_t vaddr = 0;
- int ret = 0;
-
- if (!callback) {
- PrintError("Callback was not specified\n");
- return -1;
- }
-
- if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)host_pml, pml_pa, private_data)) != 0) {
- return ret;
- }
-
- for (i = 0; i < MAX_PML4E64_ENTRIES; i++) {
- if (host_pml[i].present) {
- addr_t pdpe_pa = BASE_TO_PAGE_ADDR(host_pml[i].pdp_base_addr);
- pdpe64_t * tmp_pdpe = (pdpe64_t *)V3_VAddr((void *)pdpe_pa);
+ pml4e64_t * host_pml = (pml4e64_t *)CR3_TO_PML4E64_VA(host_cr3);
+ addr_t pml_pa = CR3_TO_PML4E64_PA(host_cr3);
+ int i, j, k, m;
+ addr_t vaddr = 0;
+ int ret = 0;
+
+ if (!callback) {
+ PrintError("Callback was not specified\n");
+ return -1;
+ }
- if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)tmp_pdpe, pdpe_pa, private_data)) != 0) {
+ if ((ret = callback(info, PAGE_PML464, vaddr, (addr_t)host_pml, pml_pa, private_data)) != 0) {
return ret;
- }
-
- for (j = 0; j < MAX_PDPE64_ENTRIES; j++) {
- if (tmp_pdpe[j].present) {
- if (tmp_pdpe[j].large_page) {
- pdpe64_1GB_t * large_pdp = (pdpe64_1GB_t *)&(tmp_pdpe[j]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_1GB(large_pdp->page_base_addr);
-
- if ((ret = callback(info, PAGE_1GB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
- return ret;
- }
+ }
- vaddr += PAGE_SIZE_1GB;
- } else {
- addr_t pde_pa = BASE_TO_PAGE_ADDR(tmp_pdpe[j].pd_base_addr);
- pde64_t * tmp_pde = (pde64_t *)V3_VAddr((void *)pde_pa);
+ for (i = 0; i < MAX_PML4E64_ENTRIES; i++) {
+ if (host_pml[i].present) {
+ addr_t pdpe_pa = BASE_TO_PAGE_ADDR(host_pml[i].pdp_base_addr);
+ pdpe64_t * tmp_pdpe = (pdpe64_t *)V3_VAddr((void *)pdpe_pa);
- if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
- return ret;
+ if ((ret = callback(info, PAGE_PDP64, vaddr, (addr_t)tmp_pdpe, pdpe_pa, private_data)) != 0) {
+ return ret;
}
- for (k = 0; k < MAX_PDE64_ENTRIES; k++) {
- if (tmp_pde[k].present) {
- if (tmp_pde[k].large_page) {
- pde64_2MB_t * large_pde = (pde64_2MB_t *)&(tmp_pde[k]);
- addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
+ for (j = 0; j < MAX_PDPE64_ENTRIES; j++) {
+ if (tmp_pdpe[j].present) {
+ if (tmp_pdpe[j].large_page) {
+ pdpe64_1GB_t * large_pdp = (pdpe64_1GB_t *)&(tmp_pdpe[j]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_1GB(large_pdp->page_base_addr);
+
+ if ((ret = callback(info, PAGE_1GB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ vaddr += PAGE_SIZE_1GB;
+ } else {
+ addr_t pde_pa = BASE_TO_PAGE_ADDR(tmp_pdpe[j].pd_base_addr);
+ pde64_t * tmp_pde = (pde64_t *)V3_VAddr((void *)pde_pa);
+
+ if ((ret = callback(info, PAGE_PD64, vaddr, (addr_t)tmp_pde, pde_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ for (k = 0; k < MAX_PDE64_ENTRIES; k++) {
+ if (tmp_pde[k].present) {
+ if (tmp_pde[k].large_page) {
+ pde64_2MB_t * large_pde = (pde64_2MB_t *)&(tmp_pde[k]);
+ addr_t large_page_pa = BASE_TO_PAGE_ADDR_2MB(large_pde->page_base_addr);
- if ((ret = callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
- return ret;
- }
+ if ((ret = callback(info, PAGE_2MB, vaddr, (addr_t)V3_VAddr((void *)large_page_pa), large_page_pa, private_data)) != 0) {
+ return ret;
+ }
- vaddr += PAGE_SIZE_2MB;
- } else {
- addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[k].pt_base_addr);
- pte64_t * tmp_pte = (pte64_t *)V3_VAddr((void *)pte_pa);
-
- if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
- return ret;
- }
-
- for (m = 0; m < MAX_PTE64_ENTRIES; m++) {
- if (tmp_pte[m].present) {
- addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[m].page_base_addr);
- if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)page_pa), page_pa, private_data)) != 0) {
- return ret;
- }
+ vaddr += PAGE_SIZE_2MB;
+ } else {
+ addr_t pte_pa = BASE_TO_PAGE_ADDR(tmp_pde[k].pt_base_addr);
+ pte64_t * tmp_pte = (pte64_t *)V3_VAddr((void *)pte_pa);
+
+ if ((ret = callback(info, PAGE_PT64, vaddr, (addr_t)tmp_pte, pte_pa, private_data)) != 0) {
+ return ret;
+ }
+
+ for (m = 0; m < MAX_PTE64_ENTRIES; m++) {
+ if (tmp_pte[m].present) {
+ addr_t page_pa = BASE_TO_PAGE_ADDR(tmp_pte[m].page_base_addr);
+ if ((ret = callback(info, PAGE_4KB, vaddr, (addr_t)V3_VAddr((void *)page_pa), page_pa, private_data)) != 0) {
+ return ret;
+ }
+ }
+ vaddr += PAGE_SIZE_4KB;
+ }
+ }
+ } else {
+ vaddr += PAGE_SIZE_2MB;
+ }
+ }
}
- vaddr += PAGE_SIZE_4KB;
- }
+ } else {
+ vaddr += PAGE_SIZE_1GB;
}
- } else {
- vaddr += PAGE_SIZE_2MB;
- }
}
- }
} else {
- vaddr += PAGE_SIZE_1GB;
+ vaddr += (ullong_t)PAGE_SIZE_1GB * (ullong_t)MAX_PDPE64_ENTRIES;
}
- }
- } else {
- vaddr += (ullong_t)PAGE_SIZE_1GB * (ullong_t)MAX_PDPE64_ENTRIES;
}
- }
- return 0;
+ return 0;
}
const uchar_t * v3_page_type_to_str(page_type_t type) {
- switch (type) {
- case PAGE_4KB:
- return PAGE_4KB_STR;
- case PAGE_2MB:
- return PAGE_2MB_STR;
- case PAGE_4MB:
- return PAGE_4MB_STR;
- case PAGE_1GB:
- return PAGE_1GB_STR;
- case PAGE_PT32:
- return PAGE_PT32_STR;
- case PAGE_PD32:
- return PAGE_PD32_STR;
- case PAGE_PDP32PAE:
- return PAGE_PDP32PAE_STR;
- case PAGE_PD32PAE:
- return PAGE_PD32PAE_STR;
- case PAGE_PT32PAE:
- return PAGE_PT32PAE_STR;
- case PAGE_PML464:
- return PAGE_PML464_STR;
- case PAGE_PDP64:
- return PAGE_PDP64_STR;
- case PAGE_PD64:
- return PAGE_PD64_STR;
- case PAGE_PT64:
- return PAGE_PT64_STR;
- default:
- return NULL;
- }
+ switch (type) {
+ case PAGE_4KB:
+ return PAGE_4KB_STR;
+ case PAGE_2MB:
+ return PAGE_2MB_STR;
+ case PAGE_4MB:
+ return PAGE_4MB_STR;
+ case PAGE_1GB:
+ return PAGE_1GB_STR;
+ case PAGE_PT32:
+ return PAGE_PT32_STR;
+ case PAGE_PD32:
+ return PAGE_PD32_STR;
+ case PAGE_PDP32PAE:
+ return PAGE_PDP32PAE_STR;
+ case PAGE_PD32PAE:
+ return PAGE_PD32PAE_STR;
+ case PAGE_PT32PAE:
+ return PAGE_PT32PAE_STR;
+ case PAGE_PML464:
+ return PAGE_PML464_STR;
+ case PAGE_PDP64:
+ return PAGE_PDP64_STR;
+ case PAGE_PD64:
+ return PAGE_PD64_STR;
+ case PAGE_PT64:
+ return PAGE_PT64_STR;
+ default:
+ return NULL;
+ }
}
static void PrintPDE32(addr_t virtual_address, pde32_t * pde)
{
- PrintDebug("PDE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
- (void *)virtual_address,
- (void *)(addr_t) (pde->pt_base_addr << PAGE_POWER),
- pde->present,
- pde->writable,
- pde->user_page,
- pde->write_through,
- pde->cache_disable,
- pde->accessed,
- pde->reserved,
- pde->large_page,
- pde->global_page,
- pde->vmm_info);
+ PrintDebug("PDE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (pde->pt_base_addr << PAGE_POWER),
+ pde->present,
+ pde->writable,
+ pde->user_page,
+ pde->write_through,
+ pde->cache_disable,
+ pde->accessed,
+ pde->reserved,
+ pde->large_page,
+ pde->global_page,
+ pde->vmm_info);
}
static void PrintPTE32(addr_t virtual_address, pte32_t * pte)
{
- PrintDebug("PTE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
- (void *)virtual_address,
- (void*)(addr_t)(pte->page_base_addr << PAGE_POWER),
- pte->present,
- pte->writable,
- pte->user_page,
- pte->write_through,
- pte->cache_disable,
- pte->accessed,
- pte->dirty,
- pte->pte_attr,
- pte->global_page,
- pte->vmm_info);
+ PrintDebug("PTE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
+ (void *)virtual_address,
+ (void*)(addr_t)(pte->page_base_addr << PAGE_POWER),
+ pte->present,
+ pte->writable,
+ pte->user_page,
+ pte->write_through,
+ pte->cache_disable,
+ pte->accessed,
+ pte->dirty,
+ pte->pte_attr,
+ pte->global_page,
+ pte->vmm_info);
}
static void PrintPDPE32PAE(addr_t virtual_address, pdpe32pae_t * pdpe)
{
- PrintDebug("PDPE %p -> %p : present=%x, wt=%x, cd=%x, accessed=%x, kernelInfo=%x\n",
- (void *)virtual_address,
- (void *)(addr_t) (pdpe->pd_base_addr << PAGE_POWER),
- pdpe->present,
- pdpe->write_through,
- pdpe->cache_disable,
- pdpe->accessed,
- pdpe->vmm_info);
+ PrintDebug("PDPE %p -> %p : present=%x, wt=%x, cd=%x, accessed=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (pdpe->pd_base_addr << PAGE_POWER),
+ pdpe->present,
+ pdpe->write_through,
+ pdpe->cache_disable,
+ pdpe->accessed,
+ pdpe->vmm_info);
}
static void PrintPDE32PAE(addr_t virtual_address, pde32pae_t * pde)
{
- PrintDebug("PDE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
- (void *)virtual_address,
- (void *)(addr_t) (pde->pt_base_addr << PAGE_POWER),
- pde->present,
- pde->writable,
- pde->user_page,
- pde->write_through,
- pde->cache_disable,
- pde->accessed,
- pde->large_page,
- pde->global_page,
- pde->vmm_info);
+ PrintDebug("PDE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (pde->pt_base_addr << PAGE_POWER),
+ pde->present,
+ pde->writable,
+ pde->user_page,
+ pde->write_through,
+ pde->cache_disable,
+ pde->accessed,
+ pde->large_page,
+ pde->global_page,
+ pde->vmm_info);
}
static void PrintPTE32PAE(addr_t virtual_address, pte32pae_t * pte)
{
- PrintDebug("PTE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
- (void *)virtual_address,
- (void*)(addr_t)(pte->page_base_addr << PAGE_POWER),
- pte->present,
- pte->writable,
- pte->user_page,
- pte->write_through,
- pte->cache_disable,
- pte->accessed,
- pte->dirty,
- pte->pte_attr,
- pte->global_page,
- pte->vmm_info);
+ PrintDebug("PTE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
+ (void *)virtual_address,
+ (void*)(addr_t)(pte->page_base_addr << PAGE_POWER),
+ pte->present,
+ pte->writable,
+ pte->user_page,
+ pte->write_through,
+ pte->cache_disable,
+ pte->accessed,
+ pte->dirty,
+ pte->pte_attr,
+ pte->global_page,
+ pte->vmm_info);
}
static void PrintPML4e64(addr_t virtual_address, pml4e64_t * pml)
{
- PrintDebug("PML4e64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, kernelInfo=%x\n",
- (void *)virtual_address,
- (void *)(addr_t) (BASE_TO_PAGE_ADDR(pml->pdp_base_addr)),
- pml->present,
- pml->writable,
- pml->user_page,
- pml->write_through,
- pml->cache_disable,
- pml->accessed,
- pml->reserved,
- pml->vmm_info);
+ PrintDebug("PML4e64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (BASE_TO_PAGE_ADDR(pml->pdp_base_addr)),
+ pml->present,
+ pml->writable,
+ pml->user_page,
+ pml->write_through,
+ pml->cache_disable,
+ pml->accessed,
+ pml->reserved,
+ pml->vmm_info);
}
static void PrintPDPE64(addr_t virtual_address, pdpe64_t * pdpe)
{
- PrintDebug("PDPE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage/zero=%x, kernelInfo=%x\n",
- (void *)virtual_address,
- (void *)(addr_t) (BASE_TO_PAGE_ADDR(pdpe->pd_base_addr)),
- pdpe->present,
- pdpe->writable,
- pdpe->user_page,
- pdpe->write_through,
- pdpe->cache_disable,
- pdpe->accessed,
- pdpe->avail,
- pdpe->large_page,
- pdpe->zero,
- pdpe->vmm_info);
+ PrintDebug("PDPE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage/zero=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (BASE_TO_PAGE_ADDR(pdpe->pd_base_addr)),
+ pdpe->present,
+ pdpe->writable,
+ pdpe->user_page,
+ pdpe->write_through,
+ pdpe->cache_disable,
+ pdpe->accessed,
+ pdpe->avail,
+ pdpe->large_page,
+ pdpe->zero,
+ pdpe->vmm_info);
}
static void PrintPDE64(addr_t virtual_address, pde64_t * pde)
{
- PrintDebug("PDE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
- (void *)virtual_address,
- (void *)(addr_t) (BASE_TO_PAGE_ADDR(pde->pt_base_addr)),
- pde->present,
- pde->writable,
- pde->user_page,
- pde->write_through,
- pde->cache_disable,
- pde->accessed,
- pde->avail,
- pde->large_page,
- pde->global_page,
- pde->vmm_info);
+ PrintDebug("PDE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (BASE_TO_PAGE_ADDR(pde->pt_base_addr)),
+ pde->present,
+ pde->writable,
+ pde->user_page,
+ pde->write_through,
+ pde->cache_disable,
+ pde->accessed,
+ pde->avail,
+ pde->large_page,
+ pde->global_page,
+ pde->vmm_info);
}
static void PrintPTE64(addr_t virtual_address, pte64_t * pte)
{
- PrintDebug("PTE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
- (void *)virtual_address,
- (void*)(addr_t)(BASE_TO_PAGE_ADDR(pte->page_base_addr)),
- pte->present,
- pte->writable,
- pte->user_page,
- pte->write_through,
- pte->cache_disable,
- pte->accessed,
- pte->dirty,
- pte->pte_attr,
- pte->global_page,
- pte->vmm_info);
+ PrintDebug("PTE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
+ (void *)virtual_address,
+ (void*)(addr_t)(BASE_TO_PAGE_ADDR(pte->page_base_addr)),
+ pte->present,
+ pte->writable,
+ pte->user_page,
+ pte->write_through,
+ pte->cache_disable,
+ pte->accessed,
+ pte->dirty,
+ pte->pte_attr,
+ pte->global_page,
+ pte->vmm_info);
}
static int print_page_walk_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- int i = 0;
- addr_t tmp_vaddr = 0;
- switch (type) {
-
- /* 64 Bit */
-
- case PAGE_PML464:
- {
- pml4e64_t * pml = (pml4e64_t *)page_ptr;
- PrintDebug("PML4E64 Page\n");
- for (i = 0; i < MAX_PML4E64_ENTRIES; i++) {
- tmp_vaddr = (4096 * MAX_PTE64_ENTRIES);
- tmp_vaddr *= (MAX_PDE64_ENTRIES * MAX_PDPE64_ENTRIES * i); // break apart to avoid int overflow compile errors
- tmp_vaddr += vaddr;
- if (pml[i].present)
- PrintPML4e64(tmp_vaddr, &(pml[i]));
- }
- break;
- }
- case PAGE_PDP64:
- {
- pdpe64_t * pdp = (pdpe64_t *)page_ptr;
- PrintDebug("PDPE64 Page\n");
- for (i = 0; i < MAX_PDPE64_ENTRIES; i++) {
- tmp_vaddr = 4096 * MAX_PTE64_ENTRIES * MAX_PDE64_ENTRIES * i;
- tmp_vaddr += vaddr;
- if (pdp[i].present)
- PrintPDPE64(tmp_vaddr, &(pdp[i]));
- }
- break;
- }
- case PAGE_PD64:
- {
- pde64_t * pd = (pde64_t *)page_ptr;
- PrintDebug("PDE64 Page\n");
- for (i = 0; i < MAX_PDE64_ENTRIES; i++) {
- tmp_vaddr = 4096 * MAX_PTE64_ENTRIES * i;
- tmp_vaddr += vaddr;
- if (pd[i].present)
- PrintPDE64(tmp_vaddr, &(pd[i]));
- }
- break;
- }
- case PAGE_PT64:
- {
- pte64_t * pt = (pte64_t *)page_ptr;
- PrintDebug("PTE64 Page\n");
- for (i = 0; i < MAX_PTE64_ENTRIES; i++) {
- tmp_vaddr = 4096 * i;
- tmp_vaddr += vaddr;
- if (pt[i].present)
- PrintPTE64(tmp_vaddr, &(pt[i]));
- }
- break;
- }
-
- /* 32 BIT PAE */
+ int i = 0;
+ addr_t tmp_vaddr = 0;
+ switch (type) {
+
+ /* 64 Bit */
+
+ case PAGE_PML464:
+ {
+ pml4e64_t * pml = (pml4e64_t *)page_ptr;
+ PrintDebug("PML4E64 Page\n");
+ for (i = 0; i < MAX_PML4E64_ENTRIES; i++) {
+ tmp_vaddr = (4096 * MAX_PTE64_ENTRIES);
+ tmp_vaddr *= (MAX_PDE64_ENTRIES * MAX_PDPE64_ENTRIES * i); // break apart to avoid int overflow compile errors
+ tmp_vaddr += vaddr;
+ if (pml[i].present)
+ PrintPML4e64(tmp_vaddr, &(pml[i]));
+ }
+ break;
+ }
+ case PAGE_PDP64:
+ {
+ pdpe64_t * pdp = (pdpe64_t *)page_ptr;
+ PrintDebug("PDPE64 Page\n");
+ for (i = 0; i < MAX_PDPE64_ENTRIES; i++) {
+ tmp_vaddr = 4096 * MAX_PTE64_ENTRIES * MAX_PDE64_ENTRIES * i;
+ tmp_vaddr += vaddr;
+ if (pdp[i].present)
+ PrintPDPE64(tmp_vaddr, &(pdp[i]));
+ }
+ break;
+ }
+ case PAGE_PD64:
+ {
+ pde64_t * pd = (pde64_t *)page_ptr;
+ PrintDebug("PDE64 Page\n");
+ for (i = 0; i < MAX_PDE64_ENTRIES; i++) {
+ tmp_vaddr = 4096 * MAX_PTE64_ENTRIES * i;
+ tmp_vaddr += vaddr;
+ if (pd[i].present)
+ PrintPDE64(tmp_vaddr, &(pd[i]));
+ }
+ break;
+ }
+ case PAGE_PT64:
+ {
+ pte64_t * pt = (pte64_t *)page_ptr;
+ PrintDebug("PTE64 Page\n");
+ for (i = 0; i < MAX_PTE64_ENTRIES; i++) {
+ tmp_vaddr = 4096 * i;
+ tmp_vaddr += vaddr;
+ if (pt[i].present)
+ PrintPTE64(tmp_vaddr, &(pt[i]));
+ }
+ break;
+ }
+
+ /* 32 BIT PAE */
- case PAGE_PDP32PAE:
- {
- pdpe32pae_t * pdp = (pdpe32pae_t *)page_ptr;
- PrintDebug("PDPE32PAE Page\n");
- for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
- tmp_vaddr = 4096 * MAX_PTE32PAE_ENTRIES * MAX_PDE32PAE_ENTRIES * i;
- tmp_vaddr += vaddr;
- if (pdp[i].present)
- PrintPDPE32PAE(tmp_vaddr, &(pdp[i]));
- }
- break;
- }
- case PAGE_PD32PAE:
- {
- pde32pae_t * pd = (pde32pae_t *)page_ptr;
- PrintDebug("PDE32PAE Page\n");
- for (i = 0; i < MAX_PDE32PAE_ENTRIES; i++) {
- tmp_vaddr = 4096 * MAX_PTE32PAE_ENTRIES * i;
- tmp_vaddr += vaddr;
- if (pd[i].present)
- PrintPDE32PAE(tmp_vaddr, &(pd[i]));
- }
- break;
- }
- case PAGE_PT32PAE:
- {
- pte32pae_t * pt = (pte32pae_t *)page_ptr;
- PrintDebug("PTE32PAE Page\n");
- for (i = 0; i < MAX_PTE32PAE_ENTRIES; i++) {
- tmp_vaddr = 4096 * i;
- tmp_vaddr += vaddr;
- if (pt[i].present)
- PrintPTE32PAE(tmp_vaddr, &(pt[i]));
- }
- break;
+ case PAGE_PDP32PAE:
+ {
+ pdpe32pae_t * pdp = (pdpe32pae_t *)page_ptr;
+ PrintDebug("PDPE32PAE Page\n");
+ for (i = 0; i < MAX_PDPE32PAE_ENTRIES; i++) {
+ tmp_vaddr = 4096 * MAX_PTE32PAE_ENTRIES * MAX_PDE32PAE_ENTRIES * i;
+ tmp_vaddr += vaddr;
+ if (pdp[i].present)
+ PrintPDPE32PAE(tmp_vaddr, &(pdp[i]));
+ }
+ break;
+ }
+ case PAGE_PD32PAE:
+ {
+ pde32pae_t * pd = (pde32pae_t *)page_ptr;
+ PrintDebug("PDE32PAE Page\n");
+ for (i = 0; i < MAX_PDE32PAE_ENTRIES; i++) {
+ tmp_vaddr = 4096 * MAX_PTE32PAE_ENTRIES * i;
+ tmp_vaddr += vaddr;
+ if (pd[i].present)
+ PrintPDE32PAE(tmp_vaddr, &(pd[i]));
+ }
+ break;
+ }
+ case PAGE_PT32PAE:
+ {
+ pte32pae_t * pt = (pte32pae_t *)page_ptr;
+ PrintDebug("PTE32PAE Page\n");
+ for (i = 0; i < MAX_PTE32PAE_ENTRIES; i++) {
+ tmp_vaddr = 4096 * i;
+ tmp_vaddr += vaddr;
+ if (pt[i].present)
+ PrintPTE32PAE(tmp_vaddr, &(pt[i]));
+ }
+ break;
+ }
+
+ /* 32 Bit */
+
+ case PAGE_PD32:
+ {
+ pde32_t * pd = (pde32_t *)page_ptr;
+ PrintDebug("PDE32 Page\n");
+ for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
+ tmp_vaddr = 4096 * MAX_PTE32_ENTRIES * i;
+ tmp_vaddr += vaddr;
+ if (pd[i].present)
+ PrintPDE32(tmp_vaddr, &(pd[i]));
+ }
+ break;
+ }
+ case PAGE_PT32:
+ {
+ pte32_t * pt = (pte32_t *)page_ptr;
+ PrintDebug("PTE32 Page\n");
+ for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
+ tmp_vaddr = 4096 * i;
+ tmp_vaddr += vaddr;
+ if (pt[i].present)
+ PrintPTE32(tmp_vaddr, &(pt[i]));
+ }
+ break;
+ }
+ default:
+ break;
}
- /* 32 Bit */
-
- case PAGE_PD32:
- {
- pde32_t * pd = (pde32_t *)page_ptr;
- PrintDebug("PDE32 Page\n");
- for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
- tmp_vaddr = 4096 * MAX_PTE32_ENTRIES * i;
- tmp_vaddr += vaddr;
- if (pd[i].present)
- PrintPDE32(tmp_vaddr, &(pd[i]));
- }
- break;
- }
- case PAGE_PT32:
- {
- pte32_t * pt = (pte32_t *)page_ptr;
- PrintDebug("PTE32 Page\n");
- for (i = 0; i < MAX_PTE32_ENTRIES; i++) {
- tmp_vaddr = 4096 * i;
- tmp_vaddr += vaddr;
- if (pt[i].present)
- PrintPTE32(tmp_vaddr, &(pt[i]));
- }
- break;
- }
- default:
- break;
- }
-
- return 0;
+ return 0;
}
static int print_page_tree_cb(struct guest_info * info, page_type_t type, addr_t vaddr, addr_t page_ptr, addr_t page_pa, void * private_data) {
- switch (type) {
-
- /* 64 Bit */
-
- case PAGE_PML464:
- {
- pml4e64_t * pml = (pml4e64_t *)page_ptr;
- PrintPML4e64(vaddr, &(pml[PML4E64_INDEX(vaddr)]));
- break;
- }
- case PAGE_PDP64:
- {
- pdpe64_t * pdp = (pdpe64_t *)page_ptr;
- PrintPDPE64(vaddr, &(pdp[PDPE64_INDEX(vaddr)]));
- break;
- }
- case PAGE_PD64:
- {
- pde64_t * pd = (pde64_t *)page_ptr;
- PrintPDE64(vaddr, &(pd[PDE64_INDEX(vaddr)]));
- break;
- }
- case PAGE_PT64:
- {
- pte64_t * pt = (pte64_t *)page_ptr;
- PrintPTE64(vaddr, &(pt[PTE64_INDEX(vaddr)]));
- break;
- }
-
- /* 32 BIT PAE */
+ switch (type) {
+
+ /* 64 Bit */
+
+ case PAGE_PML464:
+ {
+ pml4e64_t * pml = (pml4e64_t *)page_ptr;
+ PrintPML4e64(vaddr, &(pml[PML4E64_INDEX(vaddr)]));
+ break;
+ }
+ case PAGE_PDP64:
+ {
+ pdpe64_t * pdp = (pdpe64_t *)page_ptr;
+ PrintPDPE64(vaddr, &(pdp[PDPE64_INDEX(vaddr)]));
+ break;
+ }
+ case PAGE_PD64:
+ {
+ pde64_t * pd = (pde64_t *)page_ptr;
+ PrintPDE64(vaddr, &(pd[PDE64_INDEX(vaddr)]));
+ break;
+ }
+ case PAGE_PT64:
+ {
+ pte64_t * pt = (pte64_t *)page_ptr;
+ PrintPTE64(vaddr, &(pt[PTE64_INDEX(vaddr)]));
+ break;
+ }
+
+ /* 32 BIT PAE */
- case PAGE_PDP32PAE:
- {
- pdpe32pae_t * pdp = (pdpe32pae_t *)page_ptr;
- PrintPDPE32PAE(vaddr, &(pdp[PDPE32PAE_INDEX(vaddr)]));
- break;
- }
- case PAGE_PD32PAE:
- {
- pde32pae_t * pd = (pde32pae_t *)page_ptr;
- PrintPDE32PAE(vaddr, &(pd[PDE32PAE_INDEX(vaddr)]));
- break;
+ case PAGE_PDP32PAE:
+ {
+ pdpe32pae_t * pdp = (pdpe32pae_t *)page_ptr;
+ PrintPDPE32PAE(vaddr, &(pdp[PDPE32PAE_INDEX(vaddr)]));
+ break;
+ }
+ case PAGE_PD32PAE:
+ {
+ pde32pae_t * pd = (pde32pae_t *)page_ptr;
+ PrintPDE32PAE(vaddr, &(pd[PDE32PAE_INDEX(vaddr)]));
+ break;
+ }
+ case PAGE_PT32PAE:
+ {
+ pte32pae_t * pt = (pte32pae_t *)page_ptr;
+ PrintPTE32PAE(vaddr, &(pt[PTE32PAE_INDEX(vaddr)]));
+ break;
+ }
+
+ /* 32 Bit */
+
+ case PAGE_PD32:
+ {
+ pde32_t * pd = (pde32_t *)page_ptr;
+ PrintPDE32(vaddr, &(pd[PDE32_INDEX(vaddr)]));
+ break;
+ }
+ case PAGE_PT32:
+ {
+ pte32_t * pt = (pte32_t *)page_ptr;
+ PrintPTE32(vaddr, &(pt[PTE32_INDEX(vaddr)]));
+ break;
+ }
+ default:
+ PrintDebug("%s %p->%p \n", v3_page_type_to_str(type), (void *)vaddr, (void *)page_pa);
+ break;
}
- case PAGE_PT32PAE:
- {
- pte32pae_t * pt = (pte32pae_t *)page_ptr;
- PrintPTE32PAE(vaddr, &(pt[PTE32PAE_INDEX(vaddr)]));
- break;
- }
-
- /* 32 Bit */
- case PAGE_PD32:
- {
- pde32_t * pd = (pde32_t *)page_ptr;
- PrintPDE32(vaddr, &(pd[PDE32_INDEX(vaddr)]));
- break;
- }
- case PAGE_PT32:
- {
- pte32_t * pt = (pte32_t *)page_ptr;
- PrintPTE32(vaddr, &(pt[PTE32_INDEX(vaddr)]));
- break;
- }
- default:
- PrintDebug("%s %p->%p \n", v3_page_type_to_str(type), (void *)vaddr, (void *)page_pa);
- break;
- }
-
- return 0;
+ return 0;
}
void PrintPTEntry(struct guest_info * info, page_type_t type, addr_t vaddr, void * entry) {
- print_page_tree_cb(info, type, vaddr, PAGE_ADDR_4KB((addr_t)entry), 0, NULL);
+ print_page_tree_cb(info, type, vaddr, PAGE_ADDR_4KB((addr_t)entry), 0, NULL);
}
void PrintHostPageTables(struct guest_info * info, addr_t cr3) {
- PrintDebug("CR3: %p\n", (void *)cr3);
- switch (info->cpu_mode) {
- case PROTECTED:
- v3_walk_host_pt_32(info, cr3, print_page_walk_cb, NULL);
- break;
- case PROTECTED_PAE:
- v3_walk_host_pt_32pae(info, cr3, print_page_walk_cb, NULL);
- break;
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- v3_walk_host_pt_64(info, cr3, print_page_walk_cb, NULL);
- break;
- default:
- PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
- break;
- }
+ PrintDebug("CR3: %p\n", (void *)cr3);
+ switch (info->cpu_mode) {
+ case PROTECTED:
+ v3_walk_host_pt_32(info, cr3, print_page_walk_cb, NULL);
+ break;
+ case PROTECTED_PAE:
+ v3_walk_host_pt_32pae(info, cr3, print_page_walk_cb, NULL);
+ break;
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ v3_walk_host_pt_64(info, cr3, print_page_walk_cb, NULL);
+ break;
+ default:
+ PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
+ break;
+ }
}
void PrintGuestPageTables(struct guest_info * info, addr_t cr3) {
- PrintDebug("CR3: %p\n", (void *)cr3);
- switch (info->cpu_mode) {
- case PROTECTED:
- v3_walk_guest_pt_32(info, cr3, print_page_walk_cb, NULL);
- break;
- case PROTECTED_PAE:
- v3_walk_guest_pt_32pae(info, cr3, print_page_walk_cb, NULL);
- break;
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- v3_walk_guest_pt_64(info, cr3, print_page_walk_cb, NULL);
- break;
- default:
- PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
- break;
- }
+ PrintDebug("CR3: %p\n", (void *)cr3);
+ switch (info->cpu_mode) {
+ case PROTECTED:
+ v3_walk_guest_pt_32(info, cr3, print_page_walk_cb, NULL);
+ break;
+ case PROTECTED_PAE:
+ v3_walk_guest_pt_32pae(info, cr3, print_page_walk_cb, NULL);
+ break;
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ v3_walk_guest_pt_64(info, cr3, print_page_walk_cb, NULL);
+ break;
+ default:
+ PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
+ break;
+ }
}
void PrintHostPageTree(struct guest_info * info, addr_t virtual_addr, addr_t cr3) {
- PrintDebug("CR3: %p\n", (void *)cr3);
- switch (info->cpu_mode) {
- case PROTECTED:
- v3_drill_host_pt_32(info, cr3, virtual_addr, print_page_tree_cb, NULL);
- break;
- case PROTECTED_PAE:
- v3_drill_host_pt_32pae(info, cr3, virtual_addr, print_page_tree_cb, NULL);
- break;
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- v3_drill_host_pt_64(info, cr3, virtual_addr, print_page_tree_cb, NULL);
- break;
- default:
- PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
- break;
- }
+ PrintDebug("CR3: %p\n", (void *)cr3);
+ switch (info->cpu_mode) {
+ case PROTECTED:
+ v3_drill_host_pt_32(info, cr3, virtual_addr, print_page_tree_cb, NULL);
+ break;
+ case PROTECTED_PAE:
+ v3_drill_host_pt_32pae(info, cr3, virtual_addr, print_page_tree_cb, NULL);
+ break;
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ v3_drill_host_pt_64(info, cr3, virtual_addr, print_page_tree_cb, NULL);
+ break;
+ default:
+ PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
+ break;
+ }
}
void PrintGuestPageTree(struct guest_info * info, addr_t virtual_addr, addr_t cr3) {
- PrintDebug("CR3: %p\n", (void *)cr3);
- switch (info->cpu_mode) {
- case PROTECTED:
- v3_drill_guest_pt_32(info, cr3, virtual_addr, print_page_tree_cb, NULL);
- break;
- case PROTECTED_PAE:
- v3_drill_guest_pt_32pae(info, cr3, virtual_addr, print_page_tree_cb, NULL);
- break;
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- v3_drill_guest_pt_64(info, cr3, virtual_addr, print_page_tree_cb, NULL);
- break;
- default:
- PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
- break;
- }
+ PrintDebug("CR3: %p\n", (void *)cr3);
+ switch (info->cpu_mode) {
+ case PROTECTED:
+ v3_drill_guest_pt_32(info, cr3, virtual_addr, print_page_tree_cb, NULL);
+ break;
+ case PROTECTED_PAE:
+ v3_drill_guest_pt_32pae(info, cr3, virtual_addr, print_page_tree_cb, NULL);
+ break;
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ v3_drill_guest_pt_64(info, cr3, virtual_addr, print_page_tree_cb, NULL);
+ break;
+ default:
+ PrintError("Unsupported CPU MODE %s\n", v3_cpu_mode_to_str(info->cpu_mode));
+ break;
+ }
}
struct exit_event {
- uint_t exit_code;
- uint_t exit_count;
- uint_t handler_time;
+ uint_t exit_code;
+ uint_t exit_count;
+ uint_t handler_time;
- struct rb_node tree_node;
+ struct rb_node tree_node;
};
void v3_init_profiler(struct guest_info * info) {
- info->profiler.total_exits = 0;
+ info->profiler.total_exits = 0;
- info->profiler.start_time = 0;
- info->profiler.end_time = 0;
- info->profiler.guest_pf_cnt = 0;
+ info->profiler.start_time = 0;
+ info->profiler.end_time = 0;
+ info->profiler.guest_pf_cnt = 0;
- info->profiler.root.rb_node = NULL;
+ info->profiler.root.rb_node = NULL;
}
static inline struct exit_event * __insert_event(struct guest_info * info,
struct exit_event * evt) {
- struct rb_node ** p = &(info->profiler.root.rb_node);
- struct rb_node * parent = NULL;
- struct exit_event * tmp_evt = NULL;
-
- while (*p) {
- parent = *p;
- tmp_evt = rb_entry(parent, struct exit_event, tree_node);
-
- if (evt->exit_code < tmp_evt->exit_code) {
- p = &(*p)->rb_left;
- } else if (evt->exit_code > tmp_evt->exit_code) {
- p = &(*p)->rb_right;
- } else {
- return tmp_evt;
+ struct rb_node ** p = &(info->profiler.root.rb_node);
+ struct rb_node * parent = NULL;
+ struct exit_event * tmp_evt = NULL;
+
+ while (*p) {
+ parent = *p;
+ tmp_evt = rb_entry(parent, struct exit_event, tree_node);
+
+ if (evt->exit_code < tmp_evt->exit_code) {
+ p = &(*p)->rb_left;
+ } else if (evt->exit_code > tmp_evt->exit_code) {
+ p = &(*p)->rb_right;
+ } else {
+ return tmp_evt;
+ }
}
- }
- rb_link_node(&(evt->tree_node), parent, p);
+ rb_link_node(&(evt->tree_node), parent, p);
- return NULL;
+ return NULL;
}
static inline struct exit_event * insert_event(struct guest_info * info,
struct exit_event * evt) {
- struct exit_event * ret;
+ struct exit_event * ret;
- if ((ret = __insert_event(info, evt))) {
- return ret;
- }
+ if ((ret = __insert_event(info, evt))) {
+ return ret;
+ }
- v3_rb_insert_color(&(evt->tree_node), &(info->profiler.root));
+ v3_rb_insert_color(&(evt->tree_node), &(info->profiler.root));
- return NULL;
+ return NULL;
}
static struct exit_event * get_exit(struct guest_info * info, uint_t exit_code) {
- struct rb_node * n = info->profiler.root.rb_node;
- struct exit_event * evt = NULL;
+ struct rb_node * n = info->profiler.root.rb_node;
+ struct exit_event * evt = NULL;
- while (n) {
- evt = rb_entry(n, struct exit_event, tree_node);
+ while (n) {
+ evt = rb_entry(n, struct exit_event, tree_node);
- if (exit_code < evt->exit_code) {
- n = n->rb_left;
- } else if (exit_code > evt->exit_code) {
- n = n->rb_right;
- } else {
- return evt;
+ if (exit_code < evt->exit_code) {
+ n = n->rb_left;
+ } else if (exit_code > evt->exit_code) {
+ n = n->rb_right;
+ } else {
+ return evt;
+ }
}
- }
- return NULL;
+ return NULL;
}
static inline struct exit_event * create_exit(uint_t exit_code) {
- struct exit_event * evt = V3_Malloc(sizeof(struct exit_event));
+ struct exit_event * evt = V3_Malloc(sizeof(struct exit_event));
- evt->exit_code = exit_code;
- evt->exit_count = 0;
- evt->handler_time = 0;
+ evt->exit_code = exit_code;
+ evt->exit_count = 0;
+ evt->handler_time = 0;
- return evt;
+ return evt;
}
void v3_profile_exit(struct guest_info * info, uint_t exit_code) {
- uint_t time = (info->profiler.end_time - info->profiler.start_time);
- struct exit_event * evt = get_exit(info, exit_code);
+ uint_t time = (info->profiler.end_time - info->profiler.start_time);
+ struct exit_event * evt = get_exit(info, exit_code);
- if (evt == NULL) {
- evt = create_exit(exit_code);
- insert_event(info, evt);
- }
+ if (evt == NULL) {
+ evt = create_exit(exit_code);
+ insert_event(info, evt);
+ }
- evt->handler_time = (evt->handler_time * .99) + (time * .01);
+ evt->handler_time = (evt->handler_time * .99) + (time * .01);
- evt->exit_count++;
+ evt->exit_count++;
- info->profiler.total_exits++;
+ info->profiler.total_exits++;
}
void v3_print_profile(struct guest_info * info) {
- struct exit_event * evt = NULL;
- struct rb_node * node = v3_rb_first(&(info->profiler.root));
+ struct exit_event * evt = NULL;
+ struct rb_node * node = v3_rb_first(&(info->profiler.root));
- PrintDebug("GUEST_PF: %u\n", info->profiler.guest_pf_cnt);
-
- do {
- evt = rb_entry(node, struct exit_event, tree_node);
- const char * code_str = vmexit_code_to_str(evt->exit_code);
-
- PrintDebug("%s:%sCnt=%u,%sTime=%u\n",
- code_str,
- (strlen(code_str) > 14) ? "\t" : "\t\t",
- evt->exit_count,
- (evt->exit_count >= 100) ? "\t" : "\t\t",
- evt->handler_time);
+ PrintDebug("GUEST_PF: %u\n", info->profiler.guest_pf_cnt);
+
+ do {
+ evt = rb_entry(node, struct exit_event, tree_node);
+ const char * code_str = vmexit_code_to_str(evt->exit_code);
+
+ PrintDebug("%s:%sCnt=%u,%sTime=%u\n",
+ code_str,
+ (strlen(code_str) > 14) ? "\t" : "\t\t",
+ evt->exit_count,
+ (evt->exit_count >= 100) ? "\t" : "\t\t",
+ evt->handler_time);
- } while ((node = v3_rb_next(node)));
+ } while ((node = v3_rb_next(node)));
}
void v3_init_queue(struct gen_queue * queue) {
- queue->num_entries = 0;
- INIT_LIST_HEAD(&(queue->entries));
+ queue->num_entries = 0;
+ INIT_LIST_HEAD(&(queue->entries));
}
struct gen_queue * v3_create_queue() {
- struct gen_queue * tmp_queue = V3_Malloc(sizeof(struct gen_queue));
- v3_init_queue(tmp_queue);
- return tmp_queue;
+ struct gen_queue * tmp_queue = V3_Malloc(sizeof(struct gen_queue));
+ v3_init_queue(tmp_queue);
+ return tmp_queue;
}
void v3_enqueue(struct gen_queue * queue, addr_t entry) {
- struct queue_entry * q_entry = V3_Malloc(sizeof(struct queue_entry));
+ struct queue_entry * q_entry = V3_Malloc(sizeof(struct queue_entry));
- q_entry->entry = entry;
- list_add_tail(&(q_entry->entry_list), &(queue->entries));
- queue->num_entries++;
+ q_entry->entry = entry;
+ list_add_tail(&(q_entry->entry_list), &(queue->entries));
+ queue->num_entries++;
}
addr_t v3_dequeue(struct gen_queue * queue) {
- addr_t entry_val = 0;
+ addr_t entry_val = 0;
- if (!list_empty(&(queue->entries))) {
- struct list_head * q_entry = queue->entries.next;
- struct queue_entry * tmp_entry = list_entry(q_entry, struct queue_entry, entry_list);
+ if (!list_empty(&(queue->entries))) {
+ struct list_head * q_entry = queue->entries.next;
+ struct queue_entry * tmp_entry = list_entry(q_entry, struct queue_entry, entry_list);
- entry_val = tmp_entry->entry;
- list_del(q_entry);
- V3_Free(tmp_entry);
- }
+ entry_val = tmp_entry->entry;
+ list_del(q_entry);
+ V3_Free(tmp_entry);
+ }
- return entry_val;
+ return entry_val;
}
static void __rb_rotate_left(struct rb_node *node, struct rb_root *root)
{
- struct rb_node *right = node->rb_right;
- struct rb_node *parent = rb_parent(node);
+ struct rb_node *right = node->rb_right;
+ struct rb_node *parent = rb_parent(node);
- if ((node->rb_right = right->rb_left))
- rb_set_parent(right->rb_left, node);
- right->rb_left = node;
+ if ((node->rb_right = right->rb_left))
+ rb_set_parent(right->rb_left, node);
+ right->rb_left = node;
- rb_set_parent(right, parent);
+ rb_set_parent(right, parent);
- if (parent)
+ if (parent)
{
- if (node == parent->rb_left)
- parent->rb_left = right;
- else
- parent->rb_right = right;
+ if (node == parent->rb_left)
+ parent->rb_left = right;
+ else
+ parent->rb_right = right;
}
- else
- root->rb_node = right;
- rb_set_parent(node, right);
+ else
+ root->rb_node = right;
+ rb_set_parent(node, right);
}
static void __rb_rotate_right(struct rb_node *node, struct rb_root *root)
{
- struct rb_node *left = node->rb_left;
- struct rb_node *parent = rb_parent(node);
+ struct rb_node * left = node->rb_left;
+ struct rb_node * parent = rb_parent(node);
- if ((node->rb_left = left->rb_right))
- rb_set_parent(left->rb_right, node);
- left->rb_right = node;
+ if ((node->rb_left = left->rb_right)) {
+ rb_set_parent(left->rb_right, node);
+ }
- rb_set_parent(left, parent);
+ left->rb_right = node;
- if (parent)
- {
- if (node == parent->rb_right)
- parent->rb_right = left;
- else
- parent->rb_left = left;
+ rb_set_parent(left, parent);
+
+ if (parent) {
+ if (node == parent->rb_right) {
+ parent->rb_right = left;
+ } else {
+ parent->rb_left = left;
}
- else
- root->rb_node = left;
- rb_set_parent(node, left);
+ } else {
+ root->rb_node = left;
+ }
+
+ rb_set_parent(node, left);
}
void v3_rb_insert_color(struct rb_node *node, struct rb_root *root)
{
- struct rb_node *parent, *gparent;
+ struct rb_node *parent, *gparent;
- while ((parent = rb_parent(node)) && rb_is_red(parent))
+ while ((parent = rb_parent(node)) && rb_is_red(parent))
{
- gparent = rb_parent(parent);
+ gparent = rb_parent(parent);
- if (parent == gparent->rb_left)
+ if (parent == gparent->rb_left)
{
- {
- register struct rb_node *uncle = gparent->rb_right;
- if (uncle && rb_is_red(uncle))
- {
- rb_set_black(uncle);
- rb_set_black(parent);
- rb_set_red(gparent);
- node = gparent;
- continue;
- }
- }
+ {
+ register struct rb_node *uncle = gparent->rb_right;
+ if (uncle && rb_is_red(uncle))
+ {
+ rb_set_black(uncle);
+ rb_set_black(parent);
+ rb_set_red(gparent);
+ node = gparent;
+ continue;
+ }
+ }
- if (parent->rb_right == node)
+ if (parent->rb_right == node)
{
- register struct rb_node *tmp;
- __rb_rotate_left(parent, root);
- tmp = parent;
- parent = node;
- node = tmp;
+ register struct rb_node *tmp;
+ __rb_rotate_left(parent, root);
+ tmp = parent;
+ parent = node;
+ node = tmp;
}
- rb_set_black(parent);
- rb_set_red(gparent);
- __rb_rotate_right(gparent, root);
+ rb_set_black(parent);
+ rb_set_red(gparent);
+ __rb_rotate_right(gparent, root);
} else {
+ {
+ register struct rb_node *uncle = gparent->rb_left;
+ if (uncle && rb_is_red(uncle))
{
- register struct rb_node *uncle = gparent->rb_left;
- if (uncle && rb_is_red(uncle))
- {
- rb_set_black(uncle);
- rb_set_black(parent);
- rb_set_red(gparent);
- node = gparent;
- continue;
- }
+ rb_set_black(uncle);
+ rb_set_black(parent);
+ rb_set_red(gparent);
+ node = gparent;
+ continue;
}
+ }
- if (parent->rb_left == node)
- {
- register struct rb_node *tmp;
- __rb_rotate_right(parent, root);
- tmp = parent;
- parent = node;
- node = tmp;
- }
+ if (parent->rb_left == node)
+ {
+ register struct rb_node *tmp;
+ __rb_rotate_right(parent, root);
+ tmp = parent;
+ parent = node;
+ node = tmp;
+ }
- rb_set_black(parent);
- rb_set_red(gparent);
- __rb_rotate_left(gparent, root);
- }
+ rb_set_black(parent);
+ rb_set_red(gparent);
+ __rb_rotate_left(gparent, root);
+ }
}
- rb_set_black(root->rb_node);
+ rb_set_black(root->rb_node);
}
static void __rb_erase_color(struct rb_node *node, struct rb_node *parent,
struct rb_root *root)
{
- struct rb_node *other;
+ struct rb_node *other;
- while ((!node || rb_is_black(node)) && node != root->rb_node)
+ while ((!node || rb_is_black(node)) && node != root->rb_node)
{
- if (parent->rb_left == node)
+ if (parent->rb_left == node)
{
- other = parent->rb_right;
- if (rb_is_red(other))
+ other = parent->rb_right;
+ if (rb_is_red(other))
{
- rb_set_black(other);
- rb_set_red(parent);
- __rb_rotate_left(parent, root);
- other = parent->rb_right;
+ rb_set_black(other);
+ rb_set_red(parent);
+ __rb_rotate_left(parent, root);
+ other = parent->rb_right;
}
- if ((!other->rb_left || rb_is_black(other->rb_left)) &&
- (!other->rb_right || rb_is_black(other->rb_right)))
+ if ((!other->rb_left || rb_is_black(other->rb_left)) &&
+ (!other->rb_right || rb_is_black(other->rb_right)))
{
- rb_set_red(other);
- node = parent;
- parent = rb_parent(node);
+ rb_set_red(other);
+ node = parent;
+ parent = rb_parent(node);
}
- else
+ else
{
- if (!other->rb_right || rb_is_black(other->rb_right))
+ if (!other->rb_right || rb_is_black(other->rb_right))
{
- struct rb_node *o_left;
- if ((o_left = other->rb_left))
- rb_set_black(o_left);
- rb_set_red(other);
- __rb_rotate_right(other, root);
- other = parent->rb_right;
+ struct rb_node *o_left;
+ if ((o_left = other->rb_left))
+ rb_set_black(o_left);
+ rb_set_red(other);
+ __rb_rotate_right(other, root);
+ other = parent->rb_right;
}
- rb_set_color(other, rb_color(parent));
- rb_set_black(parent);
- if (other->rb_right)
- rb_set_black(other->rb_right);
- __rb_rotate_left(parent, root);
- node = root->rb_node;
- break;
+ rb_set_color(other, rb_color(parent));
+ rb_set_black(parent);
+ if (other->rb_right)
+ rb_set_black(other->rb_right);
+ __rb_rotate_left(parent, root);
+ node = root->rb_node;
+ break;
}
}
- else
+ else
{
- other = parent->rb_left;
- if (rb_is_red(other))
+ other = parent->rb_left;
+ if (rb_is_red(other))
{
- rb_set_black(other);
- rb_set_red(parent);
- __rb_rotate_right(parent, root);
- other = parent->rb_left;
+ rb_set_black(other);
+ rb_set_red(parent);
+ __rb_rotate_right(parent, root);
+ other = parent->rb_left;
}
- if ((!other->rb_left || rb_is_black(other->rb_left)) &&
- (!other->rb_right || rb_is_black(other->rb_right)))
+ if ((!other->rb_left || rb_is_black(other->rb_left)) &&
+ (!other->rb_right || rb_is_black(other->rb_right)))
{
- rb_set_red(other);
- node = parent;
- parent = rb_parent(node);
+ rb_set_red(other);
+ node = parent;
+ parent = rb_parent(node);
}
- else
+ else
{
- if (!other->rb_left || rb_is_black(other->rb_left))
+ if (!other->rb_left || rb_is_black(other->rb_left))
{
- register struct rb_node *o_right;
- if ((o_right = other->rb_right))
- rb_set_black(o_right);
- rb_set_red(other);
- __rb_rotate_left(other, root);
- other = parent->rb_left;
+ register struct rb_node *o_right;
+ if ((o_right = other->rb_right))
+ rb_set_black(o_right);
+ rb_set_red(other);
+ __rb_rotate_left(other, root);
+ other = parent->rb_left;
}
- rb_set_color(other, rb_color(parent));
- rb_set_black(parent);
- if (other->rb_left)
- rb_set_black(other->rb_left);
- __rb_rotate_right(parent, root);
- node = root->rb_node;
- break;
+ rb_set_color(other, rb_color(parent));
+ rb_set_black(parent);
+ if (other->rb_left)
+ rb_set_black(other->rb_left);
+ __rb_rotate_right(parent, root);
+ node = root->rb_node;
+ break;
}
}
}
- if (node)
- rb_set_black(node);
+ if (node)
+ rb_set_black(node);
}
void v3_rb_erase(struct rb_node *node, struct rb_root *root)
{
- struct rb_node *child, *parent;
- int color;
-
- if (!node->rb_left)
- child = node->rb_right;
- else if (!node->rb_right)
- child = node->rb_left;
- else
+ struct rb_node *child, *parent;
+ int color;
+
+ if (!node->rb_left)
+ child = node->rb_right;
+ else if (!node->rb_right)
+ child = node->rb_left;
+ else
{
- struct rb_node *old = node, *left;
-
- node = node->rb_right;
- while ((left = node->rb_left) != NULL)
- node = left;
- child = node->rb_right;
- parent = rb_parent(node);
- color = rb_color(node);
-
- if (child)
- rb_set_parent(child, parent);
- if (parent == old) {
- parent->rb_right = child;
- parent = node;
- } else
- parent->rb_left = child;
+ struct rb_node *old = node, *left;
+
+ node = node->rb_right;
+ while ((left = node->rb_left) != NULL)
+ node = left;
+ child = node->rb_right;
+ parent = rb_parent(node);
+ color = rb_color(node);
- node->rb_parent_color = old->rb_parent_color;
- node->rb_right = old->rb_right;
- node->rb_left = old->rb_left;
+ if (child)
+ rb_set_parent(child, parent);
+ if (parent == old) {
+ parent->rb_right = child;
+ parent = node;
+ } else
+ parent->rb_left = child;
- if (rb_parent(old))
+ node->rb_parent_color = old->rb_parent_color;
+ node->rb_right = old->rb_right;
+ node->rb_left = old->rb_left;
+
+ if (rb_parent(old))
{
- if (rb_parent(old)->rb_left == old)
- rb_parent(old)->rb_left = node;
- else
- rb_parent(old)->rb_right = node;
+ if (rb_parent(old)->rb_left == old)
+ rb_parent(old)->rb_left = node;
+ else
+ rb_parent(old)->rb_right = node;
} else
- root->rb_node = node;
+ root->rb_node = node;
- rb_set_parent(old->rb_left, node);
- if (old->rb_right)
- rb_set_parent(old->rb_right, node);
- goto color;
+ rb_set_parent(old->rb_left, node);
+ if (old->rb_right)
+ rb_set_parent(old->rb_right, node);
+ goto color;
}
- parent = rb_parent(node);
- color = rb_color(node);
+ parent = rb_parent(node);
+ color = rb_color(node);
- if (child)
- rb_set_parent(child, parent);
- if (parent)
+ if (child)
+ rb_set_parent(child, parent);
+ if (parent)
{
- if (parent->rb_left == node)
- parent->rb_left = child;
- else
- parent->rb_right = child;
+ if (parent->rb_left == node)
+ parent->rb_left = child;
+ else
+ parent->rb_right = child;
}
- else
- root->rb_node = child;
+ else
+ root->rb_node = child;
color:
- if (color == RB_BLACK)
- __rb_erase_color(child, parent, root);
+ if (color == RB_BLACK)
+ __rb_erase_color(child, parent, root);
}
*/
struct rb_node *v3_rb_first(struct rb_root *root)
{
- struct rb_node *n;
-
- n = root->rb_node;
- if (!n)
- return NULL;
- while (n->rb_left)
- n = n->rb_left;
- return n;
+ struct rb_node *n;
+
+ n = root->rb_node;
+ if (!n)
+ return NULL;
+ while (n->rb_left)
+ n = n->rb_left;
+ return n;
}
struct rb_node *v3_rb_last(struct rb_root *root)
{
- struct rb_node *n;
-
- n = root->rb_node;
- if (!n)
- return NULL;
- while (n->rb_right)
- n = n->rb_right;
- return n;
+ struct rb_node *n;
+
+ n = root->rb_node;
+ if (!n)
+ return NULL;
+ while (n->rb_right)
+ n = n->rb_right;
+ return n;
}
struct rb_node *v3_rb_next(struct rb_node *node)
{
- struct rb_node *parent;
-
- /* If we have a right-hand child, go down and then left as far
- as we can. */
- if (node->rb_right) {
- node = node->rb_right;
- while (node->rb_left)
- node=node->rb_left;
- return node;
- }
-
- /* No right-hand children. Everything down and left is
- smaller than us, so any 'next' node must be in the general
- direction of our parent. Go up the tree; any time the
- ancestor is a right-hand child of its parent, keep going
- up. First time it's a left-hand child of its parent, said
- parent is our 'next' node. */
- while ((parent = rb_parent(node)) && node == parent->rb_right)
- node = parent;
-
- return parent;
+ struct rb_node *parent;
+
+ /* If we have a right-hand child, go down and then left as far
+ as we can. */
+ if (node->rb_right) {
+ node = node->rb_right;
+ while (node->rb_left)
+ node=node->rb_left;
+ return node;
+ }
+
+ /* No right-hand children. Everything down and left is
+ smaller than us, so any 'next' node must be in the general
+ direction of our parent. Go up the tree; any time the
+ ancestor is a right-hand child of its parent, keep going
+ up. First time it's a left-hand child of its parent, said
+ parent is our 'next' node. */
+ while ((parent = rb_parent(node)) && node == parent->rb_right)
+ node = parent;
+
+ return parent;
}
struct rb_node *v3_rb_prev(struct rb_node *node)
{
- struct rb_node *parent;
-
- /* If we have a left-hand child, go down and then right as far
- as we can. */
- if (node->rb_left) {
- node = node->rb_left;
- while (node->rb_right)
- node=node->rb_right;
- return node;
- }
-
- /* No left-hand children. Go up till we find an ancestor which
- is a right-hand child of its parent */
- while ((parent = rb_parent(node)) && node == parent->rb_left)
- node = parent;
-
- return parent;
+ struct rb_node *parent;
+
+ /* If we have a left-hand child, go down and then right as far
+ as we can. */
+ if (node->rb_left) {
+ node = node->rb_left;
+ while (node->rb_right)
+ node=node->rb_right;
+ return node;
+ }
+
+ /* No left-hand children. Go up till we find an ancestor which
+ is a right-hand child of its parent */
+ while ((parent = rb_parent(node)) && node == parent->rb_left)
+ node = parent;
+
+ return parent;
}
void v3_rb_replace_node(struct rb_node *victim, struct rb_node *new,
- struct rb_root *root)
+ struct rb_root *root)
{
- struct rb_node *parent = rb_parent(victim);
-
- /* Set the surrounding nodes to point to the replacement */
- if (parent) {
- if (victim == parent->rb_left)
- parent->rb_left = new;
- else
- parent->rb_right = new;
- } else {
- root->rb_node = new;
- }
- if (victim->rb_left)
- rb_set_parent(victim->rb_left, new);
- if (victim->rb_right)
- rb_set_parent(victim->rb_right, new);
+ struct rb_node *parent = rb_parent(victim);
- /* Copy the pointers/colour from the victim to the replacement */
- *new = *victim;
+ /* Set the surrounding nodes to point to the replacement */
+ if (parent) {
+ if (victim == parent->rb_left)
+ parent->rb_left = new;
+ else
+ parent->rb_right = new;
+ } else {
+ root->rb_node = new;
+ }
+ if (victim->rb_left)
+ rb_set_parent(victim->rb_left, new);
+ if (victim->rb_right)
+ rb_set_parent(victim->rb_right, new);
+
+ /* Copy the pointers/colour from the victim to the replacement */
+ *new = *victim;
}
void NO_INST v3_init_ringbuf(struct v3_ringbuf * ring, uint_t size) {
- ring->buf = V3_Malloc(size);
- ring->size = size;
+ ring->buf = V3_Malloc(size);
+ ring->size = size;
- ring->start = 0;
- ring->end = 0;
- ring->current_len = 0;
+ ring->start = 0;
+ ring->end = 0;
+ ring->current_len = 0;
}
NO_INST
struct v3_ringbuf * v3_create_ringbuf(uint_t size) {
- struct v3_ringbuf * ring = (struct v3_ringbuf *)V3_Malloc(sizeof(struct v3_ringbuf));
+ struct v3_ringbuf * ring = (struct v3_ringbuf *)V3_Malloc(sizeof(struct v3_ringbuf));
- v3_init_ringbuf(ring, size);
+ v3_init_ringbuf(ring, size);
- return ring;
+ return ring;
}
NO_INST
void v3_free_ringbuf(struct v3_ringbuf * ring) {
- V3_Free(ring->buf);
- V3_Free(ring);
+ V3_Free(ring->buf);
+ V3_Free(ring);
}
NO_INST
static inline uchar_t * get_read_ptr(struct v3_ringbuf * ring) {
- return (uchar_t *)(ring->buf + ring->start);
+ return (uchar_t *)(ring->buf + ring->start);
}
NO_INST
static inline uchar_t * get_write_ptr(struct v3_ringbuf * ring) {
- return (uchar_t *)(ring->buf + ring->end);
+ return (uchar_t *)(ring->buf + ring->end);
}
NO_INST
static inline int get_read_section_size(struct v3_ringbuf * ring) {
- return ring->size - ring->start;
+ return ring->size - ring->start;
}
NO_INST
static inline int get_write_section_size(struct v3_ringbuf * ring) {
- return ring->size - ring->end;
+ return ring->size - ring->end;
}
NO_INST
static inline int is_read_loop(struct v3_ringbuf * ring, uint_t len) {
- if ((ring->start >= ring->end) && (ring->current_len > 0)) {
- // end is past the end of the buffer
- if (get_read_section_size(ring) < len) {
- return 1;
+ if ((ring->start >= ring->end) && (ring->current_len > 0)) {
+ // end is past the end of the buffer
+ if (get_read_section_size(ring) < len) {
+ return 1;
+ }
}
- }
- return 0;
+ return 0;
}
NO_INST
static inline int is_write_loop(struct v3_ringbuf * ring, uint_t len) {
- if ((ring->end >= ring->start) && (ring->current_len < ring->size)) {
- // end is past the end of the buffer
- if (get_write_section_size(ring) < len) {
- return 1;
+ if ((ring->end >= ring->start) && (ring->current_len < ring->size)) {
+ // end is past the end of the buffer
+ if (get_write_section_size(ring) < len) {
+ return 1;
+ }
}
- }
- return 0;
+ return 0;
}
NO_INST
int v3_ringbuf_avail_space(struct v3_ringbuf * ring) {
- return ring->size - ring->current_len;
+ return ring->size - ring->current_len;
}
- NO_INST
+NO_INST
int v3_ringbuf_data_len(struct v3_ringbuf * ring) {
- return ring->current_len;
+ return ring->current_len;
}
- NO_INST
+NO_INST
int v3_ringbuf_capacity(struct v3_ringbuf * ring) {
- return ring->size;
+ return ring->size;
}
NO_INST
int v3_ringbuf_read(struct v3_ringbuf * ring, uchar_t * dst, uint_t len) {
- int read_len = 0;
- int ring_data_len = ring->current_len;
+ int read_len = 0;
+ int ring_data_len = ring->current_len;
- read_len = (len > ring_data_len) ? ring_data_len : len;
+ read_len = (len > ring_data_len) ? ring_data_len : len;
- if (is_read_loop(ring, read_len)) {
- int section_len = get_read_section_size(ring);
+ if (is_read_loop(ring, read_len)) {
+ int section_len = get_read_section_size(ring);
- memcpy(dst, get_read_ptr(ring), section_len);
- memcpy(dst + section_len, ring->buf, read_len - section_len);
+ memcpy(dst, get_read_ptr(ring), section_len);
+ memcpy(dst + section_len, ring->buf, read_len - section_len);
- ring->start = read_len - section_len;
- } else {
- memcpy(dst, get_read_ptr(ring), read_len);
+ ring->start = read_len - section_len;
+ } else {
+ memcpy(dst, get_read_ptr(ring), read_len);
- ring->start += read_len;
- }
+ ring->start += read_len;
+ }
- ring->current_len -= read_len;
+ ring->current_len -= read_len;
- return read_len;
+ return read_len;
}
- NO_INST
+NO_INST
int v3_ringbuf_peek(struct v3_ringbuf * ring, uchar_t * dst, uint_t len) {
- int read_len = 0;
- int ring_data_len = ring->current_len;
+ int read_len = 0;
+ int ring_data_len = ring->current_len;
- read_len = (len > ring_data_len) ? ring_data_len : len;
+ read_len = (len > ring_data_len) ? ring_data_len : len;
- if (is_read_loop(ring, read_len)) {
- int section_len = get_read_section_size(ring);
+ if (is_read_loop(ring, read_len)) {
+ int section_len = get_read_section_size(ring);
- memcpy(dst, get_read_ptr(ring), section_len);
- memcpy(dst + section_len, ring->buf, read_len - section_len);
- } else {
- memcpy(dst, get_read_ptr(ring), read_len);
- }
+ memcpy(dst, get_read_ptr(ring), section_len);
+ memcpy(dst + section_len, ring->buf, read_len - section_len);
+ } else {
+ memcpy(dst, get_read_ptr(ring), read_len);
+ }
- return read_len;
+ return read_len;
}
NO_INST
int v3_ringbuf_delete(struct v3_ringbuf * ring, uint_t len) {
- int del_len = 0;
- int ring_data_len = ring->current_len;
+ int del_len = 0;
+ int ring_data_len = ring->current_len;
- del_len = (len > ring_data_len) ? ring_data_len : len;
+ del_len = (len > ring_data_len) ? ring_data_len : len;
- if (is_read_loop(ring, del_len)) {
- int section_len = get_read_section_size(ring);
- ring->start = del_len - section_len;
- } else {
- ring->start += del_len;
- }
+ if (is_read_loop(ring, del_len)) {
+ int section_len = get_read_section_size(ring);
+ ring->start = del_len - section_len;
+ } else {
+ ring->start += del_len;
+ }
- ring->current_len -= del_len;
- return del_len;
+ ring->current_len -= del_len;
+ return del_len;
}
NO_INST
int v3_ringbuf_write(struct v3_ringbuf * ring, uchar_t * src, uint_t len) {
- int write_len = 0;
- int ring_avail_space = ring->size - ring->current_len;
+ int write_len = 0;
+ int ring_avail_space = ring->size - ring->current_len;
- write_len = (len > ring_avail_space) ? ring_avail_space : len;
+ write_len = (len > ring_avail_space) ? ring_avail_space : len;
- if (is_write_loop(ring, write_len)) {
- int section_len = get_write_section_size(ring);
+ if (is_write_loop(ring, write_len)) {
+ int section_len = get_write_section_size(ring);
- // PrintDebug("Write loop: write_ptr=%p, src=%p, sec_len=%d\n",
- // (void *)get_write_ptr(ring),(void*)src, section_len);
+ // PrintDebug("Write loop: write_ptr=%p, src=%p, sec_len=%d\n",
+ // (void *)get_write_ptr(ring),(void*)src, section_len);
- memcpy(get_write_ptr(ring), src, section_len);
- ring->end = 0;
+ memcpy(get_write_ptr(ring), src, section_len);
+ ring->end = 0;
- memcpy(get_write_ptr(ring), src + section_len, write_len - section_len);
+ memcpy(get_write_ptr(ring), src + section_len, write_len - section_len);
- ring->end += write_len - section_len;
- } else {
- // PrintDebug("Writing: write_ptr=%p, src=%p, write_len=%d\n",
- // (void *)get_write_ptr(ring),(void*)src, write_len);
+ ring->end += write_len - section_len;
+ } else {
+ // PrintDebug("Writing: write_ptr=%p, src=%p, write_len=%d\n",
+ // (void *)get_write_ptr(ring),(void*)src, write_len);
- memcpy(get_write_ptr(ring), src, write_len);
+ memcpy(get_write_ptr(ring), src, write_len);
- ring->end += write_len;
- }
+ ring->end += write_len;
+ }
- ring->current_len += write_len;
+ ring->current_len += write_len;
- return write_len;
+ return write_len;
}
NO_INST
void v3_print_ringbuf(struct v3_ringbuf * ring) {
- int ctr = 0;
+ int ctr = 0;
- for (ctr = 0; ctr < ring->current_len; ctr++) {
- int index = (ctr + ring->start) % ring->size;
+ for (ctr = 0; ctr < ring->current_len; ctr++) {
+ int index = (ctr + ring->start) % ring->size;
- PrintDebug("Entry %d (index=%d): %c\n", ctr, index, ring->buf[index]);
- }
+ PrintDebug("Entry %d (index=%d): %c\n", ctr, index, ring->buf[index]);
+ }
}
struct shadow_page_data {
- v3_reg_t cr3;
- addr_t page_pa;
+ v3_reg_t cr3;
+ addr_t page_pa;
- struct list_head page_list_node;
+ struct list_head page_list_node;
};
static uint_t pte_hash_fn(addr_t key) {
- return hash_long(key, 32);
+ return hash_long(key, 32);
}
static int pte_equals(addr_t key1, addr_t key2) {
- return (key1 == key2);
+ return (key1 == key2);
}
static struct shadow_page_data * create_new_shadow_pt(struct guest_info * info);
int v3_init_shadow_page_state(struct guest_info * info) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
+ struct shadow_page_state * state = &(info->shdw_pg_state);
- state->guest_cr3 = 0;
- state->guest_cr0 = 0;
+ state->guest_cr3 = 0;
+ state->guest_cr0 = 0;
- INIT_LIST_HEAD(&(state->page_list));
+ INIT_LIST_HEAD(&(state->page_list));
- state->cached_ptes = NULL;
- state->cached_cr3 = 0;
+ state->cached_ptes = NULL;
+ state->cached_cr3 = 0;
- return 0;
+ return 0;
}
// creates new shadow page tables
// updates the shadow CR3 register to point to the new pts
int v3_activate_shadow_pt(struct guest_info * info) {
- switch (v3_get_cpu_mode(info)) {
-
- case PROTECTED:
- return activate_shadow_pt_32(info);
- case PROTECTED_PAE:
- return activate_shadow_pt_32pae(info);
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- return activate_shadow_pt_64(info);
- default:
- PrintError("Invalid CPU mode: %s\n", v3_cpu_mode_to_str(v3_get_cpu_mode(info)));
- return -1;
- }
-
- return 0;
+ switch (v3_get_cpu_mode(info)) {
+
+ case PROTECTED:
+ return activate_shadow_pt_32(info);
+ case PROTECTED_PAE:
+ return activate_shadow_pt_32pae(info);
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ return activate_shadow_pt_64(info);
+ default:
+ PrintError("Invalid CPU mode: %s\n", v3_cpu_mode_to_str(v3_get_cpu_mode(info)));
+ return -1;
+ }
+
+ return 0;
}
int v3_activate_passthrough_pt(struct guest_info * info) {
- // For now... But we need to change this....
- // As soon as shadow paging becomes active the passthrough tables are hosed
- // So this will cause chaos if it is called at that time
+ // For now... But we need to change this....
+ // As soon as shadow paging becomes active the passthrough tables are hosed
+ // So this will cause chaos if it is called at that time
- info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
- //PrintError("Activate Passthrough Page tables not implemented\n");
- return 0;
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+ //PrintError("Activate Passthrough Page tables not implemented\n");
+ return 0;
}
int v3_handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- if (v3_get_mem_mode(info) == PHYSICAL_MEM) {
- // If paging is not turned on we need to handle the special cases
- return v3_handle_passthrough_pagefault(info, fault_addr, error_code);
- } else if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
-
- switch (v3_get_cpu_mode(info)) {
- case PROTECTED:
- return handle_shadow_pagefault_32(info, fault_addr, error_code);
- break;
- case PROTECTED_PAE:
- return handle_shadow_pagefault_32pae(info, fault_addr, error_code);
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- return handle_shadow_pagefault_64(info, fault_addr, error_code);
- break;
- default:
- PrintError("Unhandled CPU Mode: %s\n", v3_cpu_mode_to_str(v3_get_cpu_mode(info)));
- return -1;
+ if (v3_get_mem_mode(info) == PHYSICAL_MEM) {
+ // If paging is not turned on we need to handle the special cases
+ return v3_handle_passthrough_pagefault(info, fault_addr, error_code);
+ } else if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
+
+ switch (v3_get_cpu_mode(info)) {
+ case PROTECTED:
+ return handle_shadow_pagefault_32(info, fault_addr, error_code);
+ break;
+ case PROTECTED_PAE:
+ return handle_shadow_pagefault_32pae(info, fault_addr, error_code);
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ return handle_shadow_pagefault_64(info, fault_addr, error_code);
+ break;
+ default:
+ PrintError("Unhandled CPU Mode: %s\n", v3_cpu_mode_to_str(v3_get_cpu_mode(info)));
+ return -1;
+ }
+ } else {
+ PrintError("Invalid Memory mode\n");
+ return -1;
}
- } else {
- PrintError("Invalid Memory mode\n");
- return -1;
- }
}
int v3_handle_shadow_invlpg(struct guest_info * info) {
- uchar_t instr[15];
- struct x86_instr dec_instr;
- int ret = 0;
- addr_t vaddr = 0;
-
- if (v3_get_mem_mode(info) != VIRTUAL_MEM) {
- // Paging must be turned on...
- // should handle with some sort of fault I think
- PrintError("ERROR: INVLPG called in non paged mode\n");
- return -1;
- }
-
- if (v3_get_mem_mode(info) == PHYSICAL_MEM) {
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
-
- if (ret == -1) {
- PrintError("Could not read instruction into buffer\n");
- return -1;
- }
-
- if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
- PrintError("Decoding Error\n");
- return -1;
- }
+ uchar_t instr[15];
+ struct x86_instr dec_instr;
+ int ret = 0;
+ addr_t vaddr = 0;
+
+ if (v3_get_mem_mode(info) != VIRTUAL_MEM) {
+ // Paging must be turned on...
+ // should handle with some sort of fault I think
+ PrintError("ERROR: INVLPG called in non paged mode\n");
+ return -1;
+ }
+
+ if (v3_get_mem_mode(info) == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+
+ if (ret == -1) {
+ PrintError("Could not read instruction into buffer\n");
+ return -1;
+ }
+
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Decoding Error\n");
+ return -1;
+ }
- if ((dec_instr.op_type != V3_OP_INVLPG) ||
- (dec_instr.num_operands != 1) ||
- (dec_instr.dst_operand.type != MEM_OPERAND)) {
- PrintError("Decoder Error: Not a valid INVLPG instruction...\n");
- return -1;
- }
-
- vaddr = dec_instr.dst_operand.operand;
-
- info->rip += dec_instr.instr_length;
-
- switch (v3_get_cpu_mode(info)) {
- case PROTECTED:
- return handle_shadow_invlpg_32(info, vaddr);
- case PROTECTED_PAE:
- return handle_shadow_invlpg_32pae(info, vaddr);
- case LONG:
- case LONG_32_COMPAT:
- case LONG_16_COMPAT:
- return handle_shadow_invlpg_64(info, vaddr);
- default:
- PrintError("Invalid CPU mode: %s\n", v3_cpu_mode_to_str(v3_get_cpu_mode(info)));
- return -1;
- }
+ if ((dec_instr.op_type != V3_OP_INVLPG) ||
+ (dec_instr.num_operands != 1) ||
+ (dec_instr.dst_operand.type != MEM_OPERAND)) {
+ PrintError("Decoder Error: Not a valid INVLPG instruction...\n");
+ return -1;
+ }
+
+ vaddr = dec_instr.dst_operand.operand;
+
+ info->rip += dec_instr.instr_length;
+
+ switch (v3_get_cpu_mode(info)) {
+ case PROTECTED:
+ return handle_shadow_invlpg_32(info, vaddr);
+ case PROTECTED_PAE:
+ return handle_shadow_invlpg_32pae(info, vaddr);
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ return handle_shadow_invlpg_64(info, vaddr);
+ default:
+ PrintError("Invalid CPU mode: %s\n", v3_cpu_mode_to_str(v3_get_cpu_mode(info)));
+ return -1;
+ }
}
static struct shadow_page_data * create_new_shadow_pt(struct guest_info * info) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
- v3_reg_t cur_cr3 = info->ctrl_regs.cr3;
- struct shadow_page_data * page_tail = NULL;
- addr_t shdw_page = 0;
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+ v3_reg_t cur_cr3 = info->ctrl_regs.cr3;
+ struct shadow_page_data * page_tail = NULL;
+ addr_t shdw_page = 0;
- if (!list_empty(&(state->page_list))) {
- page_tail = list_tail_entry(&(state->page_list), struct shadow_page_data, page_list_node);
+ if (!list_empty(&(state->page_list))) {
+ page_tail = list_tail_entry(&(state->page_list), struct shadow_page_data, page_list_node);
- if (page_tail->cr3 != cur_cr3) {
- PrintDebug("Reusing old shadow Page: %p (cur_CR3=%p)(page_cr3=%p) \n",
- (void *) page_tail->page_pa, (void *)cur_cr3, (void *)(page_tail->cr3));
+ if (page_tail->cr3 != cur_cr3) {
+ PrintDebug("Reusing old shadow Page: %p (cur_CR3=%p)(page_cr3=%p) \n",
+ (void *)(addr_t)page_tail->page_pa,
+ (void *)(addr_t)cur_cr3,
+ (void *)(addr_t)(page_tail->cr3));
- list_move(&(page_tail->page_list_node), &(state->page_list));
+ list_move(&(page_tail->page_list_node), &(state->page_list));
- memset(V3_VAddr((void *)(page_tail->page_pa)), 0, PAGE_SIZE_4KB);
+ memset(V3_VAddr((void *)(page_tail->page_pa)), 0, PAGE_SIZE_4KB);
- return page_tail;
+ return page_tail;
+ }
}
- }
- // else
+ // else
- page_tail = (struct shadow_page_data *)V3_Malloc(sizeof(struct shadow_page_data));
- page_tail->page_pa = (addr_t)V3_AllocPages(1);
+ page_tail = (struct shadow_page_data *)V3_Malloc(sizeof(struct shadow_page_data));
+ page_tail->page_pa = (addr_t)V3_AllocPages(1);
- PrintDebug("Allocating new shadow Page: %p (cur_cr3=%p)\n", (void *)page_tail->page_pa, (void *)cur_cr3);
+ PrintDebug("Allocating new shadow Page: %p (cur_cr3=%p)\n",
+ (void *)(addr_t)page_tail->page_pa,
+ (void *)(addr_t)cur_cr3);
- page_tail->cr3 = cur_cr3;
- list_add(&(page_tail->page_list_node), &(state->page_list));
+ page_tail->cr3 = cur_cr3;
+ list_add(&(page_tail->page_list_node), &(state->page_list));
- shdw_page = (addr_t)V3_VAddr((void *)(page_tail->page_pa));
- memset((void *)shdw_page, 0, PAGE_SIZE_4KB);
+ shdw_page = (addr_t)V3_VAddr((void *)(page_tail->page_pa));
+ memset((void *)shdw_page, 0, PAGE_SIZE_4KB);
- return page_tail;
+ return page_tail;
}
static void inject_guest_pf(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- if (info->enable_profiler) {
- info->profiler.guest_pf_cnt++;
- }
+ if (info->enable_profiler) {
+ info->profiler.guest_pf_cnt++;
+ }
- info->ctrl_regs.cr2 = fault_addr;
- v3_raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
+ info->ctrl_regs.cr2 = fault_addr;
+ v3_raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
}
static int is_guest_pf(pt_access_status_t guest_access, pt_access_status_t shadow_access) {
- /* basically the reasoning is that there can be multiple reasons for a page fault:
- If there is a permissions failure for a page present in the guest _BUT_
- the reason for the fault was that the page is not present in the shadow,
- _THEN_ we have to map the shadow page in and reexecute, this will generate
- a permissions fault which is _THEN_ valid to send to the guest
- _UNLESS_ both the guest and shadow have marked the page as not present
-
- whew...
- */
- if (guest_access != PT_ACCESS_OK) {
- // Guest Access Error
-
- if ((shadow_access != PT_ACCESS_NOT_PRESENT) &&
- (guest_access != PT_ACCESS_NOT_PRESENT)) {
- // aka (guest permission error)
- return 1;
+ /* basically the reasoning is that there can be multiple reasons for a page fault:
+ If there is a permissions failure for a page present in the guest _BUT_
+ the reason for the fault was that the page is not present in the shadow,
+ _THEN_ we have to map the shadow page in and reexecute, this will generate
+ a permissions fault which is _THEN_ valid to send to the guest
+ _UNLESS_ both the guest and shadow have marked the page as not present
+
+ whew...
+ */
+ if (guest_access != PT_ACCESS_OK) {
+ // Guest Access Error
+
+ if ((shadow_access != PT_ACCESS_NOT_PRESENT) &&
+ (guest_access != PT_ACCESS_NOT_PRESENT)) {
+ // aka (guest permission error)
+ return 1;
+ }
+
+ if ((shadow_access == PT_ACCESS_NOT_PRESENT) &&
+ (guest_access == PT_ACCESS_NOT_PRESENT)) {
+ // Page tables completely blank, handle guest first
+ return 1;
+ }
+
+ // Otherwise we'll handle the guest fault later...?
}
- if ((shadow_access == PT_ACCESS_NOT_PRESENT) &&
- (guest_access == PT_ACCESS_NOT_PRESENT)) {
- // Page tables completely blank, handle guest first
- return 1;
- }
-
- // Otherwise we'll handle the guest fault later...?
- }
-
- return 0;
+ return 0;
}
static int cache_page_tables_32(struct guest_info * info, addr_t pde) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
- addr_t pde_host_addr;
- pde32_t * tmp_pde;
- struct hashtable * pte_cache = NULL;
- int i = 0;
-
- if (pde == state->cached_cr3) {
- return 1;
- }
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+ addr_t pde_host_addr;
+ pde32_t * tmp_pde;
+ struct hashtable * pte_cache = NULL;
+ int i = 0;
+
+ if (pde == state->cached_cr3) {
+ return 1;
+ }
- if (state->cached_ptes != NULL) {
- hashtable_destroy(state->cached_ptes, 0, 0);
- state->cached_ptes = NULL;
- }
+ if (state->cached_ptes != NULL) {
+ hashtable_destroy(state->cached_ptes, 0, 0);
+ state->cached_ptes = NULL;
+ }
- state->cached_cr3 = pde;
+ state->cached_cr3 = pde;
- pte_cache = create_hashtable(0, &pte_hash_fn, &pte_equals);
- state->cached_ptes = pte_cache;
+ pte_cache = create_hashtable(0, &pte_hash_fn, &pte_equals);
+ state->cached_ptes = pte_cache;
- if (guest_pa_to_host_va(info, pde, &pde_host_addr) == -1) {
- PrintError("Could not lookup host address of guest PDE\n");
- return -1;
- }
+ if (guest_pa_to_host_va(info, pde, &pde_host_addr) == -1) {
+ PrintError("Could not lookup host address of guest PDE\n");
+ return -1;
+ }
- tmp_pde = (pde32_t *)pde_host_addr;
+ tmp_pde = (pde32_t *)pde_host_addr;
- add_pte_map(pte_cache, pde, pde_host_addr);
+ add_pte_map(pte_cache, pde, pde_host_addr);
- for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
- if ((tmp_pde[i].present) && (tmp_pde[i].large_page == 0)) {
- addr_t pte_host_addr;
+ for (i = 0; i < MAX_PDE32_ENTRIES; i++) {
+ if ((tmp_pde[i].present) && (tmp_pde[i].large_page == 0)) {
+ addr_t pte_host_addr;
- if (guest_pa_to_host_va(info, (addr_t)(BASE_TO_PAGE_ADDR(tmp_pde[i].pt_base_addr)), &pte_host_addr) == -1) {
- PrintError("Could not lookup host address of guest PDE\n");
- return -1;
- }
+ if (guest_pa_to_host_va(info, (addr_t)(BASE_TO_PAGE_ADDR(tmp_pde[i].pt_base_addr)), &pte_host_addr) == -1) {
+ PrintError("Could not lookup host address of guest PDE\n");
+ return -1;
+ }
- add_pte_map(pte_cache, (addr_t)(BASE_TO_PAGE_ADDR(tmp_pde[i].pt_base_addr)), pte_host_addr);
+ add_pte_map(pte_cache, (addr_t)(BASE_TO_PAGE_ADDR(tmp_pde[i].pt_base_addr)), pte_host_addr);
+ }
}
- }
- return 0;
+ return 0;
}
// We assume that shdw_pg_state.guest_cr3 is pointing to the page tables we want to activate
// We also assume that the CPU mode has not changed during this page table transition
static inline int activate_shadow_pt_32(struct guest_info * info) {
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- int cached = 0;
+ struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ int cached = 0;
- // Check if shadow page tables are in the cache
- cached = cache_page_tables_32(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
+ // Check if shadow page tables are in the cache
+ cached = cache_page_tables_32(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
- if (cached == -1) {
- PrintError("CR3 Cache failed\n");
- return -1;
- } else if (cached == 0) {
- struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
+ if (cached == -1) {
+ PrintError("CR3 Cache failed\n");
+ return -1;
+ } else if (cached == 0) {
+ struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
- shdw_page->cr3 = shdw_page->page_pa;
+ shdw_page->cr3 = shdw_page->page_pa;
- shadow_cr3->pdt_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
- PrintDebug( "Created new shadow page table %p\n", (void *)BASE_TO_PAGE_ADDR(shadow_cr3->pdt_base_addr));
- } else {
- PrintDebug("Reusing cached shadow Page table\n");
- }
+ shadow_cr3->pdt_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
+ PrintDebug( "Created new shadow page table %p\n", (void *)BASE_TO_PAGE_ADDR(shadow_cr3->pdt_base_addr));
+ } else {
+ PrintDebug("Reusing cached shadow Page table\n");
+ }
- shadow_cr3->pwt = guest_cr3->pwt;
- shadow_cr3->pcd = guest_cr3->pcd;
+ shadow_cr3->pwt = guest_cr3->pwt;
+ shadow_cr3->pcd = guest_cr3->pcd;
- return 0;
+ return 0;
}
/*
* *
*/
static int handle_large_pagefault_32(struct guest_info * info,
- addr_t fault_addr, pf_error_t error_code,
+ addr_t fault_addr, pf_error_t error_code,
pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde);
static int handle_shadow_pte32_fault(struct guest_info * info,
static inline int handle_shadow_pagefault_32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- pde32_t * guest_pd = NULL;
- pde32_t * shadow_pd = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
- addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
- pt_access_status_t guest_pde_access;
- pt_access_status_t shadow_pde_access;
- pde32_t * guest_pde = NULL;
- pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(fault_addr)]);
-
- PrintDebug("Shadow page fault handler: %p\n", (void*) fault_addr );
-
- if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
- PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
- return -1;
- }
+ pde32_t * guest_pd = NULL;
+ pde32_t * shadow_pd = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+ addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
+ pt_access_status_t guest_pde_access;
+ pt_access_status_t shadow_pde_access;
+ pde32_t * guest_pde = NULL;
+ pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(fault_addr)]);
+
+ PrintDebug("Shadow page fault handler: %p\n", (void*) fault_addr );
+
+ if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
+ PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
+ return -1;
+ }
- guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(fault_addr)]);
+ guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(fault_addr)]);
- // Check the guest page permissions
- guest_pde_access = v3_can_access_pde32(guest_pd, fault_addr, error_code);
+ // Check the guest page permissions
+ guest_pde_access = v3_can_access_pde32(guest_pd, fault_addr, error_code);
- // Check the shadow page permissions
- shadow_pde_access = v3_can_access_pde32(shadow_pd, fault_addr, error_code);
+ // Check the shadow page permissions
+ shadow_pde_access = v3_can_access_pde32(shadow_pd, fault_addr, error_code);
- /* Was the page fault caused by the Guest's page tables? */
- if (is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
- PrintDebug("Injecting PDE pf to guest: (guest access error=%d) (pf error code=%d)\n",
- *(uint_t *)&guest_pde_access, *(uint_t *)&error_code);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
+ /* Was the page fault caused by the Guest's page tables? */
+ if (is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
+ PrintDebug("Injecting PDE pf to guest: (guest access error=%d) (pf error code=%d)\n",
+ *(uint_t *)&guest_pde_access, *(uint_t *)&error_code);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
- if (shadow_pde_access == PT_ACCESS_NOT_PRESENT)
- {
- struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
- pte32_t * shadow_pt = (pte32_t *)V3_VAddr((void *)shdw_page->page_pa);
-
- shadow_pde->present = 1;
- shadow_pde->user_page = guest_pde->user_page;
- // shadow_pde->large_page = guest_pde->large_page;
- shadow_pde->large_page = 0;
+ if (shadow_pde_access == PT_ACCESS_NOT_PRESENT)
+ {
+ struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
+ pte32_t * shadow_pt = (pte32_t *)V3_VAddr((void *)shdw_page->page_pa);
+
+ shadow_pde->present = 1;
+ shadow_pde->user_page = guest_pde->user_page;
+ // shadow_pde->large_page = guest_pde->large_page;
+ shadow_pde->large_page = 0;
- // VMM Specific options
- shadow_pde->write_through = 0;
- shadow_pde->cache_disable = 0;
- shadow_pde->global_page = 0;
- //
+ // VMM Specific options
+ shadow_pde->write_through = 0;
+ shadow_pde->cache_disable = 0;
+ shadow_pde->global_page = 0;
+ //
- guest_pde->accessed = 1;
+ guest_pde->accessed = 1;
- shadow_pde->pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(shadow_pt));
+ shadow_pde->pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(shadow_pt));
- if (guest_pde->large_page == 0) {
- pte32_t * guest_pt = NULL;
- shadow_pde->writable = guest_pde->writable;
-
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t*)&guest_pt) == -1) {
- // Machine check the guest
- PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
- }
-
- if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
- PrintError("Error handling Page fault caused by PTE\n");
- return -1;
- }
- } else {
- // ?? What if guest pde is dirty a this point?
- ((pde32_4MB_t *)guest_pde)->dirty = 0;
- shadow_pde->writable = 0;
-
- if (handle_large_pagefault_32(info, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
- PrintError("Error handling large pagefault\n");
- return -1;
- }
-
- }
- }
- else if (shadow_pde_access == PT_ACCESS_OK)
- {
- //
- // PTE fault
- //
- pte32_t * shadow_pt = (pte32_t *)V3_VAddr( (void*)(addr_t) BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr) );
-
- if (guest_pde->large_page == 0) {
- pte32_t * guest_pt = NULL;
-
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t*)&guest_pt) == -1) {
- // Machine check the guest
- PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
+ if (guest_pde->large_page == 0) {
+ pte32_t * guest_pt = NULL;
+ shadow_pde->writable = guest_pde->writable;
+
+ if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t*)&guest_pt) == -1) {
+ // Machine check the guest
+ PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
+
+ if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
+ PrintError("Error handling Page fault caused by PTE\n");
+ return -1;
+ }
+ } else {
+ // ?? What if guest pde is dirty a this point?
+ ((pde32_4MB_t *)guest_pde)->dirty = 0;
+ shadow_pde->writable = 0;
+
+ if (handle_large_pagefault_32(info, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
+ PrintError("Error handling large pagefault\n");
+ return -1;
+ }
+
+ }
}
+ else if (shadow_pde_access == PT_ACCESS_OK)
+ {
+ //
+ // PTE fault
+ //
+ pte32_t * shadow_pt = (pte32_t *)V3_VAddr( (void*)(addr_t) BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr) );
+
+ if (guest_pde->large_page == 0) {
+ pte32_t * guest_pt = NULL;
+
+ if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t*)&guest_pt) == -1) {
+ // Machine check the guest
+ PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
- if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
- PrintError("Error handling Page fault caused by PTE\n");
- return -1;
- }
- } else if (guest_pde->large_page == 1) {
- if (handle_large_pagefault_32(info, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
- PrintError("Error handling large pagefault\n");
- return -1;
+ if (handle_shadow_pte32_fault(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
+ PrintError("Error handling Page fault caused by PTE\n");
+ return -1;
+ }
+ } else if (guest_pde->large_page == 1) {
+ if (handle_large_pagefault_32(info, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
+ PrintError("Error handling large pagefault\n");
+ return -1;
+ }
+ }
}
- }
- }
- else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
- (guest_pde->large_page == 1))
- {
- //
- // Page Directory Entry marked read-only
- // Its a large page and we need to update the dirty bit in the guest
- //
-
- PrintDebug("Large page write error... Setting dirty bit and returning\n");
- ((pde32_4MB_t *)guest_pde)->dirty = 1;
- shadow_pde->writable = guest_pde->writable;
- return 0;
+ else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
+ (guest_pde->large_page == 1))
+ {
+ //
+ // Page Directory Entry marked read-only
+ // Its a large page and we need to update the dirty bit in the guest
+ //
+
+ PrintDebug("Large page write error... Setting dirty bit and returning\n");
+ ((pde32_4MB_t *)guest_pde)->dirty = 1;
+ shadow_pde->writable = guest_pde->writable;
+ return 0;
- }
- else if (shadow_pde_access == PT_ACCESS_USER_ERROR)
- {
- //
- // Page Directory Entry marked non-user
- //
- PrintDebug("Shadow Paging User access error (shadow_pde_access=0x%x, guest_pde_access=0x%x)\n",
- shadow_pde_access, guest_pde_access);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
- else
- {
- // inject page fault in guest
- inject_guest_pf(info, fault_addr, error_code);
- PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pde_access);
- PrintDebug("Manual Says to inject page fault into guest\n");
+ }
+ else if (shadow_pde_access == PT_ACCESS_USER_ERROR)
+ {
+ //
+ // Page Directory Entry marked non-user
+ //
+ PrintDebug("Shadow Paging User access error (shadow_pde_access=0x%x, guest_pde_access=0x%x)\n",
+ shadow_pde_access, guest_pde_access);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
+ else
+ {
+ // inject page fault in guest
+ inject_guest_pf(info, fault_addr, error_code);
+ PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pde_access);
+ PrintDebug("Manual Says to inject page fault into guest\n");
#ifdef DEBUG_SHADOW_PAGING
- PrintDebug("Guest PDE: (access=%d)\n\t", guest_pde_access);
- PrintPTEntry(info, PAGE_PD32, fault_addr, guest_pde);
- PrintDebug("Shadow PDE: (access=%d)\n\t", shadow_pde_access);
- PrintPTEntry(info, PAGE_PD32, fault_addr, shadow_pde);
+ PrintDebug("Guest PDE: (access=%d)\n\t", guest_pde_access);
+ PrintPTEntry(info, PAGE_PD32, fault_addr, guest_pde);
+ PrintDebug("Shadow PDE: (access=%d)\n\t", shadow_pde_access);
+ PrintPTEntry(info, PAGE_PD32, fault_addr, shadow_pde);
#endif
- return 0;
- }
+ return 0;
+ }
- PrintDebug("Returning end of PDE function (rip=%p)\n", (void *)(addr_t)(info->rip));
- return 0;
+ PrintDebug("Returning end of PDE function (rip=%p)\n", (void *)(addr_t)(info->rip));
+ return 0;
}
* only special case shadow checks remain
*/
static int handle_large_pagefault_32(struct guest_info * info,
- addr_t fault_addr, pf_error_t error_code,
- pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde)
+ addr_t fault_addr, pf_error_t error_code,
+ pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde)
{
- pt_access_status_t shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
- pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
- addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_4MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_4MB(fault_addr);
- struct shadow_page_state * state = &(info->shdw_pg_state);
+ pt_access_status_t shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
+ pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
+ addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_4MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_4MB(fault_addr);
+ struct shadow_page_state * state = &(info->shdw_pg_state);
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_fault_pa);
+ struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_fault_pa);
- if ((shdw_reg == NULL) ||
- (shdw_reg->host_type == SHDW_REGION_INVALID)) {
- // Inject a machine check in the guest
- PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
- v3_raise_exception(info, MC_EXCEPTION);
- return -1;
- }
-
- if (shadow_pte_access == PT_ACCESS_OK) {
- // Inconsistent state...
- // Guest Re-Entry will flush tables and everything should now workd
- PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
- return 0;
- }
+ if ((shdw_reg == NULL) ||
+ (shdw_reg->host_type == SHDW_REGION_INVALID)) {
+ // Inject a machine check in the guest
+ PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
+ v3_raise_exception(info, MC_EXCEPTION);
+ return -1;
+ }
+
+ if (shadow_pte_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush tables and everything should now workd
+ PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
+ return 0;
+ }
- if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
- // Get the guest physical address of the fault
-
- if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
- (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
- addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_fault_pa);
-
- shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
-
- shadow_pte->present = 1;
-
- /* We are assuming that the PDE entry has precedence
- * so the Shadow PDE will mirror the guest PDE settings,
- * and we don't have to worry about them here
- * Allow everything
- */
- shadow_pte->user_page = 1;
-
- if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) {
- // Check if the entry is a page table...
- PrintDebug("Marking page as Guest Page Table (large page)\n");
- shadow_pte->writable = 0;
- } else if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- shadow_pte->writable = 0;
- } else {
- shadow_pte->writable = 1;
- }
-
- //set according to VMM policy
- shadow_pte->write_through = 0;
- shadow_pte->cache_disable = 0;
- shadow_pte->global_page = 0;
- //
+ if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
+ // Get the guest physical address of the fault
+
+ if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
+ (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
+ addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_fault_pa);
+
+ shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
+
+ shadow_pte->present = 1;
+
+ /* We are assuming that the PDE entry has precedence
+ * so the Shadow PDE will mirror the guest PDE settings,
+ * and we don't have to worry about them here
+ * Allow everything
+ */
+ shadow_pte->user_page = 1;
+
+ if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) {
+ // Check if the entry is a page table...
+ PrintDebug("Marking page as Guest Page Table (large page)\n");
+ shadow_pte->writable = 0;
+ } else if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ shadow_pte->writable = 0;
+ } else {
+ shadow_pte->writable = 1;
+ }
+
+ //set according to VMM policy
+ shadow_pte->write_through = 0;
+ shadow_pte->cache_disable = 0;
+ shadow_pte->global_page = 0;
+ //
- } else {
- // Handle hooked pages as well as other special pages
- // if (handle_special_page_fault(info, fault_addr, guest_fault_pa, error_code) == -1) {
+ } else {
+ // Handle hooked pages as well as other special pages
+ // if (handle_special_page_fault(info, fault_addr, guest_fault_pa, error_code) == -1) {
- if (v3_handle_mem_full_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
- } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
+ if (v3_handle_mem_full_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
+ } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
- if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- if (v3_handle_mem_wr_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
+ if (v3_handle_mem_wr_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
- if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
- PrintDebug("Write operation on Guest PAge Table Page (large page)\n");
- state->cached_cr3 = 0;
- shadow_pte->writable = 1;
- }
+ if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) {
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+ PrintDebug("Write operation on Guest PAge Table Page (large page)\n");
+ state->cached_cr3 = 0;
+ shadow_pte->writable = 1;
+ }
- } else {
- PrintError("Error in large page fault handler...\n");
- PrintError("This case should have been handled at the top level handler\n");
- return -1;
- }
+ } else {
+ PrintError("Error in large page fault handler...\n");
+ PrintError("This case should have been handled at the top level handler\n");
+ return -1;
+ }
- PrintDebug("Returning from large page fault handler\n");
- return 0;
+ PrintDebug("Returning from large page fault handler\n");
+ return 0;
}
pte32_t * shadow_pt,
pte32_t * guest_pt) {
- pt_access_status_t guest_pte_access;
- pt_access_status_t shadow_pte_access;
- pte32_t * guest_pte = (pte32_t *)&(guest_pt[PTE32_INDEX(fault_addr)]);;
- pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
- addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
- struct shadow_page_state * state = &(info->shdw_pg_state);
-
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_pa);
-
- if ((shdw_reg == NULL) ||
- (shdw_reg->host_type == SHDW_REGION_INVALID)) {
- // Inject a machine check in the guest
- PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_pa);
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
- }
+ pt_access_status_t guest_pte_access;
+ pt_access_status_t shadow_pte_access;
+ pte32_t * guest_pte = (pte32_t *)&(guest_pt[PTE32_INDEX(fault_addr)]);;
+ pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
+ addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+
+ struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_pa);
+
+ if ((shdw_reg == NULL) ||
+ (shdw_reg->host_type == SHDW_REGION_INVALID)) {
+ // Inject a machine check in the guest
+ PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_pa);
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
- // Check the guest page permissions
- guest_pte_access = v3_can_access_pte32(guest_pt, fault_addr, error_code);
+ // Check the guest page permissions
+ guest_pte_access = v3_can_access_pte32(guest_pt, fault_addr, error_code);
- // Check the shadow page permissions
- shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
+ // Check the shadow page permissions
+ shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
#ifdef DEBUG_SHADOW_PAGING
- PrintDebug("Guest PTE: (access=%d)\n\t", guest_pte_access);
- PrintPTEntry(info, PAGE_PT32, fault_addr, guest_pte);
- PrintDebug("Shadow PTE: (access=%d)\n\t", shadow_pte_access);
- PrintPTEntry(info, PAGE_PT32, fault_addr, shadow_pte);
+ PrintDebug("Guest PTE: (access=%d)\n\t", guest_pte_access);
+ PrintPTEntry(info, PAGE_PT32, fault_addr, guest_pte);
+ PrintDebug("Shadow PTE: (access=%d)\n\t", shadow_pte_access);
+ PrintPTEntry(info, PAGE_PT32, fault_addr, shadow_pte);
#endif
- /* Was the page fault caused by the Guest's page tables? */
- if (is_guest_pf(guest_pte_access, shadow_pte_access) == 1) {
- PrintDebug("Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n",
- guest_pte_access, *(uint_t*)&error_code);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
+ /* Was the page fault caused by the Guest's page tables? */
+ if (is_guest_pf(guest_pte_access, shadow_pte_access) == 1) {
+ PrintDebug("Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n",
+ guest_pte_access, *(uint_t*)&error_code);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
- if (shadow_pte_access == PT_ACCESS_OK) {
- // Inconsistent state...
- // Guest Re-Entry will flush page tables and everything should now work
- PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
- return 0;
- }
+ if (shadow_pte_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush page tables and everything should now work
+ PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
+ return 0;
+ }
- if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
- // Page Table Entry Not Present
- PrintDebug("guest_pa =%p\n", (void *)guest_pa);
+ if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
+ // Page Table Entry Not Present
+ PrintDebug("guest_pa =%p\n", (void *)guest_pa);
- if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
- (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
- addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_pa);
+ if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
+ (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
+ addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_pa);
- shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
+ shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
- shadow_pte->present = guest_pte->present;
- shadow_pte->user_page = guest_pte->user_page;
+ shadow_pte->present = guest_pte->present;
+ shadow_pte->user_page = guest_pte->user_page;
- //set according to VMM policy
- shadow_pte->write_through = 0;
- shadow_pte->cache_disable = 0;
- shadow_pte->global_page = 0;
- //
+ //set according to VMM policy
+ shadow_pte->write_through = 0;
+ shadow_pte->cache_disable = 0;
+ shadow_pte->global_page = 0;
+ //
- guest_pte->accessed = 1;
+ guest_pte->accessed = 1;
- if (guest_pte->dirty == 1) {
- shadow_pte->writable = guest_pte->writable;
- } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
- shadow_pte->writable = guest_pte->writable;
- guest_pte->dirty = 1;
- } else if ((guest_pte->dirty == 0) && (error_code.write == 0)) {
- shadow_pte->writable = 0;
- }
-
- // dirty flag has been set, check if its in the cache
- if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) {
- if (error_code.write == 1) {
- state->cached_cr3 = 0;
- shadow_pte->writable = guest_pte->writable;
+ if (guest_pte->dirty == 1) {
+ shadow_pte->writable = guest_pte->writable;
+ } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
+ shadow_pte->writable = guest_pte->writable;
+ guest_pte->dirty = 1;
+ } else if ((guest_pte->dirty == 0) && (error_code.write == 0)) {
+ shadow_pte->writable = 0;
+ }
+
+ // dirty flag has been set, check if its in the cache
+ if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) {
+ if (error_code.write == 1) {
+ state->cached_cr3 = 0;
+ shadow_pte->writable = guest_pte->writable;
+ } else {
+ shadow_pte->writable = 0;
+ }
+ }
+
+ // Write hooks trump all, and are set Read Only
+ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ shadow_pte->writable = 0;
+ }
+
} else {
- shadow_pte->writable = 0;
+ // Page fault handled by hook functions
+
+ if (v3_handle_mem_full_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
}
- }
+ } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
+ guest_pte->dirty = 1;
- // Write hooks trump all, and are set Read Only
- if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- shadow_pte->writable = 0;
- }
+ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ if (v3_handle_mem_wr_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ } else {
+ PrintDebug("Shadow PTE Write Error\n");
+ shadow_pte->writable = guest_pte->writable;
+ }
- } else {
- // Page fault handled by hook functions
+ if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) {
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+ PrintDebug("Write operation on Guest PAge Table Page\n");
+ state->cached_cr3 = 0;
+ }
- if (v3_handle_mem_full_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
- } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
- guest_pte->dirty = 1;
+ return 0;
- if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- if (v3_handle_mem_wr_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
} else {
- PrintDebug("Shadow PTE Write Error\n");
- shadow_pte->writable = guest_pte->writable;
- }
-
- if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
- PrintDebug("Write operation on Guest PAge Table Page\n");
- state->cached_cr3 = 0;
+ // Inject page fault into the guest
+ inject_guest_pf(info, fault_addr, error_code);
+ PrintError("PTE Page fault fell through... Not sure if this should ever happen\n");
+ PrintError("Manual Says to inject page fault into guest\n");
+ return -1;
}
+ PrintDebug("Returning end of function\n");
return 0;
-
- } else {
- // Inject page fault into the guest
- inject_guest_pf(info, fault_addr, error_code);
- PrintError("PTE Page fault fell through... Not sure if this should ever happen\n");
- PrintError("Manual Says to inject page fault into guest\n");
- return -1;
- }
-
- PrintDebug("Returning end of function\n");
- return 0;
}
/* If we start to optimize we should look up the guest pages in the cache... */
static inline int handle_shadow_invlpg_32(struct guest_info * info, addr_t vaddr) {
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
- pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(vaddr)];
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+ pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(vaddr)];
- addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
- pde32_t * guest_pd = NULL;
- pde32_t * guest_pde;
+ addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
+ pde32_t * guest_pd = NULL;
+ pde32_t * guest_pde;
- if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
- PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
- return -1;
- }
+ if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
+ PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
+ return -1;
+ }
- guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(vaddr)]);
+ guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(vaddr)]);
- if (guest_pde->large_page == 1) {
- shadow_pde->present = 0;
- PrintDebug("Invalidating Large Page\n");
- } else if (shadow_pde->present == 1) {
- pte32_t * shadow_pt = (pte32_t *)(addr_t)BASE_TO_PAGE_ADDR_4KB(shadow_pde->pt_base_addr);
- pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(vaddr)] );
+ if (guest_pde->large_page == 1) {
+ shadow_pde->present = 0;
+ PrintDebug("Invalidating Large Page\n");
+ } else if (shadow_pde->present == 1) {
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)BASE_TO_PAGE_ADDR_4KB(shadow_pde->pt_base_addr);
+ pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(vaddr)] );
- PrintDebug("Setting not present\n");
+ PrintDebug("Setting not present\n");
- shadow_pte->present = 0;
- }
- return 0;
+ shadow_pte->present = 0;
+ }
+ return 0;
}
static inline int activate_shadow_pt_32pae(struct guest_info * info) {
- PrintError("Activating 32 bit PAE page tables not implemented\n");
- return -1;
+ PrintError("Activating 32 bit PAE page tables not implemented\n");
+ return -1;
}
*/
static inline int handle_shadow_pagefault_32pae(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- PrintError("32 bit PAE shadow paging not implemented\n");
- return -1;
+ PrintError("32 bit PAE shadow paging not implemented\n");
+ return -1;
}
static inline int handle_shadow_invlpg_32pae(struct guest_info * info, addr_t vaddr) {
- PrintError("32 bit PAE shadow paging not implemented\n");
- return -1;
+ PrintError("32 bit PAE shadow paging not implemented\n");
+ return -1;
}
static inline int activate_shadow_pt_64(struct guest_info * info) {
- struct cr3_64 * shadow_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
- struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
- struct shadow_page_data * shadow_pt = create_new_shadow_pt(info);
- addr_t shadow_pt_addr = shadow_pt->page_pa;
+ struct cr3_64 * shadow_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
+ struct shadow_page_data * shadow_pt = create_new_shadow_pt(info);
+ addr_t shadow_pt_addr = shadow_pt->page_pa;
- // Because this is a new CR3 load the allocated page is the new CR3 value
- shadow_pt->cr3 = shadow_pt->page_pa;
+ // Because this is a new CR3 load the allocated page is the new CR3 value
+ shadow_pt->cr3 = shadow_pt->page_pa;
- PrintDebug("Top level Shadow page pa=%p\n", (void *)shadow_pt_addr);
+ PrintDebug("Top level Shadow page pa=%p\n", (void *)shadow_pt_addr);
- shadow_cr3->pml4t_base_addr = PAGE_BASE_ADDR_4KB(shadow_pt_addr);
- PrintDebug("Creating new 64 bit shadow page table %p\n", (void *)BASE_TO_PAGE_ADDR(shadow_cr3->pml4t_base_addr));
+ shadow_cr3->pml4t_base_addr = PAGE_BASE_ADDR_4KB(shadow_pt_addr);
+ PrintDebug("Creating new 64 bit shadow page table %p\n", (void *)BASE_TO_PAGE_ADDR(shadow_cr3->pml4t_base_addr));
- shadow_cr3->pwt = guest_cr3->pwt;
- shadow_cr3->pcd = guest_cr3->pcd;
+ shadow_cr3->pwt = guest_cr3->pwt;
+ shadow_cr3->pcd = guest_cr3->pcd;
- return 0;
+ return 0;
}
static inline int handle_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- pml4e64_t * guest_pml = NULL;
- pml4e64_t * shadow_pml = CR3_TO_PML4E64_VA(info->ctrl_regs.cr3);
- addr_t guest_cr3 = CR3_TO_PML4E64_PA(info->shdw_pg_state.guest_cr3);
- pt_access_status_t guest_pml4e_access;
- pt_access_status_t shadow_pml4e_access;
- pml4e64_t * guest_pml4e = NULL;
- pml4e64_t * shadow_pml4e = (pml4e64_t *)&(shadow_pml[PML4E64_INDEX(fault_addr)]);
-
- PrintDebug("64 bit Shadow page fault handler: %p\n", (void *)fault_addr);
- PrintDebug("Handling PML fault\n");
-
- if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pml) == -1) {
- PrintError("Invalid Guest PML4E Address: 0x%p\n", (void *)guest_cr3);
- return -1;
- }
+ pml4e64_t * guest_pml = NULL;
+ pml4e64_t * shadow_pml = CR3_TO_PML4E64_VA(info->ctrl_regs.cr3);
+ addr_t guest_cr3 = CR3_TO_PML4E64_PA(info->shdw_pg_state.guest_cr3);
+ pt_access_status_t guest_pml4e_access;
+ pt_access_status_t shadow_pml4e_access;
+ pml4e64_t * guest_pml4e = NULL;
+ pml4e64_t * shadow_pml4e = (pml4e64_t *)&(shadow_pml[PML4E64_INDEX(fault_addr)]);
+
+ PrintDebug("64 bit Shadow page fault handler: %p\n", (void *)fault_addr);
+ PrintDebug("Handling PML fault\n");
+
+ if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pml) == -1) {
+ PrintError("Invalid Guest PML4E Address: 0x%p\n", (void *)guest_cr3);
+ return -1;
+ }
- guest_pml4e = (pml4e64_t *)&(guest_pml[PML4E64_INDEX(fault_addr)]);
+ guest_pml4e = (pml4e64_t *)&(guest_pml[PML4E64_INDEX(fault_addr)]);
- PrintDebug("Checking Guest %p\n", (void *)guest_pml);
- // Check the guest page permissions
- guest_pml4e_access = v3_can_access_pml4e64(guest_pml, fault_addr, error_code);
+ PrintDebug("Checking Guest %p\n", (void *)guest_pml);
+ // Check the guest page permissions
+ guest_pml4e_access = v3_can_access_pml4e64(guest_pml, fault_addr, error_code);
- PrintDebug("Checking shadow %p\n", (void *)shadow_pml);
- // Check the shadow page permissions
- shadow_pml4e_access = v3_can_access_pml4e64(shadow_pml, fault_addr, error_code);
+ PrintDebug("Checking shadow %p\n", (void *)shadow_pml);
+ // Check the shadow page permissions
+ shadow_pml4e_access = v3_can_access_pml4e64(shadow_pml, fault_addr, error_code);
- /* Was the page fault caused by the Guest's page tables? */
- if (is_guest_pf(guest_pml4e_access, shadow_pml4e_access) == 1) {
- PrintDebug("Injecting PML4E pf to guest: (guest access error=%d) (pf error code=%d)\n",
- *(uint_t *)&guest_pml4e_access, *(uint_t *)&error_code);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
-
- if (shadow_pml4e_access == PT_ACCESS_USER_ERROR) {
- //
- // PML4 Entry marked non-user
- //
- PrintDebug("Shadow Paging User access error (shadow_pml4e_access=0x%x, guest_pml4e_access=0x%x)\n",
- shadow_pml4e_access, guest_pml4e_access);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- } else if ((shadow_pml4e_access != PT_ACCESS_NOT_PRESENT) &&
- (shadow_pml4e_access != PT_ACCESS_OK)) {
- // inject page fault in guest
- inject_guest_pf(info, fault_addr, error_code);
- PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pml4e_access);
- PrintDebug("Manual Says to inject page fault into guest\n");
- return 0;
- }
+ /* Was the page fault caused by the Guest's page tables? */
+ if (is_guest_pf(guest_pml4e_access, shadow_pml4e_access) == 1) {
+ PrintDebug("Injecting PML4E pf to guest: (guest access error=%d) (pf error code=%d)\n",
+ *(uint_t *)&guest_pml4e_access, *(uint_t *)&error_code);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
+
+ if (shadow_pml4e_access == PT_ACCESS_USER_ERROR) {
+ //
+ // PML4 Entry marked non-user
+ //
+ PrintDebug("Shadow Paging User access error (shadow_pml4e_access=0x%x, guest_pml4e_access=0x%x)\n",
+ shadow_pml4e_access, guest_pml4e_access);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ } else if ((shadow_pml4e_access != PT_ACCESS_NOT_PRESENT) &&
+ (shadow_pml4e_access != PT_ACCESS_OK)) {
+ // inject page fault in guest
+ inject_guest_pf(info, fault_addr, error_code);
+ PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pml4e_access);
+ PrintDebug("Manual Says to inject page fault into guest\n");
+ return 0;
+ }
- pdpe64_t * shadow_pdp = NULL;
- pdpe64_t * guest_pdp = NULL;
+ pdpe64_t * shadow_pdp = NULL;
+ pdpe64_t * guest_pdp = NULL;
- // Get the next shadow page level, allocate if not present
+ // Get the next shadow page level, allocate if not present
- if (shadow_pml4e_access == PT_ACCESS_NOT_PRESENT) {
- struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
- shadow_pdp = (pdpe64_t *)V3_VAddr((void *)shdw_page->page_pa);
+ if (shadow_pml4e_access == PT_ACCESS_NOT_PRESENT) {
+ struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
+ shadow_pdp = (pdpe64_t *)V3_VAddr((void *)shdw_page->page_pa);
- shadow_pml4e->present = 1;
- shadow_pml4e->user_page = guest_pml4e->user_page;
- shadow_pml4e->writable = guest_pml4e->writable;
+ shadow_pml4e->present = 1;
+ shadow_pml4e->user_page = guest_pml4e->user_page;
+ shadow_pml4e->writable = guest_pml4e->writable;
- // VMM Specific options
- shadow_pml4e->write_through = 0;
- shadow_pml4e->cache_disable = 0;
- //
+ // VMM Specific options
+ shadow_pml4e->write_through = 0;
+ shadow_pml4e->cache_disable = 0;
+ //
- guest_pml4e->accessed = 1;
+ guest_pml4e->accessed = 1;
- shadow_pml4e->pdp_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
- } else {
- shadow_pdp = (pdpe64_t *)V3_VAddr((void *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pml4e->pdp_base_addr));
- }
+ shadow_pml4e->pdp_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
+ } else {
+ shadow_pdp = (pdpe64_t *)V3_VAddr((void *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pml4e->pdp_base_addr));
+ }
- // Continue processing at the next level
+ // Continue processing at the next level
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr), (addr_t *)&guest_pdp) == -1) {
- // Machine check the guest
- PrintDebug("Invalid Guest PDP Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr));
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
- }
+ if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr), (addr_t *)&guest_pdp) == -1) {
+ // Machine check the guest
+ PrintDebug("Invalid Guest PDP Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pml4e->pdp_base_addr));
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
- if (handle_pdpe_shadow_pagefault_64(info, fault_addr, error_code, shadow_pdp, guest_pdp) == -1) {
- PrintError("Error handling Page fault caused by PDPE\n");
- return -1;
- }
+ if (handle_pdpe_shadow_pagefault_64(info, fault_addr, error_code, shadow_pdp, guest_pdp) == -1) {
+ PrintError("Error handling Page fault caused by PDPE\n");
+ return -1;
+ }
- return 0;
+ return 0;
}
// For now we are not going to handle 1 Gigabyte pages
static int handle_pdpe_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
pdpe64_t * shadow_pdp, pdpe64_t * guest_pdp) {
- pt_access_status_t guest_pdpe_access;
- pt_access_status_t shadow_pdpe_access;
- pdpe64_t * guest_pdpe = (pdpe64_t *)&(guest_pdp[PDPE64_INDEX(fault_addr)]);
- pdpe64_t * shadow_pdpe = (pdpe64_t *)&(shadow_pdp[PDPE64_INDEX(fault_addr)]);
+ pt_access_status_t guest_pdpe_access;
+ pt_access_status_t shadow_pdpe_access;
+ pdpe64_t * guest_pdpe = (pdpe64_t *)&(guest_pdp[PDPE64_INDEX(fault_addr)]);
+ pdpe64_t * shadow_pdpe = (pdpe64_t *)&(shadow_pdp[PDPE64_INDEX(fault_addr)]);
- PrintDebug("Handling PDP fault\n");
+ PrintDebug("Handling PDP fault\n");
- if (fault_addr==0) {
- PrintDebug("Guest Page Tree for guest virtual address zero fault\n");
- PrintGuestPageTree(info,fault_addr,(addr_t)(info->shdw_pg_state.guest_cr3));
- PrintDebug("Host Page Tree for guest virtual address zero fault\n");
- PrintHostPageTree(info,fault_addr,(addr_t)(info->ctrl_regs.cr3));
- }
+ if (fault_addr==0) {
+ PrintDebug("Guest Page Tree for guest virtual address zero fault\n");
+ PrintGuestPageTree(info,fault_addr,(addr_t)(info->shdw_pg_state.guest_cr3));
+ PrintDebug("Host Page Tree for guest virtual address zero fault\n");
+ PrintHostPageTree(info,fault_addr,(addr_t)(info->ctrl_regs.cr3));
+ }
- // Check the guest page permissions
- guest_pdpe_access = v3_can_access_pdpe64(guest_pdp, fault_addr, error_code);
+ // Check the guest page permissions
+ guest_pdpe_access = v3_can_access_pdpe64(guest_pdp, fault_addr, error_code);
- // Check the shadow page permissions
- shadow_pdpe_access = v3_can_access_pdpe64(shadow_pdp, fault_addr, error_code);
+ // Check the shadow page permissions
+ shadow_pdpe_access = v3_can_access_pdpe64(shadow_pdp, fault_addr, error_code);
- /* Was the page fault caused by the Guest's page tables? */
- if (is_guest_pf(guest_pdpe_access, shadow_pdpe_access) == 1) {
- PrintDebug("Injecting PDPE pf to guest: (guest access error=%d) (pf error code=%d)\n",
- *(uint_t *)&guest_pdpe_access, *(uint_t *)&error_code);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
-
- if (shadow_pdpe_access == PT_ACCESS_USER_ERROR) {
- //
- // PML4 Entry marked non-user
- //
- PrintDebug("Shadow Paging User access error (shadow_pdpe_access=0x%x, guest_pdpe_access=0x%x)\n",
- shadow_pdpe_access, guest_pdpe_access);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- } else if ((shadow_pdpe_access != PT_ACCESS_NOT_PRESENT) &&
- (shadow_pdpe_access != PT_ACCESS_OK)) {
- // inject page fault in guest
- inject_guest_pf(info, fault_addr, error_code);
- PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pdpe_access);
- PrintDebug("Manual Says to inject page fault into guest\n");
- return 0;
- }
+ /* Was the page fault caused by the Guest's page tables? */
+ if (is_guest_pf(guest_pdpe_access, shadow_pdpe_access) == 1) {
+ PrintDebug("Injecting PDPE pf to guest: (guest access error=%d) (pf error code=%d)\n",
+ *(uint_t *)&guest_pdpe_access, *(uint_t *)&error_code);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
+
+ if (shadow_pdpe_access == PT_ACCESS_USER_ERROR) {
+ //
+ // PML4 Entry marked non-user
+ //
+ PrintDebug("Shadow Paging User access error (shadow_pdpe_access=0x%x, guest_pdpe_access=0x%x)\n",
+ shadow_pdpe_access, guest_pdpe_access);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ } else if ((shadow_pdpe_access != PT_ACCESS_NOT_PRESENT) &&
+ (shadow_pdpe_access != PT_ACCESS_OK)) {
+ // inject page fault in guest
+ inject_guest_pf(info, fault_addr, error_code);
+ PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pdpe_access);
+ PrintDebug("Manual Says to inject page fault into guest\n");
+ return 0;
+ }
- pde64_t * shadow_pd = NULL;
- pde64_t * guest_pd = NULL;
+ pde64_t * shadow_pd = NULL;
+ pde64_t * guest_pd = NULL;
- // Get the next shadow page level, allocate if not present
+ // Get the next shadow page level, allocate if not present
- if (shadow_pdpe_access == PT_ACCESS_NOT_PRESENT) {
- struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
- shadow_pd = (pde64_t *)V3_VAddr((void *)shdw_page->page_pa);
+ if (shadow_pdpe_access == PT_ACCESS_NOT_PRESENT) {
+ struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
+ shadow_pd = (pde64_t *)V3_VAddr((void *)shdw_page->page_pa);
- shadow_pdpe->present = 1;
- shadow_pdpe->user_page = guest_pdpe->user_page;
- shadow_pdpe->writable = guest_pdpe->writable;
+ shadow_pdpe->present = 1;
+ shadow_pdpe->user_page = guest_pdpe->user_page;
+ shadow_pdpe->writable = guest_pdpe->writable;
- // VMM Specific options
- shadow_pdpe->write_through = 0;
- shadow_pdpe->cache_disable = 0;
- //
+ // VMM Specific options
+ shadow_pdpe->write_through = 0;
+ shadow_pdpe->cache_disable = 0;
+ //
- guest_pdpe->accessed = 1;
+ guest_pdpe->accessed = 1;
- shadow_pdpe->pd_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
- } else {
- shadow_pd = (pde64_t *)V3_VAddr((void *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pdpe->pd_base_addr));
- }
+ shadow_pdpe->pd_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
+ } else {
+ shadow_pd = (pde64_t *)V3_VAddr((void *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pdpe->pd_base_addr));
+ }
- // Continue processing at the next level
+ // Continue processing at the next level
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr), (addr_t *)&guest_pd) == -1) {
- // Machine check the guest
- PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr));
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
- }
+ if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr), (addr_t *)&guest_pd) == -1) {
+ // Machine check the guest
+ PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pdpe->pd_base_addr));
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
- if (handle_pde_shadow_pagefault_64(info, fault_addr, error_code, shadow_pd, guest_pd) == -1) {
- PrintError("Error handling Page fault caused by PDE\n");
- return -1;
- }
+ if (handle_pde_shadow_pagefault_64(info, fault_addr, error_code, shadow_pd, guest_pd) == -1) {
+ PrintError("Error handling Page fault caused by PDE\n");
+ return -1;
+ }
- return 0;
+ return 0;
}
static int handle_pde_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
pde64_t * shadow_pd, pde64_t * guest_pd) {
- pt_access_status_t guest_pde_access;
- pt_access_status_t shadow_pde_access;
- pde64_t * guest_pde = (pde64_t *)&(guest_pd[PDE64_INDEX(fault_addr)]);
- pde64_t * shadow_pde = (pde64_t *)&(shadow_pd[PDE64_INDEX(fault_addr)]);
+ pt_access_status_t guest_pde_access;
+ pt_access_status_t shadow_pde_access;
+ pde64_t * guest_pde = (pde64_t *)&(guest_pd[PDE64_INDEX(fault_addr)]);
+ pde64_t * shadow_pde = (pde64_t *)&(shadow_pd[PDE64_INDEX(fault_addr)]);
- PrintDebug("Handling PDE fault\n");
+ PrintDebug("Handling PDE fault\n");
- // Check the guest page permissions
- guest_pde_access = v3_can_access_pde64(guest_pd, fault_addr, error_code);
+ // Check the guest page permissions
+ guest_pde_access = v3_can_access_pde64(guest_pd, fault_addr, error_code);
- // Check the shadow page permissions
- shadow_pde_access = v3_can_access_pde64(shadow_pd, fault_addr, error_code);
+ // Check the shadow page permissions
+ shadow_pde_access = v3_can_access_pde64(shadow_pd, fault_addr, error_code);
- /* Was the page fault caused by the Guest's page tables? */
- if (is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
- PrintDebug("Injecting PDE pf to guest: (guest access error=%d) (pf error code=%d)\n",
- *(uint_t *)&guest_pde_access, *(uint_t *)&error_code);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
-
- if (shadow_pde_access == PT_ACCESS_USER_ERROR) {
- //
- // PDE Entry marked non-user
- //
- PrintDebug("Shadow Paging User access error (shadow_pdpe_access=0x%x, guest_pdpe_access=0x%x)\n",
- shadow_pde_access, guest_pde_access);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
+ /* Was the page fault caused by the Guest's page tables? */
+ if (is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
+ PrintDebug("Injecting PDE pf to guest: (guest access error=%d) (pf error code=%d)\n",
+ *(uint_t *)&guest_pde_access, *(uint_t *)&error_code);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
- } else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
- (guest_pde->large_page == 1)) {
+ if (shadow_pde_access == PT_ACCESS_USER_ERROR) {
+ //
+ // PDE Entry marked non-user
+ //
+ PrintDebug("Shadow Paging User access error (shadow_pdpe_access=0x%x, guest_pdpe_access=0x%x)\n",
+ shadow_pde_access, guest_pde_access);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
- ((pde64_2MB_t *)guest_pde)->dirty = 1;
- shadow_pde->writable = guest_pde->writable;
+ } else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
+ (guest_pde->large_page == 1)) {
- //PrintDebug("Returning due to large page Write Error\n");
- //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
+ ((pde64_2MB_t *)guest_pde)->dirty = 1;
+ shadow_pde->writable = guest_pde->writable;
- return 0;
- } else if ((shadow_pde_access != PT_ACCESS_NOT_PRESENT) &&
- (shadow_pde_access != PT_ACCESS_OK)) {
- // inject page fault in guest
- inject_guest_pf(info, fault_addr, error_code);
- PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pde_access);
- PrintDebug("Manual Says to inject page fault into guest\n");
- return 0;
- }
+ //PrintDebug("Returning due to large page Write Error\n");
+ //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
+
+ return 0;
+ } else if ((shadow_pde_access != PT_ACCESS_NOT_PRESENT) &&
+ (shadow_pde_access != PT_ACCESS_OK)) {
+ // inject page fault in guest
+ inject_guest_pf(info, fault_addr, error_code);
+ PrintDebug("Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pde_access);
+ PrintDebug("Manual Says to inject page fault into guest\n");
+ return 0;
+ }
- pte64_t * shadow_pt = NULL;
- pte64_t * guest_pt = NULL;
+ pte64_t * shadow_pt = NULL;
+ pte64_t * guest_pt = NULL;
- // Get the next shadow page level, allocate if not present
+ // Get the next shadow page level, allocate if not present
- if (shadow_pde_access == PT_ACCESS_NOT_PRESENT) {
- struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
- shadow_pt = (pte64_t *)V3_VAddr((void *)shdw_page->page_pa);
+ if (shadow_pde_access == PT_ACCESS_NOT_PRESENT) {
+ struct shadow_page_data * shdw_page = create_new_shadow_pt(info);
+ shadow_pt = (pte64_t *)V3_VAddr((void *)shdw_page->page_pa);
- PrintDebug("Creating new shadow PT: %p\n", shadow_pt);
+ PrintDebug("Creating new shadow PT: %p\n", shadow_pt);
- shadow_pde->present = 1;
- shadow_pde->user_page = guest_pde->user_page;
+ shadow_pde->present = 1;
+ shadow_pde->user_page = guest_pde->user_page;
- if (guest_pde->large_page == 0) {
- shadow_pde->writable = guest_pde->writable;
- } else {
- // This large page flag is temporary until we can get a working cache....
- ((pde64_2MB_t *)guest_pde)->vmm_info = V3_LARGE_PG;
+ if (guest_pde->large_page == 0) {
+ shadow_pde->writable = guest_pde->writable;
+ } else {
+ // This large page flag is temporary until we can get a working cache....
+ ((pde64_2MB_t *)guest_pde)->vmm_info = V3_LARGE_PG;
- if (error_code.write) {
- shadow_pde->writable = guest_pde->writable;
- ((pde64_2MB_t *)guest_pde)->dirty = 1;
- } else {
- shadow_pde->writable = 0;
- ((pde64_2MB_t *)guest_pde)->dirty = 0;
- }
- }
+ if (error_code.write) {
+ shadow_pde->writable = guest_pde->writable;
+ ((pde64_2MB_t *)guest_pde)->dirty = 1;
+ } else {
+ shadow_pde->writable = 0;
+ ((pde64_2MB_t *)guest_pde)->dirty = 0;
+ }
+ }
- // VMM Specific options
- shadow_pde->write_through = 0;
- shadow_pde->cache_disable = 0;
- shadow_pde->global_page = 0;
- //
+ // VMM Specific options
+ shadow_pde->write_through = 0;
+ shadow_pde->cache_disable = 0;
+ shadow_pde->global_page = 0;
+ //
- guest_pde->accessed = 1;
+ guest_pde->accessed = 1;
- shadow_pde->pt_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
- } else {
- shadow_pt = (pte64_t *)V3_VAddr((void *)BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr));
- }
-
- // Continue processing at the next level
- if (guest_pde->large_page == 0) {
- if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t *)&guest_pt) == -1) {
- // Machine check the guest
- PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
+ shadow_pde->pt_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
+ } else {
+ shadow_pt = (pte64_t *)V3_VAddr((void *)BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr));
}
+
+ // Continue processing at the next level
+ if (guest_pde->large_page == 0) {
+ if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t *)&guest_pt) == -1) {
+ // Machine check the guest
+ PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
- if (handle_pte_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
- PrintError("Error handling Page fault caused by PDE\n");
- return -1;
+ if (handle_pte_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
+ PrintError("Error handling Page fault caused by PDE\n");
+ return -1;
+ }
+ } else {
+ if (handle_2MB_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, (pde64_2MB_t *)guest_pde) == -1) {
+ PrintError("Error handling large pagefault\n");
+ return -1;
+ }
}
- } else {
- if (handle_2MB_shadow_pagefault_64(info, fault_addr, error_code, shadow_pt, (pde64_2MB_t *)guest_pde) == -1) {
- PrintError("Error handling large pagefault\n");
- return -1;
- }
- }
- return 0;
+ return 0;
}
static int handle_pte_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code,
pte64_t * shadow_pt, pte64_t * guest_pt) {
- pt_access_status_t guest_pte_access;
- pt_access_status_t shadow_pte_access;
- pte64_t * guest_pte = (pte64_t *)&(guest_pt[PTE64_INDEX(fault_addr)]);;
- pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
- addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
- // struct shadow_page_state * state = &(info->shdw_pg_state);
+ pt_access_status_t guest_pte_access;
+ pt_access_status_t shadow_pte_access;
+ pte64_t * guest_pte = (pte64_t *)&(guest_pt[PTE64_INDEX(fault_addr)]);;
+ pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
+ addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
+ // struct shadow_page_state * state = &(info->shdw_pg_state);
- PrintDebug("Handling PTE fault\n");
+ PrintDebug("Handling PTE fault\n");
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_pa);
+ struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_pa);
- if ((shdw_reg == NULL) ||
- (shdw_reg->host_type == SHDW_REGION_INVALID)) {
- // Inject a machine check in the guest
- PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_pa);
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
- }
+ if ((shdw_reg == NULL) ||
+ (shdw_reg->host_type == SHDW_REGION_INVALID)) {
+ // Inject a machine check in the guest
+ PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_pa);
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
- // Check the guest page permissions
- guest_pte_access = v3_can_access_pte64(guest_pt, fault_addr, error_code);
+ // Check the guest page permissions
+ guest_pte_access = v3_can_access_pte64(guest_pt, fault_addr, error_code);
- // Check the shadow page permissions
- shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
+ // Check the shadow page permissions
+ shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
- /* Was the page fault caused by the Guest's page tables? */
- if (is_guest_pf(guest_pte_access, shadow_pte_access) == 1) {
- PrintDebug("Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n",
- guest_pte_access, *(uint_t*)&error_code);
- inject_guest_pf(info, fault_addr, error_code);
- return 0;
- }
+ /* Was the page fault caused by the Guest's page tables? */
+ if (is_guest_pf(guest_pte_access, shadow_pte_access) == 1) {
+ PrintDebug("Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n",
+ guest_pte_access, *(uint_t*)&error_code);
+ inject_guest_pf(info, fault_addr, error_code);
+ return 0;
+ }
- if (shadow_pte_access == PT_ACCESS_OK) {
- // Inconsistent state...
- // Guest Re-Entry will flush page tables and everything should now work
- PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
- return 0;
- }
+ if (shadow_pte_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush page tables and everything should now work
+ PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
+ return 0;
+ }
- if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
- // Page Table Entry Not Present
- PrintDebug("guest_pa =%p\n", (void *)guest_pa);
+ if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
+ // Page Table Entry Not Present
+ PrintDebug("guest_pa =%p\n", (void *)guest_pa);
- if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
- (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
- addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_pa);
+ if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
+ (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
+ addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_pa);
- shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
+ shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
- shadow_pte->present = guest_pte->present;
- shadow_pte->user_page = guest_pte->user_page;
+ shadow_pte->present = guest_pte->present;
+ shadow_pte->user_page = guest_pte->user_page;
- //set according to VMM policy
- shadow_pte->write_through = 0;
- shadow_pte->cache_disable = 0;
- shadow_pte->global_page = 0;
- //
+ //set according to VMM policy
+ shadow_pte->write_through = 0;
+ shadow_pte->cache_disable = 0;
+ shadow_pte->global_page = 0;
+ //
- guest_pte->accessed = 1;
+ guest_pte->accessed = 1;
- if (guest_pte->dirty == 1) {
- shadow_pte->writable = guest_pte->writable;
- } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
- shadow_pte->writable = guest_pte->writable;
+ if (guest_pte->dirty == 1) {
+ shadow_pte->writable = guest_pte->writable;
+ } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
+ shadow_pte->writable = guest_pte->writable;
+ guest_pte->dirty = 1;
+ } else if ((guest_pte->dirty == 0) && (error_code.write == 0)) {
+ shadow_pte->writable = 0;
+ }
+
+ // dirty flag has been set, check if its in the cache
+ /* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) { */
+ /* if (error_code.write == 1) { */
+ /* state->cached_cr3 = 0; */
+ /* shadow_pte->writable = guest_pte->writable; */
+ /* } else { */
+ /* shadow_pte->writable = 0; */
+ /* } */
+ /* } */
+
+ // Write hooks trump all, and are set Read Only
+ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ shadow_pte->writable = 0;
+ }
+
+ } else {
+ // Page fault handled by hook functions
+
+ if (v3_handle_mem_full_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
+ } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
guest_pte->dirty = 1;
- } else if ((guest_pte->dirty == 0) && (error_code.write == 0)) {
- shadow_pte->writable = 0;
- }
-
- // dirty flag has been set, check if its in the cache
-/* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) { */
-/* if (error_code.write == 1) { */
-/* state->cached_cr3 = 0; */
-/* shadow_pte->writable = guest_pte->writable; */
-/* } else { */
-/* shadow_pte->writable = 0; */
-/* } */
-/* } */
-
- // Write hooks trump all, and are set Read Only
- if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- shadow_pte->writable = 0;
- }
- } else {
- // Page fault handled by hook functions
+ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ if (v3_handle_mem_wr_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ } else {
+ PrintDebug("Shadow PTE Write Error\n");
+ shadow_pte->writable = guest_pte->writable;
+ }
- if (v3_handle_mem_full_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
- } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
- guest_pte->dirty = 1;
+ /* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) { */
+ /* struct shadow_page_state * state = &(info->shdw_pg_state); */
+ /* PrintDebug("Write operation on Guest PAge Table Page\n"); */
+ /* state->cached_cr3 = 0; */
+ /* } */
+
+ return 0;
- if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- if (v3_handle_mem_wr_hook(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
} else {
- PrintDebug("Shadow PTE Write Error\n");
- shadow_pte->writable = guest_pte->writable;
+ // Inject page fault into the guest
+ inject_guest_pf(info, fault_addr, error_code);
+ PrintError("PTE Page fault fell through... Not sure if this should ever happen\n");
+ PrintError("Manual Says to inject page fault into guest\n");
+ return -1;
}
-/* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) { */
-/* struct shadow_page_state * state = &(info->shdw_pg_state); */
-/* PrintDebug("Write operation on Guest PAge Table Page\n"); */
-/* state->cached_cr3 = 0; */
-/* } */
-
return 0;
-
- } else {
- // Inject page fault into the guest
- inject_guest_pf(info, fault_addr, error_code);
- PrintError("PTE Page fault fell through... Not sure if this should ever happen\n");
- PrintError("Manual Says to inject page fault into guest\n");
- return -1;
- }
-
- return 0;
}
addr_t fault_addr, pf_error_t error_code,
pte64_t * shadow_pt, pde64_2MB_t * large_guest_pde)
{
- pt_access_status_t shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
- pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
- addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_2MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_2MB(fault_addr);
- // struct shadow_page_state * state = &(info->shdw_pg_state);
+ pt_access_status_t shadow_pte_access = v3_can_access_pte64(shadow_pt, fault_addr, error_code);
+ pte64_t * shadow_pte = (pte64_t *)&(shadow_pt[PTE64_INDEX(fault_addr)]);
+ addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_2MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_2MB(fault_addr);
+ // struct shadow_page_state * state = &(info->shdw_pg_state);
- PrintDebug("Handling 2MB fault (guest_fault_pa=%p) (error_code=%x)\n", (void *)guest_fault_pa, *(uint_t*)&error_code);
- PrintDebug("ShadowPT=%p, LargeGuestPDE=%p\n", shadow_pt, large_guest_pde);
+ PrintDebug("Handling 2MB fault (guest_fault_pa=%p) (error_code=%x)\n", (void *)guest_fault_pa, *(uint_t*)&error_code);
+ PrintDebug("ShadowPT=%p, LargeGuestPDE=%p\n", shadow_pt, large_guest_pde);
- struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_fault_pa);
+ struct v3_shadow_region * shdw_reg = v3_get_shadow_region(info, guest_fault_pa);
- if ((shdw_reg == NULL) ||
- (shdw_reg->host_type == SHDW_REGION_INVALID)) {
- // Inject a machine check in the guest
- PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
- v3_raise_exception(info, MC_EXCEPTION);
- return -1;
- }
+ if ((shdw_reg == NULL) ||
+ (shdw_reg->host_type == SHDW_REGION_INVALID)) {
+ // Inject a machine check in the guest
+ PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
+ v3_raise_exception(info, MC_EXCEPTION);
+ return -1;
+ }
- if (shadow_pte_access == PT_ACCESS_OK) {
- // Inconsistent state...
- // Guest Re-Entry will flush tables and everything should now workd
- PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
- //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
- return 0;
- }
+ if (shadow_pte_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush tables and everything should now workd
+ PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
+ //PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
+ return 0;
+ }
- if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
- // Get the guest physical address of the fault
+ if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
+ // Get the guest physical address of the fault
- if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
- (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
- addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_fault_pa);
+ if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
+ (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
+ addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, guest_fault_pa);
- PrintDebug("Shadow PA=%p, ShadowPTE=%p\n", (void *)shadow_pa, (void *)shadow_pte);
+ PrintDebug("Shadow PA=%p, ShadowPTE=%p\n", (void *)shadow_pa, (void *)shadow_pte);
- shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
- PrintDebug("Test1\n");
+ shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
+ PrintDebug("Test1\n");
- shadow_pte->present = 1;
+ shadow_pte->present = 1;
- /* We are assuming that the PDE entry has precedence
- * so the Shadow PDE will mirror the guest PDE settings,
- * and we don't have to worry about them here
- * Allow everything
- */
- shadow_pte->user_page = 1;
+ /* We are assuming that the PDE entry has precedence
+ * so the Shadow PDE will mirror the guest PDE settings,
+ * and we don't have to worry about them here
+ * Allow everything
+ */
+ shadow_pte->user_page = 1;
-/* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) { */
-/* // Check if the entry is a page table... */
-/* PrintDebug("Marking page as Guest Page Table (large page)\n"); */
-/* shadow_pte->writable = 0; */
-/* } else */ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- shadow_pte->writable = 0;
- } else {
- shadow_pte->writable = 1;
- }
+ /* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) { */
+ /* // Check if the entry is a page table... */
+ /* PrintDebug("Marking page as Guest Page Table (large page)\n"); */
+ /* shadow_pte->writable = 0; */
+ /* } else */ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ shadow_pte->writable = 0;
+ } else {
+ shadow_pte->writable = 1;
+ }
- //set according to VMM policy
- shadow_pte->write_through = 0;
- shadow_pte->cache_disable = 0;
- shadow_pte->global_page = 0;
- //
+ //set according to VMM policy
+ shadow_pte->write_through = 0;
+ shadow_pte->cache_disable = 0;
+ shadow_pte->global_page = 0;
+ //
- } else {
- // Handle hooked pages as well as other special pages
- // if (handle_special_page_fault(info, fault_addr, guest_fault_pa, error_code) == -1) {
+ } else {
+ // Handle hooked pages as well as other special pages
+ // if (handle_special_page_fault(info, fault_addr, guest_fault_pa, error_code) == -1) {
- if (v3_handle_mem_full_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
- } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
+ if (v3_handle_mem_full_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
+ } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
- if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
+ if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
- if (v3_handle_mem_wr_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
- PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
+ if (v3_handle_mem_wr_hook(info, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
-/* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) { */
-/* struct shadow_page_state * state = &(info->shdw_pg_state); */
-/* PrintDebug("Write operation on Guest PAge Table Page (large page)\n"); */
-/* state->cached_cr3 = 0; */
-/* shadow_pte->writable = 1; */
-/* } */
+ /* if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) { */
+ /* struct shadow_page_state * state = &(info->shdw_pg_state); */
+ /* PrintDebug("Write operation on Guest PAge Table Page (large page)\n"); */
+ /* state->cached_cr3 = 0; */
+ /* shadow_pte->writable = 1; */
+ /* } */
- } else {
- PrintError("Error in large page fault handler...\n");
- PrintError("This case should have been handled at the top level handler\n");
- return -1;
- }
+ } else {
+ PrintError("Error in large page fault handler...\n");
+ PrintError("This case should have been handled at the top level handler\n");
+ return -1;
+ }
- // PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
- PrintDebug("Returning from large page fault handler\n");
- return 0;
+ // PrintHostPageTree(info, fault_addr, info->ctrl_regs.cr3);
+ PrintDebug("Returning from large page fault handler\n");
+ return 0;
}
addr_t vaddr, addr_t page_ptr, addr_t page_pa,
void * private_data) {
- switch (type) {
- case PAGE_PML464:
- {
- pml4e64_t * pml = (pml4e64_t *)page_ptr;
-
- if (pml[PML4E64_INDEX(vaddr)].present == 0) {
- return 1;
- }
- return 0;
- }
- case PAGE_PDP64:
- {
- pdpe64_t * pdp = (pdpe64_t *)page_ptr;
- pdpe64_t * pdpe = &(pdp[PDPE64_INDEX(vaddr)]);
-
- if (pdpe->present == 0) {
- return 1;
- }
+ switch (type) {
+ case PAGE_PML464:
+ {
+ pml4e64_t * pml = (pml4e64_t *)page_ptr;
+
+ if (pml[PML4E64_INDEX(vaddr)].present == 0) {
+ return 1;
+ }
+ return 0;
+ }
+ case PAGE_PDP64:
+ {
+ pdpe64_t * pdp = (pdpe64_t *)page_ptr;
+ pdpe64_t * pdpe = &(pdp[PDPE64_INDEX(vaddr)]);
+
+ if (pdpe->present == 0) {
+ return 1;
+ }
- if (pdpe->vmm_info == V3_LARGE_PG) {
- PrintError("1 Gigabyte pages not supported\n");
- return -1;
-
- pdpe->present = 0;
- return 1;
- }
-
- return 0;
- }
- case PAGE_PD64:
- {
- pde64_t * pd = (pde64_t *)page_ptr;
- pde64_t * pde = &(pd[PDE64_INDEX(vaddr)]);
-
- if (pde->present == 0) {
- return 1;
- }
+ if (pdpe->vmm_info == V3_LARGE_PG) {
+ PrintError("1 Gigabyte pages not supported\n");
+ return -1;
+
+ pdpe->present = 0;
+ return 1;
+ }
+
+ return 0;
+ }
+ case PAGE_PD64:
+ {
+ pde64_t * pd = (pde64_t *)page_ptr;
+ pde64_t * pde = &(pd[PDE64_INDEX(vaddr)]);
+
+ if (pde->present == 0) {
+ return 1;
+ }
- if (pde->vmm_info == V3_LARGE_PG) {
- pde->present = 0;
- return 1;
- }
+ if (pde->vmm_info == V3_LARGE_PG) {
+ pde->present = 0;
+ return 1;
+ }
- return 0;
- }
- case PAGE_PT64:
- {
- pte64_t * pt = (pte64_t *)page_ptr;
+ return 0;
+ }
+ case PAGE_PT64:
+ {
+ pte64_t * pt = (pte64_t *)page_ptr;
- pt[PTE64_INDEX(vaddr)].present = 0;
+ pt[PTE64_INDEX(vaddr)].present = 0;
- return 1;
- }
- default:
- PrintError("Invalid Page Type\n");
- return -1;
+ return 1;
+ }
+ default:
+ PrintError("Invalid Page Type\n");
+ return -1;
- }
+ }
- // should not get here
- PrintError("Should not get here....\n");
- return -1;
+ // should not get here
+ PrintError("Should not get here....\n");
+ return -1;
}
static inline int handle_shadow_invlpg_64(struct guest_info * info, addr_t vaddr) {
- PrintDebug("INVLPG64 - %p\n",(void*)vaddr);
+ PrintDebug("INVLPG64 - %p\n",(void*)vaddr);
- int ret = v3_drill_host_pt_64(info, info->ctrl_regs.cr3, vaddr, invalidation_cb_64, NULL);
- if (ret == -1) {
- PrintError("Page table drill returned error.... \n");
- PrintHostPageTree(info, vaddr, info->ctrl_regs.cr3);
- }
+ int ret = v3_drill_host_pt_64(info, info->ctrl_regs.cr3, vaddr, invalidation_cb_64, NULL);
+ if (ret == -1) {
+ PrintError("Page table drill returned error.... \n");
+ PrintHostPageTree(info, vaddr, info->ctrl_regs.cr3);
+ }
- return (ret == -1) ? -1 : 0;
+ return (ret == -1) ? -1 : 0;
}
struct v3_socket_hooks * sock_hooks = 0;
-
-//int v3_socket_api_test(void);
-
-
void V3_Init_Sockets(struct v3_socket_hooks * hooks) {
- PrintInfo("Initializing Socket Interface\n");
- sock_hooks = hooks;
-
- PrintDebug("V3 sockets inited\n");
-
- v3_socket_api_test();
-
- return;
-}
-
-
-
-void v3_init_sock_set(struct v3_sock_set * sock_set) {
- sock_set->num_socks = 0;
- sock_set->socks = NULL;
-
- return;
-}
-
-
-
-
-
-/* This should probably check if the socket is already added */
-// adds socket to the sockset
-void v3_set_sock(struct v3_sock_set * sock_set, V3_SOCK sock) {
- struct v3_sock_entry * new_entry = V3_Malloc(sizeof(struct v3_sock_entry));
-
- new_entry->sock = sock;
- new_entry->is_set = 0;
-
- if (sock_set->socks) {
- new_entry->next = sock_set->socks;
- }
-
- sock_set->socks = new_entry;
-
- sock_set->num_socks++;
-}
-
-
-// deletes socket from sockset
-void v3_clr_sock(struct v3_sock_set * sock_set, V3_SOCK sock) {
- struct v3_sock_entry * iter, * back_ptr;
-
- iter = sock_set->socks;
- back_ptr = NULL;
-
- v3_foreach_sock(sock_set, iter) {
- if (iter->sock == sock) {
- if (back_ptr == NULL) {
- sock_set->socks = iter->next;
- } else {
- back_ptr->next = iter->next;
- }
-
- V3_Free(iter);
-
- sock_set->num_socks--;
- break;
- }
-
- back_ptr = iter;
- }
-}
-
-// checks is_set vairable
-int v3_isset_sock(struct v3_sock_set * sock_set, V3_SOCK sock) {
- struct v3_sock_entry * iter;
+ PrintInfo("Initializing Socket Interface\n");
+ sock_hooks = hooks;
+ PrintDebug("V3 sockets inited\n");
- v3_foreach_sock(sock_set, iter) {
- if (iter->sock == sock) {
- return iter->is_set;
- }
- }
- return -1;
+ return;
}
-// clears all is_set variables.
-void v3_zero_sockset(struct v3_sock_set * sock_set) {
- struct v3_sock_entry * iter;
- v3_foreach_sock(sock_set, iter) {
- iter->is_set = 0;
- }
-}
-
-#if 1
-
-int
-v3_socket_api_test(void)
-{
- unsigned int port;
- char buf[1024];
- int rc = 0;
- V3_SOCK sock;
- V3_SOCK client;
- unsigned int remote_ip;
-
- PrintDebug("\nIn Palacios: Test V3_Socket Macros\n");
- sock = V3_Create_TCP_Socket();
- if( ((int)sock) < 0 ){
- PrintDebug( "ERROR: tcp_socket() failed!\n");
- return -1;
- }
-
- port = 80;
-
- if( V3_Bind_Socket(sock, port) < 0){
- PrintDebug("bind error\n");
- return -1;
- }
-
- if( V3_Listen_Socket(sock, 1) < 0) {
- PrintDebug("listen error\n" );
- return -1;
- }
-
- PrintDebug( "Going into mainloop: server listening on port %d\n", port);
-
- client = V3_Accept_Socket(sock, &remote_ip, &port);
-
- PrintDebug(" New connection from %d port: %d\n", remote_ip, port);
-
- V3_Send(client, "Welcome!\n", 9);
-
- while(1)
- {
- V3_Send(client, buf, rc);
- rc = V3_Recv(client, buf, sizeof(buf)-1);
- if( rc <= 0 ){
- PrintDebug( "Closed connection\n");
- V3_Close_Socket(client);
- break;
- }
-
- buf[rc] = '\0';
-
- PrintDebug( "Read %d bytes: '%s'\n", rc, buf);
- }
-
- PrintDebug("TEST END: Sockets API\n");
- return 0;
-}
-
-#endif
-
-
-#if 0
-
-static int
-socket_api_test(void)
-{
- unsigned int port;
- char buf[1024];
- int rc = 0;
- V3_SOCK sock;
- V3_SOCK client;
- unsigned int remote_ip;
-
- PrintDebug("\nIn Palacios: TEST BEGIN: Sockets API\n");
- sock = sock_hooks->tcp_socket(0, 0, 0);
- if( sock == NULL ){
- PrintDebug( "ERROR: tcp_socket() failed!\n");
- return -1;
- }
-
- port = 80;
-
- if( sock_hooks->bind_socket(sock, port) < 0){
- PrintDebug("bind error\n");
- return -1;
- }
-
- if( sock_hooks->listen(sock, 1) < 0) {
- PrintDebug("listen error\n" );
- return -1;
- }
-
- PrintDebug( "Going into mainloop: server listening on port %d\n", port);
-
- client = sock_hooks->accept(sock, &remote_ip , &port);
-
- PrintDebug(" New connection from %d port: %d\n", remote_ip, port);
-
- sock_hooks->send(client, "Welcome!\n", 9);
-
- while(1)
- {
- sock_hooks->send(client, buf, rc);
- rc = sock_hooks->recv(client, buf, sizeof(buf)-1);
- if( rc <= 0 ){
- PrintDebug( "Closed connection\n");
- sock_hooks->close(client);
- break;
- }
-
- buf[rc] = '\0';
-
- PrintDebug( "Read %d bytes: '%s'\n", rc, buf);
- }
-
- PrintDebug("TEST END: Sockets API\n");
- return 0;
-}
-#endif
static float e = 0.00000001;
double v3_ceil(double x) {
- if ((double)(x - (int)x) == 0) {
- return (int)x;
- }
- return (int)(x + e) + 1;
+ if ((double)(x - (int)x) == 0) {
+ return (int)x;
+ }
+ return (int)(x + e) + 1;
}
t1 = s1;
while (*s1) s1++;
while (i < limit) {
- if(*s2 == '\0') break;
- *s1++ = *s2++;
+ if(*s2 == '\0') break;
+ *s1++ = *s2++;
}
*s1 = '\0';
return t1;
int ret = 0;
while (*buf >= '0' && *buf <= '9') {
- ret *= 10;
- ret += *buf - '0';
- buf++;
+ ret *= 10;
+ ret += *buf - '0';
+ buf++;
}
return ret;
void v3_init_time(struct guest_info * info) {
- struct vm_time * time_state = &(info->time_state);
+ struct vm_time * time_state = &(info->time_state);
- time_state->cpu_freq = V3_CPU_KHZ();
+ time_state->cpu_freq = V3_CPU_KHZ();
- time_state->guest_tsc = 0;
- time_state->cached_host_tsc = 0;
- // time_state->pending_cycles = 0;
+ time_state->guest_tsc = 0;
+ time_state->cached_host_tsc = 0;
+ // time_state->pending_cycles = 0;
- INIT_LIST_HEAD(&(time_state->timers));
- time_state->num_timers = 0;
+ INIT_LIST_HEAD(&(time_state->timers));
+ time_state->num_timers = 0;
}
int v3_add_timer(struct guest_info * info, struct vm_timer_ops * ops, void * private_data) {
- struct vm_timer * timer = NULL;
- timer = (struct vm_timer *)V3_Malloc(sizeof(struct vm_timer));
- V3_ASSERT(timer != NULL);
+ struct vm_timer * timer = NULL;
+ timer = (struct vm_timer *)V3_Malloc(sizeof(struct vm_timer));
+ V3_ASSERT(timer != NULL);
- timer->ops = ops;
- timer->private_data = private_data;
+ timer->ops = ops;
+ timer->private_data = private_data;
- list_add(&(timer->timer_link), &(info->time_state.timers));
- info->time_state.num_timers++;
+ list_add(&(timer->timer_link), &(info->time_state.timers));
+ info->time_state.num_timers++;
- return 0;
+ return 0;
}
int v3_remove_timer(struct guest_info * info, struct vm_timer * timer) {
- list_del(&(timer->timer_link));
- info->time_state.num_timers--;
+ list_del(&(timer->timer_link));
+ info->time_state.num_timers--;
- V3_Free(timer);
- return 0;
+ V3_Free(timer);
+ return 0;
}
void v3_update_time(struct guest_info * info, ullong_t cycles) {
- struct vm_timer * tmp_timer;
+ struct vm_timer * tmp_timer;
- info->time_state.guest_tsc += cycles;
+ info->time_state.guest_tsc += cycles;
- list_for_each_entry(tmp_timer, &(info->time_state.timers), timer_link) {
- tmp_timer->ops->update_time(cycles, info->time_state.cpu_freq, tmp_timer->private_data);
- }
+ list_for_each_entry(tmp_timer, &(info->time_state.timers), timer_link) {
+ tmp_timer->ops->update_time(cycles, info->time_state.cpu_freq, tmp_timer->private_data);
+ }
- //info->time_state.pending_cycles = 0;
+ //info->time_state.pending_cycles = 0;
}
void PrintTraceHex(unsigned char x) {
- unsigned char z;
+ unsigned char z;
- z = (x >> 4) & 0xf;
- PrintTrace("%x", z);
- z = x & 0xf;
- PrintTrace("%x", z);
+ z = (x >> 4) & 0xf;
+ PrintTrace("%x", z);
+ z = x & 0xf;
+ PrintTrace("%x", z);
}
void PrintTraceLL(ullong_t num) {
- unsigned char * z = (unsigned char *)#
- int i;
+ unsigned char * z = (unsigned char *)#
+ int i;
- for (i = 7; i >= 0; i--) {
- PrintTraceHex(*(z + i));
- }
+ for (i = 7; i >= 0; i--) {
+ PrintTraceHex(*(z + i));
+ }
}
void PrintTraceMemDump(uchar_t * start, int n) {
- int i, j;
+ int i, j;
- for (i = 0; i < n; i += 16) {
- PrintTrace("%p", (void *)(start + i));
- for (j = i; (j < (i + 16)) && (j < n); j += 2) {
- PrintTrace(" ");
- PrintTraceHex(*(uchar_t *)(start + j));
- if ((j + 1) < n) {
- PrintTraceHex(*((uchar_t *)(start + j + 1)));
- }
- }
- PrintTrace(" ");
- for (j = i; (j < (i + 16)) && (j < n); j++) {
- PrintTrace("%c", ((start[j] >= 32) && (start[j] <= 126)) ? start[j] : '.');
+ for (i = 0; i < n; i += 16) {
+ PrintTrace("%p", (void *)(start + i));
+ for (j = i; (j < (i + 16)) && (j < n); j += 2) {
+ PrintTrace(" ");
+ PrintTraceHex(*(uchar_t *)(start + j));
+ if ((j + 1) < n) {
+ PrintTraceHex(*((uchar_t *)(start + j + 1)));
+ }
+ }
+ PrintTrace(" ");
+ for (j = i; (j < (i + 16)) && (j < n); j++) {
+ PrintTrace("%c", ((start[j] >= 32) && (start[j] <= 126)) ? start[j] : '.');
+ }
+ PrintTrace("\n");
}
- PrintTrace("\n");
- }
}
#define MASK(val, length) ({ \
- ullong_t mask = 0x0LL; \
- switch (length) { \
- case 1: \
- mask = mask_1; \
- break; \
- case 2: \
- mask = mask_2; \
- break; \
- case 4: \
- mask = mask_4; \
- break; \
- case 8: \
- mask = mask_8; \
- break; \
- } \
- val & mask;}) \
-
+ ullong_t mask = 0x0LL; \
+ switch (length) { \
+ case 1: \
+ mask = mask_1; \
+ break; \
+ case 2: \
+ mask = mask_2; \
+ break; \
+ case 4: \
+ mask = mask_4; \
+ break; \
+ case 8: \
+ mask = mask_8; \
+ break; \
+ } \
+ val & mask; \
+ })
+
struct memory_operand {
- uint_t segment_size;
- addr_t segment;
- uint_t base_size;
- addr_t base;
- uint_t index_size;
- addr_t index;
- addr_t scale;
- uint_t displacement_size;
- ullong_t displacement;
+ uint_t segment_size;
+ addr_t segment;
+ uint_t base_size;
+ addr_t base;
+ uint_t index_size;
+ addr_t index;
+ addr_t scale;
+ uint_t displacement_size;
+ ullong_t displacement;
};
static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t index, struct x86_operand * operand);
static int set_decoder_mode(struct guest_info * info, xed_state_t * state) {
- switch (info->cpu_mode) {
- case REAL:
- if (state->mmode != XED_MACHINE_MODE_LEGACY_16) {
- xed_state_init(state,
- XED_MACHINE_MODE_LEGACY_16,
- XED_ADDRESS_WIDTH_16b,
- XED_ADDRESS_WIDTH_16b);
- }
- break;
- case PROTECTED:
- case PROTECTED_PAE:
- if (state->mmode != XED_MACHINE_MODE_LEGACY_32) {
- xed_state_init(state,
- XED_MACHINE_MODE_LEGACY_32,
- XED_ADDRESS_WIDTH_32b,
- XED_ADDRESS_WIDTH_32b);
- }
- break;
- case LONG_32_COMPAT:
- if (state->mmode != XED_MACHINE_MODE_LONG_COMPAT_32) {
- xed_state_init(state,
- XED_MACHINE_MODE_LONG_COMPAT_32,
- XED_ADDRESS_WIDTH_32b,
- XED_ADDRESS_WIDTH_32b);
- }
- break;
- case LONG:
- if (state->mmode != XED_MACHINE_MODE_LONG_64) {
- PrintDebug("Setting decoder to long mode\n");
- // state->mmode = XED_MACHINE_MODE_LONG_64;
- //xed_state_set_machine_mode(state, XED_MACHINE_MODE_LONG_64);
- xed_state_init(state,
- XED_MACHINE_MODE_LONG_64,
- XED_ADDRESS_WIDTH_64b,
- XED_ADDRESS_WIDTH_64b);
+ switch (info->cpu_mode) {
+ case REAL:
+ if (state->mmode != XED_MACHINE_MODE_LEGACY_16) {
+ xed_state_init(state,
+ XED_MACHINE_MODE_LEGACY_16,
+ XED_ADDRESS_WIDTH_16b,
+ XED_ADDRESS_WIDTH_16b);
+ }
+ break;
+ case PROTECTED:
+ case PROTECTED_PAE:
+ if (state->mmode != XED_MACHINE_MODE_LEGACY_32) {
+ xed_state_init(state,
+ XED_MACHINE_MODE_LEGACY_32,
+ XED_ADDRESS_WIDTH_32b,
+ XED_ADDRESS_WIDTH_32b);
+ }
+ break;
+ case LONG_32_COMPAT:
+ if (state->mmode != XED_MACHINE_MODE_LONG_COMPAT_32) {
+ xed_state_init(state,
+ XED_MACHINE_MODE_LONG_COMPAT_32,
+ XED_ADDRESS_WIDTH_32b,
+ XED_ADDRESS_WIDTH_32b);
+ }
+ break;
+ case LONG:
+ if (state->mmode != XED_MACHINE_MODE_LONG_64) {
+ PrintDebug("Setting decoder to long mode\n");
+ // state->mmode = XED_MACHINE_MODE_LONG_64;
+ //xed_state_set_machine_mode(state, XED_MACHINE_MODE_LONG_64);
+ xed_state_init(state,
+ XED_MACHINE_MODE_LONG_64,
+ XED_ADDRESS_WIDTH_64b,
+ XED_ADDRESS_WIDTH_64b);
+ }
+ break;
+ default:
+ PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
+ return -1;
}
- break;
- default:
- PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
- return -1;
- }
- return 0;
+ return 0;
}
static int is_flags_reg(xed_reg_enum_t xed_reg) {
- switch (xed_reg) {
- case XED_REG_FLAGS:
- case XED_REG_EFLAGS:
- case XED_REG_RFLAGS:
- return 1;
- default:
- return 0;
- }
+ switch (xed_reg) {
+ case XED_REG_FLAGS:
+ case XED_REG_EFLAGS:
+ case XED_REG_RFLAGS:
+ return 1;
+ default:
+ return 0;
+ }
}
int v3_init_decoder(struct guest_info * info) {
- // Global library initialization, only do it once
- if (tables_inited == 0) {
- xed_tables_init();
- tables_inited = 1;
- }
-
- xed_state_t * decoder_state = (xed_state_t *)V3_Malloc(sizeof(xed_state_t));
- xed_state_zero(decoder_state);
- xed_state_init(decoder_state,
- XED_MACHINE_MODE_LEGACY_32,
- XED_ADDRESS_WIDTH_32b,
- XED_ADDRESS_WIDTH_32b);
-
- info->decoder_state = decoder_state;
-
- return 0;
+ // Global library initialization, only do it once
+ if (tables_inited == 0) {
+ xed_tables_init();
+ tables_inited = 1;
+ }
+
+ xed_state_t * decoder_state = (xed_state_t *)V3_Malloc(sizeof(xed_state_t));
+ xed_state_zero(decoder_state);
+ xed_state_init(decoder_state,
+ XED_MACHINE_MODE_LEGACY_32,
+ XED_ADDRESS_WIDTH_32b,
+ XED_ADDRESS_WIDTH_32b);
+
+ info->decoder_state = decoder_state;
+
+ return 0;
}
int v3_basic_mem_decode(struct guest_info * info, addr_t instr_ptr, struct basic_instr_info * instr_info) {
- xed_decoded_inst_t xed_instr;
- xed_error_enum_t xed_error;
+ xed_decoded_inst_t xed_instr;
+ xed_error_enum_t xed_error;
- if (set_decoder_mode(info, info->decoder_state) == -1) {
- PrintError("Could not set decoder mode\n");
- return -1;
- }
+ if (set_decoder_mode(info, info->decoder_state) == -1) {
+ PrintError("Could not set decoder mode\n");
+ return -1;
+ }
- xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
+ xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
- xed_error = xed_decode(&xed_instr,
- REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
- XED_MAX_INSTRUCTION_BYTES);
+ xed_error = xed_decode(&xed_instr,
+ REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
+ XED_MAX_INSTRUCTION_BYTES);
- if (xed_error != XED_ERROR_NONE) {
- PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
- return -1;
- }
+ if (xed_error != XED_ERROR_NONE) {
+ PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
+ return -1;
+ }
- instr_info->instr_length = xed_decoded_inst_get_length(&xed_instr);
+ instr_info->instr_length = xed_decoded_inst_get_length(&xed_instr);
- if (xed_decoded_inst_number_of_memory_operands(&xed_instr) == 0) {
- PrintError("Tried to decode memory operation with no memory operands\n");
- return -1;
- }
+ if (xed_decoded_inst_number_of_memory_operands(&xed_instr) == 0) {
+ PrintError("Tried to decode memory operation with no memory operands\n");
+ return -1;
+ }
- instr_info->op_size = xed_decoded_inst_get_memory_operand_length(&xed_instr, 0);
+ instr_info->op_size = xed_decoded_inst_get_memory_operand_length(&xed_instr, 0);
- xed_category_enum_t cat = xed_decoded_inst_get_category(&xed_instr);
- if (cat == XED_CATEGORY_STRINGOP) {
- instr_info->str_op = 1;
- } else {
- instr_info->str_op = 0;
- }
+ xed_category_enum_t cat = xed_decoded_inst_get_category(&xed_instr);
+ if (cat == XED_CATEGORY_STRINGOP) {
+ instr_info->str_op = 1;
+ } else {
+ instr_info->str_op = 0;
+ }
- xed_operand_values_t * operands = xed_decoded_inst_operands(&xed_instr);
- if (xed_operand_values_has_real_rep(operands)) {
- instr_info->has_rep = 1;
- } else {
- instr_info->has_rep = 0;
- }
+ xed_operand_values_t * operands = xed_decoded_inst_operands(&xed_instr);
+ if (xed_operand_values_has_real_rep(operands)) {
+ instr_info->has_rep = 1;
+ } else {
+ instr_info->has_rep = 0;
+ }
- return 0;
+ return 0;
}
xed_decoded_inst_t * xed_instr, const xed_inst_t * xi,
struct x86_instr * instr) {
- PrintDebug("String operation\n");
+ PrintDebug("String operation\n");
- if (instr->op_type == V3_OP_MOVS) {
- instr->num_operands = 2;
+ if (instr->op_type == V3_OP_MOVS) {
+ instr->num_operands = 2;
- if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
- PrintError("Could not get Destination memory operand\n");
- return -1;
- }
+ if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
+ PrintError("Could not get Destination memory operand\n");
+ return -1;
+ }
- if (get_memory_operand(info, xed_instr, 1, &(instr->src_operand)) == -1) {
- PrintError("Could not get Source memory operand\n");
- return -1;
- }
+ if (get_memory_operand(info, xed_instr, 1, &(instr->src_operand)) == -1) {
+ PrintError("Could not get Source memory operand\n");
+ return -1;
+ }
- if (instr->prefixes.rep == 1) {
- addr_t reg_addr = 0;
- uint_t reg_length = 0;
+ if (instr->prefixes.rep == 1) {
+ addr_t reg_addr = 0;
+ uint_t reg_length = 0;
- xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0), ®_addr, ®_length);
- instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
- } else {
- instr->str_op_length = 1;
- }
+ xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0), ®_addr, ®_length);
+ instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
+ } else {
+ instr->str_op_length = 1;
+ }
- } else if (instr->op_type == V3_OP_STOS) {
- instr->num_operands = 2;
+ } else if (instr->op_type == V3_OP_STOS) {
+ instr->num_operands = 2;
- if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
- PrintError("Could not get Destination memory operand\n");
- return -1;
- }
+ if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
+ PrintError("Could not get Destination memory operand\n");
+ return -1;
+ }
- // STOS reads from rax
- xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0),
- &(instr->src_operand.operand),
- &(instr->src_operand.size));
- instr->src_operand.type = REG_OPERAND;
+ // STOS reads from rax
+ xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0),
+ &(instr->src_operand.operand),
+ &(instr->src_operand.size));
+ instr->src_operand.type = REG_OPERAND;
- if (instr->prefixes.rep == 1) {
- addr_t reg_addr = 0;
- uint_t reg_length = 0;
+ if (instr->prefixes.rep == 1) {
+ addr_t reg_addr = 0;
+ uint_t reg_length = 0;
+
+ xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG1), ®_addr, ®_length);
+ instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
+ } else {
+ instr->str_op_length = 1;
+ }
- xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG1), ®_addr, ®_length);
- instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
} else {
- instr->str_op_length = 1;
+ PrintError("Unhandled String OP\n");
+ return -1;
}
- } else {
- PrintError("Unhandled String OP\n");
- return -1;
- }
-
- return 0;
+ return 0;
}
int v3_decode(struct guest_info * info, addr_t instr_ptr, struct x86_instr * instr) {
- xed_decoded_inst_t xed_instr;
- xed_error_enum_t xed_error;
+ xed_decoded_inst_t xed_instr;
+ xed_error_enum_t xed_error;
- v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
+ v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
- if (set_decoder_mode(info, info->decoder_state) == -1) {
- PrintError("Could not set decoder mode\n");
- return -1;
- }
+ if (set_decoder_mode(info, info->decoder_state) == -1) {
+ PrintError("Could not set decoder mode\n");
+ return -1;
+ }
- xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
+ xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
- xed_error = xed_decode(&xed_instr,
- REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
- XED_MAX_INSTRUCTION_BYTES);
+ xed_error = xed_decode(&xed_instr,
+ REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
+ XED_MAX_INSTRUCTION_BYTES);
- if (xed_error != XED_ERROR_NONE) {
- PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
- return -1;
- }
+ if (xed_error != XED_ERROR_NONE) {
+ PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
+ return -1;
+ }
- const xed_inst_t * xi = xed_decoded_inst_inst(&xed_instr);
+ const xed_inst_t * xi = xed_decoded_inst_inst(&xed_instr);
- instr->instr_length = xed_decoded_inst_get_length(&xed_instr);
+ instr->instr_length = xed_decoded_inst_get_length(&xed_instr);
- xed_iform_enum_t iform = xed_decoded_inst_get_iform_enum(&xed_instr);
+ xed_iform_enum_t iform = xed_decoded_inst_get_iform_enum(&xed_instr);
#ifdef DEBUG_XED
- xed_iclass_enum_t iclass = xed_decoded_inst_get_iclass(&xed_instr);
+ xed_iclass_enum_t iclass = xed_decoded_inst_get_iclass(&xed_instr);
- PrintDebug("iform=%s, iclass=%s\n", xed_iform_enum_t2str(iform), xed_iclass_enum_t2str(iclass));
+ PrintDebug("iform=%s, iclass=%s\n", xed_iform_enum_t2str(iform), xed_iclass_enum_t2str(iclass));
#endif
- if ((instr->op_type = get_opcode(iform)) == V3_INVALID_OP) {
- PrintError("Could not get opcode. (iform=%s)\n", xed_iform_enum_t2str(iform));
- return -1;
- }
-
-
- // We special case the string operations...
- if (xed_decoded_inst_get_category(&xed_instr) == XED_CATEGORY_STRINGOP) {
- instr->is_str_op = 1;
- return decode_string_op(info, &xed_instr, xi, instr);
- } else {
- instr->is_str_op = 0;
- instr->str_op_length = 0;
- }
-
-
- instr->num_operands = xed_decoded_inst_noperands(&xed_instr);
-
- if (instr->num_operands > 3) {
- PrintDebug("Special Case Not Handled\n");
- return -1;
- // special case
- } else if (instr->num_operands == 3) {
- const xed_operand_t * op = xed_inst_operand(xi, 2);
- xed_operand_enum_t op_enum = xed_operand_name(op);
-
- if ((!xed_operand_is_register(op_enum)) ||
- (!is_flags_reg(xed_decoded_inst_get_reg(&xed_instr, op_enum)))) {
- // special case
- PrintError("Special Case not handled\n");
- return -1;
+ if ((instr->op_type = get_opcode(iform)) == V3_INVALID_OP) {
+ PrintError("Could not get opcode. (iform=%s)\n", xed_iform_enum_t2str(iform));
+ return -1;
}
- }
-
-
-
- //PrintDebug("Number of operands: %d\n", instr->num_operands);
- //PrintDebug("INSTR length: %d\n", instr->instr_length);
- // set first operand
- if (instr->num_operands >= 1) {
- const xed_operand_t * op = xed_inst_operand(xi, 0);
- xed_operand_enum_t op_enum = xed_operand_name(op);
- struct x86_operand * v3_op = NULL;
-
- /*
- if (xed_operand_written(op)) {
- v3_op = &(instr->dst_operand);
- } else {
- v3_op = &(instr->src_operand);
- }
- */
+ // We special case the string operations...
+ if (xed_decoded_inst_get_category(&xed_instr) == XED_CATEGORY_STRINGOP) {
+ instr->is_str_op = 1;
+ return decode_string_op(info, &xed_instr, xi, instr);
+ } else {
+ instr->is_str_op = 0;
+ instr->str_op_length = 0;
+ }
- v3_op = &(instr->dst_operand);
- if (xed_operand_is_register(op_enum)) {
- xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
- int v3_reg_type = xed_reg_to_v3_reg(info,
- xed_reg,
- &(v3_op->operand),
- &(v3_op->size));
+ instr->num_operands = xed_decoded_inst_noperands(&xed_instr);
- if (v3_reg_type == -1) {
- PrintError("First operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
- v3_op->type = INVALID_OPERAND;
+ if (instr->num_operands > 3) {
+ PrintDebug("Special Case Not Handled\n");
return -1;
- } else if (v3_reg_type == SEGMENT_REGISTER) {
- struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
- v3_op->operand = (addr_t)&(seg_reg->selector);
- }
-
- v3_op->type = REG_OPERAND;
- } else {
-
- switch (op_enum) {
-
- case XED_OPERAND_MEM0:
- {
- PrintDebug("Memory operand (1)\n");
- if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
- PrintError("Could not get first memory operand\n");
+ // special case
+ } else if (instr->num_operands == 3) {
+ const xed_operand_t * op = xed_inst_operand(xi, 2);
+ xed_operand_enum_t op_enum = xed_operand_name(op);
+
+ if ((!xed_operand_is_register(op_enum)) ||
+ (!is_flags_reg(xed_decoded_inst_get_reg(&xed_instr, op_enum)))) {
+ // special case
+ PrintError("Special Case not handled\n");
return -1;
- }
}
- break;
+ }
- case XED_OPERAND_MEM1:
- case XED_OPERAND_IMM1:
- // illegal
- PrintError("Illegal Operand Order\n");
- return -1;
- case XED_OPERAND_IMM0:
- case XED_OPERAND_AGEN:
- case XED_OPERAND_PTR:
- case XED_OPERAND_RELBR:
- default:
- PrintError("Unhandled Operand Type\n");
- return -1;
+ //PrintDebug("Number of operands: %d\n", instr->num_operands);
+ //PrintDebug("INSTR length: %d\n", instr->instr_length);
+
+ // set first operand
+ if (instr->num_operands >= 1) {
+ const xed_operand_t * op = xed_inst_operand(xi, 0);
+ xed_operand_enum_t op_enum = xed_operand_name(op);
+ struct x86_operand * v3_op = NULL;
- }
+ /*
+ if (xed_operand_written(op)) {
+ v3_op = &(instr->dst_operand);
+ } else {
+ v3_op = &(instr->src_operand);
+ }
+ */
+
+ v3_op = &(instr->dst_operand);
+
+ if (xed_operand_is_register(op_enum)) {
+ xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
+ int v3_reg_type = xed_reg_to_v3_reg(info,
+ xed_reg,
+ &(v3_op->operand),
+ &(v3_op->size));
+
+ if (v3_reg_type == -1) {
+ PrintError("First operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
+ v3_op->type = INVALID_OPERAND;
+ return -1;
+ } else if (v3_reg_type == SEGMENT_REGISTER) {
+ struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
+ v3_op->operand = (addr_t)&(seg_reg->selector);
+ }
+
+ v3_op->type = REG_OPERAND;
+ } else {
+
+ switch (op_enum) {
+
+ case XED_OPERAND_MEM0:
+ {
+ PrintDebug("Memory operand (1)\n");
+ if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
+ PrintError("Could not get first memory operand\n");
+ return -1;
+ }
+ }
+ break;
+
+ case XED_OPERAND_MEM1:
+ case XED_OPERAND_IMM1:
+ // illegal
+ PrintError("Illegal Operand Order\n");
+ return -1;
+
+
+ case XED_OPERAND_IMM0:
+ case XED_OPERAND_AGEN:
+ case XED_OPERAND_PTR:
+ case XED_OPERAND_RELBR:
+ default:
+ PrintError("Unhandled Operand Type\n");
+ return -1;
+
+
+ }
+ }
}
- }
- // set second operand
- if (instr->num_operands >= 2) {
- const xed_operand_t * op = xed_inst_operand(xi, 1);
- // xed_operand_type_enum_t op_type = xed_operand_type(op);
- xed_operand_enum_t op_enum = xed_operand_name(op);
+ // set second operand
+ if (instr->num_operands >= 2) {
+ const xed_operand_t * op = xed_inst_operand(xi, 1);
+ // xed_operand_type_enum_t op_type = xed_operand_type(op);
+ xed_operand_enum_t op_enum = xed_operand_name(op);
- struct x86_operand * v3_op;
-
- /*
- if (xed_operand_written(op)) {
- v3_op = &(instr->dst_operand);
- } else {
- v3_op = &(instr->src_operand);
- }
- */
- v3_op = &(instr->src_operand);
-
- if (xed_operand_is_register(op_enum)) {
- xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
- int v3_reg_type = xed_reg_to_v3_reg(info,
- xed_reg,
- &(v3_op->operand),
- &(v3_op->size));
- if (v3_reg_type == -1) {
- PrintError("Second operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
- v3_op->type = INVALID_OPERAND;
- return -1;
- } else if (v3_reg_type == SEGMENT_REGISTER) {
- struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
- v3_op->operand = (addr_t)&(seg_reg->selector);
- }
+ struct x86_operand * v3_op;
- v3_op->type = REG_OPERAND;
+ /*
+ if (xed_operand_written(op)) {
+ v3_op = &(instr->dst_operand);
+ } else {
+ v3_op = &(instr->src_operand);
+ }
+ */
+ v3_op = &(instr->src_operand);
+
+ if (xed_operand_is_register(op_enum)) {
+ xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
+ int v3_reg_type = xed_reg_to_v3_reg(info,
+ xed_reg,
+ &(v3_op->operand),
+ &(v3_op->size));
+ if (v3_reg_type == -1) {
+ PrintError("Second operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
+ v3_op->type = INVALID_OPERAND;
+ return -1;
+ } else if (v3_reg_type == SEGMENT_REGISTER) {
+ struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
+ v3_op->operand = (addr_t)&(seg_reg->selector);
+ }
+
+ v3_op->type = REG_OPERAND;
- } else {
+ } else {
- switch (op_enum) {
+ switch (op_enum) {
- case XED_OPERAND_MEM0:
- {
- PrintDebug("Memory operand (2)\n");
- if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
- PrintError("Could not get first memory operand\n");
- return -1;
- }
- }
- break;
+ case XED_OPERAND_MEM0:
+ {
+ PrintDebug("Memory operand (2)\n");
+ if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
+ PrintError("Could not get first memory operand\n");
+ return -1;
+ }
+ }
+ break;
- case XED_OPERAND_IMM0:
- {
- instr->src_operand.size = xed_decoded_inst_get_immediate_width(&xed_instr);
+ case XED_OPERAND_IMM0:
+ {
+ instr->src_operand.size = xed_decoded_inst_get_immediate_width(&xed_instr);
- if (instr->src_operand.size > 4) {
- PrintError("Unhandled 64 bit immediates\n");
- return -1;
- }
- instr->src_operand.operand = xed_decoded_inst_get_unsigned_immediate(&xed_instr);
+ if (instr->src_operand.size > 4) {
+ PrintError("Unhandled 64 bit immediates\n");
+ return -1;
+ }
+ instr->src_operand.operand = xed_decoded_inst_get_unsigned_immediate(&xed_instr);
- instr->src_operand.type = IMM_OPERAND;
+ instr->src_operand.type = IMM_OPERAND;
- }
- break;
+ }
+ break;
- case XED_OPERAND_MEM1:
- case XED_OPERAND_IMM1:
- // illegal
- PrintError("Illegal Operand Order\n");
- return -1;
+ case XED_OPERAND_MEM1:
+ case XED_OPERAND_IMM1:
+ // illegal
+ PrintError("Illegal Operand Order\n");
+ return -1;
- case XED_OPERAND_AGEN:
- case XED_OPERAND_PTR:
- case XED_OPERAND_RELBR:
- default:
- PrintError("Unhandled Operand Type\n");
- return -1;
- }
+ case XED_OPERAND_AGEN:
+ case XED_OPERAND_PTR:
+ case XED_OPERAND_RELBR:
+ default:
+ PrintError("Unhandled Operand Type\n");
+ return -1;
+ }
+ }
+
}
- }
+ // set third operand
+ if (instr->num_operands >= 3) {
+ const xed_operand_t * op = xed_inst_operand(xi, 2);
+ xed_operand_type_enum_t op_type = xed_operand_type(op);
+ xed_operand_enum_t op_enum = xed_operand_name(op);
- // set third operand
- if (instr->num_operands >= 3) {
- const xed_operand_t * op = xed_inst_operand(xi, 2);
- xed_operand_type_enum_t op_type = xed_operand_type(op);
- xed_operand_enum_t op_enum = xed_operand_name(op);
+ if (xed_operand_is_register(op_enum)) {
+ xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
+ int v3_reg_type = xed_reg_to_v3_reg(info,
+ xed_reg,
+ &(instr->third_operand.operand),
+ &(instr->third_operand.size));
- if (xed_operand_is_register(op_enum)) {
- xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
- int v3_reg_type = xed_reg_to_v3_reg(info,
- xed_reg,
- &(instr->third_operand.operand),
- &(instr->third_operand.size));
+ if (v3_reg_type == -1) {
+ PrintError("Third operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
+ instr->third_operand.type = INVALID_OPERAND;
+ return -1;
+ } else if (v3_reg_type == SEGMENT_REGISTER) {
+ struct v3_segment * seg_reg = (struct v3_segment *)(instr->third_operand.operand);
+ instr->third_operand.operand = (addr_t)&(seg_reg->selector);
+ }
- if (v3_reg_type == -1) {
- PrintError("Third operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
- instr->third_operand.type = INVALID_OPERAND;
- return -1;
- } else if (v3_reg_type == SEGMENT_REGISTER) {
- struct v3_segment * seg_reg = (struct v3_segment *)(instr->third_operand.operand);
- instr->third_operand.operand = (addr_t)&(seg_reg->selector);
- }
+ instr->third_operand.type = REG_OPERAND;
- instr->third_operand.type = REG_OPERAND;
-
- } else {
- PrintError("Unhandled third operand type %s\n", xed_operand_type_enum_t2str(op_type));
- return -1;
- }
+ } else {
+ PrintError("Unhandled third operand type %s\n", xed_operand_type_enum_t2str(op_type));
+ return -1;
+ }
- }
+ }
int v3_encode(struct guest_info * info, struct x86_instr * instr, char * instr_buf) {
- return -1;
+ return -1;
}
static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t op_index, struct x86_operand * operand) {
- struct memory_operand mem_op;
-
- addr_t seg;
- addr_t base;
- addr_t scale;
- addr_t index;
- ullong_t displacement;
- int addr_width = v3_get_addr_width(info);;
- // struct v3_segment * seg_reg;
-
- PrintDebug("Xen mode = %s\n", xed_machine_mode_enum_t2str(xed_state_get_machine_mode(info->decoder_state)));
- PrintDebug("Address width: %s\n",
- xed_address_width_enum_t2str(xed_state_get_address_width(info->decoder_state)));
- PrintDebug("Stack Address width: %s\n",
- xed_address_width_enum_t2str(xed_state_get_stack_address_width(info->decoder_state)));
+ struct memory_operand mem_op;
+
+ addr_t seg;
+ addr_t base;
+ addr_t scale;
+ addr_t index;
+ ullong_t displacement;
+ int addr_width = v3_get_addr_width(info);;
+ // struct v3_segment * seg_reg;
+
+ PrintDebug("Xen mode = %s\n", xed_machine_mode_enum_t2str(xed_state_get_machine_mode(info->decoder_state)));
+ PrintDebug("Address width: %s\n",
+ xed_address_width_enum_t2str(xed_state_get_address_width(info->decoder_state)));
+ PrintDebug("Stack Address width: %s\n",
+ xed_address_width_enum_t2str(xed_state_get_stack_address_width(info->decoder_state)));
- memset((void*)&mem_op, '\0', sizeof(struct memory_operand));
+ memset((void*)&mem_op, '\0', sizeof(struct memory_operand));
- xed_reg_enum_t xed_seg = xed_decoded_inst_get_seg_reg(xed_instr, op_index);
- if (xed_seg != XED_REG_INVALID) {
- struct v3_segment *tmp_segment;
- if (xed_reg_to_v3_reg(info, xed_seg, (addr_t *)&tmp_segment, &(mem_op.segment_size)) == -1) {
- PrintError("Unhandled Segment Register\n");
- return -1;
+ xed_reg_enum_t xed_seg = xed_decoded_inst_get_seg_reg(xed_instr, op_index);
+ if (xed_seg != XED_REG_INVALID) {
+ struct v3_segment *tmp_segment;
+ if (xed_reg_to_v3_reg(info, xed_seg, (addr_t *)&tmp_segment, &(mem_op.segment_size)) == -1) {
+ PrintError("Unhandled Segment Register\n");
+ return -1;
+ }
+ mem_op.segment = tmp_segment->base;
}
- mem_op.segment = tmp_segment->base;
- }
-
- xed_reg_enum_t xed_base = xed_decoded_inst_get_base_reg(xed_instr, op_index);
- if (xed_base != XED_REG_INVALID) {
- addr_t base_reg;
- if (xed_reg_to_v3_reg(info, xed_base, &base_reg, &(mem_op.base_size)) == -1) {
- PrintError("Unhandled Base register\n");
- return -1;
+
+ xed_reg_enum_t xed_base = xed_decoded_inst_get_base_reg(xed_instr, op_index);
+ if (xed_base != XED_REG_INVALID) {
+ addr_t base_reg;
+ if (xed_reg_to_v3_reg(info, xed_base, &base_reg, &(mem_op.base_size)) == -1) {
+ PrintError("Unhandled Base register\n");
+ return -1;
+ }
+ mem_op.base = *(addr_t *)base_reg;
}
- mem_op.base = *(addr_t *)base_reg;
- }
- xed_reg_enum_t xed_idx = xed_decoded_inst_get_index_reg(xed_instr, op_index);
- if ((op_index == 0) && (xed_idx != XED_REG_INVALID)) {
- addr_t index_reg;
+ xed_reg_enum_t xed_idx = xed_decoded_inst_get_index_reg(xed_instr, op_index);
+ if ((op_index == 0) && (xed_idx != XED_REG_INVALID)) {
+ addr_t index_reg;
- if (xed_reg_to_v3_reg(info, xed_idx, &index_reg, &(mem_op.index_size)) == -1) {
- PrintError("Unhandled Index Register\n");
- return -1;
- }
+ if (xed_reg_to_v3_reg(info, xed_idx, &index_reg, &(mem_op.index_size)) == -1) {
+ PrintError("Unhandled Index Register\n");
+ return -1;
+ }
- mem_op.index= *(addr_t *)index_reg;
+ mem_op.index= *(addr_t *)index_reg;
- xed_uint_t xed_scale = xed_decoded_inst_get_scale(xed_instr, op_index);
- if (xed_scale != 0) {
- mem_op.scale = xed_scale;
+ xed_uint_t xed_scale = xed_decoded_inst_get_scale(xed_instr, op_index);
+ if (xed_scale != 0) {
+ mem_op.scale = xed_scale;
+ }
}
- }
- xed_uint_t disp_bits = xed_decoded_inst_get_memory_displacement_width(xed_instr, op_index);
- if (disp_bits) {
- xed_int64_t xed_disp = xed_decoded_inst_get_memory_displacement(xed_instr, op_index);
+ xed_uint_t disp_bits = xed_decoded_inst_get_memory_displacement_width(xed_instr, op_index);
+ if (disp_bits) {
+ xed_int64_t xed_disp = xed_decoded_inst_get_memory_displacement(xed_instr, op_index);
- mem_op.displacement_size = disp_bits;
- mem_op.displacement = xed_disp;
- }
+ mem_op.displacement_size = disp_bits;
+ mem_op.displacement = xed_disp;
+ }
- operand->type = MEM_OPERAND;
- operand->size = xed_decoded_inst_get_memory_operand_length(xed_instr, op_index);
+ operand->type = MEM_OPERAND;
+ operand->size = xed_decoded_inst_get_memory_operand_length(xed_instr, op_index);
- PrintDebug("Struct: Seg=%p (size=%d), base=%p, index=%p, scale=%p, displacement=%p (size=%d)\n",
- (void *)mem_op.segment, mem_op.segment_size, (void*)mem_op.base, (void *)mem_op.index,
- (void *)mem_op.scale, (void *)(addr_t)mem_op.displacement, mem_op.displacement_size);
+ PrintDebug("Struct: Seg=%p (size=%d), base=%p, index=%p, scale=%p, displacement=%p (size=%d)\n",
+ (void *)mem_op.segment, mem_op.segment_size, (void*)mem_op.base, (void *)mem_op.index,
+ (void *)mem_op.scale, (void *)(addr_t)mem_op.displacement, mem_op.displacement_size);
- PrintDebug("operand size: %d\n", operand->size);
+ PrintDebug("operand size: %d\n", operand->size);
- seg = MASK(mem_op.segment, mem_op.segment_size);
- base = MASK(mem_op.base, mem_op.base_size);
- index = MASK(mem_op.index, mem_op.index_size);
- scale = mem_op.scale;
+ seg = MASK(mem_op.segment, mem_op.segment_size);
+ base = MASK(mem_op.base, mem_op.base_size);
+ index = MASK(mem_op.index, mem_op.index_size);
+ scale = mem_op.scale;
- // This is a horrendous hack...
- // XED really screwed the pooch in calculating the displacement
- if (v3_get_cpu_mode(info) == LONG) {
- displacement = mem_op.displacement;
- } else {
- displacement = MASK(mem_op.displacement, mem_op.displacement_size);
- }
+ // This is a horrendous hack...
+ // XED really screwed the pooch in calculating the displacement
+ if (v3_get_cpu_mode(info) == LONG) {
+ displacement = mem_op.displacement;
+ } else {
+ displacement = MASK(mem_op.displacement, mem_op.displacement_size);
+ }
- PrintDebug("Seg=%p, base=%p, index=%p, scale=%p, displacement=%p\n",
- (void *)seg, (void *)base, (void *)index, (void *)scale, (void *)(addr_t)displacement);
+ PrintDebug("Seg=%p, base=%p, index=%p, scale=%p, displacement=%p\n",
+ (void *)seg, (void *)base, (void *)index, (void *)scale, (void *)(addr_t)displacement);
- operand->operand = MASK((seg + base + (scale * index) + displacement), addr_width);
+ operand->operand = MASK((seg + base + (scale * index) + displacement), addr_width);
- return 0;
+ return 0;
}
static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len) {
- PrintDebug("Xed Register: %s\n", xed_reg_enum_t2str(xed_reg));
+ PrintDebug("Xed Register: %s\n", xed_reg_enum_t2str(xed_reg));
- switch (xed_reg) {
- case XED_REG_INVALID:
- *v3_reg = 0;
- *reg_len = 0;
- return -1;
+ switch (xed_reg) {
+ case XED_REG_INVALID:
+ *v3_reg = 0;
+ *reg_len = 0;
+ return -1;
- /*
- * GPRs
- */
- case XED_REG_RAX:
- *v3_reg = (addr_t)&(info->vm_regs.rax);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_EAX:
- *v3_reg = (addr_t)&(info->vm_regs.rax);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_AX:
- *v3_reg = (addr_t)&(info->vm_regs.rax);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_AH:
- *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
- *reg_len = 1;
- return GPR_REGISTER;
- case XED_REG_AL:
- *v3_reg = (addr_t)&(info->vm_regs.rax);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_RCX:
- *v3_reg = (addr_t)&(info->vm_regs.rcx);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_ECX:
- *v3_reg = (addr_t)&(info->vm_regs.rcx);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_CX:
- *v3_reg = (addr_t)&(info->vm_regs.rcx);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_CH:
- *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
- *reg_len = 1;
- return GPR_REGISTER;
- case XED_REG_CL:
- *v3_reg = (addr_t)&(info->vm_regs.rcx);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_RDX:
- *v3_reg = (addr_t)&(info->vm_regs.rdx);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_EDX:
- *v3_reg = (addr_t)&(info->vm_regs.rdx);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_DX:
- *v3_reg = (addr_t)&(info->vm_regs.rdx);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_DH:
- *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
- *reg_len = 1;
- return GPR_REGISTER;
- case XED_REG_DL:
- *v3_reg = (addr_t)&(info->vm_regs.rdx);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_RBX:
- *v3_reg = (addr_t)&(info->vm_regs.rbx);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_EBX:
- *v3_reg = (addr_t)&(info->vm_regs.rbx);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_BX:
- *v3_reg = (addr_t)&(info->vm_regs.rbx);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_BH:
- *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
- *reg_len = 1;
- return GPR_REGISTER;
- case XED_REG_BL:
- *v3_reg = (addr_t)&(info->vm_regs.rbx);
- *reg_len = 1;
- return GPR_REGISTER;
-
-
- case XED_REG_RSP:
- *v3_reg = (addr_t)&(info->vm_regs.rsp);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_ESP:
- *v3_reg = (addr_t)&(info->vm_regs.rsp);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_SP:
- *v3_reg = (addr_t)&(info->vm_regs.rsp);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_SPL:
- *v3_reg = (addr_t)&(info->vm_regs.rsp);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_RBP:
- *v3_reg = (addr_t)&(info->vm_regs.rbp);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_EBP:
- *v3_reg = (addr_t)&(info->vm_regs.rbp);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_BP:
- *v3_reg = (addr_t)&(info->vm_regs.rbp);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_BPL:
- *v3_reg = (addr_t)&(info->vm_regs.rbp);
- *reg_len = 1;
- return GPR_REGISTER;
-
-
-
- case XED_REG_RSI:
- *v3_reg = (addr_t)&(info->vm_regs.rsi);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_ESI:
- *v3_reg = (addr_t)&(info->vm_regs.rsi);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_SI:
- *v3_reg = (addr_t)&(info->vm_regs.rsi);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_SIL:
- *v3_reg = (addr_t)&(info->vm_regs.rsi);
- *reg_len = 1;
- return GPR_REGISTER;
-
-
- case XED_REG_RDI:
- *v3_reg = (addr_t)&(info->vm_regs.rdi);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_EDI:
- *v3_reg = (addr_t)&(info->vm_regs.rdi);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_DI:
- *v3_reg = (addr_t)&(info->vm_regs.rdi);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_DIL:
- *v3_reg = (addr_t)&(info->vm_regs.rdi);
- *reg_len = 1;
- return GPR_REGISTER;
-
-
-
-
-
- case XED_REG_R8:
- *v3_reg = (addr_t)&(info->vm_regs.r8);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R8D:
- *v3_reg = (addr_t)&(info->vm_regs.r8);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R8W:
- *v3_reg = (addr_t)&(info->vm_regs.r8);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R8B:
- *v3_reg = (addr_t)&(info->vm_regs.r8);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R9:
- *v3_reg = (addr_t)&(info->vm_regs.r9);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R9D:
- *v3_reg = (addr_t)&(info->vm_regs.r9);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R9W:
- *v3_reg = (addr_t)&(info->vm_regs.r9);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R9B:
- *v3_reg = (addr_t)&(info->vm_regs.r9);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R10:
- *v3_reg = (addr_t)&(info->vm_regs.r10);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R10D:
- *v3_reg = (addr_t)&(info->vm_regs.r10);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R10W:
- *v3_reg = (addr_t)&(info->vm_regs.r10);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R10B:
- *v3_reg = (addr_t)&(info->vm_regs.r10);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R11:
- *v3_reg = (addr_t)&(info->vm_regs.r11);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R11D:
- *v3_reg = (addr_t)&(info->vm_regs.r11);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R11W:
- *v3_reg = (addr_t)&(info->vm_regs.r11);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R11B:
- *v3_reg = (addr_t)&(info->vm_regs.r11);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R12:
- *v3_reg = (addr_t)&(info->vm_regs.r12);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R12D:
- *v3_reg = (addr_t)&(info->vm_regs.r12);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R12W:
- *v3_reg = (addr_t)&(info->vm_regs.r12);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R12B:
- *v3_reg = (addr_t)&(info->vm_regs.r12);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R13:
- *v3_reg = (addr_t)&(info->vm_regs.r13);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R13D:
- *v3_reg = (addr_t)&(info->vm_regs.r13);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R13W:
- *v3_reg = (addr_t)&(info->vm_regs.r13);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R13B:
- *v3_reg = (addr_t)&(info->vm_regs.r13);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R14:
- *v3_reg = (addr_t)&(info->vm_regs.r14);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R14D:
- *v3_reg = (addr_t)&(info->vm_regs.r14);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R14W:
- *v3_reg = (addr_t)&(info->vm_regs.r14);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R14B:
- *v3_reg = (addr_t)&(info->vm_regs.r14);
- *reg_len = 1;
- return GPR_REGISTER;
-
- case XED_REG_R15:
- *v3_reg = (addr_t)&(info->vm_regs.r15);
- *reg_len = 8;
- return GPR_REGISTER;
- case XED_REG_R15D:
- *v3_reg = (addr_t)&(info->vm_regs.r15);
- *reg_len = 4;
- return GPR_REGISTER;
- case XED_REG_R15W:
- *v3_reg = (addr_t)&(info->vm_regs.r15);
- *reg_len = 2;
- return GPR_REGISTER;
- case XED_REG_R15B:
- *v3_reg = (addr_t)&(info->vm_regs.r15);
- *reg_len = 1;
- return GPR_REGISTER;
-
-
- /*
- * CTRL REGS
- */
- case XED_REG_RIP:
- *v3_reg = (addr_t)&(info->rip);
- *reg_len = 8;
- return CTRL_REGISTER;
- case XED_REG_EIP:
- *v3_reg = (addr_t)&(info->rip);
- *reg_len = 4;
- return CTRL_REGISTER;
- case XED_REG_IP:
- *v3_reg = (addr_t)&(info->rip);
- *reg_len = 2;
- return CTRL_REGISTER;
-
- case XED_REG_FLAGS:
- *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
- *reg_len = 2;
- return CTRL_REGISTER;
- case XED_REG_EFLAGS:
- *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
- *reg_len = 4;
- return CTRL_REGISTER;
- case XED_REG_RFLAGS:
- *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
- *reg_len = 8;
- return CTRL_REGISTER;
-
- case XED_REG_CR0:
- *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
- *reg_len = 4;
- return CTRL_REGISTER;
- case XED_REG_CR2:
- *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
- *reg_len = 4;
- return CTRL_REGISTER;
- case XED_REG_CR3:
- *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
- *reg_len = 4;
- return CTRL_REGISTER;
- case XED_REG_CR4:
- *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
- *reg_len = 4;
- return CTRL_REGISTER;
- case XED_REG_CR8:
- *v3_reg = (addr_t)&(info->ctrl_regs.cr8);
- *reg_len = 4;
- return CTRL_REGISTER;
-
- case XED_REG_CR1:
- case XED_REG_CR5:
- case XED_REG_CR6:
- case XED_REG_CR7:
- case XED_REG_CR9:
- case XED_REG_CR10:
- case XED_REG_CR11:
- case XED_REG_CR12:
- case XED_REG_CR13:
- case XED_REG_CR14:
- case XED_REG_CR15:
- return -1;
+ /*
+ * GPRs
+ */
+ case XED_REG_RAX:
+ *v3_reg = (addr_t)&(info->vm_regs.rax);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_EAX:
+ *v3_reg = (addr_t)&(info->vm_regs.rax);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_AX:
+ *v3_reg = (addr_t)&(info->vm_regs.rax);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_AH:
+ *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
+ *reg_len = 1;
+ return GPR_REGISTER;
+ case XED_REG_AL:
+ *v3_reg = (addr_t)&(info->vm_regs.rax);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_RCX:
+ *v3_reg = (addr_t)&(info->vm_regs.rcx);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_ECX:
+ *v3_reg = (addr_t)&(info->vm_regs.rcx);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_CX:
+ *v3_reg = (addr_t)&(info->vm_regs.rcx);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_CH:
+ *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
+ *reg_len = 1;
+ return GPR_REGISTER;
+ case XED_REG_CL:
+ *v3_reg = (addr_t)&(info->vm_regs.rcx);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_RDX:
+ *v3_reg = (addr_t)&(info->vm_regs.rdx);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_EDX:
+ *v3_reg = (addr_t)&(info->vm_regs.rdx);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_DX:
+ *v3_reg = (addr_t)&(info->vm_regs.rdx);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_DH:
+ *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
+ *reg_len = 1;
+ return GPR_REGISTER;
+ case XED_REG_DL:
+ *v3_reg = (addr_t)&(info->vm_regs.rdx);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_RBX:
+ *v3_reg = (addr_t)&(info->vm_regs.rbx);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_EBX:
+ *v3_reg = (addr_t)&(info->vm_regs.rbx);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_BX:
+ *v3_reg = (addr_t)&(info->vm_regs.rbx);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_BH:
+ *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
+ *reg_len = 1;
+ return GPR_REGISTER;
+ case XED_REG_BL:
+ *v3_reg = (addr_t)&(info->vm_regs.rbx);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+
+ case XED_REG_RSP:
+ *v3_reg = (addr_t)&(info->vm_regs.rsp);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_ESP:
+ *v3_reg = (addr_t)&(info->vm_regs.rsp);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_SP:
+ *v3_reg = (addr_t)&(info->vm_regs.rsp);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_SPL:
+ *v3_reg = (addr_t)&(info->vm_regs.rsp);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_RBP:
+ *v3_reg = (addr_t)&(info->vm_regs.rbp);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_EBP:
+ *v3_reg = (addr_t)&(info->vm_regs.rbp);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_BP:
+ *v3_reg = (addr_t)&(info->vm_regs.rbp);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_BPL:
+ *v3_reg = (addr_t)&(info->vm_regs.rbp);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+
+
+ case XED_REG_RSI:
+ *v3_reg = (addr_t)&(info->vm_regs.rsi);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_ESI:
+ *v3_reg = (addr_t)&(info->vm_regs.rsi);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_SI:
+ *v3_reg = (addr_t)&(info->vm_regs.rsi);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_SIL:
+ *v3_reg = (addr_t)&(info->vm_regs.rsi);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+
+ case XED_REG_RDI:
+ *v3_reg = (addr_t)&(info->vm_regs.rdi);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_EDI:
+ *v3_reg = (addr_t)&(info->vm_regs.rdi);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_DI:
+ *v3_reg = (addr_t)&(info->vm_regs.rdi);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_DIL:
+ *v3_reg = (addr_t)&(info->vm_regs.rdi);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+
+
+
+
+ case XED_REG_R8:
+ *v3_reg = (addr_t)&(info->vm_regs.r8);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R8D:
+ *v3_reg = (addr_t)&(info->vm_regs.r8);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R8W:
+ *v3_reg = (addr_t)&(info->vm_regs.r8);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R8B:
+ *v3_reg = (addr_t)&(info->vm_regs.r8);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R9:
+ *v3_reg = (addr_t)&(info->vm_regs.r9);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R9D:
+ *v3_reg = (addr_t)&(info->vm_regs.r9);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R9W:
+ *v3_reg = (addr_t)&(info->vm_regs.r9);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R9B:
+ *v3_reg = (addr_t)&(info->vm_regs.r9);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R10:
+ *v3_reg = (addr_t)&(info->vm_regs.r10);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R10D:
+ *v3_reg = (addr_t)&(info->vm_regs.r10);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R10W:
+ *v3_reg = (addr_t)&(info->vm_regs.r10);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R10B:
+ *v3_reg = (addr_t)&(info->vm_regs.r10);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R11:
+ *v3_reg = (addr_t)&(info->vm_regs.r11);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R11D:
+ *v3_reg = (addr_t)&(info->vm_regs.r11);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R11W:
+ *v3_reg = (addr_t)&(info->vm_regs.r11);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R11B:
+ *v3_reg = (addr_t)&(info->vm_regs.r11);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R12:
+ *v3_reg = (addr_t)&(info->vm_regs.r12);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R12D:
+ *v3_reg = (addr_t)&(info->vm_regs.r12);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R12W:
+ *v3_reg = (addr_t)&(info->vm_regs.r12);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R12B:
+ *v3_reg = (addr_t)&(info->vm_regs.r12);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R13:
+ *v3_reg = (addr_t)&(info->vm_regs.r13);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R13D:
+ *v3_reg = (addr_t)&(info->vm_regs.r13);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R13W:
+ *v3_reg = (addr_t)&(info->vm_regs.r13);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R13B:
+ *v3_reg = (addr_t)&(info->vm_regs.r13);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R14:
+ *v3_reg = (addr_t)&(info->vm_regs.r14);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R14D:
+ *v3_reg = (addr_t)&(info->vm_regs.r14);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R14W:
+ *v3_reg = (addr_t)&(info->vm_regs.r14);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R14B:
+ *v3_reg = (addr_t)&(info->vm_regs.r14);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+ case XED_REG_R15:
+ *v3_reg = (addr_t)&(info->vm_regs.r15);
+ *reg_len = 8;
+ return GPR_REGISTER;
+ case XED_REG_R15D:
+ *v3_reg = (addr_t)&(info->vm_regs.r15);
+ *reg_len = 4;
+ return GPR_REGISTER;
+ case XED_REG_R15W:
+ *v3_reg = (addr_t)&(info->vm_regs.r15);
+ *reg_len = 2;
+ return GPR_REGISTER;
+ case XED_REG_R15B:
+ *v3_reg = (addr_t)&(info->vm_regs.r15);
+ *reg_len = 1;
+ return GPR_REGISTER;
+
+
+ /*
+ * CTRL REGS
+ */
+ case XED_REG_RIP:
+ *v3_reg = (addr_t)&(info->rip);
+ *reg_len = 8;
+ return CTRL_REGISTER;
+ case XED_REG_EIP:
+ *v3_reg = (addr_t)&(info->rip);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+ case XED_REG_IP:
+ *v3_reg = (addr_t)&(info->rip);
+ *reg_len = 2;
+ return CTRL_REGISTER;
+
+ case XED_REG_FLAGS:
+ *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
+ *reg_len = 2;
+ return CTRL_REGISTER;
+ case XED_REG_EFLAGS:
+ *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+ case XED_REG_RFLAGS:
+ *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
+ *reg_len = 8;
+ return CTRL_REGISTER;
+
+ case XED_REG_CR0:
+ *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+ case XED_REG_CR2:
+ *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+ case XED_REG_CR3:
+ *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+ case XED_REG_CR4:
+ *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+ case XED_REG_CR8:
+ *v3_reg = (addr_t)&(info->ctrl_regs.cr8);
+ *reg_len = 4;
+ return CTRL_REGISTER;
+
+ case XED_REG_CR1:
+ case XED_REG_CR5:
+ case XED_REG_CR6:
+ case XED_REG_CR7:
+ case XED_REG_CR9:
+ case XED_REG_CR10:
+ case XED_REG_CR11:
+ case XED_REG_CR12:
+ case XED_REG_CR13:
+ case XED_REG_CR14:
+ case XED_REG_CR15:
+ return -1;
- /*
- * SEGMENT REGS
- */
- case XED_REG_CS:
- *v3_reg = (addr_t)&(info->segments.cs);
- *reg_len = 8;
- return SEGMENT_REGISTER;
- case XED_REG_DS:
- *v3_reg = (addr_t)&(info->segments.ds);
- *reg_len = 8;
- return SEGMENT_REGISTER;
- case XED_REG_ES:
- *v3_reg = (addr_t)&(info->segments.es);
- *reg_len = 8;
- return SEGMENT_REGISTER;
- case XED_REG_SS:
- *v3_reg = (addr_t)&(info->segments.ss);
- *reg_len = 8;
- return SEGMENT_REGISTER;
- case XED_REG_FS:
- *v3_reg = (addr_t)&(info->segments.fs);
- *reg_len = 8;
- return SEGMENT_REGISTER;
- case XED_REG_GS:
- *v3_reg = (addr_t)&(info->segments.gs);
- *reg_len = 8;
- return SEGMENT_REGISTER;
-
-
- case XED_REG_GDTR:
- case XED_REG_LDTR:
- case XED_REG_IDTR:
- case XED_REG_TR:
- PrintError("Segment selector operand... Don't know how to handle this...\n");
- return -1;
+ /*
+ * SEGMENT REGS
+ */
+ case XED_REG_CS:
+ *v3_reg = (addr_t)&(info->segments.cs);
+ *reg_len = 8;
+ return SEGMENT_REGISTER;
+ case XED_REG_DS:
+ *v3_reg = (addr_t)&(info->segments.ds);
+ *reg_len = 8;
+ return SEGMENT_REGISTER;
+ case XED_REG_ES:
+ *v3_reg = (addr_t)&(info->segments.es);
+ *reg_len = 8;
+ return SEGMENT_REGISTER;
+ case XED_REG_SS:
+ *v3_reg = (addr_t)&(info->segments.ss);
+ *reg_len = 8;
+ return SEGMENT_REGISTER;
+ case XED_REG_FS:
+ *v3_reg = (addr_t)&(info->segments.fs);
+ *reg_len = 8;
+ return SEGMENT_REGISTER;
+ case XED_REG_GS:
+ *v3_reg = (addr_t)&(info->segments.gs);
+ *reg_len = 8;
+ return SEGMENT_REGISTER;
+
+
+ case XED_REG_GDTR:
+ case XED_REG_LDTR:
+ case XED_REG_IDTR:
+ case XED_REG_TR:
+ PrintError("Segment selector operand... Don't know how to handle this...\n");
+ return -1;
- /*
- * DEBUG REGS
- */
- case XED_REG_DR0:
- case XED_REG_DR1:
- case XED_REG_DR2:
- case XED_REG_DR3:
- case XED_REG_DR4:
- case XED_REG_DR5:
- case XED_REG_DR6:
- case XED_REG_DR7:
- case XED_REG_DR8:
- case XED_REG_DR9:
- case XED_REG_DR10:
- case XED_REG_DR11:
- case XED_REG_DR12:
- case XED_REG_DR13:
- case XED_REG_DR14:
- case XED_REG_DR15:
- return -1;
+ /*
+ * DEBUG REGS
+ */
+ case XED_REG_DR0:
+ case XED_REG_DR1:
+ case XED_REG_DR2:
+ case XED_REG_DR3:
+ case XED_REG_DR4:
+ case XED_REG_DR5:
+ case XED_REG_DR6:
+ case XED_REG_DR7:
+ case XED_REG_DR8:
+ case XED_REG_DR9:
+ case XED_REG_DR10:
+ case XED_REG_DR11:
+ case XED_REG_DR12:
+ case XED_REG_DR13:
+ case XED_REG_DR14:
+ case XED_REG_DR15:
+ return -1;
- case XED_REG_XMM0:
- case XED_REG_XMM1:
- case XED_REG_XMM2:
- case XED_REG_XMM3:
- case XED_REG_XMM4:
- case XED_REG_XMM5:
- case XED_REG_XMM6:
- case XED_REG_XMM7:
- case XED_REG_XMM8:
- case XED_REG_XMM9:
- case XED_REG_XMM10:
- case XED_REG_XMM11:
- case XED_REG_XMM12:
- case XED_REG_XMM13:
- case XED_REG_XMM14:
- case XED_REG_XMM15:
-
- case XED_REG_MMX0:
- case XED_REG_MMX1:
- case XED_REG_MMX2:
- case XED_REG_MMX3:
- case XED_REG_MMX4:
- case XED_REG_MMX5:
- case XED_REG_MMX6:
- case XED_REG_MMX7:
-
- case XED_REG_ST0:
- case XED_REG_ST1:
- case XED_REG_ST2:
- case XED_REG_ST3:
- case XED_REG_ST4:
- case XED_REG_ST5:
- case XED_REG_ST6:
- case XED_REG_ST7:
-
- case XED_REG_ONE:
- case XED_REG_STACKPUSH:
- case XED_REG_STACKPOP:
+ case XED_REG_XMM0:
+ case XED_REG_XMM1:
+ case XED_REG_XMM2:
+ case XED_REG_XMM3:
+ case XED_REG_XMM4:
+ case XED_REG_XMM5:
+ case XED_REG_XMM6:
+ case XED_REG_XMM7:
+ case XED_REG_XMM8:
+ case XED_REG_XMM9:
+ case XED_REG_XMM10:
+ case XED_REG_XMM11:
+ case XED_REG_XMM12:
+ case XED_REG_XMM13:
+ case XED_REG_XMM14:
+ case XED_REG_XMM15:
+
+ case XED_REG_MMX0:
+ case XED_REG_MMX1:
+ case XED_REG_MMX2:
+ case XED_REG_MMX3:
+ case XED_REG_MMX4:
+ case XED_REG_MMX5:
+ case XED_REG_MMX6:
+ case XED_REG_MMX7:
+
+ case XED_REG_ST0:
+ case XED_REG_ST1:
+ case XED_REG_ST2:
+ case XED_REG_ST3:
+ case XED_REG_ST4:
+ case XED_REG_ST5:
+ case XED_REG_ST6:
+ case XED_REG_ST7:
+
+ case XED_REG_ONE:
+ case XED_REG_STACKPUSH:
+ case XED_REG_STACKPOP:
- case XED_REG_TSC:
- case XED_REG_TSCAUX:
- case XED_REG_MSRS:
-
- case XED_REG_X87CONTROL:
- case XED_REG_X87STATUS:
- case XED_REG_X87TOP:
- case XED_REG_X87TAG:
- case XED_REG_X87PUSH:
- case XED_REG_X87POP:
- case XED_REG_X87POP2:
-
- case XED_REG_MXCSR:
-
- case XED_REG_TMP0:
- case XED_REG_TMP1:
- case XED_REG_TMP2:
- case XED_REG_TMP3:
- case XED_REG_TMP4:
- case XED_REG_TMP5:
- case XED_REG_TMP6:
- case XED_REG_TMP7:
- case XED_REG_TMP8:
- case XED_REG_TMP9:
- case XED_REG_TMP10:
- case XED_REG_TMP11:
- case XED_REG_TMP12:
- case XED_REG_TMP13:
- case XED_REG_TMP14:
- case XED_REG_TMP15:
-
- case XED_REG_LAST:
-
- case XED_REG_ERROR:
- // error??
- return -1;
+ case XED_REG_TSC:
+ case XED_REG_TSCAUX:
+ case XED_REG_MSRS:
+
+ case XED_REG_X87CONTROL:
+ case XED_REG_X87STATUS:
+ case XED_REG_X87TOP:
+ case XED_REG_X87TAG:
+ case XED_REG_X87PUSH:
+ case XED_REG_X87POP:
+ case XED_REG_X87POP2:
+
+ case XED_REG_MXCSR:
+
+ case XED_REG_TMP0:
+ case XED_REG_TMP1:
+ case XED_REG_TMP2:
+ case XED_REG_TMP3:
+ case XED_REG_TMP4:
+ case XED_REG_TMP5:
+ case XED_REG_TMP6:
+ case XED_REG_TMP7:
+ case XED_REG_TMP8:
+ case XED_REG_TMP9:
+ case XED_REG_TMP10:
+ case XED_REG_TMP11:
+ case XED_REG_TMP12:
+ case XED_REG_TMP13:
+ case XED_REG_TMP14:
+ case XED_REG_TMP15:
+
+ case XED_REG_LAST:
+
+ case XED_REG_ERROR:
+ // error??
+ return -1;
- }
+ }
- return 0;
+ return 0;
}
static v3_op_type_t get_opcode(xed_iform_enum_t iform) {
- switch (iform) {
-
- /* Control Instructions */
-
- case XED_IFORM_MOV_CR_GPR64_CR:
- case XED_IFORM_MOV_CR_GPR32_CR:
- return V3_OP_MOVCR2;
-
- case XED_IFORM_MOV_CR_CR_GPR64:
- case XED_IFORM_MOV_CR_CR_GPR32:
- return V3_OP_MOV2CR;
-
- case XED_IFORM_SMSW_GPRv:
- return V3_OP_SMSW;
-
- case XED_IFORM_LMSW_GPR16:
- return V3_OP_LMSW;
-
- case XED_IFORM_CLTS:
- return V3_OP_CLTS;
-
- case XED_IFORM_INVLPG_MEMb:
- return V3_OP_INVLPG;
-
-
- /* Data Instructions */
-
- // Write
- case XED_IFORM_ADC_MEMv_GPRv:
- case XED_IFORM_ADC_MEMv_IMM:
- case XED_IFORM_ADC_MEMb_GPR8:
- case XED_IFORM_ADC_MEMb_IMM:
- // Read
- case XED_IFORM_ADC_GPRv_MEMv:
- case XED_IFORM_ADC_GPR8_MEMb:
- return V3_OP_ADC;
-
- // Write
- case XED_IFORM_ADD_MEMv_GPRv:
- case XED_IFORM_ADD_MEMb_IMM:
- case XED_IFORM_ADD_MEMb_GPR8:
- case XED_IFORM_ADD_MEMv_IMM:
- // Read
- case XED_IFORM_ADD_GPRv_MEMv:
- case XED_IFORM_ADD_GPR8_MEMb:
- return V3_OP_ADD;
-
- // Write
- case XED_IFORM_AND_MEMv_IMM:
- case XED_IFORM_AND_MEMb_GPR8:
- case XED_IFORM_AND_MEMv_GPRv:
- case XED_IFORM_AND_MEMb_IMM:
- // Read
- case XED_IFORM_AND_GPR8_MEMb:
- case XED_IFORM_AND_GPRv_MEMv:
- return V3_OP_AND;
-
- // Write
- case XED_IFORM_SUB_MEMv_IMM:
- case XED_IFORM_SUB_MEMb_GPR8:
- case XED_IFORM_SUB_MEMb_IMM:
- case XED_IFORM_SUB_MEMv_GPRv:
- // Read
- case XED_IFORM_SUB_GPR8_MEMb:
- case XED_IFORM_SUB_GPRv_MEMv:
- return V3_OP_SUB;
-
- // Write
- case XED_IFORM_MOV_MEMv_GPRv:
- case XED_IFORM_MOV_MEMb_GPR8:
- case XED_IFORM_MOV_MEMb_AL:
- case XED_IFORM_MOV_MEMv_IMM:
- case XED_IFORM_MOV_MEMb_IMM:
- // Read
- case XED_IFORM_MOV_GPRv_MEMv:
- case XED_IFORM_MOV_GPR8_MEMb:
- case XED_IFORM_MOV_AL_MEMb:
- return V3_OP_MOV;
-
-
- // Read
- case XED_IFORM_MOVZX_GPRv_MEMb:
- case XED_IFORM_MOVZX_GPRv_MEMw:
- return V3_OP_MOVZX;
-
- // Read
- case XED_IFORM_MOVSX_GPRv_MEMb:
- case XED_IFORM_MOVSX_GPRv_MEMw:
- return V3_OP_MOVSX;
-
-
-
- case XED_IFORM_DEC_MEMv:
- case XED_IFORM_DEC_MEMb:
- return V3_OP_DEC;
-
- case XED_IFORM_INC_MEMb:
- case XED_IFORM_INC_MEMv:
- return V3_OP_INC;
-
- // Write
- case XED_IFORM_OR_MEMv_IMM:
- case XED_IFORM_OR_MEMb_IMM:
- case XED_IFORM_OR_MEMv_GPRv:
- case XED_IFORM_OR_MEMb_GPR8:
- // Read
- case XED_IFORM_OR_GPRv_MEMv:
- case XED_IFORM_OR_GPR8_MEMb:
- return V3_OP_OR;
-
- // Write
- case XED_IFORM_XOR_MEMv_GPRv:
- case XED_IFORM_XOR_MEMb_IMM:
- case XED_IFORM_XOR_MEMb_GPR8:
- case XED_IFORM_XOR_MEMv_IMM:
- // Read
- case XED_IFORM_XOR_GPRv_MEMv:
- case XED_IFORM_XOR_GPR8_MEMb:
- return V3_OP_XOR;
-
- case XED_IFORM_NEG_MEMb:
- case XED_IFORM_NEG_MEMv:
- return V3_OP_NEG;
-
- case XED_IFORM_NOT_MEMv:
- case XED_IFORM_NOT_MEMb:
- return V3_OP_NOT;
-
- case XED_IFORM_XCHG_MEMv_GPRv:
- case XED_IFORM_XCHG_MEMb_GPR8:
- return V3_OP_XCHG;
-
- case XED_IFORM_SETB_MEMb:
- return V3_OP_SETB;
-
- case XED_IFORM_SETBE_MEMb:
- return V3_OP_SETBE;
-
- case XED_IFORM_SETL_MEMb:
- return V3_OP_SETL;
-
- case XED_IFORM_SETLE_MEMb:
- return V3_OP_SETLE;
-
- case XED_IFORM_SETNB_MEMb:
- return V3_OP_SETNB;
-
- case XED_IFORM_SETNBE_MEMb:
- return V3_OP_SETNBE;
-
- case XED_IFORM_SETNL_MEMb:
- return V3_OP_SETNL;
-
- case XED_IFORM_SETNLE_MEMb:
- return V3_OP_SETNLE;
-
- case XED_IFORM_SETNO_MEMb:
- return V3_OP_SETNO;
+ switch (iform) {
+
+ /* Control Instructions */
+
+ case XED_IFORM_MOV_CR_GPR64_CR:
+ case XED_IFORM_MOV_CR_GPR32_CR:
+ return V3_OP_MOVCR2;
+
+ case XED_IFORM_MOV_CR_CR_GPR64:
+ case XED_IFORM_MOV_CR_CR_GPR32:
+ return V3_OP_MOV2CR;
+
+ case XED_IFORM_SMSW_GPRv:
+ return V3_OP_SMSW;
+
+ case XED_IFORM_LMSW_GPR16:
+ return V3_OP_LMSW;
+
+ case XED_IFORM_CLTS:
+ return V3_OP_CLTS;
+
+ case XED_IFORM_INVLPG_MEMb:
+ return V3_OP_INVLPG;
+
+
+ /* Data Instructions */
+
+ // Write
+ case XED_IFORM_ADC_MEMv_GPRv:
+ case XED_IFORM_ADC_MEMv_IMM:
+ case XED_IFORM_ADC_MEMb_GPR8:
+ case XED_IFORM_ADC_MEMb_IMM:
+ // Read
+ case XED_IFORM_ADC_GPRv_MEMv:
+ case XED_IFORM_ADC_GPR8_MEMb:
+ return V3_OP_ADC;
+
+ // Write
+ case XED_IFORM_ADD_MEMv_GPRv:
+ case XED_IFORM_ADD_MEMb_IMM:
+ case XED_IFORM_ADD_MEMb_GPR8:
+ case XED_IFORM_ADD_MEMv_IMM:
+ // Read
+ case XED_IFORM_ADD_GPRv_MEMv:
+ case XED_IFORM_ADD_GPR8_MEMb:
+ return V3_OP_ADD;
+
+ // Write
+ case XED_IFORM_AND_MEMv_IMM:
+ case XED_IFORM_AND_MEMb_GPR8:
+ case XED_IFORM_AND_MEMv_GPRv:
+ case XED_IFORM_AND_MEMb_IMM:
+ // Read
+ case XED_IFORM_AND_GPR8_MEMb:
+ case XED_IFORM_AND_GPRv_MEMv:
+ return V3_OP_AND;
+
+ // Write
+ case XED_IFORM_SUB_MEMv_IMM:
+ case XED_IFORM_SUB_MEMb_GPR8:
+ case XED_IFORM_SUB_MEMb_IMM:
+ case XED_IFORM_SUB_MEMv_GPRv:
+ // Read
+ case XED_IFORM_SUB_GPR8_MEMb:
+ case XED_IFORM_SUB_GPRv_MEMv:
+ return V3_OP_SUB;
+
+ // Write
+ case XED_IFORM_MOV_MEMv_GPRv:
+ case XED_IFORM_MOV_MEMb_GPR8:
+ case XED_IFORM_MOV_MEMb_AL:
+ case XED_IFORM_MOV_MEMv_IMM:
+ case XED_IFORM_MOV_MEMb_IMM:
+ // Read
+ case XED_IFORM_MOV_GPRv_MEMv:
+ case XED_IFORM_MOV_GPR8_MEMb:
+ case XED_IFORM_MOV_AL_MEMb:
+ return V3_OP_MOV;
+
+
+ // Read
+ case XED_IFORM_MOVZX_GPRv_MEMb:
+ case XED_IFORM_MOVZX_GPRv_MEMw:
+ return V3_OP_MOVZX;
+
+ // Read
+ case XED_IFORM_MOVSX_GPRv_MEMb:
+ case XED_IFORM_MOVSX_GPRv_MEMw:
+ return V3_OP_MOVSX;
+
+
+
+ case XED_IFORM_DEC_MEMv:
+ case XED_IFORM_DEC_MEMb:
+ return V3_OP_DEC;
+
+ case XED_IFORM_INC_MEMb:
+ case XED_IFORM_INC_MEMv:
+ return V3_OP_INC;
+
+ // Write
+ case XED_IFORM_OR_MEMv_IMM:
+ case XED_IFORM_OR_MEMb_IMM:
+ case XED_IFORM_OR_MEMv_GPRv:
+ case XED_IFORM_OR_MEMb_GPR8:
+ // Read
+ case XED_IFORM_OR_GPRv_MEMv:
+ case XED_IFORM_OR_GPR8_MEMb:
+ return V3_OP_OR;
+
+ // Write
+ case XED_IFORM_XOR_MEMv_GPRv:
+ case XED_IFORM_XOR_MEMb_IMM:
+ case XED_IFORM_XOR_MEMb_GPR8:
+ case XED_IFORM_XOR_MEMv_IMM:
+ // Read
+ case XED_IFORM_XOR_GPRv_MEMv:
+ case XED_IFORM_XOR_GPR8_MEMb:
+ return V3_OP_XOR;
+
+ case XED_IFORM_NEG_MEMb:
+ case XED_IFORM_NEG_MEMv:
+ return V3_OP_NEG;
+
+ case XED_IFORM_NOT_MEMv:
+ case XED_IFORM_NOT_MEMb:
+ return V3_OP_NOT;
+
+ case XED_IFORM_XCHG_MEMv_GPRv:
+ case XED_IFORM_XCHG_MEMb_GPR8:
+ return V3_OP_XCHG;
+
+ case XED_IFORM_SETB_MEMb:
+ return V3_OP_SETB;
+
+ case XED_IFORM_SETBE_MEMb:
+ return V3_OP_SETBE;
+
+ case XED_IFORM_SETL_MEMb:
+ return V3_OP_SETL;
+
+ case XED_IFORM_SETLE_MEMb:
+ return V3_OP_SETLE;
+
+ case XED_IFORM_SETNB_MEMb:
+ return V3_OP_SETNB;
+
+ case XED_IFORM_SETNBE_MEMb:
+ return V3_OP_SETNBE;
+
+ case XED_IFORM_SETNL_MEMb:
+ return V3_OP_SETNL;
+
+ case XED_IFORM_SETNLE_MEMb:
+ return V3_OP_SETNLE;
+
+ case XED_IFORM_SETNO_MEMb:
+ return V3_OP_SETNO;
- case XED_IFORM_SETNP_MEMb:
- return V3_OP_SETNP;
+ case XED_IFORM_SETNP_MEMb:
+ return V3_OP_SETNP;
- case XED_IFORM_SETNS_MEMb:
- return V3_OP_SETNS;
+ case XED_IFORM_SETNS_MEMb:
+ return V3_OP_SETNS;
- case XED_IFORM_SETNZ_MEMb:
- return V3_OP_SETNZ;
+ case XED_IFORM_SETNZ_MEMb:
+ return V3_OP_SETNZ;
- case XED_IFORM_SETO_MEMb:
- return V3_OP_SETO;
+ case XED_IFORM_SETO_MEMb:
+ return V3_OP_SETO;
- case XED_IFORM_SETP_MEMb:
- return V3_OP_SETP;
+ case XED_IFORM_SETP_MEMb:
+ return V3_OP_SETP;
- case XED_IFORM_SETS_MEMb:
- return V3_OP_SETS;
+ case XED_IFORM_SETS_MEMb:
+ return V3_OP_SETS;
- case XED_IFORM_SETZ_MEMb:
- return V3_OP_SETZ;
+ case XED_IFORM_SETZ_MEMb:
+ return V3_OP_SETZ;
- case XED_IFORM_MOVSB:
- case XED_IFORM_MOVSW:
- case XED_IFORM_MOVSD:
- case XED_IFORM_MOVSQ:
- return V3_OP_MOVS;
+ case XED_IFORM_MOVSB:
+ case XED_IFORM_MOVSW:
+ case XED_IFORM_MOVSD:
+ case XED_IFORM_MOVSQ:
+ return V3_OP_MOVS;
- case XED_IFORM_STOSB:
- case XED_IFORM_STOSW:
- case XED_IFORM_STOSD:
- case XED_IFORM_STOSQ:
- return V3_OP_STOS;
+ case XED_IFORM_STOSB:
+ case XED_IFORM_STOSW:
+ case XED_IFORM_STOSD:
+ case XED_IFORM_STOSQ:
+ return V3_OP_STOS;
- default:
- return V3_INVALID_OP;
- }
+ default:
+ return V3_INVALID_OP;
+ }
}
