+++ /dev/null
-/*\r
- * This file is part of the Palacios Virtual Machine Monitor developed\r
- * by the V3VEE Project with funding from the United States National \r
- * Science Foundation and the Department of Energy. \r
- *\r
- * The V3VEE Project is a joint project between Northwestern University\r
- * and the University of New Mexico. You can find out more at \r
- * http://www.v3vee.org\r
- *\r
- * Copyright (c) 2008, Lei Xia <lxia@northwestern.edu> \r
- * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> \r
- * All rights reserved.\r
- *\r
- * Author: Lei Xia <lxia@northwestern.edu>\r
- *\r
- * This is free software. You are permitted to use,\r
- * redistribute, and modify it as specified in the file "V3VEE_LICENSE".\r
- */\r
-\r
-#ifndef __VNIC_H_\r
-#define __VNIC_H_\r
-\r
-#include <palacios/vm_dev.h>\r
-\r
-#define NIC_BASE_ADDR 0xc100\r
-\r
-#define NIC_IRQ 11 /* Interrupt channel */\r
-\r
-#define MAX_ETH_FRAME_SIZE 1514\r
-\r
-#define NE2K_PMEM_SIZE (32*1024)\r
-#define NE2K_PMEM_START (16*1024)\r
-#define NE2K_PMEM_END (NE2K_PMEM_SIZE+NE2K_PMEM_START)\r
-#define NE2K_MEM_SIZE NE2K_PMEM_END\r
-\r
-#define EN0_COMMAND (0x00) // The command register (for all pages) \r
-\r
-#define NIC_DATA_PORT (0x10) // The data read/write port\r
-\r
-#define NIC_RESET_PORT (0x1f) // The data read/write port\r
-\r
-// Page 0 registers\r
-#define EN0_CLDALO (0x01) // Low byte of current local dma addr RD \r
-#define EN0_STARTPG (0x01) // Starting page of ring bfr WR \r
-#define EN0_CLDAHI (0x02) // High byte of current local dma addr RD \r
-#define EN0_STOPPG (0x02) //Ending page +1 of ring bfr WR \r
-#define EN0_BOUNDARY (0x03) //Boundary page of ring bfr RD WR \r
-#define EN0_TSR (0x04) //Transmit status reg RD \r
-#define EN0_TPSR (0x04) //Transmit starting page WR \r
-#define EN0_NCR (0x05) //Number of collision reg RD \r
-#define EN0_TCNTLO (0x05) //Low byte of tx byte count WR \r
-#define EN0_FIFO (0x06) //FIFO RD \r
-#define EN0_TCNTHI (0x06) //High byte of tx byte count WR \r
-#define EN0_ISR (0x07) //Interrupt status reg RD WR \r
-#define EN0_CRDALO (0x08) //low byte of current remote dma address RD \r
-#define EN0_RSARLO (0x08) //Remote start address reg 0 \r
-#define EN0_CRDAHI (0x09) //high byte, current remote dma address RD \r
-#define EN0_RSARHI (0x09) //Remote start address reg 1 \r
-#define EN0_RCNTLO (0x0a) //Remote byte count reg WR \r
-#define EN0_RTL8029ID0 (0x0a) //Realtek ID byte #1 RD \r
-#define EN0_RCNTHI (0x0b) //Remote byte count reg WR \r
-#define EN0_RTL8029ID1 (0x0b) //Realtek ID byte #2 RD \r
-#define EN0_RSR (0x0c) //rx status reg RD \r
-#define EN0_RXCR (0x0c) //RX configuration reg WR \r
-#define EN0_TXCR (0x0d) //TX configuration reg WR \r
-#define EN0_COUNTER0 (0x0d) //Rcv alignment error counter RD \r
-#define EN0_DCFG (0x0e) //Data configuration reg WR \r
-#define EN0_COUNTER1 (0x0e) //Rcv CRC error counter RD \r
-#define EN0_IMR (0x0f) //Interrupt mask reg WR \r
-#define EN0_COUNTER2 (0x0f) //Rcv missed frame error counter RD \r
-\r
-//Page 1 registers\r
-#define EN1_PHYS (0x01)\r
-#define EN1_CURPAG (0x07)\r
-#define EN1_MULT (0x08)\r
-\r
-//Page 2 registers\r
-#define EN2_STARTPG (0x01) //Starting page of ring bfr RD \r
-#define EN2_STOPPG (0x02) //Ending page +1 of ring bfr RD \r
-#define EN2_LDMA0 (0x01) //Current Local DMA Address 0 WR \r
-#define EN2_LDMA1 (0x02) //Current Local DMA Address 1 WR \r
-#define EN2_RNPR (0x03) //Remote Next Packet Pointer RD WR \r
-#define EN2_TPSR (0x04) //Transmit Page Start Address RD \r
-#define EN2_LNRP (0x05) // Local Next Packet Pointer RD WR \r
-#define EN2_ACNT0 (0x06) // Address Counter Upper WR \r
-#define EN2_ACNT1 (0x07) // Address Counter Lower WR \r
-#define EN2_RCR (0x0c) // Receive Configuration Register RD \r
-#define EN2_TCR (0x0d) // Transmit Configuration Register RD \r
-#define EN2_DCR (0x0e) // Data Configuration Register RD \r
-#define EN2_IMR (0x0f) // Interrupt Mask Register RD \r
-\r
-//Page 3 registers\r
-#define EN3_CONFIG0 (0x03)\r
-#define EN3_CONFIG1 (0x04)\r
-#define EN3_CONFIG2 (0x05)\r
-#define EN3_CONFIG3 (0x06)\r
-\r
-//Bits in EN0_ISR - Interrupt status register\r
-#define ENISR_RX 0x01 //Receiver, no error \r
-#define ENISR_TX 0x02 //Transmitter, no error \r
-#define ENISR_RX_ERR 0x04 //Receiver, with error \r
-#define ENISR_TX_ERR 0x08 //Transmitter, with error \r
-#define ENISR_OVER 0x10 //Receiver overwrote the ring \r
-#define ENISR_COUNTERS 0x20 //Counters need emptying \r
-#define ENISR_RDC 0x40 //remote dma complete \r
-#define ENISR_RESET 0x80 //Reset completed \r
-#define ENISR_ALL 0x3f //Interrupts we will enable \r
-\r
-//Bits in received packet status byte and EN0_RSR\r
-#define ENRSR_RXOK 0x01 //Received a good packet \r
-#define ENRSR_CRC 0x02 //CRC error \r
-#define ENRSR_FAE 0x04 //frame alignment error \r
-#define ENRSR_FO 0x08 //FIFO overrun \r
-#define ENRSR_MPA 0x10 //missed pkt \r
-#define ENRSR_PHY 0x20 //physical/multicast address \r
-#define ENRSR_DIS 0x40 //receiver disable. set in monitor mode \r
-#define ENRSR_DEF 0x80 //deferring \r
-\r
-//Transmitted packet status, EN0_TSR\r
-#define ENTSR_PTX 0x01 //Packet transmitted without error \r
-#define ENTSR_ND 0x02 //The transmit wasn't deferred. \r
-#define ENTSR_COL 0x04 //The transmit collided at least once. \r
-#define ENTSR_ABT 0x08 //The transmit collided 16 times, and was deferred. \r
-#define ENTSR_CRS 0x10 //The carrier sense was lost. \r
-#define ENTSR_FU 0x20 //A "FIFO underrun" occurred during transmit. \r
-#define ENTSR_CDH 0x40 //The collision detect "heartbeat" signal was lost. \r
-#define ENTSR_OWC 0x80 //There was an out-of-window collision. \r
-\r
-//command, Register accessed at EN0_COMMAND\r
-#define NE2K_STOP 0x01\r
-#define NE2K_START 0x02\r
-#define NE2K_TRANSMIT 0x04\r
-#define NE2K_DMAREAD 0x08 /* Remote read */\r
-#define NE2K_DMAWRITE 0x10 /* Remote write */\r
-#define NE2K_DMASEND 0x18\r
-#define NE2K_ABORTDMA 0x20 /* Abort/Complete DMA */\r
-#define NE2K_PAGE0 0x00 /* Select page chip registers */\r
-#define NE2K_PAGE1 0x40 /* using the two high-order bits */\r
-#define NE2K_PAGE2 0x80\r
-#define NE2K_PAGE 0xc0\r
-\r
-struct vm_device *v3_create_vnic();\r
-\r
-#endif\r
