changed the CR3 conversion macros to be physical/virtual address specific

diff --git a/palacios/include/palacios/vmm_paging.h b/palacios/include/palacios/vmm_paging.h
index d59b7f9..2dcaada 100644 (file)
--- a/palacios/include/palacios/vmm_paging.h
+++ b/palacios/include/palacios/vmm_paging.h
@@ -162,10 +162,13 @@ the host state in the vmcs before entering the guest.
 
 
 
+#define CR3_TO_PDE32_PA(cr3) ((addr_t)(((ulong_t)cr3) & 0xfffff000))
+#define CR3_TO_PDPTRE_PA(cr3) ((addr_t)(((ulong_t)cr3) & 0xffffffe0))
+#define CR3_TO_PML4E64_PA(cr3)  ((addr_t)(((ullong_t)cr3) & 0x000ffffffffff000LL))
 
-#define CR3_TO_PDE32(cr3) ((pde32_t *)V3_VAddr((void *)(addr_t)(((ulong_t)cr3) & 0xfffff000)))
-#define CR3_TO_PDPTRE(cr3) (V3_VAddr((void *)(((ulong_t)cr3) & 0xffffffe0)))
-#define CR3_TO_PML4E64(cr3)  ((pml4e64_t *)V3_VAddr((void *)(addr_t)(((ullong_t)cr3) & 0x000ffffffffff000LL)))
+#define CR3_TO_PDE32_VA(cr3) ((pde32_t *)V3_VAddr((void *)(addr_t)(((ulong_t)cr3) & 0xfffff000)))
+#define CR3_TO_PDPTRE_VA(cr3) (V3_VAddr((void *)(((ulong_t)cr3) & 0xffffffe0)))
+#define CR3_TO_PML4E64_VA(cr3)  ((pml4e64_t *)V3_VAddr((void *)(addr_t)(((ullong_t)cr3) & 0x000ffffffffff000LL)))
 
 
 

diff --git a/palacios/src/palacios/vm_guest_mem.c b/palacios/src/palacios/vm_guest_mem.c
index 920c8bb..2cc4385 100644 (file)
--- a/palacios/src/palacios/vm_guest_mem.c
+++ b/palacios/src/palacios/vm_guest_mem.c
@@ -160,9 +160,9 @@ int guest_va_to_guest_pa(struct guest_info * guest_info, addr_t guest_va, addr_t
       addr_t guest_pde = 0;
       
       if (guest_info->shdw_pg_mode == SHADOW_PAGING) {
-       guest_pde = (addr_t)V3_PAddr((void *)(addr_t)CR3_TO_PDE32((void *)(addr_t)(guest_info->shdw_pg_state.guest_cr3)));
+       guest_pde = CR3_TO_PDE32_PA((void *)(addr_t)(guest_info->shdw_pg_state.guest_cr3));
       } else if (guest_info->shdw_pg_mode == NESTED_PAGING) {
-       guest_pde = (addr_t)V3_PAddr((void *)(addr_t)CR3_TO_PDE32((void *)(addr_t)(guest_info->ctrl_regs.cr3)));
+       guest_pde = CR3_TO_PDE32_PA((void *)(addr_t)(guest_info->ctrl_regs.cr3));
       }
       
       if (guest_pa_to_host_va(guest_info, guest_pde, (addr_t *)&pde) == -1) {

diff --git a/palacios/src/palacios/vmm_paging.c b/palacios/src/palacios/vmm_paging.c
index 22e0311..af0488f 100644 (file)
--- a/palacios/src/palacios/vmm_paging.c
+++ b/palacios/src/palacios/vmm_paging.c
@@ -880,7 +880,7 @@ void PrintPageTree(v3_vm_cpu_mode_t cpu_mode, addr_t virtual_addr, addr_t cr3) {
   case LONG:
   case LONG_32_COMPAT:
   case LONG_16_COMPAT:
-    PrintPageTree_64(virtual_addr, CR3_TO_PML4E64(cr3));
+    PrintPageTree_64(virtual_addr, CR3_TO_PML4E64_VA(cr3));
     break;
   default:
     PrintError("Unsupported CPU MODE %d\n", cpu_mode);

diff --git a/palacios/src/palacios/vmm_shadow_paging.c b/palacios/src/palacios/vmm_shadow_paging.c
index 99e1431..529ca17 100644 (file)
--- a/palacios/src/palacios/vmm_shadow_paging.c
+++ b/palacios/src/palacios/vmm_shadow_paging.c
@@ -153,7 +153,7 @@ int cache_page_tables32(struct guest_info * info, addr_t pde) {
 int v3_cache_page_tables(struct guest_info * info, addr_t cr3) {
   switch(v3_get_cpu_mode(info)) {
   case PROTECTED:
-    return v3_cache_page_tables32(info, (addr_t)V3_PAddr((void *)CR3_TO_PDE32(cr3)));
+    return v3_cache_page_tables32(info, CR3_TO_PDE32_PA(cr3));
   default:
     return -1;
   }
@@ -210,7 +210,7 @@ int v3_cache_page_tables32(struct guest_info * info, addr_t pde) {
 
 
 int v3_replace_shdw_page32(struct guest_info * info, addr_t location, pte32_t * new_page, pte32_t * old_page) {
-  pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->ctrl_regs.cr3);
+  pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
   pde32_t * shadow_pde =  (pde32_t *)&(shadow_pd[PDE32_INDEX(location)]);
 
   if (shadow_pde->large_page == 0) {
@@ -241,7 +241,7 @@ static int activate_shadow_pt_32(struct guest_info * info) {
     int cached = 0;
 
     // Check if shadow page tables are in the cache
-    cached = v3_cache_page_tables32(info, (addr_t)V3_PAddr((void *)(addr_t)CR3_TO_PDE32((void *)*(addr_t *)guest_cr3)));
+    cached = v3_cache_page_tables32(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
     
     if (cached == -1) {
       PrintError("CR3 Cache failed\n");
@@ -250,13 +250,12 @@ static int activate_shadow_pt_32(struct guest_info * info) {
       addr_t shadow_pt;
       
       PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
-      delete_page_tables_32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+      delete_page_tables_32(CR3_TO_PDE32_VA(*(uint_t*)shadow_cr3));
       
       shadow_pt = v3_create_new_shadow_pt();
       
       shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PD32_BASE_ADDR(shadow_pt));
       PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
-      //PrintDebugPageTables( (pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3) );
     } else {
       PrintDebug("Reusing cached shadow Page table\n");
     }
@@ -469,8 +468,8 @@ static int handle_large_pagefault32(struct guest_info * info,
 
 static int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
   pde32_t * guest_pd = NULL;
-  pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->ctrl_regs.cr3);
-  addr_t guest_cr3 = (addr_t) V3_PAddr(CR3_TO_PDE32(info->shdw_pg_state.guest_cr3) );
+  pde32_t * shadow_pd = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+  addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
   pt_access_status_t guest_pde_access;
   pt_access_status_t shadow_pde_access;
   pde32_t * guest_pde = NULL;
@@ -787,7 +786,7 @@ int v3_handle_shadow_invlpg(struct guest_info * info)
   
   addr_t first_operand;
   addr_t second_operand;
-  addr_t guest_cr3 = (addr_t)V3_PAddr( (void*)(addr_t) CR3_TO_PDE32(info->shdw_pg_state.guest_cr3) );
+  addr_t guest_cr3 =  CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
   
   pde32_t * guest_pd = NULL;
   
@@ -805,7 +804,7 @@ int v3_handle_shadow_invlpg(struct guest_info * info)
     return -1;
   }
   
-  pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->ctrl_regs.cr3);
+  pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
   pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
   pde32_t * guest_pde;