Semi-functional SMP (boots Kitten guest with two cores)

diff --git a/palacios/include/devices/icc_bus.h b/palacios/include/devices/icc_bus.h
index 6b1fabb..da5f39f 100644 (file)
--- a/palacios/include/devices/icc_bus.h
+++ b/palacios/include/devices/icc_bus.h
@@ -39,8 +39,9 @@ int v3_icc_register_ioapic(struct v3_vm_info *vm, struct vm_device * icc_bus, ui
  * @param apic_src - The source APIC id.
  * @param apic_num - The remote APIC number.
  * @param icr      - A copy of the APIC's ICR.  (LAPIC-style ICR, clone from redir table for ioapics)
+ & @param extirq   - irq for external interrupts (e.g., from 8259)
  */
-int v3_icc_send_ipi(struct vm_device * icc_bus, uint32_t apic_src, uint64_t icr);
+int v3_icc_send_ipi(struct vm_device * icc_bus, uint32_t apic_src, uint64_t icr, uint32_t ext_irq);
 
 
 #if 0

diff --git a/palacios/src/devices/8254.c b/palacios/src/devices/8254.c
index 291101e..a7c7398 100644 (file)
--- a/palacios/src/devices/8254.c
+++ b/palacios/src/devices/8254.c
@@ -669,7 +669,7 @@ static int pit_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
 
 #ifdef CONFIG_DEBUG_PIT
     PrintDebug("8254 PIT: OSC_HZ=%d, reload_val=", OSC_HZ);
-    PrintTraceLL(reload_val);
+    //PrintTrace(reload_val);
     PrintDebug("\n");
 #endif
 
@@ -690,7 +690,7 @@ static int pit_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
 
 #ifdef CONFIG_DEBUG_PIT
     PrintDebug("8254 PIT: CPU MHZ=%d -- pit count=", cpu_khz / 1000);
-    PrintTraceLL(pit_state->pit_counter);
+    //PrintTraceLL(pit_state->pit_counter);
     PrintDebug("\n");
 #endif
 

diff --git a/palacios/src/devices/8259a.c b/palacios/src/devices/8259a.c
index fb0ab43..6931900 100644 (file)
--- a/palacios/src/devices/8259a.c
+++ b/palacios/src/devices/8259a.c
@@ -277,13 +277,16 @@ static int pic_get_intr_number(struct guest_info * info, void * private_data) {
        }
     }
 
+#if 1
     if ((i == 15) || (i == 6)) { 
        DumpPICState(state);
     }
+#endif
   
     if (i == 16) { 
        return -1;
     } else {
+       PrintDebug("8259 PIC: get num is returning %d\n",irq);
        return irq;
     }
 }

diff --git a/palacios/src/devices/apic.c b/palacios/src/devices/apic.c
index b35258d..db68669 100644 (file)
--- a/palacios/src/devices/apic.c
+++ b/palacios/src/devices/apic.c
@@ -120,7 +120,7 @@ typedef enum { APIC_TMR_INT, APIC_THERM_INT, APIC_PERF_INT,
 
 struct apic_msr {
     union {
-       uint64_t val;
+       uint64_t value;
        struct {
            uchar_t rsvd;
            uint_t bootstrap_cpu : 1;
@@ -139,7 +139,7 @@ struct apic_state {
     addr_t base_addr;
 
     /* MSRs */
-    v3_msr_t base_addr_msr;
+    struct apic_msr base_addr_msr;
 
 
     /* memory map registers */
@@ -193,11 +193,21 @@ static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, u
 
 static void init_apic_state(struct apic_state * apic, uint32_t id, struct vm_device * icc) {
     apic->base_addr = DEFAULT_BASE_ADDR;
-    apic->base_addr_msr.value = 0x0000000000000900LL;
+    if (id==0) { 
+       // boot processor, enabled
+       apic->base_addr_msr.value = 0x0000000000000900LL;
+    } else {
+       // ap processor, enabled
+       apic->base_addr_msr.value = 0x0000000000000800LL;
+    }
+
+    // same base address regardless of ap or main
     apic->base_addr_msr.value |= ((uint64_t)DEFAULT_BASE_ADDR); 
 
-    PrintDebug("apic %u: Sizeof Interrupt Request Register %d, should be 32\n", apic->lapic_id.val,
-              (uint_t)sizeof(apic->int_req_reg));
+    PrintDebug("apic %u: (init_apic_state): msr=0x%llx\n",id, apic->base_addr_msr.value);
+
+    PrintDebug("apic %u: (init_apic_state): Sizeof Interrupt Request Register %d, should be 32\n",
+              id, (uint_t)sizeof(apic->int_req_reg));
 
     memset(apic->int_req_reg, 0, sizeof(apic->int_req_reg));
     memset(apic->int_svc_reg, 0, sizeof(apic->int_svc_reg));
@@ -247,6 +257,7 @@ static int read_apic_msr(struct guest_info * core, uint_t msr, v3_msr_t * dst, v
     struct apic_state * apics = (struct apic_state *)(dev->private_data);
     struct apic_state * apic = &(apics[core->cpu_id]);
 
+    PrintDebug("apic %u: core %u: MSR read\n",apic->lapic_id.val,core->cpu_id);
     v3_lock(apic->lock);
     dst->value = apic->base_addr;
     v3_unlock(apic->lock);
@@ -261,9 +272,11 @@ static int write_apic_msr(struct guest_info * core, uint_t msr, v3_msr_t src, vo
     struct v3_mem_region * old_reg = v3_get_mem_region(dev->vm, core->cpu_id, apic->base_addr);
 
 
+    PrintDebug("apic %u: core %u: MSR write\n",apic->lapic_id.val,core->cpu_id);
+
     if (old_reg == NULL) {
        // uh oh...
-       PrintError("apic %u: APIC Base address region does not exit...\n",apic->lapic_id.val);
+       PrintError("apic %u: core %u: APIC Base address region does not exit...\n",apic->lapic_id.val,core->cpu_id);
        return -1;
     }
     
@@ -274,7 +287,7 @@ static int write_apic_msr(struct guest_info * core, uint_t msr, v3_msr_t src, vo
     apic->base_addr = src.value;
 
     if (v3_hook_full_mem(dev->vm, core->cpu_id, apic->base_addr, apic->base_addr + PAGE_SIZE_4KB, apic_read, apic_write, dev) == -1) {
-       PrintError("apic %u: Could not hook new APIC Base address\n",apic->lapic_id.val);
+       PrintError("apic %u: core %u: Could not hook new APIC Base address\n",apic->lapic_id.val,core->cpu_id);
        v3_unlock(apic->lock);
        return -1;
     }
@@ -296,14 +309,14 @@ static int activate_apic_irq(struct apic_state * apic, uint32_t irq_num) {
 #if 1
 
     if (irq_num <= 15) {
-       PrintError("apic %u: Attempting to raise an invalid interrupt: %d\n", apic->lapic_id.val,irq_num);
+       PrintError("apic %u: core ?: Attempting to raise an invalid interrupt: %d\n", apic->lapic_id.val,irq_num);
        return -1;
     }
 
 #endif
 
 
-    PrintDebug("apic %u: Raising APIC IRQ %d\n", apic->lapic_id.val,irq_num);
+    PrintDebug("apic %u: core ?: Raising APIC IRQ %d\n", apic->lapic_id.val,irq_num);
 
     if (*req_location & flag) {
        //V3_Print("Interrupts coallescing\n");
@@ -312,7 +325,7 @@ static int activate_apic_irq(struct apic_state * apic, uint32_t irq_num) {
     if (*en_location & flag) {
        *req_location |= flag;
     } else {
-       PrintDebug("apic %u: Interrupt  not enabled... %.2x\n", apic->lapic_id.val, *en_location);
+       PrintDebug("apic %u: core ?: Interrupt  not enabled... %.2x\n", apic->lapic_id.val, *en_location);
        return 0;
     }
 
@@ -375,7 +388,7 @@ static int apic_do_eoi(struct apic_state * apic) {
        uchar_t flag = 0x1 << minor_offset;
        uchar_t * svc_location = apic->int_svc_reg + major_offset;
        
-       PrintDebug("Received APIC EOI for IRQ %d\n", isr_irq);
+       PrintDebug("apic %u: core ?: Received APIC EOI for IRQ %d\n", apic->lapic_id.val,isr_irq);
        
        *svc_location &= ~flag;
 
@@ -383,7 +396,7 @@ static int apic_do_eoi(struct apic_state * apic) {
        
        if ((isr_irq == 238) || 
            (isr_irq == 239)) {
-           PrintError("Acking IRQ %d\n", isr_irq);
+           PrintError("apic %u: core ?: Acking IRQ %d\n", apic->lapic_id.val,isr_irq);
        }
        
        if (isr_irq == 238) {
@@ -391,7 +404,7 @@ static int apic_do_eoi(struct apic_state * apic) {
        }
 #endif
     } else {
-       //PrintError("Spurious EOI...\n");
+       //PrintError("apic %u: core ?: Spurious EOI...\n",apic->lapic_id.val);
     }
        
     return 0;
@@ -436,13 +449,13 @@ static int activate_internal_irq(struct apic_state * apic, apic_irq_type_t int_t
            masked = apic->err_vec_tbl.mask;
            break;
        default:
-           PrintError("apic %u: Invalid APIC interrupt type\n",apic->lapic_id.val);
+           PrintError("apic %u: core ?: Invalid APIC interrupt type\n",apic->lapic_id.val);
            return -1;
     }
 
     // interrupt is masked, don't send
     if (masked == 1) {
-       PrintDebug("apic %u: Inerrupt is masked\n",apic->lapic_id.val);
+       PrintDebug("apic %u: core ?: Inerrupt is masked\n",apic->lapic_id.val);
        return 0;
     }
 
@@ -450,25 +463,24 @@ static int activate_internal_irq(struct apic_state * apic, apic_irq_type_t int_t
        //PrintDebug("Activating internal APIC IRQ %d\n", vec_num);
        return activate_apic_irq(apic, vec_num);
     } else {
-       PrintError("apic %u: Unhandled Delivery Mode\n",apic->lapic_id.val);
+       PrintError("apic %u: core ?: Unhandled Delivery Mode\n",apic->lapic_id.val);
        return -1;
     }
 }
 
 
 static int apic_read(struct guest_info * core, addr_t guest_addr, void * dst, uint_t length, void * priv_data) {
-    struct apic_state * apics = (struct apic_state *)(priv_data);
-    struct apic_state * apic = &(apics[core->cpu_id]);
+    struct apic_state * apic = (struct apic_state *)(priv_data);
     addr_t reg_addr  = guest_addr - apic->base_addr;
     struct apic_msr * msr = (struct apic_msr *)&(apic->base_addr_msr.value);
     uint32_t val = 0;
 
 
-    PrintDebug("apic %u: Read apic address space (%p)\n",apic->lapic_id.val, 
-              (void *)guest_addr);
+    PrintDebug("apic %u: core %u: at %p: Read apic address space (%p)\n",apic->lapic_id.val,core->cpu_id, apic, (void *)guest_addr);
 
     if (msr->apic_enable == 0) {
-       PrintError("apic %u: Write to APIC address space with disabled APIC\n",apic->lapic_id.val);
+       PrintError("apic %u: core %u: Read from APIC address space with disabled APIC, apic msr=0x%llx\n",apic->lapic_id.val,core->cpu_id,apic->base_addr_msr.value);
+
        return -1;
     }
 
@@ -680,7 +692,7 @@ static int apic_read(struct guest_info * core, addr_t guest_addr, void * dst, ui
        case SEOI_OFFSET:
 
        default:
-           PrintError("apic %u: Read from Unhandled APIC Register: %x (getting zero)\n", apic->lapic_id.val, (uint32_t)reg_addr);
+           PrintError("apic %u: core %u: Read from Unhandled APIC Register: %x (getting zero)\n", apic->lapic_id.val,core->cpu_id, (uint32_t)reg_addr);
            //      return -1;
            val=0;
     }
@@ -703,11 +715,11 @@ static int apic_read(struct guest_info * core, addr_t guest_addr, void * dst, ui
        *val_ptr = val;
 
     } else {
-       PrintError("apic %u: Invalid apic read length (%d)\n", apic->lapic_id.val, length);
+       PrintError("apic %u: core %u: Invalid apic read length (%d)\n", apic->lapic_id.val,core->cpu_id, length);
        return -1;
     }
 
-    PrintDebug("apic %u: Read finished (val=%x)\n", apic->lapic_id.val, *(uint32_t *)dst);
+    PrintDebug("apic %u: core %u: Read finished (val=%x)\n", apic->lapic_id.val,core->cpu_id, *(uint32_t *)dst);
 
     return length;
 }
@@ -717,24 +729,23 @@ static int apic_read(struct guest_info * core, addr_t guest_addr, void * dst, ui
  *
  */
 static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, uint_t length, void * priv_data) {
-    struct apic_state * apics = (struct apic_state *)(priv_data);
-    struct apic_state * apic = &(apics[core->cpu_id]);
+    struct apic_state * apic = (struct apic_state *)(priv_data);
     addr_t reg_addr  = guest_addr - apic->base_addr;
     struct apic_msr * msr = (struct apic_msr *)&(apic->base_addr_msr.value);
     uint32_t op_val = *(uint32_t *)src;
 
-    PrintDebug("apic %u: Write to address space (%p) (val=%x)\n", 
-              apic->lapic_id.val,
+    PrintDebug("apic %u: core %u: at %p and priv_data is at %p: Write to address space (%p) (val=%x)\n", 
+              apic->lapic_id.val, core->cpu_id, apic,priv_data,
               (void *)guest_addr, *(uint32_t *)src);
 
     if (msr->apic_enable == 0) {
-       PrintError("apic %u: Write to APIC address space with disabled APIC\n",apic->lapic_id.val);
+       PrintError("apic %u: core %u: Write to APIC address space with disabled APIC, apic msr=0x%llx\n",apic->lapic_id.val,core->cpu_id,apic->base_addr_msr.value);
        return -1;
     }
 
 
     if (length != 4) {
-       PrintError("apic %u: Invalid apic write length (%d)\n", apic->lapic_id.val, length);
+       PrintError("apic %u: core %u: Invalid apic write length (%d)\n", apic->lapic_id.val, length,core->cpu_id);
        return -1;
     }
 
@@ -769,15 +780,16 @@ static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, u
        case PPR_OFFSET:
        case EXT_APIC_FEATURE_OFFSET:
 #if 1
-           PrintError("apic %u: Attempting to write to read only register %p (ignored)\n", apic->lapic_id.val, (void *)reg_addr);
+           PrintError("apic %u: core %u: Attempting to write to read only register %p (ignored)\n", apic->lapic_id.val,core->cpu_id, (void *)reg_addr);
 #else   
-           PrintError("apic %u: Attempting to write to read only register %p (error)\n", apic->lapic_id.val, (void *)reg_addr);
+           PrintError("apic %u: core %u: Attempting to write to read only register %p (error)\n", apic->lapic_id.val,core->cpu_id, (void *)reg_addr);
            return -1;
 #endif
            break;
 
            // Data registers
        case APIC_ID_OFFSET:
+           PrintDebug("apic %u: core %u: my id is being changed to %u\n",apic->lapic_id.val,core->cpu_id,op_val);
            apic->lapic_id.val = op_val;
            break;
        case TPR_OFFSET:
@@ -874,9 +886,9 @@ static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, u
        case INT_CMD_LO_OFFSET:
            apic->int_cmd.lo = op_val;
            // ICC???
-           PrintDebug("apic %u: sending cmd 0x%llx to apic %u\n",apic->lapic_id.val,
+           PrintDebug("apic %u: core %u: sending cmd 0x%llx to apic %u\n",apic->lapic_id.val,core->cpu_id,
                       apic->int_cmd.val, apic->int_cmd.dst);
-           v3_icc_send_ipi(apic->icc_bus, apic->lapic_id.val, apic->int_cmd.val);
+           v3_icc_send_ipi(apic->icc_bus, apic->lapic_id.val, apic->int_cmd.val,0);
            break;
        case INT_CMD_HI_OFFSET:
            apic->int_cmd.hi = op_val;
@@ -886,11 +898,11 @@ static int apic_write(struct guest_info * core, addr_t guest_addr, void * src, u
        case EXT_APIC_CMD_OFFSET:
        case SEOI_OFFSET:
        default:
-           PrintError("apic %u: Write to Unhandled APIC Register: %x (ignored)\n", apic->lapic_id.val, (uint32_t)reg_addr);
+           PrintError("apic %u: core %u: Write to Unhandled APIC Register: %x (ignored)\n", apic->lapic_id.val,core->cpu_id, (uint32_t)reg_addr);
            //      return -1;
     }
 
-    PrintDebug("apic %u: Write finished\n",apic->lapic_id.val);
+    PrintDebug("apic %u: core %u: Write finished\n",apic->lapic_id.val,core->cpu_id);
 
     return length;
 }
@@ -957,8 +969,7 @@ static int apic_begin_irq(struct guest_info * info, void * private_data, int irq
 
 /* Timer Functions */
 static void apic_update_time(struct guest_info * info, ullong_t cpu_cycles, ullong_t cpu_freq, void * priv_data) {
-    struct apic_state * apics = (struct apic_state *)(priv_data);
-    struct apic_state * apic = &(apics[info->cpu_id]);
+    struct apic_state * apic = (struct apic_state *)(priv_data);
     // The 32 bit GCC runtime is a pile of shit
 #ifdef __V3_64BIT__
     uint64_t tmr_ticks = 0;
@@ -976,7 +987,7 @@ static void apic_update_time(struct guest_info * info, ullong_t cpu_cycles, ullo
     if ((apic->tmr_init_cnt == 0) || 
        ( (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_ONESHOT) &&
          (apic->tmr_cur_cnt == 0))) {
-       //PrintDebug("apic %u: APIC timer not yet initialized\n",apic->lapic_id.val);
+       //PrintDebug("apic %u: core %u: APIC timer not yet initialized\n",apic->lapic_id.val,info->cpu_id);
        return;
     }
 
@@ -1007,7 +1018,7 @@ static void apic_update_time(struct guest_info * info, ullong_t cpu_cycles, ullo
            shift_num = 7;
            break;
        default:
-           PrintError("apic %u: Invalid Timer Divider configuration\n",apic->lapic_id.val);
+           PrintError("apic %u: core %u: Invalid Timer Divider configuration\n",apic->lapic_id.val,info->cpu_id);
            return;
     }
 
@@ -1021,15 +1032,15 @@ static void apic_update_time(struct guest_info * info, ullong_t cpu_cycles, ullo
        apic->tmr_cur_cnt = 0;
 
        // raise irq
-       PrintDebug("apic %u: Raising APIC Timer interrupt (periodic=%d) (icnt=%d) (div=%d)\n", apic->lapic_id.val,
+       PrintDebug("apic %u: core %u: Raising APIC Timer interrupt (periodic=%d) (icnt=%d) (div=%d)\n", apic->lapic_id.val,info->cpu_id,
                   apic->tmr_vec_tbl.tmr_mode, apic->tmr_init_cnt, shift_num);
 
        if (apic_intr_pending(info, priv_data)) {
-           PrintDebug("apic %u: Overriding pending IRQ %d\n", apic->lapic_id.val, apic_get_intr_number(info, priv_data));
+           PrintDebug("apic %u: core %u: Overriding pending IRQ %d\n", apic->lapic_id.val,info->cpu_id, apic_get_intr_number(info, priv_data));
        }
 
        if (activate_internal_irq(apic, APIC_TMR_INT) == -1) {
-           PrintError("apic %u: Could not raise Timer interrupt\n",apic->lapic_id.val);
+           PrintError("apic %u: core %u: Could not raise Timer interrupt\n",apic->lapic_id.val,info->cpu_id);
        }
     
        if (apic->tmr_vec_tbl.tmr_mode == APIC_TMR_PERIODIC) {
@@ -1121,9 +1132,15 @@ static int apic_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
 
        v3_icc_register_apic(core, icc, i, &icc_ops, &(apic[i]));
 
-    }
+       PrintDebug("apic %u: (setup device): done, my id is %u\n",i,apic[i].lapic_id.val);
 
+    }
 
+    for (i=0;i<vm->num_cores;i++) {
+       PrintDebug("apic: sanity check: apic %u (at %p) has id %u and msr value %llx\n",
+                  i, &(apic[i]), apic[i].lapic_id.val, apic[i].base_addr_msr.value);
+    }
+    PrintDebug("apic: priv_data is at %p\n", apic);
 
     v3_hook_msr(vm, BASE_ADDR_MSR, read_apic_msr, write_apic_msr, dev);
 

diff --git a/palacios/src/devices/icc_bus.c b/palacios/src/devices/icc_bus.c
index d0c38f8..c02e7f5 100644 (file)
--- a/palacios/src/devices/icc_bus.c
+++ b/palacios/src/devices/icc_bus.c
@@ -157,10 +157,6 @@ static int deliver(uint32_t src_apic, struct apic_data *dest_apic, struct int_cm
 
        case 6: { //SIPI
            struct guest_info *core = dest_apic->core;
-           uint64_t rip = icr->vec << 12;  // vector encodes target address;
-
-           PrintDebug("icc_bus: SIPI delivery (0x%x -> rip=0x%p) to core %u\n",
-                      icr->vec, (void*)rip, core->cpu_id);
 
            // Sanity check
            if (core->cpu_mode!=SIPI) { 
@@ -170,11 +166,21 @@ static int deliver(uint32_t src_apic, struct apic_data *dest_apic, struct int_cm
 
            // Write the RIP, CS, and descriptor
            // assume the rest is already good to go
-           core->rip=rip & 0xffff;
-           core->segments.cs.selector = (rip >> 4) & 0xf000;
+           //
+           // vector VV -> rip at 0
+           //              CS = VV00
+           //  This means we start executing at linear address VV000
+           //
+           // So the selector needs to be VV00
+           // and the base needs to be VV000
+           //
+           core->rip=0;
+           core->segments.cs.selector = icr->vec<<8;
            core->segments.cs.limit= 0xffff;
-           core->segments.cs.base = rip & 0xf0000;
+           core->segments.cs.base = icr->vec<<12;
 
+           PrintDebug("icc_bus: SIPI delivery (0x%x -> 0x%x:0x0) to core %u\n",
+                      icr->vec, core->segments.cs.selector, core->cpu_id);
            // Maybe need to adjust the APIC?
            
            // We transition the target core to SIPI state

diff --git a/palacios/src/devices/ide.c b/palacios/src/devices/ide.c
index 5f4bd49..67a8928 100644 (file)
--- a/palacios/src/devices/ide.c
+++ b/palacios/src/devices/ide.c
@@ -365,7 +365,7 @@ static void print_prd_table(struct vm_device * dev, struct ide_channel * channel
        uint32_t prd_entry_addr = channel->dma_prd_addr + (sizeof(struct ide_dma_prd) * index);
        int ret;
 
-       ret = read_guest_pa_memory(dev->vm, prd_entry_addr, sizeof(struct ide_dma_prd), (void *)&prd_entry);
+       ret = v3_read_gpa_memory(&(dev->vm->cores[0]), prd_entry_addr, sizeof(struct ide_dma_prd), (void *)&prd_entry);
        
        if (ret != sizeof(struct ide_dma_prd)) {
            PrintError("Could not read PRD\n");
@@ -1400,7 +1400,11 @@ static void init_channel(struct ide_channel * channel) {
 
 static int pci_config_update(uint_t reg_num, void * src, uint_t length, void * private_data) {
     PrintDebug("PCI Config Update\n");
-    PrintDebug("\t\tInterupt register (Dev=%s), irq=%d\n", pci_dev->name, pci_dev->config_header.intr_line);
+    /*    struct vm_device * dev = (struct vm_device *)private_data;
+    struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
+
+    PrintDebug("\t\tInterupt register (Dev=%s), irq=%d\n", ide->ide_pci->name, ide->ide_pci->config_header.intr_line);
+    */
 
     return 0;
 }

diff --git a/palacios/src/devices/io_apic.c b/palacios/src/devices/io_apic.c
index 263f940..ad238f3 100644 (file)
--- a/palacios/src/devices/io_apic.c
+++ b/palacios/src/devices/io_apic.c
@@ -155,6 +155,10 @@ static void init_ioapic_state(struct io_apic_state * ioapic, uint32_t id) {
        // Mask all interrupts until they are enabled....
        ioapic->redir_tbl[i].mask = 1;
     }
+    
+    // special case redir_tbl[0] for pin 0 as ExtInt for Virtual Wire Mode
+    ioapic->redir_tbl[0].del_mode=EXTINT;
+    ioapic->redir_tbl[0].mask=0;
 }
 
 
@@ -198,6 +202,8 @@ static int ioapic_read(struct guest_info * core, addr_t guest_addr, void * dst,
        }
     }
 
+    PrintDebug("ioapic %u: IOAPIC Read at %p gave value 0x%x\n", ioapic->ioapic_id.val, (void *)guest_addr, *op_val);
+
     return length;
 }
 
@@ -267,8 +273,10 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
     irq_entry = &(ioapic->redir_tbl[irq]);
 
     if (irq_entry->mask == 0) {
+
        PrintDebug("ioapic %u: IOAPIC Signalling APIC to raise INTR %d\n", ioapic->ioapic_id.val, irq_entry->vec);
 
+
        // the format of the redirection table entry is just slightly 
        // different than that of the lapic's cmd register, which is the other
        // way an IPI is initiated.   So we will translate
@@ -283,7 +291,7 @@ static int ioapic_raise_irq(struct v3_vm_info * vm, void * private_data, int irq
        icr.dst_shorthand=0; // no shorthand
        icr.rsvd2=0;
 
-       v3_icc_send_ipi(ioapic->icc_bus, ioapic->ioapic_id.val,icr.val);
+       v3_icc_send_ipi(ioapic->icc_bus, ioapic->ioapic_id.val,icr.val, irq);
     }
 
     return 0;

diff --git a/palacios/src/palacios/mmu/vmm_shdw_pg_tlb_64.h b/palacios/src/palacios/mmu/vmm_shdw_pg_tlb_64.h
index af6e86d..34102ac 100644 (file)
--- a/palacios/src/palacios/mmu/vmm_shdw_pg_tlb_64.h
+++ b/palacios/src/palacios/mmu/vmm_shdw_pg_tlb_64.h
@@ -491,7 +491,6 @@ static int handle_pte_shadow_pagefault_64(struct guest_info * info, addr_t fault
 
        } else {
            // Pass to unhandled call back
-
            if (shdw_reg->unhandled(info, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
                PrintError("Special Page fault handler returned error for address: %p\n",  (void *)fault_addr);
                return -1;

diff --git a/palacios/src/palacios/svm.c b/palacios/src/palacios/svm.c
index 35eef9c..4e362b5 100644 (file)
--- a/palacios/src/palacios/svm.c
+++ b/palacios/src/palacios/svm.c
@@ -113,7 +113,7 @@ static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) {
     
 
     ctrl_area->instrs.NMI = 1;
-    ctrl_area->instrs.SMI = 1;
+    ctrl_area->instrs.SMI = 0; // allow SMIs to run in guest
     ctrl_area->instrs.INIT = 1;
     ctrl_area->instrs.PAUSE = 1;
     ctrl_area->instrs.shutdown_evts = 1;
@@ -476,6 +476,14 @@ int v3_svm_enter(struct guest_info * info) {
     //    guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
 
     //V3_Print("Calling v3_svm_launch\n");
+
+
+#if 0
+    if (info->cpu_id==1) { 
+       V3_Print("Entering Core 1\n");
+       v3_print_guest_state(info);
+    }
+#endif
        
     v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[info->cpu_id]);
     
@@ -540,12 +548,32 @@ int v3_svm_enter(struct guest_info * info) {
     v3_yield_cond(info);
 
 
+
+#if 0
+    if (info->cpu_id==1) { 
+       V3_Print("Exited Core 1, before handler\n");
+       v3_print_guest_state(info);
+       PrintDebugVMCB((vmcb_t*)(info->vmm_data));
+    }
+#endif
+
+
     if (v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2) != 0) {
        PrintError("Error in SVM exit handler\n");
        return -1;
     }
 
 
+#if 0
+    if (info->cpu_id==1) { 
+       V3_Print("Exited Core 1, after handler\n");
+       v3_print_guest_state(info);
+       PrintDebugVMCB((vmcb_t*)(info->vmm_data));
+    }
+#endif
+
+
+
     return 0;
 }
 

diff --git a/palacios/src/palacios/svm_handler.c b/palacios/src/palacios/svm_handler.c
index 2c6034c..9088af3 100644 (file)
--- a/palacios/src/palacios/svm_handler.c
+++ b/palacios/src/palacios/svm_handler.c
@@ -40,6 +40,7 @@
 #endif
 
 
+
 int v3_handle_svm_exit(struct guest_info * info, addr_t exit_code, addr_t exit_info1, addr_t exit_info2) {
 
 #ifdef CONFIG_TELEMETRY
@@ -49,6 +50,11 @@ int v3_handle_svm_exit(struct guest_info * info, addr_t exit_code, addr_t exit_i
 #endif
 
 
+#if 0
+    if (info->cpu_id==1) { 
+       V3_Print("Core 1 SVM Exit: %s  rip=0x%p\n", vmexit_code_to_str(exit_code), (void *) get_addr_linear(info, info->rip, &(info->segments.cs)));
+    }
+#endif
     //PrintDebug("SVM Returned: Exit Code: %x\n",exit_code); 
 
     switch (exit_code) {
@@ -164,6 +170,12 @@ int v3_handle_svm_exit(struct guest_info * info, addr_t exit_code, addr_t exit_i
            PrintDebug("PageFault at %p (error=%d)\n", 
                       (void *)fault_addr, *(uint_t *)error_code);
 #endif
+#if 0
+           if (info->cpu_id==1) { 
+               V3_Print("SVM Core 1: PageFault at %p (error=%d)\n", 
+                      (void *)fault_addr, *(uint_t *)error_code);
+           }
+#endif
            if (info->shdw_pg_mode == SHADOW_PAGING) {
                if (v3_handle_shadow_pagefault(info, fault_addr, *error_code) == -1) {
                    return -1;

diff --git a/palacios/src/palacios/vmm_mem_hook.c b/palacios/src/palacios/vmm_mem_hook.c
index 1f1b014..8ee243a 100644 (file)
--- a/palacios/src/palacios/vmm_mem_hook.c
+++ b/palacios/src/palacios/vmm_mem_hook.c
@@ -68,7 +68,6 @@ static int handle_mem_hook(struct guest_info * info, addr_t guest_va, addr_t gue
     
     if (access_info.write == 1) { 
        // Write Operation 
-
        if (v3_emulate_write_op(info, guest_va, guest_pa, op_addr, 
                                hook->write, hook->priv_data) == -1) {
            PrintError("Write Full Hook emulation failed\n");

diff --git a/palacios/src/palacios/vmm_mptable.c b/palacios/src/palacios/vmm_mptable.c
index 9f8713e..578beed 100644 (file)
--- a/palacios/src/palacios/vmm_mptable.c
+++ b/palacios/src/palacios/vmm_mptable.c
@@ -364,7 +364,7 @@ static int write_mptable(void *target, uint32_t numcores)
        interrupt->io_interrupt_flags.fields.el=INT_TRIGGER_DEFAULT;
        interrupt->source_bus_id=0;
        interrupt->source_bus_irq=irq;
-       interrupt->dest_ioapic_id=1;
+       interrupt->dest_ioapic_id=numcores;
        interrupt->dest_ioapic_intn=irq;
     }