#include <palacios/vmcs.h>
#include <palacios/vmx_lowlevel.h>
#include <palacios/vmx_io.h>
+#include <palacios/vmm_cpuid.h>
+
#include <palacios/vmx.h>
#include <palacios/vmm_ctrl_regs.h>
#include <palacios/vmm_lowlevel.h>
// PrintDebug("Control register: %d\n", cr_qual->access_type);
switch(cr_qual->cr_id) {
case 0:
- PrintDebug("Handling CR0 Access\n");
+ //PrintDebug("Handling CR0 Access\n");
return v3_vmx_handle_cr0_access(info);
case 3:
- PrintDebug("Handling CR3 Access\n");
+ //PrintDebug("Handling CR3 Access\n");
return v3_vmx_handle_cr3_access(info);
default:
PrintError("Unhandled CR access: %d\n", cr_qual->cr_id);
}
break;
- case VMEXIT_CPUID: {
- int instr_len;
- uint32_t target = info->vm_regs.rax;
-
- v3_cpuid(target, (addr_t *)&(info->vm_regs.rax), (addr_t *)&(info->vm_regs.rbx),
- (addr_t *)&(info->vm_regs.rcx), (addr_t *)&(info->vm_regs.rdx));
-
- check_vmcs_read(VMCS_EXIT_INSTR_LEN, &instr_len);
-
- info->rip += instr_len;
+ case VMEXIT_CPUID:
+ if (v3_handle_cpuid(info) == -1) {
+ PrintError("Error Handling CPUID instruction\n");
+ return -1;
+ }
break;
- }
case VMEXIT_RDMSR:
if (v3_handle_msr_read(info) == -1) {
PrintError("Error handling MSR Read\n");
}
break;
+ case VMEXIT_VMCALL:
+ /*
+ * Hypercall
+ */
+
+ // VMCALL is a 3 byte op
+ // We do this early because some hypercalls can change the rip...
+ info->rip += 3;
+
+ if (v3_handle_hypercall(info) == -1) {
+ return -1;
+ }
+ break;
case VMEXIT_IO_INSTR: {
struct vmx_exit_io_qual * io_qual = (struct vmx_exit_io_qual *)&exit_qual;
check_vmcs_write(VMCS_ENTRY_EXCP_ERR, info->excp_state.excp_error_code);
int_info.error_code = 1;
+#ifdef CONFIG_DEBUG_INTERRUPTS
PrintDebug("Injecting exception %d with error code %x\n",
int_info.vector, info->excp_state.excp_error_code);
+#endif
}
int_info.valid = 1;
+#ifdef CONFIG_DEBUG_INTERRUPTS
PrintDebug("Injecting exception %d (EIP=%p)\n", int_info.vector, (void *)info->rip);
+#endif
check_vmcs_write(VMCS_ENTRY_INT_INFO, int_info.value);
v3_injecting_excp(info, int_info.vector);