#include <palacios/vmm.h>
#include <palacios/vm_guest_mem.h>
-
+#include <palacios/vmm_emulate.h>
guest_pde_access = can_access_pde32(guest_pde, fault_addr, error_code);
if (guest_pde_access != PT_ACCESS_OK) {
-
- //
// inject page fault to the guest (Guest PDE fault)
- //
- PrintDebug("Guest Page fault (currently not handled)\n");
- return -1;
+ info->ctrl_regs.cr2 = fault_addr;
+ raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
+
+ return 0;
}
shadow_pde_access = can_access_pde32(shadow_pde, fault_addr, error_code);
pte32_t * shadow_pte = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
pte32_t * guest_pte = NULL;
- // Page Table entry fault
+ // Page Table Entry fault
if (guest_pa_to_host_va(info, PDE32_T_ADDR((*guest_pde_entry)), (addr_t*)&guest_pte) == -1) {
PrintDebug("Invalid Guest PTE Address: 0x%x\n", PDE32_T_ADDR((*guest_pde_entry)));
- return -1;
+ // Machine check the guest
+
+ raise_exception(info, MC_EXCEPTION);
+
+ return 0;
}
return -1;
}
- }
+ } else {
+ // Unknown error raise page fault in guest
+ info->ctrl_regs.cr2 = fault_addr;
+ raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
+
+ // For debugging we will return an error here for the time being,
+ // this probably shouldn't ever happen
+ PrintDebug("Unknown Error occurred\n");
+ PrintDebug("Manual Says to inject page fault into guest\n");
+ return -1;
+ }
PrintDebugPageTables(shadow_pde);
/*
* We assume the the guest pte pointer has already been translated to a host virtual address
*/
-int handle_shadow_pte32_fault(struct guest_info* info,
+int handle_shadow_pte32_fault(struct guest_info * info,
addr_t fault_addr,
pf_error_t error_code,
pte32_t * shadow_pte,
pt_access_status_t guest_pte_access;
pt_access_status_t shadow_pte_access;
- // pte32_t * guest_pte_entry = (pte32_t *)&(guest_pte[PTE32_INDEX(fault_addr)]);;
- // pte32_t * shadow_pte_entry = (pte32_t *)&(shadow_pte[PTE32_INDEX(fault_addr)]);
+ pte32_t * guest_pte_entry = (pte32_t *)&(guest_pte[PTE32_INDEX(fault_addr)]);;
+ pte32_t * shadow_pte_entry = (pte32_t *)&(shadow_pte[PTE32_INDEX(fault_addr)]);
// Check the guest page permissions
guest_pte_access = can_access_pte32(guest_pte, fault_addr, error_code);
+
if (guest_pte_access != PT_ACCESS_OK) {
+ // Inject page fault into the guest
+
+ info->ctrl_regs.cr2 = fault_addr;
+ raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
+
+ return 0;
+ }
+
+
+ shadow_pte_access = can_access_pte32(shadow_pte, fault_addr, error_code);
- //
- // Inject page fault into the guest
- //
+ if (shadow_pte_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush page tables and everything should now work
+ return 0;
+ } else if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
+ addr_t shadow_pa;
+ addr_t guest_pa = PTE32_T_ADDR((*guest_pte_entry));
- PrintDebug("Guest Page fault (currently not handled)\n");
- return -1;
- }
+ // Page Table Entry Not Present
+ if (get_shadow_addr_type(info, guest_pa) == HOST_REGION_INVALID) {
+ // Inject a machine check in the guest
- shadow_pte_access = can_access_pte32(shadow_pte, fault_addr, error_code);
+ raise_exception(info, MC_EXCEPTION);
- if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
+ PrintDebug("Invalid Guest Address in page table (0x%x)\n", guest_pa);
+ return 0;
+ }
- //
- // Page Table Entry Not Present
- //
+ shadow_pa = get_shadow_addr(info, guest_pa);
- } else if (shadow_pte_access == PT_WRITE_ERROR) {
+ shadow_pte_entry->page_base_addr = PT32_BASE_ADDR(shadow_pa);
- //
- // Page Table Entry marked read-only
+ shadow_pte_entry->present = guest_pte_entry->present;
+ shadow_pte_entry->user_page = guest_pte_entry->user_page;
+
+ //set according to VMM policy
+ shadow_pte_entry->write_through = 0;
+ shadow_pte_entry->cache_disable = 0;
+ shadow_pte_entry->global_page = 0;
//
- PrintDebug("Shadow Paging Write Error\n");
- return -1;
- } else if (shadow_pte_access == PT_USER_ERROR) {
+ guest_pte_entry->accessed = 1;
- //
- // Page Table Entry marked non-user
- //
-
- PrintDebug("Shadow Paging User access error\n");
- return -1;
- } else if (shadow_pte_access == PT_ACCESS_OK) {
+ if (guest_pte_entry->dirty == 1) {
+ shadow_pte_entry->writable = guest_pte_entry->writable;
+ } else if ((guest_pte_entry->dirty == 0) && (error_code.write == 1)) {
+ shadow_pte_entry->writable = guest_pte_entry->writable;
+ guest_pte_entry->dirty = 1;
+ } else if ((guest_pte_entry->dirty = 0) && (error_code.write == 0)) {
+ shadow_pte_entry->writable = 0;
+ }
+
+ } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
+ (guest_pte_entry->dirty == 0)) {
+ guest_pte_entry->dirty = 1;
+ shadow_pte_entry->writable = guest_pte_entry->writable;
+
+ return 0;
+ } else {
+ // Inject page fault into the guest
+
+ info->ctrl_regs.cr2 = fault_addr;
+ raise_exception_with_error(info, PF_EXCEPTION, *(uint_t *)&error_code);
- PrintDebug("Page Fault occurred for No Reason\n");
+ PrintDebug("PTE Page fault fell through... Not sure if this should ever happen\n");
+ PrintDebug("Manual Says to inject page fault into guest\n");
return -1;
}
-
return 0;
}
+/* Currently Does not work with Segmentation!!! */
+int handle_shadow_invlpg(struct guest_info * info) {
+ if (info->cpu_mode == PROTECTED_PG) {
+ char instr[15];
+ int ret;
+ int index = 0;
+
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ if (ret != 15) {
+ PrintDebug("Could not read instruction 0x%x (ret=%d)\n", info->rip, ret);
+ return -1;
+ }
+
+
+ /* Can INVLPG work with Segments?? */
+ while (is_prefix_byte(instr[index])) {
+ index++;
+ }
+
+
+ if ((instr[index] == (uchar_t)0x0f) &&
+ (instr[index + 1] == (uchar_t)0x01)) {
+
+ addr_t first_operand;
+ addr_t second_operand;
+ operand_type_t addr_type;
+
+ index += 2;
+ addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+
+ if (addr_type == MEM_OPERAND) {
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
+ pde32_t * shadow_pde_entry = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
+
+ //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
+ //PrintDebug("FirstOperand = %x\n", first_operand);
+
+ if (shadow_pde_entry->large_page == 1) {
+ shadow_pde_entry->present = 0;
+ } else {
+ if (shadow_pde_entry->present == 1) {
+ pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
+ pte32_t * shadow_pte_entry = (pte32_t *)&shadow_pt[PTE32_INDEX(first_operand)];
+
+ shadow_pte_entry->present = 0;
+ }
+ }
+
+ info->rip += index;
+
+ } else {
+ PrintDebug("Invalid Operand type\n");
+ return -1;
+ }
+ } else {
+ PrintDebug("invalid Instruction Opcode\n");
+ PrintTraceMemDump(instr, 15);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+
+
+/* Deprecated */
+/*
addr_t setup_shadow_pt32(struct guest_info * info, addr_t virt_cr3) {
addr_t cr3_guest_addr = CR3_TO_PDE32(virt_cr3);
pde32_t * guest_pde;
return (addr_t)host_pte;
}
-
+*/
