#include <palacios/vmm.h>
#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_decoder.h>
+#include <palacios/vmm_ctrl_regs.h>
#ifndef DEBUG_SHADOW_PAGING
#undef PrintDebug
-
static uint_t pte_hash_fn(addr_t key) {
return hash_long(key, 32);
}
}
-static int handle_shadow_pte32_fault(struct guest_info* info,
- addr_t fault_addr,
- pf_error_t error_code,
- pte32_t * shadow_pte,
- pte32_t * guest_pte);
-static int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code);
+static int activate_shadow_pt_32(struct guest_info * info);
+static int activate_shadow_pt_32pae(struct guest_info * info);
+static int activate_shadow_pt_64(struct guest_info * info);
+
+
+static int handle_shadow_pagefault_32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code);
+static int handle_shadow_pagefault_32pae(struct guest_info * info, addr_t fault_addr, pf_error_t error_code);
+static int handle_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code);
int v3_init_shadow_page_state(struct guest_info * info) {
struct shadow_page_state * state = &(info->shdw_pg_state);
state->guest_cr3 = 0;
- state->shadow_cr3 = 0;
-
+ state->guest_cr0 = 0;
state->cr3_cache = create_hashtable(0, &cr3_hash_fn, &cr3_equals);
}
*/
+
+int v3_cache_page_tables(struct guest_info * info, addr_t cr3) {
+ switch(v3_get_cpu_mode(info)) {
+ case PROTECTED:
+ return v3_cache_page_tables32(info, CR3_TO_PDE32_PA(cr3));
+ default:
+ return -1;
+ }
+}
+
int v3_cache_page_tables32(struct guest_info * info, addr_t pde) {
struct shadow_page_state * state = &(info->shdw_pg_state);
addr_t pde_host_addr;
int v3_replace_shdw_page32(struct guest_info * info, addr_t location, pte32_t * new_page, pte32_t * old_page) {
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(location)]);
if (shadow_pde->large_page == 0) {
+// We assume that shdw_pg_state.guest_cr3 is pointing to the page tables we want to activate
+// We also assume that the CPU mode has not changed during this page table transition
+static int activate_shadow_pt_32(struct guest_info * info) {
+ struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ int cached = 0;
+
+ // Check if shadow page tables are in the cache
+ cached = v3_cache_page_tables32(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
+
+ if (cached == -1) {
+ PrintError("CR3 Cache failed\n");
+ return -1;
+ } else if (cached == 0) {
+ addr_t shadow_pt;
+
+ PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
+ delete_page_tables_32(CR3_TO_PDE32_VA(*(uint_t*)shadow_cr3));
+
+ shadow_pt = v3_create_new_shadow_pt();
+
+ shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PD32_BASE_ADDR(shadow_pt));
+ PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
+ } else {
+ PrintDebug("Reusing cached shadow Page table\n");
+ }
+
+ shadow_cr3->pwt = guest_cr3->pwt;
+ shadow_cr3->pcd = guest_cr3->pcd;
+
+ return 0;
+}
+
+static int activate_shadow_pt_32pae(struct guest_info * info) {
+ PrintError("Activating 32 bit PAE page tables not implemented\n");
+ return -1;
+}
+
+static int activate_shadow_pt_64(struct guest_info * info) {
+ PrintError("Activating 64 bit page tables not implemented\n");
+ return -1;
+}
+
+
+// Reads the guest CR3 register
+// creates new shadow page tables
+// updates the shadow CR3 register to point to the new pts
+int v3_activate_shadow_pt(struct guest_info * info) {
+ switch (info->cpu_mode) {
+
+ case PROTECTED:
+ return activate_shadow_pt_32(info);
+ case PROTECTED_PAE:
+ return activate_shadow_pt_32pae(info);
+ case LONG:
+ case LONG_32_COMPAT:
+ case LONG_16_COMPAT:
+ return activate_shadow_pt_64(info);
+ default:
+ PrintError("Invalid CPU mode: %d\n", info->cpu_mode);
+ return -1;
+ }
+
+ return 0;
+}
+
+
+int v3_activate_passthrough_pt(struct guest_info * info) {
+ // For now... But we need to change this....
+ // As soon as shadow paging becomes active the passthrough tables are hosed
+ // So this will cause chaos if it is called at that time
+
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+ //PrintError("Activate Passthrough Page tables not implemented\n");
+ return 0;
+}
+
+
int v3_handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
if (info->mem_mode == PHYSICAL_MEM) {
// If paging is not turned on we need to handle the special cases
+
+#ifdef DEBUG_SHADOW_PAGING
+ PrintPageTree(info->cpu_mode, fault_addr, info->ctrl_regs.cr3);
+#endif
+
return handle_special_page_fault(info, fault_addr, fault_addr, error_code);
} else if (info->mem_mode == VIRTUAL_MEM) {
switch (info->cpu_mode) {
case PROTECTED:
- return handle_shadow_pagefault32(info, fault_addr, error_code);
+ return handle_shadow_pagefault_32(info, fault_addr, error_code);
break;
case PROTECTED_PAE:
+ return handle_shadow_pagefault_32pae(info, fault_addr, error_code);
case LONG:
+ return handle_shadow_pagefault_64(info, fault_addr, error_code);
+ break;
default:
PrintError("Unhandled CPU Mode\n");
return -1;
}
}
-addr_t v3_create_new_shadow_pt32() {
+addr_t v3_create_new_shadow_pt() {
void * host_pde = 0;
host_pde = V3_VAddr(V3_AllocPages(1));
-/* The guest status checks have already been done,
- * only special case shadow checks remain
+/*
+ * *
+ * *
+ * * 64 bit Page table fault handlers
+ * *
+ * *
*/
-static int handle_large_pagefault32(struct guest_info * info,
- addr_t fault_addr, pf_error_t error_code,
- pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde)
-{
- pt_access_status_t shadow_pte_access = can_access_pte32(shadow_pt, fault_addr, error_code);
- pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
-
- if (shadow_pte_access == PT_ACCESS_OK) {
- // Inconsistent state...
- // Guest Re-Entry will flush tables and everything should now workd
- PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
- return 0;
- }
-
- if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
- // Get the guest physical address of the fault
- addr_t guest_fault_pa = PDE32_4MB_T_ADDR(*large_guest_pde) + PD32_4MB_PAGE_OFFSET(fault_addr);
- host_region_type_t host_page_type = get_shadow_addr_type(info, guest_fault_pa);
-
+static int handle_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
+ PrintError("64 bit shadow paging not implemented\n");
+ return -1;
+}
- if (host_page_type == HOST_REGION_INVALID) {
- // Inject a machine check in the guest
- PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
- v3_raise_exception(info, MC_EXCEPTION);
- return 0;
- }
- if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
- addr_t shadow_pa = get_shadow_addr(info, guest_fault_pa);
+/*
+ * *
+ * *
+ * * 32 bit PAE Page table fault handlers
+ * *
+ * *
+ */
- shadow_pte->page_base_addr = PT32_BASE_ADDR(shadow_pa);
+static int handle_shadow_pagefault_32pae(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
+ PrintError("32 bit PAE shadow paging not implemented\n");
+ return -1;
+}
- shadow_pte->present = 1;
- /* We are assuming that the PDE entry has precedence
- * so the Shadow PDE will mirror the guest PDE settings,
- * and we don't have to worry about them here
- * Allow everything
- */
- shadow_pte->user_page = 1;
- if (find_pte_map(state->cached_ptes, PT32_PAGE_ADDR(guest_fault_pa)) != NULL) {
- // Check if the entry is a page table...
- PrintDebug("Marking page as Guest Page Table (large page)\n");
- shadow_pte->vmm_info = PT32_GUEST_PT;
- shadow_pte->writable = 0;
- } else {
- shadow_pte->writable = 1;
- }
- //set according to VMM policy
- shadow_pte->write_through = 0;
- shadow_pte->cache_disable = 0;
- shadow_pte->global_page = 0;
- //
-
- } else {
- // Handle hooked pages as well as other special pages
- if (handle_special_page_fault(info, fault_addr, guest_fault_pa, error_code) == -1) {
- PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
- return -1;
- }
- }
- } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
- (shadow_pte->vmm_info == PT32_GUEST_PT)) {
- struct shadow_page_state * state = &(info->shdw_pg_state);
- PrintDebug("Write operation on Guest PAge Table Page (large page)\n");
- state->cached_cr3 = 0;
- shadow_pte->writable = 1;
- } else {
- PrintError("Error in large page fault handler...\n");
- PrintError("This case should have been handled at the top level handler\n");
- return -1;
- }
+/*
+ * *
+ * *
+ * * 32 bit Page table fault handlers
+ * *
+ * *
+ */
+static int handle_large_pagefault_32(struct guest_info * info,
+ addr_t fault_addr, pf_error_t error_code,
+ pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde);
- PrintDebug("Returning from large page fault handler\n");
- return 0;
-}
+static int handle_shadow_pte32_fault(struct guest_info * info,
+ addr_t fault_addr,
+ pf_error_t error_code,
+ pte32_t * shadow_pt,
+ pte32_t * guest_pt);
-static int handle_shadow_pagefault32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
+static int handle_shadow_pagefault_32(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
pde32_t * guest_pd = NULL;
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
- addr_t guest_cr3 = (addr_t)CR3_TO_PDE32(info->shdw_pg_state.guest_cr3);
+ pde32_t * shadow_pd = CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+ addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
pt_access_status_t guest_pde_access;
pt_access_status_t shadow_pde_access;
pde32_t * guest_pde = NULL;
pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(fault_addr)]);
- PrintDebug("Shadow page fault handler\n");
+ PrintDebug("Shadow page fault handler: %p\n", (void*) fault_addr );
if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
if (shadow_pde_access == PT_ENTRY_NOT_PRESENT)
{
- pte32_t * shadow_pt = (pte32_t *)v3_create_new_shadow_pt32();
+ pte32_t * shadow_pt = (pte32_t *)v3_create_new_shadow_pt();
shadow_pde->present = 1;
shadow_pde->user_page = guest_pde->user_page;
//
// PTE fault
//
- pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pt = (pte32_t *)V3_VAddr( (void*)(addr_t) PDE32_T_ADDR(*shadow_pde) );
if (guest_pde->large_page == 0) {
pte32_t * guest_pt = NULL;
return -1;
}
} else if (guest_pde->large_page == 1) {
- if (handle_large_pagefault32(info, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
+ if (handle_large_pagefault_32(info, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
PrintError("Error handling large pagefault\n");
return -1;
}
return 0;
}
- PrintDebug("Returning end of PDE function (rip=%p)\n", (void *)(info->rip));
+ PrintDebug("Returning end of PDE function (rip=%p)\n", (void *)(addr_t)(info->rip));
return 0;
}
+/* The guest status checks have already been done,
+ * only special case shadow checks remain
+ */
+static int handle_large_pagefault_32(struct guest_info * info,
+ addr_t fault_addr, pf_error_t error_code,
+ pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde)
+{
+ pt_access_status_t shadow_pte_access = can_access_pte32(shadow_pt, fault_addr, error_code);
+ pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
+
+ if (shadow_pte_access == PT_ACCESS_OK) {
+ // Inconsistent state...
+ // Guest Re-Entry will flush tables and everything should now workd
+ PrintDebug("Inconsistent state... Guest re-entry should flush tlb\n");
+ return 0;
+ }
+
+
+ if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
+ // Get the guest physical address of the fault
+ addr_t guest_fault_pa = PDE32_4MB_T_ADDR(*large_guest_pde) + PD32_4MB_PAGE_OFFSET(fault_addr);
+ host_region_type_t host_page_type = get_shadow_addr_type(info, guest_fault_pa);
+
+
+ if (host_page_type == HOST_REGION_INVALID) {
+ // Inject a machine check in the guest
+ PrintDebug("Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
+ v3_raise_exception(info, MC_EXCEPTION);
+ return 0;
+ }
+
+ if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+ addr_t shadow_pa = get_shadow_addr(info, guest_fault_pa);
+
+ shadow_pte->page_base_addr = PT32_BASE_ADDR(shadow_pa);
+
+ shadow_pte->present = 1;
+
+ /* We are assuming that the PDE entry has precedence
+ * so the Shadow PDE will mirror the guest PDE settings,
+ * and we don't have to worry about them here
+ * Allow everything
+ */
+ shadow_pte->user_page = 1;
+
+ if (find_pte_map(state->cached_ptes, PT32_PAGE_ADDR(guest_fault_pa)) != NULL) {
+ // Check if the entry is a page table...
+ PrintDebug("Marking page as Guest Page Table (large page)\n");
+ shadow_pte->vmm_info = PT32_GUEST_PT;
+ shadow_pte->writable = 0;
+ } else {
+ shadow_pte->writable = 1;
+ }
+
+
+ //set according to VMM policy
+ shadow_pte->write_through = 0;
+ shadow_pte->cache_disable = 0;
+ shadow_pte->global_page = 0;
+ //
+
+ } else {
+ // Handle hooked pages as well as other special pages
+ if (handle_special_page_fault(info, fault_addr, guest_fault_pa, error_code) == -1) {
+ PrintError("Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
+ return -1;
+ }
+ }
+ } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
+ (shadow_pte->vmm_info == PT32_GUEST_PT)) {
+
+ struct shadow_page_state * state = &(info->shdw_pg_state);
+ PrintDebug("Write operation on Guest PAge Table Page (large page)\n");
+ state->cached_cr3 = 0;
+ shadow_pte->writable = 1;
+
+ } else {
+ PrintError("Error in large page fault handler...\n");
+ PrintError("This case should have been handled at the top level handler\n");
+ return -1;
+ }
+
+ PrintDebug("Returning from large page fault handler\n");
+ return 0;
+}
+
+
+
+
/*
* We assume the the guest pte pointer has already been translated to a host virtual address
*/
addr_t guest_pa = PTE32_T_ADDR((*guest_pte)) + PT32_PAGE_OFFSET(fault_addr);
// Page Table Entry Not Present
+ PrintDebug("guest_pa =%p\n", (void *)guest_pa);
host_region_type_t host_page_type = get_shadow_addr_type(info, guest_pa);
/* Currently Does not work with Segmentation!!! */
-int v3_handle_shadow_invlpg(struct guest_info * info) {
+int v3_handle_shadow_invlpg(struct guest_info * info)
+{
if (info->mem_mode != VIRTUAL_MEM) {
// Paging must be turned on...
// should handle with some sort of fault I think
PrintError("ERROR: INVLPG called in non paged mode\n");
return -1;
}
-
-
- if (info->cpu_mode == PROTECTED) {
- uchar_t instr[15];
- int ret;
- int index = 0;
-
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- PrintError("Could not read instruction 0x%p (ret=%d)\n", (void *)(info->rip), ret);
- return -1;
- }
-
-
- /* Can INVLPG work with Segments?? */
- while (is_prefix_byte(instr[index])) {
- index++;
- }
+
+
+ if (info->cpu_mode != PROTECTED) {
+ return 0;
+ }
+
+ uchar_t instr[15];
+ int index = 0;
+
+ int ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ if (ret != 15) {
+ PrintError("Could not read instruction 0x%p (ret=%d)\n", (void *)(addr_t)(info->rip), ret);
+ return -1;
+ }
+
+
+ /* Can INVLPG work with Segments?? */
+ while (is_prefix_byte(instr[index])) {
+ index++;
+ }
- if ((instr[index] == (uchar_t)0x0f) &&
- (instr[index + 1] == (uchar_t)0x01)) {
-
- addr_t first_operand;
- addr_t second_operand;
- v3_operand_type_t addr_type;
- addr_t guest_cr3 = (addr_t)CR3_TO_PDE32(info->shdw_pg_state.guest_cr3);
-
- pde32_t * guest_pd = NULL;
-
- if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
- PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
- return -1;
- }
+ if( (instr[index + 0] != (uchar_t) 0x0f) ||
+ (instr[index + 1] != (uchar_t) 0x01) ) {
+ PrintError("invalid Instruction Opcode\n");
+ PrintTraceMemDump(instr, 15);
+ return -1;
+ }
+
+ addr_t first_operand;
+ addr_t second_operand;
+ addr_t guest_cr3 = CR3_TO_PDE32_PA(info->shdw_pg_state.guest_cr3);
+
+ pde32_t * guest_pd = NULL;
+
+ if (guest_pa_to_host_va(info, guest_cr3, (addr_t*)&guest_pd) == -1) {
+ PrintError("Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
+ return -1;
+ }
+
+ index += 2;
+ v3_operand_type_t addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+
+ if (addr_type != MEM_OPERAND) {
+ PrintError("Invalid Operand type\n");
+ return -1;
+ }
+
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
+ pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
+ pde32_t * guest_pde;
+
+ //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
+ //PrintDebug("FirstOperand = %x\n", first_operand);
+
+ PrintDebug("Invalidating page for %p\n", (void *)first_operand);
+
+ guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(first_operand)]);
+
+ if (guest_pde->large_page == 1) {
+ shadow_pde->present = 0;
+ PrintDebug("Invalidating Large Page\n");
+ } else
+ if (shadow_pde->present == 1) {
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(first_operand)] );
-
-
- index += 2;
-
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
-
- if (addr_type == MEM_OPERAND) {
- pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
- pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
- pde32_t * guest_pde;
-
- //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
- //PrintDebug("FirstOperand = %x\n", first_operand);
-
- PrintDebug("Invalidating page for %p\n", (void *)first_operand);
-
- guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(first_operand)]);
-
- if (guest_pde->large_page == 1) {
- shadow_pde->present = 0;
- PrintDebug("Invalidating Large Page\n");
- } else {
-
- if (shadow_pde->present == 1) {
- pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
- pte32_t * shadow_pte = (pte32_t *)&shadow_pt[PTE32_INDEX(first_operand)];
-
#ifdef DEBUG_SHADOW_PAGING
- PrintDebug("Setting not present\n");
- PrintPTE32(first_operand, shadow_pte);
+ PrintDebug("Setting not present\n");
+ PrintPTE32(first_operand, shadow_pte );
#endif
-
- shadow_pte->present = 0;
- }
- }
-
- info->rip += index;
-
- } else {
- PrintError("Invalid Operand type\n");
- return -1;
- }
- } else {
- PrintError("invalid Instruction Opcode\n");
- PrintTraceMemDump(instr, 15);
- return -1;
+
+ shadow_pte->present = 0;
}
- }
-
+
+ info->rip += index;
+
return 0;
}
