#include <palacios/vmm.h>
#include <palacios/vm_guest_mem.h>
-
+#include <palacios/vmm_emulate.h>
}
int handle_shadow_pagefault(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
- if (info->cpu_mode == PROTECTED_PG) {
+
+ switch (info->cpu_mode) {
+ case PROTECTED_PG:
return handle_shadow_pagefault32(info, fault_addr, error_code);
- } else {
+ break;
+ case PROTECTED_PAE_PG:
+ case LONG_PG:
+ // currently not handled
+ return -1;
+ break;
+ case REAL:
+ case PROTECTED:
+ case PROTECTED_PAE:
+ case LONG:
+ // If paging is not turned on we need to handle the special cases
+ return handle_special_page_fault(info, fault_addr, error_code);
+ break;
+ default:
return -1;
}
}
} else {
/*
* Check the Intel manual because we are ignoring Large Page issues here
+ * Also be wary of hooked pages
*/
}
pte32_t * shadow_pte = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
pte32_t * guest_pte = NULL;
- // Page Table entry fault
+ // Page Table Entry fault
if (guest_pa_to_host_va(info, PDE32_T_ADDR((*guest_pde_entry)), (addr_t*)&guest_pte) == -1) {
PrintDebug("Invalid Guest PTE Address: 0x%x\n", PDE32_T_ADDR((*guest_pde_entry)));
// Page Table Entry Not Present
- if (get_shadow_addr_type(info, guest_pa) == HOST_REGION_INVALID) {
+ host_region_type_t host_page_type = get_shadow_addr_type(info, guest_pa);
+
+ if (host_page_type == HOST_REGION_INVALID) {
// Inject a machine check in the guest
raise_exception(info, MC_EXCEPTION);
PrintDebug("Invalid Guest Address in page table (0x%x)\n", guest_pa);
return 0;
- }
-
- shadow_pa = get_shadow_addr(info, guest_pa);
-
- shadow_pte_entry->page_base_addr = PT32_BASE_ADDR(shadow_pa);
-
- shadow_pte_entry->present = guest_pte_entry->present;
- shadow_pte_entry->user_page = guest_pte_entry->user_page;
-
- //set according to VMM policy
- shadow_pte_entry->write_through = 0;
- shadow_pte_entry->cache_disable = 0;
- shadow_pte_entry->global_page = 0;
- //
-
- guest_pte_entry->accessed = 1;
- if (guest_pte_entry->dirty == 1) {
- shadow_pte_entry->writable = guest_pte_entry->writable;
- } else if ((guest_pte_entry->dirty == 0) && (error_code.write == 1)) {
- shadow_pte_entry->writable = guest_pte_entry->writable;
- guest_pte_entry->dirty = 1;
- } else if ((guest_pte_entry->dirty = 0) && (error_code.write == 0)) {
- shadow_pte_entry->writable = 0;
+ } else if (host_page_type == HOST_REGION_PHYSICAL_MEMORY) {
+
+ shadow_pa = get_shadow_addr(info, guest_pa);
+
+ shadow_pte_entry->page_base_addr = PT32_BASE_ADDR(shadow_pa);
+
+ shadow_pte_entry->present = guest_pte_entry->present;
+ shadow_pte_entry->user_page = guest_pte_entry->user_page;
+
+ //set according to VMM policy
+ shadow_pte_entry->write_through = 0;
+ shadow_pte_entry->cache_disable = 0;
+ shadow_pte_entry->global_page = 0;
+ //
+
+ guest_pte_entry->accessed = 1;
+
+ if (guest_pte_entry->dirty == 1) {
+ shadow_pte_entry->writable = guest_pte_entry->writable;
+ } else if ((guest_pte_entry->dirty == 0) && (error_code.write == 1)) {
+ shadow_pte_entry->writable = guest_pte_entry->writable;
+ guest_pte_entry->dirty = 1;
+ } else if ((guest_pte_entry->dirty = 0) && (error_code.write == 0)) {
+ shadow_pte_entry->writable = 0;
+ }
+ } else {
+ // Page fault handled by hook functions
+ if (handle_special_page_fault(info, fault_addr, error_code) == -1) {
+ PrintDebug("Special Page fault handler returned error for address: %x\n", fault_addr);
+ return -1;
+ }
}
} else if ((shadow_pte_access == PT_WRITE_ERROR) &&
+/* Currently Does not work with Segmentation!!! */
+int handle_shadow_invlpg(struct guest_info * info) {
+ if (info->cpu_mode == PROTECTED_PG) {
+ char instr[15];
+ int ret;
+ int index = 0;
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ if (ret != 15) {
+ PrintDebug("Could not read instruction 0x%x (ret=%d)\n", info->rip, ret);
+ return -1;
+ }
+
+
+ /* Can INVLPG work with Segments?? */
+ while (is_prefix_byte(instr[index])) {
+ index++;
+ }
+
+
+ if ((instr[index] == (uchar_t)0x0f) &&
+ (instr[index + 1] == (uchar_t)0x01)) {
+
+ addr_t first_operand;
+ addr_t second_operand;
+ operand_type_t addr_type;
+
+ index += 2;
+
+ addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+
+ if (addr_type == MEM_OPERAND) {
+ pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3);
+ pde32_t * shadow_pde_entry = (pde32_t *)&shadow_pd[PDE32_INDEX(first_operand)];
+
+ //PrintDebug("PDE Index=%d\n", PDE32_INDEX(first_operand));
+ //PrintDebug("FirstOperand = %x\n", first_operand);
+
+ if (shadow_pde_entry->large_page == 1) {
+ shadow_pde_entry->present = 0;
+ } else {
+ if (shadow_pde_entry->present == 1) {
+ pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde_entry));
+ pte32_t * shadow_pte_entry = (pte32_t *)&shadow_pt[PTE32_INDEX(first_operand)];
+
+ shadow_pte_entry->present = 0;
+ }
+ }
+
+ info->rip += index;
+
+ } else {
+ PrintDebug("Invalid Operand type\n");
+ return -1;
+ }
+ } else {
+ PrintDebug("invalid Instruction Opcode\n");
+ PrintTraceMemDump(instr, 15);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+
+
+/* Deprecated */
+/*
addr_t setup_shadow_pt32(struct guest_info * info, addr_t virt_cr3) {
addr_t cr3_guest_addr = CR3_TO_PDE32(virt_cr3);
pde32_t * guest_pde;
return (addr_t)host_pte;
}
-
+*/
