+
+
+
void delete_page_tables_pde32(pde32_t * pde) {
int i;//, j;
for (i = 0; (i < MAX_PDE32_ENTRIES); i++) {
if (pde[i].present) {
// We double cast, first to an addr_t to handle 64 bit issues, then to the pointer
- pte32_t * pte = (pte32_t *)((addr_t)(pde[i].pt_base_addr << PAGE_POWER));
+ PrintDebug("PTE base addr %x \n", pde[i].pt_base_addr);
+ pte32_t * pte = (pte32_t *)((addr_t)(uint_t)(pde[i].pt_base_addr << PAGE_POWER));
/*
for (j = 0; (j < MAX_PTE32_ENTRIES); j++) {
}
}
*/
- //PrintDebug("Deleting PTE %d (%x)\n", i, pte);
+ PrintDebug("Deleting PTE %d (%p)\n", i, pte);
V3_FreePage(pte);
}
}
- // PrintDebug("Deleting PDE (%x)\n", pde);
+ PrintDebug("Deleting PDE (%p)\n", pde);
V3_FreePage(V3_PAddr(pde));
}
* If there are any gaps in the layout, we add them as unmapped pages
*/
pde32_t * create_passthrough_pde32_pts(struct guest_info * guest_info) {
- ullong_t current_page_addr = 0;
+ addr_t current_page_addr = 0;
int i, j;
struct shadow_map * map = &(guest_info->mem_map);
+pml4e64_t * create_passthrough_pts_64(struct guest_info * info) {
+ addr_t current_page_addr = 0;
+ int i, j, k, m;
+ struct shadow_map * map = &(info->mem_map);
+
+ pml4e64_t * pml = V3_VAddr(V3_AllocPages(1));
+
+ for (i = 0; i < 1; i++) {
+ int pdpe_present = 0;
+ pdpe64_t * pdpe = V3_VAddr(V3_AllocPages(1));
+
+ for (j = 0; j < 1; j++) {
+ int pde_present = 0;
+ pde64_t * pde = V3_VAddr(V3_AllocPages(1));
+
+ for (k = 0; k < MAX_PDE64_ENTRIES; k++) {
+ int pte_present = 0;
+ pte64_t * pte = V3_VAddr(V3_AllocPages(1));
+
+
+ for (m = 0; m < MAX_PTE64_ENTRIES; m++) {
+ struct shadow_region * region = get_shadow_region_by_addr(map, current_page_addr);
+
+
+
+ if (!region ||
+ (region->host_type == HOST_REGION_HOOK) ||
+ (region->host_type == HOST_REGION_UNALLOCATED) ||
+ (region->host_type == HOST_REGION_MEMORY_MAPPED_DEVICE) ||
+ (region->host_type == HOST_REGION_REMOTE) ||
+ (region->host_type == HOST_REGION_SWAPPED)) {
+ pte[m].present = 0;
+ pte[m].writable = 0;
+ pte[m].user_page = 0;
+ pte[m].write_through = 0;
+ pte[m].cache_disable = 0;
+ pte[m].accessed = 0;
+ pte[m].dirty = 0;
+ pte[m].pte_attr = 0;
+ pte[m].global_page = 0;
+ pte[m].vmm_info = 0;
+ pte[m].page_base_addr = 0;
+ } else {
+ addr_t host_addr;
+ pte[m].present = 1;
+ pte[m].writable = 1;
+ pte[m].user_page = 1;
+ pte[m].write_through = 0;
+ pte[m].cache_disable = 0;
+ pte[m].accessed = 0;
+ pte[m].dirty = 0;
+ pte[m].pte_attr = 0;
+ pte[m].global_page = 0;
+ pte[m].vmm_info = 0;
+
+ if (guest_pa_to_host_pa(info, current_page_addr, &host_addr) == -1) {
+ // BIG ERROR
+ // PANIC
+ return NULL;
+ }
+
+ pte[m].page_base_addr = PTE64_BASE_ADDR(host_addr);
+
+ //PrintPTE64(current_page_addr, &(pte[m]));
+
+ pte_present = 1;
+ }
+
+
+
+
+ current_page_addr += PAGE_SIZE;
+ }
+
+ if (pte_present == 0) {
+ V3_FreePage(V3_PAddr(pte));
+
+ pde[k].present = 0;
+ pde[k].writable = 0;
+ pde[k].user_page = 0;
+ pde[k].write_through = 0;
+ pde[k].cache_disable = 0;
+ pde[k].accessed = 0;
+ pde[k].reserved = 0;
+ pde[k].large_page = 0;
+ //pde[k].global_page = 0;
+ pde[k].vmm_info = 0;
+ pde[k].pt_base_addr = 0;
+ } else {
+ pde[k].present = 1;
+ pde[k].writable = 1;
+ pde[k].user_page = 1;
+ pde[k].write_through = 0;
+ pde[k].cache_disable = 0;
+ pde[k].accessed = 0;
+ pde[k].reserved = 0;
+ pde[k].large_page = 0;
+ //pde[k].global_page = 0;
+ pde[k].vmm_info = 0;
+ pde[k].pt_base_addr = PAGE_ALIGNED_ADDR((addr_t)V3_PAddr(pte));
+
+ pde_present = 1;
+ }
+ }
+
+ if (pde_present == 0) {
+ V3_FreePage(V3_PAddr(pde));
+
+ pdpe[j].present = 0;
+ pdpe[j].writable = 0;
+ pdpe[j].user_page = 0;
+ pdpe[j].write_through = 0;
+ pdpe[j].cache_disable = 0;
+ pdpe[j].accessed = 0;
+ pdpe[j].reserved = 0;
+ pdpe[j].large_page = 0;
+ //pdpe[j].global_page = 0;
+ pdpe[j].vmm_info = 0;
+ pdpe[j].pd_base_addr = 0;
+ } else {
+ pdpe[j].present = 1;
+ pdpe[j].writable = 1;
+ pdpe[j].user_page = 1;
+ pdpe[j].write_through = 0;
+ pdpe[j].cache_disable = 0;
+ pdpe[j].accessed = 0;
+ pdpe[j].reserved = 0;
+ pdpe[j].large_page = 0;
+ //pdpe[j].global_page = 0;
+ pdpe[j].vmm_info = 0;
+ pdpe[j].pd_base_addr = PAGE_ALIGNED_ADDR((addr_t)V3_PAddr(pde));
+
+
+ pdpe_present = 1;
+ }
+
+ }
+
+ PrintDebug("PML index=%d\n", i);
+
+ if (pdpe_present == 0) {
+ V3_FreePage(V3_PAddr(pdpe));
+
+ pml[i].present = 0;
+ pml[i].writable = 0;
+ pml[i].user_page = 0;
+ pml[i].write_through = 0;
+ pml[i].cache_disable = 0;
+ pml[i].accessed = 0;
+ pml[i].reserved = 0;
+ //pml[i].large_page = 0;
+ //pml[i].global_page = 0;
+ pml[i].vmm_info = 0;
+ pml[i].pdp_base_addr = 0;
+ } else {
+ pml[i].present = 1;
+ pml[i].writable = 1;
+ pml[i].user_page = 1;
+ pml[i].write_through = 0;
+ pml[i].cache_disable = 0;
+ pml[i].accessed = 0;
+ pml[i].reserved = 0;
+ //pml[i].large_page = 0;
+ //pml[i].global_page = 0;
+ pml[i].vmm_info = 0;
+ pml[i].pdp_base_addr = PAGE_ALIGNED_ADDR((addr_t)V3_PAddr(pdpe));
+ }
+ }
+
+ return pml;
+}
+
+
+
void PrintPDE32(addr_t virtual_address, pde32_t * pde)
pde->global_page,
pde->vmm_info);
}
+
void PrintPTE32(addr_t virtual_address, pte32_t * pte)
{
}
+void PrintPDE64(addr_t virtual_address, pde64_t * pde)
+{
+ PrintDebug("PDE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
+ (void *)virtual_address,
+ (void *)(addr_t) (pde->pt_base_addr << PAGE_POWER),
+ pde->present,
+ pde->writable,
+ pde->user_page,
+ pde->write_through,
+ pde->cache_disable,
+ pde->accessed,
+ pde->reserved,
+ pde->large_page,
+ 0,//pde->global_page,
+ pde->vmm_info);
+}
+
+
+void PrintPTE64(addr_t virtual_address, pte64_t * pte)
+{
+ PrintDebug("PTE64 %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
+ (void *)virtual_address,
+ (void*)(addr_t)(pte->page_base_addr << PAGE_POWER),
+ pte->present,
+ pte->writable,
+ pte->user_page,
+ pte->write_through,
+ pte->cache_disable,
+ pte->accessed,
+ pte->dirty,
+ pte->pte_attr,
+ pte->global_page,
+ pte->vmm_info);
+}
+
+
+
+
+
void PrintPD32(pde32_t * pde)
{
