extern void SerialMemDump(unsigned char *start, int n);
+
/* Segmentation is a problem here...
*
* When we get a memory operand, presumably we use the default segment (which is?)
*(char*)shadow_cr0 &= 0xf0;
*(char*)shadow_cr0 |= new_cr0_val;
+
PrintDebug("New CR0=%x, New Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
} else {
PrintDebug("Old CR0=%x\n", *real_cr0);
info->cpu_mode = PROTECTED;
}
+ if (new_cr0->pe == 0) {
+ PrintDebug("Entering Real Mode\n");
+ info->cpu_mode = REAL;
+ }
+
+
if (new_cr0->pg == 1) {
PrintDebug("Paging is already turned on in switch to protected mode in CR0 write\n");
PrintDebug("Old CR0=%x, Old Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
*real_cr0 = *new_cr0;
real_cr0->pg = 1;
+ real_cr0->et = 1;
*shadow_cr0 = *new_cr0;
+ shadow_cr0->et = 1;
PrintDebug("New CR0=%x, New Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
} else {
ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
+
if (ret != 15) {
// I think we should inject a GPF into the guest
PrintDebug("Could not read instruction (ret=%d)\n", ret);
index += 2;
+ PrintDebug("MovToCR0 instr:\n");
+ PrintTraceMemDump(instr, 15);
+ PrintDebug("EAX=%x\n", *(uint_t*)&(info->vm_regs.rax));
addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
new_cr0 = (struct cr0_32 *)first_operand;
-
+ PrintDebug("first operand=%x\n", *(uint_t *)first_operand);
if (info->shdw_pg_mode == SHADOW_PAGING) {
struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
*shadow_cr0 = *new_cr0;
*real_cr0 = *new_cr0;
+ shadow_cr0->et = 1;
+ real_cr0->et = 1;
//
// Activate Shadow Paging
} else if (new_cr0->pe == 0) {
info->cpu_mode = REAL;
+ info->mem_mode = PHYSICAL_MEM;
+ PrintDebug("Entering Real Mode\n");
+
+ PrintV3CtrlRegs(&(info->ctrl_regs));
+ // reinstate the identity mapped paged tables
+ // But keep the shadow tables around to handle TLB issues.... UGH...
+ //info->shdw_pg_state.shadow_cr3 &= 0x00000fff;
+ //info->shdw_pg_state.shadow_cr3 |= ((addr_t)create_passthrough_pde32_pts(info) & ~0xfff);
+
+ //info->ctrl_regs.cr3 = info->shdw_pg_state.shadow_cr3;
+ info->ctrl_regs.cr3 = ((addr_t)create_passthrough_pde32_pts(info) & ~0xfff);
+
*shadow_cr0 = *new_cr0;
*real_cr0 = *new_cr0;
real_cr0->pg = 1;
+ shadow_cr0->et = 1;
+ real_cr0->et = 1;
+
}
(instr[index + 1] == 0x06)) {
// CLTS instruction
PrintDebug("CLTS instruction - clearing TS flag of real and shadow CR0\n");
- shadow_cr0->ts=0;
- real_cr0->ts=0;
+ shadow_cr0->ts = 0;
+ real_cr0->ts = 0;
index+=2;
if (info->shdw_pg_mode == SHADOW_PAGING) {
*virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ virt_cr0->pg = 0; // clear the pg bit because guest doesn't think it's on
+ }
+
+ PrintDebug("real CR0: %x\n", *(uint_t*)real_cr0);
+ PrintDebug("returned CR0: %x\n", *(uint_t*)virt_cr0);
+
+
} else {
*virt_cr0 = *real_cr0;
}
int ret;
char instr[15];
+ PrintDebug("Protected %s mode write to CR3 at %s 0x%x\n",
+ info->cpu_mode==PROTECTED ? "" : "Paged",
+ info->cpu_mode==PROTECTED ? "guest physical" : "guest virtual",
+ get_addr_linear(info,info->rip,&(info->segments.cs)));
// We need to read the instruction, which is at CS:IP, but that
// linear address is guest physical without PG and guest virtual with PG
- if (info->cpu_mode == PHYSICAL_MEM) {
+ if (info->mem_mode == PHYSICAL_MEM) {
// The real rip address is actually a combination of the rip + CS base
PrintDebug("Writing Guest CR3 Write (Physical Address)\n");
ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
-
if (ret != 15) {
PrintDebug("Could not read instruction (ret=%d)\n", ret);
return -1;
struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ if (CR3_TO_PDE32(*(uint_t*)shadow_cr3) != 0) {
+ PrintDebug("Shadow Page Table\n");
+ PrintDebugPageTables((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+ }
+
/* Delete the current Page Tables */
delete_page_tables_pde32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+ PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
*guest_cr3 = *new_cr3;
+
+
// Something like this
shadow_pt = create_new_shadow_pt32(info);
//shadow_pt = setup_shadow_pt32(info, CR3_TO_PDE32(*(addr_t *)new_cr3));
-
/* Copy Various flags */
*shadow_cr3 = *new_cr3;
+
+ {
+ addr_t tmp_addr;
+ guest_pa_to_host_va(info, ((*(uint_t*)guest_cr3) & 0xfffff000), &tmp_addr);
+ PrintDebug("Guest PD\n");
+ PrintPD32((pde32_t *)tmp_addr);
+
+ }
+
+
shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt);
+ PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
+
+
if (info->mem_mode == VIRTUAL_MEM) {
// If we aren't in paged mode then we have to preserve the identity mapped CR3
info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
} else {
PrintDebug("Unknown Instruction\n");
+ SerialMemDump(instr,15);
return -1;
}
} else {
- PrintDebug("Invalid operating Mode\n");
+ PrintDebug("Invalid operating Mode (0x%x)\n", info->cpu_mode);
return -1;
}
int handle_cr3_read(struct guest_info * info) {
- if (info->cpu_mode == PROTECTED) {
+
+ if (info->cpu_mode == REAL) {
+ // what does this mean???
+
+ /*
+
+ addr_t host_addr;
+ addr_t linear_addr = 0;
+
+
+
+ linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
+
+
+ PrintDebug("RIP Linear: %x\n", linear_addr);
+ PrintV3Segments(&(info->segments));
+
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ guest_pa_to_host_pa(info, linear_addr, &host_addr);
+ } else if (info->mem_mode == VIRTUAL_MEM) {
+ guest_va_to_host_pa(info, linear_addr, &host_addr);
+ }
+
+
+ pt32_lookup((pde32_t *)CR3_TO_PDE32(info->shdw_pg_state.shadow_cr3), , addr_t * paddr);
+ */
+
+
+ return -1;
+ } else if (info->cpu_mode == PROTECTED) {
+
int index = 0;
int ret;
char instr[15];
info->rip += index;
} else {
PrintDebug("Unknown Instruction\n");
+ SerialMemDump(instr,15);
return -1;
}
} else {
- PrintDebug("Invalid operating Mode\n");
+ PrintDebug("Invalid operating Mode (0x%x), control registers follow\n", info->cpu_mode);
+ PrintV3CtrlRegs(&(info->ctrl_regs));
return -1;
}
