+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
#include <palacios/vmm_mem.h>
#include <palacios/vmm.h>
#include <palacios/vmcb.h>
-#include <palacios/vmm_emulate.h>
+#include <palacios/vmm_decoder.h>
#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_ctrl_regs.h>
+
/* Segmentation is a problem here...
*
* When we get a memory operand, presumably we use the default segment (which is?)
*/
-int handle_cr0_write(struct guest_info * info) {
- char instr[15];
-
-
- if (info->cpu_mode == REAL) {
- int index = 0;
- int ret;
-
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
+#ifndef DEBUG_CTRL_REGS
+#undef PrintDebug
+#define PrintDebug(fmt, args...)
+#endif
- while (is_prefix_byte(instr[index])) {
- index++;
- }
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == lmsw_byte) &&
- (MODRM_REG(instr[index + 2]) == lmsw_reg_byte)) {
-
- addr_t first_operand;
- addr_t second_operand;
- struct cr0_real *real_cr0;
- struct cr0_real *new_cr0;
- operand_type_t addr_type;
- char new_cr0_val = 0;
- // LMSW
- // decode mod/RM
- index += 2;
-
- real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
+static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr);
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG16);
+static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_32pae(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_64(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_64compat(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_32(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_32pae(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_64(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_64compat(struct guest_info * info, struct x86_instr * dec_instr);
- if (addr_type == REG_OPERAND) {
- new_cr0 = (struct cr0_real *)first_operand;
- } else if (addr_type == MEM_OPERAND) {
- addr_t host_addr;
- if (guest_pa_to_host_va(info, first_operand + (info->segments.ds.base << 4), &host_addr) == -1) {
- // gpf the guest
- return -1;
- }
- new_cr0 = (struct cr0_real *)host_addr;
- } else {
- // error... don't know what to do
- return -1;
- }
-
- if ((new_cr0->pe == 1) && (real_cr0->pe == 0)) {
- info->cpu_mode = PROTECTED;
- } else if ((new_cr0->pe == 0) && (real_cr0->pe == 1)) {
- info->cpu_mode = REAL;
- }
-
- new_cr0_val = *(char*)(new_cr0) & 0x0f;
+// First Attempt = 494 lines
+// current = 106 lines
+int v3_handle_cr0_write(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
- if (info->page_mode == SHADOW_PAGING) {
- struct cr0_real * shadow_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
+ /* The IFetch will already have faulted in the necessary bytes for the full instruction
+ if (ret != 15) {
+ // I think we should inject a GPF into the guest
+ PrintError("Could not read instruction (ret=%d)\n", ret);
+ return -1;
+ }
+ */
- PrintDebug("Old CR0=%x, Old Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
- /* struct cr0_real is only 4 bits wide,
- * so we can overwrite the real_cr0 without worrying about the shadow fields
- */
- *(char*)real_cr0 &= 0xf0;
- *(char*)real_cr0 |= new_cr0_val;
-
- *(char*)shadow_cr0 &= 0xf0;
- *(char*)shadow_cr0 |= new_cr0_val;
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
- PrintDebug("New CR0=%x, New Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
- } else {
- PrintDebug("Old CR0=%x\n", *real_cr0);
- // for now we just pass through....
- *(char*)real_cr0 &= 0xf0;
- *(char*)real_cr0 |= new_cr0_val;
+ if (v3_opcode_cmp(V3_OPCODE_LMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
- PrintDebug("New CR0=%x\n", *real_cr0);
- }
+ if (handle_lmsw(info, &dec_instr) == -1) {
+ return -1;
+ }
+ } else if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
- info->rip += index;
+ if (handle_mov_to_cr0(info, &dec_instr) == -1) {
+ return -1;
+ }
- } else if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == clts_byte)) {
- // CLTS
+ } else if (v3_opcode_cmp(V3_OPCODE_CLTS, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ if (handle_clts(info, &dec_instr) == -1) {
+ return -1;
+ }
- } else if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] = mov_to_cr_byte)) {
- addr_t first_operand;
- addr_t second_operand;
- struct cr0_32 *real_cr0;
- struct cr0_32 *new_cr0;
- operand_type_t addr_type;
-
-
- index += 2;
-
- real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+ } else {
+ PrintError("Unhandled opcode in handle_cr0_write\n");
+ return -1;
+ }
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+ info->rip += dec_instr.instr_length;
- if (addr_type != REG_OPERAND) {
- /* Mov to CR0 Can only be a 32 bit register */
- // FIX ME
- return -1;
- }
+ return 0;
+}
- new_cr0 = (struct cr0_32 *)first_operand;
- if (new_cr0->pe == 1) {
- PrintDebug("Entering Protected Mode\n");
- info->cpu_mode = PROTECTED;
- }
- if (new_cr0->pg == 1) {
- // GPF the guest??
- return -1;
- }
- if (info->page_mode == SHADOW_PAGING) {
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
-
- PrintDebug("Old CR0=%x, Old Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
- *real_cr0 = *new_cr0;
- real_cr0->pg = 1;
+static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintDebug("MOV2CR0\n");
- *shadow_cr0 = *new_cr0;
+ switch (info->cpu_mode) {
+ case REAL:
+ case PROTECTED:
+ return handle_mov_to_cr0_32(info, dec_instr);
+ case PROTECTED_PAE:
+ return handle_mov_to_cr0_32pae(info, dec_instr);
+ case LONG:
+ return handle_mov_to_cr0_64(info, dec_instr);
+ case LONG_32_COMPAT:
+ return handle_mov_to_cr0_64compat(info, dec_instr);
+ default:
+ PrintError("Invalid CPU Operating Mode: %d\n", info->cpu_mode);
+ return -1;
- PrintDebug("New CR0=%x, New Shadow CR0=%x\n", *real_cr0, *shadow_cr0);
- } else {
- PrintDebug("Old CR0=%x\n", *real_cr0);
- *real_cr0 = *new_cr0;
- PrintDebug("New CR0=%x\n", *real_cr0);
- }
+ }
+}
- info->rip += index;
+static int handle_mov_to_cr0_32pae(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("32 bit PAE mov to CR0 not implemented\n");
+ return -1;
+}
- } else {
- PrintDebug("Unsupported Instruction\n");
- // unsupported instruction, UD the guest
- return -1;
- }
+static int handle_mov_to_cr0_64(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("64 bit mov to CR0 not implemented\n");
+ return -1;
+}
+static int handle_mov_to_cr0_64compat(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("64 bit compatibility mode move to CR0 not implemented\n");
+ return -1;
+}
- } else if (info->cpu_mode == PROTECTED) {
- int index = 0;
- int ret;
- PrintDebug("Protected Mode write to CR0\n");
+static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr) {
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
+ // 32 bit registers
+ struct cr0_32 *real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+ struct cr0_32 *new_cr0= (struct cr0_32 *)(dec_instr->src_operand.operand);
+
+ PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
+
+
+ PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
+ *real_cr0 = *new_cr0;
+
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+
+ PrintDebug("Old Shadow CR0=%x\n", *(uint_t *)shadow_cr0);
+
+ real_cr0->et = 1;
+
+ *shadow_cr0 = *new_cr0;
+ shadow_cr0->et = 1;
+
+ if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
+ struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
+ PrintDebug("Setting up Shadow Page Table\n");
+ info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
+ } else {
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+ real_cr0->pg = 1;
}
+
+ PrintDebug("New Shadow CR0=%x\n",*(uint_t *)shadow_cr0);
+ }
+ PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
+
+ return 0;
+}
- while (is_prefix_byte(instr[index])) {
- index++;
- }
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_to_cr_byte)) {
-
- addr_t first_operand;
- addr_t second_operand;
- struct cr0_32 *real_cr0;
- struct cr0_32 *new_cr0;
- operand_type_t addr_type;
- index += 2;
+
+static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
+ // CLTS
+ struct cr0_32 *real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+
+ real_cr0->ts = 0;
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ shadow_cr0->ts = 0;
+ }
+ return 0;
+}
+
+
+static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
+ struct cr0_real *real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
+ struct cr0_real *new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
+ uchar_t new_cr0_val;
+
+ PrintDebug("LMSW\n");
+
+ new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
- real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+ PrintDebug("OperandVal = %x\n", new_cr0_val);
+
+ PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
+ *(uchar_t*)real_cr0 &= 0xf0;
+ *(uchar_t*)real_cr0 |= new_cr0_val;
+ PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
+
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_real * shadow_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
+
+ PrintDebug(" Old Shadow CR0=%x\n", *(uint_t *)shadow_cr0);
+ *(uchar_t*)shadow_cr0 &= 0xf0;
+ *(uchar_t*)shadow_cr0 |= new_cr0_val;
+ PrintDebug("New Shadow CR0=%x\n", *(uint_t *)shadow_cr0);
+ }
+ return 0;
+}
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
- if (addr_type != REG_OPERAND) {
- return -1;
- }
- new_cr0 = (struct cr0_32 *)first_operand;
- if (info->page_mode == SHADOW_PAGING) {
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- if (new_cr0->pg == 1){
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
- info->cpu_mode = PROTECTED_PG;
-
- *shadow_cr0 = *new_cr0;
- *real_cr0 = *new_cr0;
- //
- // Activate Shadow Paging
- //
- PrintDebug("Turning on paging in the guest\n");
- info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
-
- } else if (new_cr0->pe == 0) {
- info->cpu_mode = REAL;
+// First attempt = 253 lines
+// current = 51 lines
+int v3_handle_cr0_read(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
- *shadow_cr0 = *new_cr0;
- *real_cr0 = *new_cr0;
- real_cr0->pg = 1;
- }
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+ /* The IFetch will already have faulted in the necessary bytes for the full instruction
+ if (ret != 15) {
+ // I think we should inject a GPF into the guest
+ PrintError("Could not read instruction (ret=%d)\n", ret);
+ return -1;
+ }
+ */
- } else {
- *real_cr0 = *new_cr0;
- }
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
+
+ if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ struct cr0_32 * virt_cr0 = (struct cr0_32 *)(dec_instr.dst_operand.operand);
+ struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+
+ PrintDebug("MOVCR2\n");
+ PrintDebug("CR0 at 0x%p\n", (void *)real_cr0);
- info->rip += index;
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ } else {
+ *virt_cr0 = *real_cr0;
}
- } else {
- PrintDebug("Unknown Mode write to CR0\n");
+ PrintDebug("real CR0: %x\n", *(uint_t*)real_cr0);
+ PrintDebug("returned CR0: %x\n", *(uint_t*)virt_cr0);
+ } else if (v3_opcode_cmp(V3_OPCODE_SMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ struct cr0_real *real_cr0= (struct cr0_real*)&(info->ctrl_regs.cr0);
+ struct cr0_real *virt_cr0 = (struct cr0_real *)(dec_instr.dst_operand.operand);
+ char cr0_val = *(char*)real_cr0 & 0x0f;
+
+ PrintDebug("SMSW\n");
+
+ PrintDebug("CR0 at 0x%p\n", real_cr0);
+
+ *(char *)virt_cr0 &= 0xf0;
+ *(char *)virt_cr0 |= cr0_val;
+
+ } else {
+ PrintError("Unhandled opcode in handle_cr0_read\n");
return -1;
}
+
+ info->rip += dec_instr.instr_length;
+
return 0;
}
-int handle_cr0_read(struct guest_info * info) {
- char instr[15];
- if (info->cpu_mode == REAL) {
- int index = 0;
- int ret;
- // The real rip address is actually a combination of the rip + CS base
+// First Attempt = 256 lines
+// current = 65 lines
+int v3_handle_cr3_write(struct guest_info * info) {
+ int ret;
+ uchar_t instr[15];
+ struct x86_instr dec_instr;
+
+ if (info->mem_mode == PHYSICAL_MEM) {
ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read Real Mode instruction (ret=%d)\n", ret);
- return -1;
- }
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
- while (is_prefix_byte(instr[index])) {
- index++;
- }
+ if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ PrintDebug("MOV2CR3\n");
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == smsw_byte) &&
- (MODRM_REG(instr[index + 2]) == smsw_reg_byte)) {
+ if (info->mem_mode == PHYSICAL_MEM) {
+ // All we do is update the guest CR3
- addr_t first_operand;
- addr_t second_operand;
- struct cr0_real *cr0;
- operand_type_t addr_type;
- char cr0_val = 0;
+ if (info->cpu_mode == LONG) {
+ struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
+ *guest_cr3 = *new_cr3;
+ } else {
+ struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ *guest_cr3 = *new_cr3;
+ }
- index += 2;
-
- cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
-
-
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG16);
-
- if (addr_type == MEM_OPERAND) {
- addr_t host_addr;
-
- if (guest_pa_to_host_va(info, first_operand + (info->segments.ds.base << 4), &host_addr) == -1) {
- // gpf the guest
+ } else {
+
+ switch (info->cpu_mode) {
+ case PROTECTED:
+ if (handle_mov_to_cr3_32(info, &dec_instr) == -1) {
return -1;
}
-
- first_operand = host_addr;
- } else {
- // error... don't know what to do
+ case PROTECTED_PAE:
+ if (handle_mov_to_cr3_32pae(info, &dec_instr) == -1) {
+ return -1;
+ }
+ case LONG:
+ if (handle_mov_to_cr3_64(info, &dec_instr) == -1) {
+ return -1;
+ }
+ case LONG_32_COMPAT:
+ if (handle_mov_to_cr3_64compat(info, &dec_instr) == -1) {
+ return -1;
+ }
+ default:
+ PrintError("Unhandled CPU mode: %d\n", info->cpu_mode);
return -1;
}
+ }
+ } else {
+ PrintError("Unhandled opcode in handle_cr3_write\n");
+ return -1;
+ }
- cr0_val = *(char*)cr0 & 0x0f;
+ info->rip += dec_instr.instr_length;
- *(char *)first_operand &= 0xf0;
- *(char *)first_operand |= cr0_val;
+ return 0;
+}
- PrintDebug("index = %d, rip = %x\n", index, (ulong_t)(info->rip));
- info->rip += index;
- PrintDebug("new_rip = %x\n", (ulong_t)(info->rip));
- } else if ((instr[index] == cr_access_byte) &&
- (instr[index+1] == mov_from_cr_byte)) {
- /* Mov from CR0
- * This can only take a 32 bit register argument in anything less than 64 bit mode.
- */
- addr_t first_operand;
- addr_t second_operand;
- operand_type_t addr_type;
- struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- index += 2;
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
-
- struct cr0_32 * virt_cr0 = (struct cr0_32 *)first_operand;
-
- if (addr_type != REG_OPERAND) {
- // invalid opcode to guest
- PrintDebug("Invalid operand type in mov from CR0\n");
- return -1;
- }
- if (info->page_mode == SHADOW_PAGING) {
- *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- } else {
- *virt_cr0 = *real_cr0;
- }
- info->rip += index;
- } else {
- PrintDebug("Unknown read instr from CR0\n");
+static int handle_mov_to_cr3_32(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr->src_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
+ int cached = 0;
+
+
+ PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
+
+
+ cached = v3_cache_page_tables32(info, (addr_t)V3_PAddr((void *)(addr_t)CR3_TO_PDE32((void *)*(addr_t *)new_cr3)));
+
+ if (cached == -1) {
+ PrintError("CR3 Cache failed\n");
return -1;
+ } else if (cached == 0) {
+ addr_t shadow_pt;
+
+ if(info->mem_mode == VIRTUAL_MEM) {
+ PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
+ delete_page_tables_32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+ }
+
+ shadow_pt = v3_create_new_shadow_pt();
+
+ shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PD32_BASE_ADDR(shadow_pt));
+ PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
+ //PrintDebugPageTables( (pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3) );
+
+
+ } else {
+ PrintDebug("Reusing cached shadow Page table\n");
}
+
+
+ shadow_cr3->pwt = new_cr3->pwt;
+ shadow_cr3->pcd = new_cr3->pcd;
+
+ // What the hell...
+ *guest_cr3 = *new_cr3;
+
+ PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
+ if (info->mem_mode == VIRTUAL_MEM) {
+ // If we aren't in paged mode then we have to preserve the identity mapped CR3
+ info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
+ }
+ }
+ return 0;
+}
- } else if (info->cpu_mode == PROTECTED) {
- int index = 0;
- int ret;
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read Proteced mode instruction (ret=%d)\n", ret);
- return -1;
- }
+static int handle_mov_to_cr3_32pae(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("32 Bit PAE mode Mov to CR3 not implemented\n");
+ return -1;
+}
- while (is_prefix_byte(instr[index])) {
- index++;
- }
+static int handle_mov_to_cr3_64(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("Long mode Mov to CR3 not implemented\n");
+ return -1;
+}
+static int handle_mov_to_cr3_64compat(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("Long compatiblity mode move to CR3 not implemented\n");
+ return -1;
+}
- if ((instr[index] == cr_access_byte) &&
- (instr[index+1] == mov_from_cr_byte)) {
- addr_t first_operand;
- addr_t second_operand;
- operand_type_t addr_type;
- struct cr0_32 * virt_cr0;
- struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- index += 2;
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+// first attempt = 156 lines
+// current = 36 lines
+int v3_handle_cr3_read(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
- if (addr_type != REG_OPERAND) {
- PrintDebug("Invalid operand type in mov from CR0\n");
- return -1;
- }
-
- virt_cr0 = (struct cr0_32 *)first_operand;
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
- if (info->page_mode == SHADOW_PAGING) {
- *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- } else {
- *virt_cr0 = *real_cr0;
- }
-
- info->rip += index;
+ /* The IFetch will already have faulted in the necessary bytes for the full instruction
+ if (ret != 15) {
+ // I think we should inject a GPF into the guest
+ PrintError("Could not read instruction (ret=%d)\n", ret);
+ return -1;
+ }
+ */
- } else {
- PrintDebug("Unknown read instruction from CR0\n");
- return -1;
- }
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
+
+ if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ PrintDebug("MOVCR32\n");
+ struct cr3_32 * virt_cr3 = (struct cr3_32 *)(dec_instr.dst_operand.operand);
+ PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ *virt_cr3 = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ } else {
+ *virt_cr3 = *(struct cr3_32 *)&(info->ctrl_regs.cr3);
+ }
} else {
- PrintDebug("Unknown mode read from CR0\n");
+ PrintError("Unhandled opcode in handle_cr3_read\n");
return -1;
}
+ info->rip += dec_instr.instr_length;
return 0;
}
+int v3_handle_cr4_read(struct guest_info * info) {
+ PrintError("CR4 Read not handled\n");
+ return -1;
+}
+int v3_handle_cr4_write(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
-
-int handle_cr3_write(struct guest_info * info) {
- if ((info->cpu_mode == PROTECTED) || (info->cpu_mode == PROTECTED_PG)) {
- int index = 0;
- int ret;
- char instr[15];
-
+ if (info->mem_mode == PHYSICAL_MEM) {
ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
-
- while (is_prefix_byte(instr[index])) {
- index++;
- }
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_to_cr_byte)) {
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
- addr_t first_operand;
- addr_t second_operand;
- struct cr3_32 * new_cr3;
- // struct cr3_32 * real_cr3;
- operand_type_t addr_type;
+ if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) != 0) {
+ PrintError("Invalid opcode in write to CR4\n");
+ return -1;
+ }
- index += 2;
+ if ((info->cpu_mode == PROTECTED) || (info->cpu_mode == PROTECTED_PAE)) {
+ struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
+ struct cr4_32 * old_cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
+
+ PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
+ PrintDebug("Old CR4=%x\n", *(uint_t *)old_cr4);
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
- if (addr_type != REG_OPERAND) {
- /* Mov to CR3 can only be a 32 bit register */
- return -1;
- }
- new_cr3 = (struct cr3_32 *)first_operand;
- if (info->page_mode == SHADOW_PAGING) {
- addr_t shadow_pt;
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ if ((info->shdw_pg_mode == SHADOW_PAGING) &&
+ (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
+ if ((old_cr4->pae == 0) && (new_cr4->pae == 1)) {
+ PrintDebug("Creating PAE passthrough tables\n");
- *guest_cr3 = *new_cr3;
+ // Delete the old 32 bit direct map page tables
+ delete_page_tables_32((pde32_t *)V3_VAddr((void *)(info->direct_map_pt)));
- // Something like this
- shadow_pt = create_new_shadow_pt32(info);
- //shadow_pt = setup_shadow_pt32(info, CR3_TO_PDE32(*(addr_t *)new_cr3));
+ // create 32 bit PAE direct map page table
+ info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_32PAE(info));
- /* Copy Various flags */
- *shadow_cr3 = *new_cr3;
-
- shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt);
+ // reset cr3 to new page tables
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
- if (info->cpu_mode == PROTECTED_PG) {
- // If we aren't in paged mode then we have to preserve the identity mapped CR3
- info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
- }
+ } else if ((old_cr4->pae == 1) && (new_cr4->pae == 0)) {
+ // Create passthrough standard 32bit pagetables
+ return -1;
}
+ }
- info->rip += index;
+ *old_cr4 = *new_cr4;
+ PrintDebug("New CR4=%x\n", *(uint_t *)old_cr4);
- } else {
- PrintDebug("Unknown Instruction\n");
- return -1;
- }
} else {
- PrintDebug("Invalid operating Mode\n");
return -1;
}
+ info->rip += dec_instr.instr_length;
return 0;
}
+int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) {
+ struct guest_info * info = (struct guest_info *)(priv_data);
+ PrintDebug("EFER Read\n");
+ dst->value = info->guest_efer.value;
-int handle_cr3_read(struct guest_info * info) {
- if ((info->cpu_mode == PROTECTED) || (info->cpu_mode == PROTECTED_PG)) {
- int index = 0;
- int ret;
- char instr[15];
-
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
-
- while (is_prefix_byte(instr[index])) {
- index++;
- }
+ info->rip += 2; // WRMSR/RDMSR are two byte operands
+ return 0;
+}
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_from_cr_byte)) {
- addr_t first_operand;
- addr_t second_operand;
- struct cr3_32 * virt_cr3;
- struct cr3_32 * real_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- operand_type_t addr_type;
- index += 2;
+int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
+ struct guest_info * info = (struct guest_info *)(priv_data);
+ struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
+ struct efer_64 * old_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+ PrintDebug("EFER Write\n");
+ PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(old_efer));
- if (addr_type != REG_OPERAND) {
- /* Mov to CR3 can only be a 32 bit register */
- return -1;
- }
+ // We virtualize the guests efer to hide the SVME and LMA bits
+ info->guest_efer.value = src.value;
- virt_cr3 = (struct cr3_32 *)first_operand;
+ if ((info->shdw_pg_mode == SHADOW_PAGING) &&
+ (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
+
+ if ((old_efer->lme == 0) && (new_efer->lme == 1)) {
+ PrintDebug("Transition to longmode\n");
+ PrintDebug("Creating Passthrough 64 bit page tables\n");
+
+ // Delete the old 32 bit direct map page tables
+ /*
+ * JRL BUG?
+ * Will these page tables always be in PAE format??
+ */
+ PrintDebug("Deleting old PAE Page tables\n");
+ PrintError("JRL BUG?: Will the old page tables always be in PAE format??\n");
+ delete_page_tables_32PAE((pdpe32pae_t *)V3_VAddr((void *)(info->direct_map_pt)));
+
+ // create 64 bit direct map page table
+ info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(info));
+
+ // reset cr3 to new page tables
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+
- if (info->page_mode == SHADOW_PAGING) {
- *virt_cr3 = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- } else {
- *virt_cr3 = *real_cr3;
- }
+ // Does this mean we will have to fully virtualize a shadow EFER?? (yes it does)
+ new_efer->lma = 1;
+
+ } else if ((old_efer->lme == 1) && (new_efer->lme == 0)) {
+ // transition out of long mode
+ //((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
+ //((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
- info->rip += index;
- } else {
- PrintDebug("Unknown Instruction\n");
return -1;
}
+
+ *old_efer = *new_efer;
+ PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(old_efer));
} else {
- PrintDebug("Invalid operating Mode\n");
return -1;
}
+ info->rip += 2; // WRMSR/RDMSR are two byte operands
+
return 0;
}
