+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
#include <palacios/vmm_mem.h>
#include <palacios/vmm.h>
#include <palacios/vmcb.h>
#endif
+static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr);
+
+static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_32pae(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_64(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr0_64compat(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_32(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_32pae(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_64(struct guest_info * info, struct x86_instr * dec_instr);
+static int handle_mov_to_cr3_64compat(struct guest_info * info, struct x86_instr * dec_instr);
-int handle_cr0_write(struct guest_info * info) {
- char instr[15];
+// First Attempt = 494 lines
+// current = 106 lines
+int v3_handle_cr0_write(struct guest_info * info) {
+ uchar_t instr[15];
int ret;
struct x86_instr dec_instr;
ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
- if (ret != 15) {
+ /* The IFetch will already have faulted in the necessary bytes for the full instruction
+ if (ret != 15) {
// I think we should inject a GPF into the guest
PrintError("Could not read instruction (ret=%d)\n", ret);
return -1;
- }
+ }
+ */
if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
PrintError("Could not decode instruction\n");
return -1;
}
+ if (v3_opcode_cmp(V3_OPCODE_LMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
- if (opcode_cmp(V3_OPCODE_LMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
- struct cr0_real *real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
- struct cr0_real *new_cr0 = (struct cr0_real *)(dec_instr.first_operand.operand);
- uchar_t new_cr0_val;
-
- PrintDebug("LMSW\n");
-
- new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
-
- PrintDebug("OperandVal = %x\n", new_cr0_val);
-
- PrintDebug("Old CR0=%x\n", *real_cr0);
- *(uchar_t*)real_cr0 &= 0xf0;
- *(uchar_t*)real_cr0 |= new_cr0_val;
- PrintDebug("New CR0=%x\n", *real_cr0);
-
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_real * shadow_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
-
- PrintDebug(" Old Shadow CR0=%x\n", *shadow_cr0);
- *(uchar_t*)shadow_cr0 &= 0xf0;
- *(uchar_t*)shadow_cr0 |= new_cr0_val;
- PrintDebug("New Shadow CR0=%x\n", *shadow_cr0);
+ if (handle_lmsw(info, &dec_instr) == -1) {
+ return -1;
}
- } else if (opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
- PrintDebug("MOV2CR0\n");
- if (info->cpu_mode == LONG) {
- // 64 bit registers
- } else {
- // 32 bit registers
- struct cr0_32 *real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
- struct cr0_32 *new_cr0= (struct cr0_32 *)(dec_instr.second_operand.operand);
-
- PrintDebug("OperandVal = %x, length=%d\n", *new_cr0, dec_instr.first_operand.size);
-
-
- PrintDebug("Old CR0=%x\n", *real_cr0);
- *real_cr0 = *new_cr0;
-
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
-
- PrintDebug("Old Shadow CR0=%x\n", *shadow_cr0);
-
- real_cr0->et = 1;
-
- *shadow_cr0 = *new_cr0;
- shadow_cr0->et = 1;
-
- if (get_mem_mode(info) == VIRTUAL_MEM) {
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
-
- info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
- } else {
- info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
- real_cr0->pg = 1;
- }
-
- PrintDebug("New Shadow CR0=%x\n",*shadow_cr0);
- }
- PrintDebug("New CR0=%x\n", *real_cr0);
+ } else if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
+
+ if (handle_mov_to_cr0(info, &dec_instr) == -1) {
+ return -1;
}
- } else if (opcode_cmp(V3_OPCODE_CLTS, (const uchar_t *)(dec_instr.opcode)) == 0) {
- // CLTS
- struct cr0_32 *real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
-
- real_cr0->ts = 0;
+ } else if (v3_opcode_cmp(V3_OPCODE_CLTS, (const uchar_t *)(dec_instr.opcode)) == 0) {
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- shadow_cr0->ts = 0;
+ if (handle_clts(info, &dec_instr) == -1) {
+ return -1;
}
+
+ } else {
+ PrintError("Unhandled opcode in handle_cr0_write\n");
+ return -1;
}
info->rip += dec_instr.instr_length;
}
-int handle_cr0_read(struct guest_info * info) {
- char instr[15];
-
- switch (info->cpu_mode) {
-
- case REAL:
- {
- int index = 0;
- int ret;
- PrintDebug("Real Mode read from CR0 at linear guest pa 0x%x\n",get_addr_linear(info,info->rip,&(info->segments.cs)));
- //PrintV3Segments(info);
+static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintDebug("MOV2CR0\n");
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- if (ret != 15) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read Real Mode instruction (ret=%d)\n", ret);
- return -1;
- }
-
-
- while (is_prefix_byte(instr[index])) {
- switch(instr[index]) {
- case PREFIX_CS_OVERRIDE:
- case PREFIX_SS_OVERRIDE:
- case PREFIX_DS_OVERRIDE:
- case PREFIX_ES_OVERRIDE:
- case PREFIX_FS_OVERRIDE:
- case PREFIX_GS_OVERRIDE:
- PrintDebug("Segment Override!!\n");
- return -1;
- break;
- default:
- break;
- }
- index++;
- }
-
- /*
- while (is_prefix_byte(instr[index])) {
- index++;
- }
- */
-
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == smsw_byte) &&
- (MODRM_REG(instr[index + 2]) == smsw_reg_byte)) {
-
- // SMSW (store machine status word)
-
- addr_t first_operand;
- addr_t second_operand;
- struct cr0_real *cr0;
- operand_type_t addr_type;
- char cr0_val = 0;
-
- index += 2;
-
- cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
-
-
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG16);
-
- if (addr_type == MEM_OPERAND) {
- addr_t host_addr;
-
- if (guest_pa_to_host_va(info, first_operand + (info->segments.ds.base << 4), &host_addr) == -1) {
- // gpf the guest
- PrintDebug("Could not convert guest physical address to host virtual address\n");
- return -1;
- }
-
- first_operand = host_addr;
- } else {
- // Register operand
- // Should be ok??
- }
-
- cr0_val = *(char*)cr0 & 0x0f;
+ switch (info->cpu_mode) {
+ case REAL:
+ case PROTECTED:
+ return handle_mov_to_cr0_32(info, dec_instr);
+ case PROTECTED_PAE:
+ return handle_mov_to_cr0_32pae(info, dec_instr);
+ case LONG:
+ return handle_mov_to_cr0_64(info, dec_instr);
+ case LONG_32_COMPAT:
+ return handle_mov_to_cr0_64compat(info, dec_instr);
+ default:
+ PrintError("Invalid CPU Operating Mode: %d\n", info->cpu_mode);
+ return -1;
- *(char *)first_operand &= 0xf0;
- *(char *)first_operand |= cr0_val;
+ }
+}
- PrintDebug("index = %d, rip = %x\n", index, (ulong_t)(info->rip));
- info->rip += index;
- PrintDebug("new_rip = %x\n", (ulong_t)(info->rip));
- // success
+static int handle_mov_to_cr0_32pae(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("32 bit PAE mov to CR0 not implemented\n");
+ return -1;
+}
- } else if ((instr[index] == cr_access_byte) &&
- (instr[index+1] == mov_from_cr_byte)) {
- /* Mov from CR0
- * This can only take a 32 bit register argument in anything less than 64 bit mode.
- */
- addr_t first_operand;
- addr_t second_operand;
- operand_type_t addr_type;
+static int handle_mov_to_cr0_64(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("64 bit mov to CR0 not implemented\n");
+ return -1;
+}
- struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+static int handle_mov_to_cr0_64compat(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("64 bit compatibility mode move to CR0 not implemented\n");
+ return -1;
+}
- index += 2;
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
-
- struct cr0_32 * virt_cr0 = (struct cr0_32 *)first_operand;
+static int handle_mov_to_cr0_32(struct guest_info * info, struct x86_instr * dec_instr) {
+ // 32 bit registers
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+ struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- if (addr_type != REG_OPERAND) {
- // invalid opcode to guest
- PrintDebug("Invalid operand type in mov from CR0\n");
- return -1;
- }
+ PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
+
+ PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
+ PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
- } else {
- *virt_cr0 = *real_cr0;
- }
+ // Guest always sees the value they wrote
+ *guest_cr0 = *new_cr0;
- PrintDebug("Returning CR0: %x\n", *virt_cr0);
+ // This value must always be set to 1
+ guest_cr0->et = 1;
- info->rip += index;
+ // Set the shadow register to catch non-virtualized flags
+ *shadow_cr0 = *guest_cr0;
+
- } else {
- PrintDebug("Unknown read instr from CR0\n");
- return -1;
- }
+ if (v3_get_mem_mode(info) == VIRTUAL_MEM) {
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ PrintDebug("Setting up Guest Page Table\n");
+ info->ctrl_regs.cr3 = *(addr_t*)guest_cr3;
+ } else {
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+ shadow_cr0->pg = 1;
+ }
+
+ PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
+
+ PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
+
+ return 0;
+}
- }
- break;
- case PROTECTED:
- {
-
- int index = 0;
- int ret;
-
- PrintDebug("Protected %s Mode read from CR0 at guest %s linear rip 0x%x\n",
- info->mem_mode == VIRTUAL_MEM ? "Paged" : "",
- info->mem_mode == VIRTUAL_MEM ? "virtual" : "",
- get_addr_linear(info, info->rip, &(info->segments.cs)));
-
- // We need to read the instruction, which is at CS:IP, but that
- // linear address is guest physical without PG and guest virtual with PG
- if (info->cpu_mode == PHYSICAL_MEM) {
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
+static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
+ // CLTS
+ struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
+
+ real_cr0->ts = 0;
+
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ guest_cr0->ts = 0;
+ }
+ return 0;
+}
- /*
- PrintDebug("Instr (15 bytes) at %x:\n", instr);
- PrintTraceMemDump((char*)instr, 15);
- */
- if (ret != 15) {
- // I think we should inject a GPF into the guest
- PrintDebug("Could not read Protected %s mode instruction (ret=%d)\n",
- info->cpu_mode == VIRTUAL_MEM ? "Paged" : "", ret);
- return -1;
- }
+static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
+ struct cr0_real * real_cr0 = (struct cr0_real*)&(info->ctrl_regs.cr0);
+ struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->src_operand.operand);
+ uchar_t new_cr0_val;
+
+ PrintDebug("LMSW\n");
+
+ new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
+
+ PrintDebug("OperandVal = %x\n", new_cr0_val);
+
+ // We can just copy the new value through
+ // we don't need to virtualize the lower 4 bits
+ PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
+ *(uchar_t*)real_cr0 &= 0xf0;
+ *(uchar_t*)real_cr0 |= new_cr0_val;
+ PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
+
+
+ // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
+
+ PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
+ *(uchar_t*)guest_cr0 &= 0xf0;
+ *(uchar_t*)guest_cr0 |= new_cr0_val;
+ PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
+ }
+ return 0;
+}
- while (is_prefix_byte(instr[index])) {
- switch(instr[index]) {
- case PREFIX_CS_OVERRIDE:
- case PREFIX_SS_OVERRIDE:
- case PREFIX_DS_OVERRIDE:
- case PREFIX_ES_OVERRIDE:
- case PREFIX_FS_OVERRIDE:
- case PREFIX_GS_OVERRIDE:
- PrintDebug("Segment Override!!\n");
- return -1;
- break;
- default:
- break;
- }
- index++;
- }
- /*
- while (is_prefix_byte(instr[index])) {
- index++;
- }
- */
- if ((instr[index] == cr_access_byte) &&
- (instr[index+1] == mov_from_cr_byte)) {
-
- // MOV from CR0 to register
-
- addr_t first_operand;
- addr_t second_operand;
- operand_type_t addr_type;
- struct cr0_32 * virt_cr0;
- struct cr0_32 * real_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
+// First attempt = 253 lines
+// current = 51 lines
+int v3_handle_cr0_read(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
- index += 2;
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+ /* The IFetch will already have faulted in the necessary bytes for the full instruction
+ if (ret != 15) {
+ // I think we should inject a GPF into the guest
+ PrintError("Could not read instruction (ret=%d)\n", ret);
+ return -1;
+ }
+ */
- if (addr_type != REG_OPERAND) {
- PrintDebug("Invalid operand type in mov from CR0\n");
- return -1;
- }
-
- virt_cr0 = (struct cr0_32 *)first_operand;
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- *virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
-
- if (info->mem_mode == PHYSICAL_MEM) {
- virt_cr0->pg = 0; // clear the pg bit because guest doesn't think it's on
- }
-
- } else {
- *virt_cr0 = *real_cr0;
- }
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
+
+ if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
+ struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- PrintDebug("real CR0: %x\n", *(uint_t*)real_cr0);
- PrintDebug("returned CR0: %x\n", *(uint_t*)virt_cr0);
-
- info->rip += index;
+ PrintDebug("MOVCR2\n");
- } else {
- PrintDebug("Unknown read instruction from CR0\n");
- return -1;
- }
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+ *dst_reg = *guest_cr0;
+ } else {
+ *dst_reg = *shadow_cr0;
}
- break;
- case PROTECTED_PAE:
- PrintDebug("Protected PAE Mode read to CR0 is UNIMPLEMENTED\n");
- return -1;
+ PrintDebug("Shadow CR0: %x\n", *(uint_t*)shadow_cr0);
+ PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
+ } else if (v3_opcode_cmp(V3_OPCODE_SMSW, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
+ struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
+ char cr0_val = *(char*)shadow_cr0 & 0x0f;
+
+ PrintDebug("SMSW\n");
- case LONG:
- PrintDebug("Protected Long Mode read to CR0 is UNIMPLEMENTED\n");
+ // The lower 4 bits of the guest/shadow CR0 are mapped through
+ // We can treat nested and shadow paging the same here
+ *(char *)dst_reg &= 0xf0;
+ *(char *)dst_reg |= cr0_val;
+
+ } else {
+ PrintError("Unhandled opcode in handle_cr0_read\n");
return -1;
-
-
- default:
- {
- PrintDebug("Unknown Mode read from CR0 (info->cpu_mode=0x%x)\n",info->cpu_mode);
- return -1;
- }
- break;
}
+ info->rip += dec_instr.instr_length;
return 0;
}
-int handle_cr3_write(struct guest_info * info) {
- if (info->cpu_mode == REAL) {
- // WHAT THE HELL DOES THIS EVEN MEAN?????
-
- int index = 0;
- int ret;
- char instr[15];
-
- PrintDebug("Real Mode Write to CR3.\n");
- // We need to read the instruction, which is at CS:IP, but that
- // linear address is guest physical without PG and guest virtual with PG
+// First Attempt = 256 lines
+// current = 65 lines
+int v3_handle_cr3_write(struct guest_info * info) {
+ int ret;
+ uchar_t instr[15];
+ struct x86_instr dec_instr;
+ if (info->mem_mode == PHYSICAL_MEM) {
ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
- if (ret != 15) {
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
-
- while (is_prefix_byte(instr[index])) {
- switch(instr[index]) {
- case PREFIX_CS_OVERRIDE:
- case PREFIX_SS_OVERRIDE:
- case PREFIX_DS_OVERRIDE:
- case PREFIX_ES_OVERRIDE:
- case PREFIX_FS_OVERRIDE:
- case PREFIX_GS_OVERRIDE:
- PrintDebug("Segment Override!!\n");
- return -1;
- break;
- default:
- break;
- }
- index++;
- }
-
-
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_to_cr_byte)) {
-
- addr_t first_operand;
- addr_t second_operand;
- struct cr3_32 * new_cr3;
- // struct cr3_32 * real_cr3;
- operand_type_t addr_type;
-
- index += 2;
-
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
- if (addr_type != REG_OPERAND) {
- /* Mov to CR3 can only be a 32 bit register */
- return -1;
- }
+ if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ PrintDebug("MOV2CR3\n");
- new_cr3 = (struct cr3_32 *)first_operand;
+ if (info->mem_mode == PHYSICAL_MEM) {
+ // All we do is update the guest CR3
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- addr_t shadow_pt;
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
+ if (info->cpu_mode == LONG) {
+ struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
+ *guest_cr3 = *new_cr3;
+ } else {
+ struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
-
- /*
-
- if (CR3_TO_PDE32(*(uint_t*)shadow_cr3) != 0) {
- PrintDebug("Shadow Page Table\n");
- PrintDebugPageTables((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
- }
- */
-
- /* Delete the current Page Tables */
- delete_page_tables_pde32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
-
- PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
- *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
-
-
*guest_cr3 = *new_cr3;
-
-
-
- // Something like this
- shadow_pt = create_new_shadow_pt32(info);
- //shadow_pt = setup_shadow_pt32(info, CR3_TO_PDE32(*(addr_t *)new_cr3));
-
- /* Copy Various flags */
- *shadow_cr3 = *new_cr3;
-
- /*
- {
- addr_t tmp_addr;
- guest_pa_to_host_va(info, ((*(uint_t*)guest_cr3) & 0xfffff000), &tmp_addr);
- PrintDebug("Guest PD\n");
- PrintPD32((pde32_t *)tmp_addr);
-
- }
- */
-
-
- shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt);
-
- PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
- *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
-
-
-
-
}
- info->rip += index;
} else {
- PrintDebug("Unknown Instruction\n");
- PrintTraceMemDump(instr,15);
- return -1;
- }
-
-
-
- } else if (info->cpu_mode == PROTECTED) {
- int index = 0;
- int ret;
- char instr[15];
-
- PrintDebug("Protected %s mode write to CR3 at %s 0x%x\n",
- info->cpu_mode==PROTECTED ? "" : "Paged",
- info->cpu_mode==PROTECTED ? "guest physical" : "guest virtual",
- get_addr_linear(info,info->rip,&(info->segments.cs)));
-
- // We need to read the instruction, which is at CS:IP, but that
- // linear address is guest physical without PG and guest virtual with PG
- if (info->mem_mode == PHYSICAL_MEM) {
- // The real rip address is actually a combination of the rip + CS base
- //PrintDebug("Writing Guest CR3 Write (Physical Address)\n");
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- //PrintDebug("Writing Guest CR3 Write (Virtual Address)\n");
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
- if (ret != 15) {
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
-
- while (is_prefix_byte(instr[index])) {
- switch(instr[index]) {
- case PREFIX_CS_OVERRIDE:
- case PREFIX_SS_OVERRIDE:
- case PREFIX_DS_OVERRIDE:
- case PREFIX_ES_OVERRIDE:
- case PREFIX_FS_OVERRIDE:
- case PREFIX_GS_OVERRIDE:
- PrintDebug("Segment Override!!\n");
- return -1;
- break;
+ switch (info->cpu_mode) {
+ case PROTECTED:
+ if (handle_mov_to_cr3_32(info, &dec_instr) == -1) {
+ return -1;
+ }
+ case PROTECTED_PAE:
+ if (handle_mov_to_cr3_32pae(info, &dec_instr) == -1) {
+ return -1;
+ }
+ case LONG:
+ if (handle_mov_to_cr3_64(info, &dec_instr) == -1) {
+ return -1;
+ }
+ case LONG_32_COMPAT:
+ if (handle_mov_to_cr3_64compat(info, &dec_instr) == -1) {
+ return -1;
+ }
default:
- break;
+ PrintError("Unhandled CPU mode: %d\n", info->cpu_mode);
+ return -1;
}
- index++;
}
-
- /*
- while (is_prefix_byte(instr[index])) {
- index++;
- }
- */
+ } else {
+ PrintError("Unhandled opcode in handle_cr3_write\n");
+ return -1;
+ }
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_to_cr_byte)) {
+ info->rip += dec_instr.instr_length;
- addr_t first_operand;
- addr_t second_operand;
- struct cr3_32 * new_cr3;
- // struct cr3_32 * real_cr3;
- operand_type_t addr_type;
+ return 0;
+}
- index += 2;
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
- if (addr_type != REG_OPERAND) {
- /* Mov to CR3 can only be a 32 bit register */
- return -1;
- }
- new_cr3 = (struct cr3_32 *)first_operand;
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- addr_t shadow_pt;
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.shadow_cr3);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- /*
- if (CR3_TO_PDE32(*(uint_t*)shadow_cr3) != 0) {
- PrintDebug("Shadow Page Table\n");
- PrintDebugPageTables((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
- }
- */
+static int handle_mov_to_cr3_32(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
- /* Delete the current Page Tables */
- delete_page_tables_pde32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr->src_operand.operand);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ // struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
- *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
+ PrintDebug("Old Shadow CR3=%x; Old Guest CR3=%x\n",
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+
+ // Store the write value to virtualize CR3
+ *guest_cr3 = *new_cr3;
+
+ if (v3_activate_shadow_pt(info) == -1) {
+ PrintError("Failed to activate 32 bit shadow page table\n");
+ return -1;
+ }
- *guest_cr3 = *new_cr3;
+ PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
+ *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+ }
+ return 0;
+}
+static int handle_mov_to_cr3_32pae(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("32 Bit PAE mode Mov to CR3 not implemented\n");
+ return -1;
+}
- // Something like this
- shadow_pt = create_new_shadow_pt32(info);
- //shadow_pt = setup_shadow_pt32(info, CR3_TO_PDE32(*(addr_t *)new_cr3));
+static int handle_mov_to_cr3_64(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("Long mode Mov to CR3 not implemented\n");
+ return -1;
+}
- /* Copy Various flags */
- *shadow_cr3 = *new_cr3;
+static int handle_mov_to_cr3_64compat(struct guest_info * info, struct x86_instr * dec_instr) {
+ PrintError("Long compatiblity mode move to CR3 not implemented\n");
+ return -1;
+}
- /*
- {
- addr_t tmp_addr;
- guest_pa_to_host_va(info, ((*(uint_t*)guest_cr3) & 0xfffff000), &tmp_addr);
- PrintDebug("Guest PD\n");
- PrintPD32((pde32_t *)tmp_addr);
- }
- */
-
- shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt);
+// first attempt = 156 lines
+// current = 36 lines
+int v3_handle_cr3_read(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
- PrintDebug("New Shadow CR3=%x; New Guest CR3=%x\n",
- *(uint_t*)shadow_cr3, *(uint_t*)guest_cr3);
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
+ /* The IFetch will already have faulted in the necessary bytes for the full instruction
+ if (ret != 15) {
+ // I think we should inject a GPF into the guest
+ PrintError("Could not read instruction (ret=%d)\n", ret);
+ return -1;
+ }
+ */
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
- if (info->mem_mode == VIRTUAL_MEM) {
- // If we aren't in paged mode then we have to preserve the identity mapped CR3
- info->ctrl_regs.cr3 = *(addr_t*)shadow_cr3;
- }
- }
+ if (v3_opcode_cmp(V3_OPCODE_MOVCR2, (const uchar_t *)(dec_instr.opcode)) == 0) {
+ PrintDebug("MOVCR32\n");
+ struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
- info->rip += index;
+ PrintDebug("CR3 at 0x%p\n", &(info->ctrl_regs.cr3));
+ if (info->shdw_pg_mode == SHADOW_PAGING) {
+ *dst_reg = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
} else {
- PrintDebug("Unknown Instruction\n");
- PrintTraceMemDump(instr,15);
- return -1;
+ *dst_reg = *(struct cr3_32 *)&(info->ctrl_regs.cr3);
}
} else {
- PrintDebug("Invalid operating Mode (0x%x)\n", info->cpu_mode);
+ PrintError("Unhandled opcode in handle_cr3_read\n");
return -1;
}
+ info->rip += dec_instr.instr_length;
+
return 0;
}
+int v3_handle_cr4_read(struct guest_info * info) {
+ PrintError("CR4 Read not handled\n");
+ return -1;
+}
+int v3_handle_cr4_write(struct guest_info * info) {
+ uchar_t instr[15];
+ int ret;
+ struct x86_instr dec_instr;
+ if (info->mem_mode == PHYSICAL_MEM) {
+ ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ } else {
+ ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
+ }
-int handle_cr3_read(struct guest_info * info) {
-
- if (info->cpu_mode == REAL) {
- char instr[15];
- int ret;
- int index = 0;
- addr_t linear_addr = 0;
+ if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
+ PrintError("Could not decode instruction\n");
+ return -1;
+ }
- linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
+ if (v3_opcode_cmp(V3_OPCODE_MOV2CR, (const uchar_t *)(dec_instr.opcode)) != 0) {
+ PrintError("Invalid opcode in write to CR4\n");
+ return -1;
+ }
+ if ((info->cpu_mode == PROTECTED) || (info->cpu_mode == PROTECTED_PAE)) {
+ struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
+ struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
- //PrintDebug("RIP Linear: %x\n", linear_addr);
- //PrintV3Segments(info);
-
- ret = read_guest_pa_memory(info, linear_addr, 15, instr);
+ PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
+ PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
- if (ret != 15) {
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
-
- while (is_prefix_byte(instr[index])) {
- switch(instr[index]) {
- case PREFIX_CS_OVERRIDE:
- case PREFIX_SS_OVERRIDE:
- case PREFIX_DS_OVERRIDE:
- case PREFIX_ES_OVERRIDE:
- case PREFIX_FS_OVERRIDE:
- case PREFIX_GS_OVERRIDE:
- PrintDebug("Segment Override!!\n");
- return -1;
- break;
- default:
- break;
- }
- index++;
- }
+ if ((info->shdw_pg_mode == SHADOW_PAGING) &&
+ (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
+ if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
+ PrintDebug("Creating PAE passthrough tables\n");
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_from_cr_byte)) {
- addr_t first_operand;
- addr_t second_operand;
- struct cr3_32 * virt_cr3;
- struct cr3_32 * real_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- operand_type_t addr_type;
+ // Delete the old 32 bit direct map page tables
+ delete_page_tables_32((pde32_t *)V3_VAddr((void *)(info->direct_map_pt)));
- index += 2;
+ // create 32 bit PAE direct map page table
+ info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_32PAE(info));
- addr_type = decode_operands16(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+ // reset cr3 to new page tables
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
- if (addr_type != REG_OPERAND) {
- /* Mov to CR3 can only be a 32 bit register */
+ } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
+ // Create passthrough standard 32bit pagetables
return -1;
}
-
- virt_cr3 = (struct cr3_32 *)first_operand;
-
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- *virt_cr3 = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- } else {
- *virt_cr3 = *real_cr3;
- }
-
- info->rip += index;
- } else {
- PrintDebug("Unknown Instruction\n");
- PrintTraceMemDump(instr,15);
- return -1;
}
+ *cr4 = *new_cr4;
+ PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
- return 0;
- } else if (info->cpu_mode == PROTECTED) {
+ } else {
+ PrintError("CR4 write not supported in CPU_MODE: %d\n", info->cpu_mode);
+ return -1;
+ }
- int index = 0;
- int ret;
- char instr[15];
+ info->rip += dec_instr.instr_length;
+ return 0;
+}
-
- // We need to read the instruction, which is at CS:IP, but that
- // linear address is guest physical without PG and guest virtual with PG
- if (info->cpu_mode == PHYSICAL_MEM) {
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- } else {
- // The real rip address is actually a combination of the rip + CS base
- ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
- }
- if (ret != 15) {
- PrintDebug("Could not read instruction (ret=%d)\n", ret);
- return -1;
- }
-
- while (is_prefix_byte(instr[index])) {
- switch(instr[index]) {
- case PREFIX_CS_OVERRIDE:
- case PREFIX_SS_OVERRIDE:
- case PREFIX_DS_OVERRIDE:
- case PREFIX_ES_OVERRIDE:
- case PREFIX_FS_OVERRIDE:
- case PREFIX_GS_OVERRIDE:
- PrintDebug("Segment Override!!\n");
- return -1;
- break;
- default:
- break;
- }
- index++;
- }
+int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) {
+ struct guest_info * info = (struct guest_info *)(priv_data);
+ PrintDebug("EFER Read\n");
- /*
- while (is_prefix_byte(instr[index])) {
- index++;
- }
- */
+ dst->value = info->guest_efer.value;
- if ((instr[index] == cr_access_byte) &&
- (instr[index + 1] == mov_from_cr_byte)) {
- addr_t first_operand;
- addr_t second_operand;
- struct cr3_32 * virt_cr3;
- struct cr3_32 * real_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- operand_type_t addr_type;
+ info->rip += 2; // WRMSR/RDMSR are two byte operands
+ return 0;
+}
- index += 2;
- addr_type = decode_operands32(&(info->vm_regs), instr + index, &index, &first_operand, &second_operand, REG32);
+int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
+ struct guest_info * info = (struct guest_info *)(priv_data);
+ struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
+ struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
+ struct v3_msr * guest_efer = &(info->guest_efer);
- if (addr_type != REG_OPERAND) {
- /* Mov to CR3 can only be a 32 bit register */
- return -1;
- }
+ PrintDebug("EFER Write\n");
+ PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
- virt_cr3 = (struct cr3_32 *)first_operand;
+ // We virtualize the guests efer to hide the SVME and LMA bits
+ guest_efer->value = src.value;
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- *virt_cr3 = *(struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- } else {
- *virt_cr3 = *real_cr3;
- }
+
+ if ((info->shdw_pg_mode == SHADOW_PAGING) &&
+ (v3_get_mem_mode(info) == PHYSICAL_MEM)) {
+
+ if ((shadow_efer->lme == 0) && (new_efer->lme == 1)) {
+ PrintDebug("Transition to longmode\n");
+ PrintDebug("Creating Passthrough 64 bit page tables\n");
+
+ // Delete the old 32 bit direct map page tables
+ /*
+ * JRL BUG?
+ * Will these page tables always be in PAE format??
+ */
+ PrintDebug("Deleting old PAE Page tables\n");
+ PrintError("JRL BUG?: Will the old page tables always be in PAE format??\n");
+ delete_page_tables_32PAE((pdpe32pae_t *)V3_VAddr((void *)(info->direct_map_pt)));
+
+ // create 64 bit direct map page table
+ info->direct_map_pt = (addr_t)V3_PAddr(create_passthrough_pts_64(info));
+
+ // reset cr3 to new page tables
+ info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
+
+ // We mark the Long Mode active because we have paging enabled
+ // We do this in new_efer because we copy the msr in full below
+ new_efer->lma = 1;
+
+ } else if ((shadow_efer->lme == 1) && (new_efer->lme == 0)) {
+ // transition out of long mode
+ //((struct efer_64 *)&(info->guest_efer.value))->lme = 0;
+ //((struct efer_64 *)&(info->guest_efer.value))->lma = 0;
- info->rip += index;
- } else {
- PrintDebug("Unknown Instruction\n");
- PrintTraceMemDump(instr,15);
return -1;
}
+
+ // accept all changes to the efer, but make sure that the SVME bit is set... (SVM specific)
+ *shadow_efer = *new_efer;
+ shadow_efer->svme = 1;
+
+
+
+ PrintDebug("New EFER=%p\n", (void *)*(addr_t *)(shadow_efer));
} else {
- PrintDebug("Invalid operating Mode (0x%x), control registers follow\n", info->cpu_mode);
- PrintV3CtrlRegs(info);
+ PrintError("Write to EFER in NESTED_PAGING or VIRTUAL_MEM mode not supported\n");
+ // Should probably just check for a long mode transition, and bomb out if it is
return -1;
}
+ info->rip += 2; // WRMSR/RDMSR are two byte operands
+
return 0;
}
