info->cpu_mode = PROTECTED;
}
+ if (new_cr0->pe == 0) {
+ PrintDebug("Entering Real Mode\n");
+ info->cpu_mode = REAL;
+ }
+
+
if (new_cr0->pg == 1) {
PrintDebug("Paging is already turned on in switch to protected mode in CR0 write\n");
ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
+
if (ret != 15) {
// I think we should inject a GPF into the guest
PrintDebug("Could not read instruction (ret=%d)\n", ret);
(instr[index + 1] == 0x06)) {
// CLTS instruction
PrintDebug("CLTS instruction - clearing TS flag of real and shadow CR0\n");
- shadow_cr0->ts=0;
- real_cr0->ts=0;
+ shadow_cr0->ts = 0;
+ real_cr0->ts = 0;
index+=2;
if (info->shdw_pg_mode == SHADOW_PAGING) {
*virt_cr0 = *(struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
+
+ if (info->mem_mode == PHYSICAL_MEM) {
+ virt_cr0->pg = 0; // clear the pg bit because guest doesn't think it's on
+ }
+
} else {
*virt_cr0 = *real_cr0;
}
int ret;
char instr[15];
+ PrintDebug("Protected %s mode write to CR3 at %s 0x%x\n",
+ info->cpu_mode==PROTECTED ? "" : "Paged",
+ info->cpu_mode==PROTECTED ? "guest physical" : "guest virtual",
+ get_addr_linear(info,info->rip,&(info->segments.cs)));
// We need to read the instruction, which is at CS:IP, but that
// linear address is guest physical without PG and guest virtual with PG
- if (info->cpu_mode == PHYSICAL_MEM) {
+ if (info->mem_mode == PHYSICAL_MEM) {
// The real rip address is actually a combination of the rip + CS base
PrintDebug("Writing Guest CR3 Write (Physical Address)\n");
ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
}
-
if (ret != 15) {
PrintDebug("Could not read instruction (ret=%d)\n", ret);
return -1;
struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ if (CR3_TO_PDE32(*(uint_t*)shadow_cr3) != 0) {
+ PrintDebug("Shadow Page Table\n");
+ PrintDebugPageTables((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
+ }
+
/* Delete the current Page Tables */
delete_page_tables_pde32((pde32_t *)CR3_TO_PDE32(*(uint_t*)shadow_cr3));
/* Copy Various flags */
*shadow_cr3 = *new_cr3;
+ {
+ addr_t tmp_addr;
+ guest_pa_to_host_va(info, ((*(uint_t*)guest_cr3) & 0xfffff000), &tmp_addr);
+ PrintDebug("Guest PD\n");
+ PrintPD32((pde32_t *)tmp_addr);
+
+ }
+
shadow_cr3->pdt_base_addr = PD32_BASE_ADDR(shadow_pt);
} else {
PrintDebug("Unknown Instruction\n");
+ SerialMemDump(instr,15);
return -1;
}
} else {
- PrintDebug("Invalid operating Mode\n");
+ PrintDebug("Invalid operating Mode (0x%x)\n", info->cpu_mode);
return -1;
}
info->rip += index;
} else {
PrintDebug("Unknown Instruction\n");
+ SerialMemDump(instr,15);
return -1;
}
} else {
- PrintDebug("Invalid operating Mode\n");
+ PrintDebug("Invalid operating Mode (0x%x)\n", info->cpu_mode);
return -1;
}