#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_lowlevel.h>
#include <palacios/vmm_sprintf.h>
+#include <palacios/vmm_xed.h>
+#include <palacios/vmm_direct_paging.h>
+#include <palacios/vmm_barrier.h>
+#include <palacios/vmm_debug.h>
+#ifdef V3_CONFIG_MEM_TRACK
+#include <palacios/vmm_mem_track.h>
+#endif
v3_cpu_mode_t v3_get_vm_cpu_mode(struct guest_info * info) {
struct cr0_32 * cr0;
struct efer_64 * efer;
- struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
struct v3_segment * cs = &(info->segments.cs);
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ struct cr4_32 * cr4;
if (info->shdw_pg_mode == SHADOW_PAGING) {
cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
efer = (struct efer_64 *)&(info->shdw_pg_state.guest_efer);
+ cr4 = (struct cr4_32 *)&(info->shdw_pg_state.guest_cr4);
} else if (info->shdw_pg_mode == NESTED_PAGING) {
cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- efer = (struct efer_64 *)&(guest_state->efer);
+ efer = (struct efer_64 *)&(info->ctrl_regs.efer);
+ cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
} else {
- PrintError("Invalid Paging Mode...\n");
- V3_ASSERT(0);
+ PrintError(info->vm_info, info, "Invalid Paging Mode...\n");
+ V3_ASSERT(info->vm_info, info, 0);
return -1;
}
struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
struct efer_64 * efer;
struct v3_segment * cs = &(info->segments.cs);
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+
if (info->shdw_pg_mode == SHADOW_PAGING) {
cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
efer = (struct efer_64 *)&(info->shdw_pg_state.guest_efer);
} else if (info->shdw_pg_mode == NESTED_PAGING) {
cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
- efer = (struct efer_64 *)&(guest_state->efer);
+ efer = (struct efer_64 *)&(info->ctrl_regs.efer);
} else {
- PrintError("Invalid Paging Mode...\n");
- V3_ASSERT(0);
+ PrintError(info->vm_info, info, "Invalid Paging Mode...\n");
+ V3_ASSERT(info->vm_info, info, 0);
return -1;
}
} else if (info->shdw_pg_mode == NESTED_PAGING) {
cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
} else {
- PrintError("Invalid Paging Mode...\n");
- V3_ASSERT(0);
+ PrintError(info->vm_info, info, "Invalid Paging Mode...\n");
+ V3_ASSERT(info->vm_info, info, 0);
return -1;
}
}
-void v3_print_segments(struct guest_info * info) {
- struct v3_segments * segs = &(info->segments);
- int i = 0;
- struct v3_segment * seg_ptr;
- seg_ptr=(struct v3_segment *)segs;
-
- char *seg_names[] = {"CS", "DS" , "ES", "FS", "GS", "SS" , "LDTR", "GDTR", "IDTR", "TR", NULL};
- PrintDebug("Segments\n");
- for (i = 0; seg_names[i] != NULL; i++) {
- PrintDebug("\t%s: Sel=%x, base=%p, limit=%x (long_mode=%d, db=%d)\n", seg_names[i], seg_ptr[i].selector,
- (void *)(addr_t)seg_ptr[i].base, seg_ptr[i].limit,
- seg_ptr[i].long_mode, seg_ptr[i].db);
+
+#include <palacios/vmcs.h>
+#include <palacios/vmcb.h>
+static int info_hcall(struct guest_info * core, uint_t hcall_id, void * priv_data) {
+ extern v3_cpu_arch_t v3_mach_type;
+ int cpu_valid = 0;
+
+ V3_Print(core->vm_info, core, "************** Guest State ************\n");
+ v3_print_guest_state(core);
+
+ // init SVM/VMX
+#ifdef V3_CONFIG_SVM
+ if ((v3_mach_type == V3_SVM_CPU) || (v3_mach_type == V3_SVM_REV3_CPU)) {
+ cpu_valid = 1;
+ PrintDebugVMCB((vmcb_t *)(core->vmm_data));
}
+#endif
+#ifdef V3_CONFIG_VMX
+ if ((v3_mach_type == V3_VMX_CPU) || (v3_mach_type == V3_VMX_EPT_CPU) || (v3_mach_type == V3_VMX_EPT_UG_CPU)) {
+ cpu_valid = 1;
+ v3_print_vmcs();
+ }
+#endif
+ if (!cpu_valid) {
+ PrintError(core->vm_info, core, "Invalid CPU Type 0x%x\n", v3_mach_type);
+ return -1;
+ }
+
+
+ return 0;
}
-//
-// We don't handle those fancy 64 bit system segments...
-//
-int v3_translate_segment(struct guest_info * info, uint16_t selector, struct v3_segment * seg) {
- struct v3_segment * gdt = &(info->segments.gdtr);
- addr_t gdt_addr = 0;
- uint16_t seg_offset = (selector & ~0x7);
- addr_t seg_addr = 0;
- struct gen_segment * gen_seg = NULL;
- struct seg_selector sel;
- memset(seg, 0, sizeof(struct v3_segment));
+#ifdef V3_CONFIG_SVM
+#include <palacios/svm.h>
+#include <palacios/svm_io.h>
+#include <palacios/svm_msr.h>
+#include <palacios/svm_exits.h>
+#endif
+
+#ifdef V3_CONFIG_VMX
+#include <palacios/vmx.h>
+#include <palacios/vmx_io.h>
+#include <palacios/vmx_msr.h>
+#include <palacios/vmx_exits.h>
+#endif
+
+
+int v3_init_vm(struct v3_vm_info * vm) {
+ extern v3_cpu_arch_t v3_mach_type;
+
+ v3_init_events(vm);
+
+#ifdef V3_CONFIG_TELEMETRY
+ v3_init_telemetry(vm);
+#endif
+
+ v3_init_exit_hooks(vm);
+ v3_init_hypercall_map(vm);
+ v3_init_io_map(vm);
+ v3_init_msr_map(vm);
+ v3_init_cpuid_map(vm);
+ v3_init_host_events(vm);
+
+ v3_init_intr_routers(vm);
+ v3_init_ext_manager(vm);
- sel.value = selector;
+ v3_init_barrier(vm);
- if (sel.ti == 1) {
- PrintError("LDT translations not supported\n");
+ // Initialize the memory map
+ if (v3_init_mem_map(vm) == -1) {
+ PrintError(vm, VCORE_NONE, "Could not initialize shadow map\n");
return -1;
}
- if (guest_va_to_host_va(info, gdt->base, &gdt_addr) == -1) {
- PrintError("Unable to translate GDT address\n");
+ v3_init_mem_hooks(vm);
+
+ if (v3_init_shdw_impl(vm) == -1) {
+ PrintError(vm, VCORE_NONE, "VM initialization error in shadow implementaion\n");
return -1;
}
- seg_addr = gdt_addr + seg_offset;
- gen_seg = (struct gen_segment *)seg_addr;
+ if (v3_init_passthrough_paging(vm) == -1) {
+ PrintError(vm, VCORE_NONE, "VM initialization error in passthrough paging\n");
+ return -1;
+ }
- //translate
- seg->selector = selector;
+ if (v3_init_nested_paging(vm) == -1) {
+ PrintError(vm, VCORE_NONE, "VM initialization error in nested paging\n");
+ return -1;
+ }
- seg->limit = gen_seg->limit_hi;
- seg->limit <<= 16;
- seg->limit += gen_seg->limit_lo;
+#ifdef V3_CONFIG_MEM_TRACK
+ v3_mem_track_init(vm);
+#endif
- seg->base = gen_seg->base_hi;
- seg->base <<= 24;
- seg->base += gen_seg->base_lo;
+ v3_init_time_vm(vm);
- if (gen_seg->granularity == 1) {
- seg->limit <<= 12;
- seg->limit |= 0xfff;
- }
+ v3_init_vm_debugging(vm);
- seg->type = gen_seg->type;
- seg->system = gen_seg->system;
- seg->dpl = gen_seg->dpl;
- seg->present = gen_seg->present;
- seg->avail = gen_seg->avail;
- seg->long_mode = gen_seg->long_mode;
- seg->db = gen_seg->db;
- seg->granularity = gen_seg->granularity;
+
+#ifdef V3_CONFIG_SYMBIOTIC
+ v3_init_symbiotic_vm(vm);
+#endif
+
+ v3_init_dev_mgr(vm);
+
+
+ // init SVM/VMX
+ switch (v3_mach_type) {
+#ifdef V3_CONFIG_SVM
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ v3_init_svm_io_map(vm);
+ v3_init_svm_msr_map(vm);
+ v3_init_svm_exits(vm);
+ break;
+#endif
+#ifdef V3_CONFIG_VMX
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ case V3_VMX_EPT_UG_CPU:
+ v3_init_vmx_io_map(vm);
+ v3_init_vmx_msr_map(vm);
+ v3_init_vmx_exits(vm);
+ break;
+#endif
+ default:
+ PrintError(vm, VCORE_NONE, "Invalid CPU Type 0x%x\n", v3_mach_type);
+ return -1;
+ }
+ v3_register_hypercall(vm, GUEST_INFO_HCALL, info_hcall, NULL);
+
+ V3_Print(vm, VCORE_NONE, "GUEST_INFO_HCALL=%x\n", GUEST_INFO_HCALL);
+
return 0;
}
+int v3_free_vm_internal(struct v3_vm_info * vm) {
+ extern v3_cpu_arch_t v3_mach_type;
+ v3_remove_hypercall(vm, GUEST_INFO_HCALL);
-void v3_print_ctrl_regs(struct guest_info * info) {
- struct v3_ctrl_regs * regs = &(info->ctrl_regs);
- int i = 0;
- v3_reg_t * reg_ptr;
- char * reg_names[] = {"CR0", "CR2", "CR3", "CR4", "CR8", "FLAGS", NULL};
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(info->vmm_data);
- reg_ptr = (v3_reg_t *)regs;
+#ifdef V3_CONFIG_HVM
+ v3_deinit_hvm_vm(vm);
+#endif
- PrintDebug("32 bit Ctrl Regs:\n");
+#ifdef V3_CONFIG_SYMBIOTIC
+ v3_deinit_symbiotic_vm(vm);
+#endif
- for (i = 0; reg_names[i] != NULL; i++) {
- PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
+ // init SVM/VMX
+ switch (v3_mach_type) {
+#ifdef V3_CONFIG_SVM
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ v3_deinit_svm_io_map(vm);
+ v3_deinit_svm_msr_map(vm);
+ break;
+#endif
+#ifdef V3_CONFIG_VMX
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ case V3_VMX_EPT_UG_CPU:
+ v3_deinit_vmx_io_map(vm);
+ v3_deinit_vmx_msr_map(vm);
+ break;
+#endif
+ default:
+ PrintError(vm, VCORE_NONE, "Invalid CPU Type 0x%x\n", v3_mach_type);
+ return -1;
}
- PrintDebug("\tEFER=0x%p\n", (void*)(addr_t)(guest_state->efer));
+ v3_deinit_dev_mgr(vm);
+
+ v3_deinit_time_vm(vm);
+
+ v3_deinit_mem_hooks(vm);
+#ifdef V3_CONFIG_SWAPPING
+ v3_deinit_swapping_vm(vm);
+#endif
+
+ v3_delete_mem_map(vm);
+ v3_deinit_shdw_impl(vm);
+ v3_deinit_passthrough_paging(vm);
+ v3_deinit_nested_paging(vm);
+
+ v3_deinit_ext_manager(vm);
+ v3_deinit_intr_routers(vm);
+ v3_deinit_host_events(vm);
+
+ v3_deinit_barrier(vm);
+
+ v3_deinit_cpuid_map(vm);
+ v3_deinit_msr_map(vm);
+ v3_deinit_io_map(vm);
+ v3_deinit_hypercall_map(vm);
+
+ v3_deinit_exit_hooks(vm);
+
+#ifdef V3_CONFIG_TELEMETRY
+ v3_deinit_telemetry(vm);
+#endif
+
+
+ v3_deinit_events(vm);
+
+#ifdef V3_CONFIG_MEM_TRACK
+ v3_mem_track_deinit(vm);
+#endif
+
+ v3_fw_cfg_deinit(vm);
+
+
+ return 0;
}
-void v3_print_guest_state(struct guest_info * info) {
- addr_t linear_addr = 0;
+int v3_init_core(struct guest_info * core) {
+ extern v3_cpu_arch_t v3_mach_type;
+ struct v3_vm_info * vm = core->vm_info;
- PrintDebug("RIP: %p\n", (void *)(addr_t)(info->rip));
- linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
- PrintDebug("RIP Linear: %p\n", (void *)linear_addr);
- v3_print_segments(info);
- v3_print_ctrl_regs(info);
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- PrintDebug("Shadow Paging Guest Registers:\n");
- PrintDebug("\tGuest CR0=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr0));
- PrintDebug("\tGuest CR3=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr3));
- PrintDebug("\tGuest EFER=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_efer.value));
- // CR4
+ /*
+ * Initialize the subsystem data strutures
+ */
+#ifdef V3_CONFIG_TELEMETRY
+ v3_init_core_telemetry(core);
+#endif
+
+ if (core->shdw_pg_mode == SHADOW_PAGING) {
+ v3_init_passthrough_paging_core(core);
+ v3_init_shdw_pg_state(core);
+ } else {
+ //done later due to SVM/VMX differences
+ //v3_init_nested_paging_core(core);
}
- v3_print_GPRs(info);
-}
+ v3_init_time_core(core);
+ v3_init_intr_controllers(core);
+ v3_init_exception_state(core);
+
+ v3_init_decoder(core);
-#ifdef __V3_32BIT__
-void v3_print_GPRs(struct guest_info * info) {
- struct v3_gprs * regs = &(info->vm_regs);
- int i = 0;
- v3_reg_t * reg_ptr;
- char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", NULL};
+#ifdef V3_CONFIG_SYMBIOTIC
+ v3_init_symbiotic_core(core);
+#endif
- reg_ptr= (v3_reg_t *)regs;
+ // init SVM/VMX
- PrintDebug("32 bit GPRs:\n");
- for (i = 0; reg_names[i] != NULL; i++) {
- PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
+ switch (v3_mach_type) {
+#ifdef V3_CONFIG_SVM
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ if (v3_init_svm_vmcb(core, vm->vm_class) == -1) {
+ PrintError(vm, core, "Error in SVM initialization\n");
+ return -1;
+ }
+ break;
+#endif
+#ifdef V3_CONFIG_VMX
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ case V3_VMX_EPT_UG_CPU:
+ if (v3_init_vmx_vmcs(core, vm->vm_class) == -1) {
+ PrintError(vm, core, "Error in VMX initialization\n");
+ return -1;
+ }
+ break;
+#endif
+ default:
+ PrintError(vm, core, "Invalid CPU Type 0x%x\n", v3_mach_type);
+ return -1;
}
+
+ v3_init_exit_hooks_core(core);
+
+
+ return 0;
}
-#elif __V3_64BIT__
-void v3_print_GPRs(struct guest_info * info) {
- struct v3_gprs * regs = &(info->vm_regs);
- int i = 0;
- v3_reg_t * reg_ptr;
- char * reg_names[] = { "RDI", "RSI", "RBP", "RSP", "RBX", "RDX", "RCX", "RAX", \
- "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", NULL};
- reg_ptr= (v3_reg_t *)regs;
+int v3_free_core(struct guest_info * core) {
+ extern v3_cpu_arch_t v3_mach_type;
- PrintDebug("64 bit GPRs:\n");
+
+#ifdef V3_CONFIG_SYMBIOTIC
+ v3_deinit_symbiotic_core(core);
+#endif
- for (i = 0; reg_names[i] != NULL; i++) {
- PrintDebug("\t%s=0x%p\n", reg_names[i], (void *)(addr_t)reg_ptr[i]);
+#ifdef V3_CONFIG_HVM
+ v3_deinit_hvm_core(core);
+#endif
+
+ v3_deinit_decoder(core);
+
+ v3_deinit_intr_controllers(core);
+ v3_deinit_time_core(core);
+
+ if (core->shdw_pg_mode == SHADOW_PAGING) {
+ v3_deinit_shdw_pg_state(core);
+ v3_deinit_passthrough_paging_core(core);
+ } else {
+ v3_deinit_nested_paging_core(core);
}
-}
+ v3_free_passthrough_pts(core);
+
+#ifdef V3_CONFIG_TELEMETRY
+ v3_deinit_core_telemetry(core);
#endif
+
+
+ switch (v3_mach_type) {
+#ifdef V3_CONFIG_SVM
+ case V3_SVM_CPU:
+ case V3_SVM_REV3_CPU:
+ if (v3_deinit_svm_vmcb(core) == -1) {
+ PrintError(VM_NONE,VCORE_NONE, "Error in SVM deinitialization\n");
+ return -1;
+ }
+ break;
+#endif
+#ifdef V3_CONFIG_VMX
+ case V3_VMX_CPU:
+ case V3_VMX_EPT_CPU:
+ case V3_VMX_EPT_UG_CPU:
+ if (v3_deinit_vmx_vmcs(core) == -1) {
+ PrintError(VM_NONE, VCORE_NONE, "Error in VMX initialization\n");
+ return -1;
+ }
+ break;
+#endif
+ default:
+ PrintError(core->vm_info, core, "Invalid CPU Type 0x%x\n", v3_mach_type);
+ return -1;
+ }
+
+ return 0;
+}
+
+
+
