Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


enabled stopping a VM before the secondary cores have been initialized
[palacios.git] / palacios / src / palacios / svm.c
index d9b44f0..f61fadf 100644 (file)
@@ -37,6 +37,9 @@
 #include <palacios/vmm_rbtree.h>
 #include <palacios/vmm_barrier.h>
 
+#ifdef V3_CONFIG_CHECKPOINT
+#include <palacios/vmm_checkpoint.h>
+#endif
 
 #include <palacios/vmm_direct_paging.h>
 
@@ -308,6 +311,19 @@ static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) {
        &v3_handle_vm_cr_read,
        &v3_handle_vm_cr_write, 
        core);
+
+
+    {
+       v3_hook_msr(core->vm_info, IA32_STAR_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_LSTAR_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_FMASK_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_KERN_GS_BASE_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, IA32_CSTAR_MSR, NULL, NULL, NULL);
+
+       v3_hook_msr(core->vm_info, SYSENTER_CS_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, SYSENTER_ESP_MSR, NULL, NULL, NULL);
+       v3_hook_msr(core->vm_info, SYSENTER_EIP_MSR, NULL, NULL, NULL);
+    }
 }
 
 
@@ -339,6 +355,27 @@ int v3_deinit_svm_vmcb(struct guest_info * core) {
 }
 
 
+#ifdef V3_CONFIG_CHECKPOINT
+int v3_svm_save_core(struct guest_info * core, void * ctx){
+
+    v3_chkpt_save_8(ctx, "cpl", &(core->cpl));
+    v3_chkpt_save(ctx, "vmcb_data", PAGE_SIZE, core->vmm_data);
+
+    return 0;
+}
+
+int v3_svm_load_core(struct guest_info * core, void * ctx){
+    
+    v3_chkpt_load_8(ctx, "cpl", &(core->cpl));
+
+    if (v3_chkpt_load(ctx, "vmcb_data", PAGE_SIZE, core->vmm_data) == -1) {
+       return -1;
+    }
+
+    return 0;
+}
+#endif
+
 static int update_irq_exit_state(struct guest_info * info) {
     vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 
@@ -485,6 +522,7 @@ int v3_svm_enter(struct guest_info * info) {
     vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
     vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data)); 
     addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0;
+    sint64_t tsc_offset;
 
     // Conditionally yield the CPU if the timeslice has expired
     v3_yield_cond(info);
@@ -545,31 +583,9 @@ int v3_svm_enter(struct guest_info * info) {
 #endif
 
     v3_time_enter_vm(info);
-    guest_ctrl->TSC_OFFSET = v3_tsc_host_offset(&info->time_state);
-
-    if(info->core_move_state == CORE_MOVE_PENDING) {
-       v3_stgi();
-
-       if(V3_MOVE_THREAD_TO_CPU(info->target_pcpu_id, info->core_thread) != 0){
-           PrintError("Failed to move Vcore %d to CPU %d\n", 
-                    info->vcpu_id, 
-                    info->target_pcpu_id);
-       } else {
-           info->pcpu_id = info->target_pcpu_id;
-           V3_Print("Core move done, vcore %d is running on CPU %d now\n", 
-                    info->vcpu_id, 
-                    V3_Get_CPU());
-       }
-       
-       info->core_move_state = CORE_MOVE_DONE;
+    tsc_offset = v3_tsc_host_offset(&info->time_state);
+    guest_ctrl->TSC_OFFSET = tsc_offset;
 
-       /* disable global interrupts, 
-        *  NOTE now it is being running on a different CPU 
-        */
-       v3_clgi();
-    }
-
-       
 
     //V3_Print("Calling v3_svm_launch\n");
 
@@ -653,11 +669,20 @@ int v3_start_svm_guest(struct guest_info * info) {
        PrintDebug("SVM core %u (on %u): Waiting for core initialization\n", info->vcpu_id, info->pcpu_id);
 
        while (info->core_run_state == CORE_STOPPED) {
+           
+           if (info->vm_info->run_state == VM_STOPPED) {
+               // The VM was stopped before this core was initialized. 
+               return 0;
+           }
+
            v3_yield(info);
            //PrintDebug("SVM core %u: still waiting for INIT\n", info->vcpu_id);
        }
 
        PrintDebug("SVM core %u(on %u) initialized\n", info->vcpu_id, info->pcpu_id);
+
+       // We'll be paranoid about race conditions here
+       v3_wait_at_barrier(info);
     } 
 
     PrintDebug("SVM core %u(on %u): I am starting at CS=0x%x (base=0x%p, limit=0x%x),  RIP=0x%p\n",