Palacios Public Git Repository

To checkout Palacios execute 

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute 
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.

projects / palacios.git / blobdiff
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got the bios setup ok, now we have to handle the exits
[palacios.git] / palacios / src / palacios / svm.c
diff --git a/palacios/src/palacios/svm.c b/palacios/src/palacios/svm.c
index 5b2e0c8..954b904 100644 (file)
--- a/palacios/src/palacios/svm.c
+++ b/palacios/src/palacios/svm.c
@@ -14,6 +14,7 @@
 //#include <palacios/tss.h>
 /* ** */
 
+
 extern struct vmm_os_hooks * os_hooks;
 
 extern uint_t cpuid_ecx(uint_t op);
@@ -109,12 +110,13 @@ int init_svm_guest(struct guest_info *info) {
   //  info->page_tables = NULL;
   //info->page_tables = generate_guest_page_tables_64(&(info->mem_layout), &(info->mem_list));
   //info->page_tables = generate_guest_page_tables(&(info->mem_layout), &(info->mem_list));
-  //PrintDebugPageTables(info->page_tables);
+  //  PrintDebugPageTables(info->page_tables);
 
 
   PrintDebug("Initializing VMCB (addr=%x)\n", info->vmm_data);
-  Init_VMCB((vmcb_t*)(info->vmm_data), *info);
+  Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), *info);
   
+
   //  info->rip = 0;
 
   info->vm_regs.rdi = 0;
@@ -166,7 +168,8 @@ vmcb_t * Allocate_VMCB() {
 }
 
 
-void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
+
+void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
   vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
   vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
   uint_t i;
@@ -176,11 +179,15 @@ void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
   guest_state->rip = vm_info.rip;
 
 
+  //ctrl_area->instrs.instrs.CR0 = 1;
+  ctrl_area->cr_reads.crs.cr0 = 1;
+  ctrl_area->cr_writes.crs.cr0 = 1;
+
   guest_state->efer |= EFER_MSR_svm_enable;
   guest_state->rflags = 0x00000002; // The reserved bit is always 1
   ctrl_area->svm_instrs.instrs.VMRUN = 1;
+  // guest_state->cr0 = 0x00000001;    // PE 
   ctrl_area->guest_ASID = 1;
-  guest_state->cr0 = 0x60000010;
 
 
   ctrl_area->exceptions.ex_names.de = 1;
@@ -196,10 +203,10 @@ void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
   ctrl_area->exceptions.ex_names.of = 1;
   ctrl_area->exceptions.ex_names.nmi = 1;
 
-  guest_state->cs.selector = 0xf000;
-  guest_state->cs.limit=0xffff;
-  guest_state->cs.base =  0xffff0000;
-  guest_state->cs.attrib.raw = 0x9a;
+  guest_state->cs.selector = 0x0000;
+  guest_state->cs.limit=~0u;
+  guest_state->cs.base = guest_state->cs.selector<<4;
+  guest_state->cs.attrib.raw = 0xf3;
 
   
   struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
@@ -207,36 +214,11 @@ void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
     struct vmcb_selector * seg = segregs[i];
     
     seg->selector = 0x0000;
-    seg->base = 0xffff0000;
-    seg->attrib.raw = 0x9b;
-    seg->limit = 0xffff;
+    seg->base = seg->selector << 4;
+    seg->attrib.raw = 0xf3;
+    seg->limit = ~0u;
   }
   
-  /* Set GPRs */
-  /*
-    EDX == 0xfxx
-    EAX, EBX, ECX, ESI, EDI, EBP, ESP == 0x0
-  */
-
-  guest_state->gdtr.base = 0;
-  guest_state->gdtr.limit = 0xffff;
-  guest_state->gdtr.attrib.raw = 0x0;
-
-  guest_state->idtr.base = 0;
-  guest_state->idtr.limit = 0xffff;
-  guest_state->idtr.attrib.raw = 0x0;
-
-  guest_state->ldtr.base = 0;
-  guest_state->ldtr.limit = 0xffff;
-  guest_state->ldtr.attrib.raw = 0x82;
-
-  guest_state->tr.base = 0;
-  guest_state->tr.limit = 0xffff;
-  guest_state->tr.attrib.raw = 0x83;
-
-
-
-
   if (vm_info.io_map.num_ports > 0) {
     vmm_io_hook_t * iter;
     addr_t io_port_bitmap;
@@ -257,12 +239,15 @@ void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
       *bitmap |= 1 << (port % 8);
     }
 
+
+    //PrintDebugMemDump((uchar_t*)io_port_bitmap, PAGE_SIZE *2);
+
     ctrl_area->instrs.instrs.IOIO_PROT = 1;
   }
 
   ctrl_area->instrs.instrs.INTR = 1;
 
-  // also determine if CPU supports nested paging
+
 
   if (vm_info.page_mode == SHADOW_PAGING) {
     PrintDebug("Creating initial shadow page table\n");
@@ -273,16 +258,13 @@ void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
 
     ctrl_area->cr_reads.crs.cr3 = 1;
     ctrl_area->cr_writes.crs.cr3 = 1;
-    ctrl_area->cr_reads.crs.cr0 = 1;
-    ctrl_area->cr_writes.crs.cr0 = 1;
+
 
     ctrl_area->instrs.instrs.INVLPG = 1;
     ctrl_area->instrs.instrs.INVLPGA = 1;
 
-       
     guest_state->g_pat = 0x7040600070406ULL;
 
-    vm_info.shdw_pg_state.guest_cr0.e_reg.low = guest_state->cr0;
     guest_state->cr0 |= 0x80000000;
   } else if (vm_info.page_mode == NESTED_PAGING) {
     // Flush the TLB on entries/exits
@@ -303,18 +285,21 @@ void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
     //    guest_state->g_pat = 0x7040600070406ULL;
   }
 
+
+
 }
 
 
-void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
+
+void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info vm_info) {
   vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
   vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
   uint_t i;
 
 
   guest_state->rsp = vm_info.vm_regs.rsp;
-  guest_state->rip = vm_info.rip;
-
+  // guest_state->rip = vm_info.rip;
+  guest_state->rip = 0xfff0;
 
   //ctrl_area->instrs.instrs.CR0 = 1;
   ctrl_area->cr_reads.crs.cr0 = 1;
@@ -340,7 +325,7 @@ void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
   ctrl_area->exceptions.ex_names.of = 1;
   ctrl_area->exceptions.ex_names.nmi = 1;
 
-  guest_state->cs.selector = 0x0000;
+  guest_state->cs.selector = 0xf000;
   guest_state->cs.limit=~0u;
   guest_state->cs.base = guest_state->cs.selector<<4;
   guest_state->cs.attrib.raw = 0xf3;
@@ -393,6 +378,8 @@ void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
 
     guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3.r_reg;
 
+    //PrintDebugPageTables((pde32_t*)(vm_info.shdw_pg_state.shadow_cr3.e_reg.low));
+
     ctrl_area->cr_reads.crs.cr3 = 1;
     ctrl_area->cr_writes.crs.cr3 = 1;
 
@@ -426,6 +413,7 @@ void Init_VMCB(vmcb_t * vmcb, struct guest_info vm_info) {
 
 }
 
+
 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
   vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
   vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
@@ -586,3 +574,163 @@ void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
 }
 
 
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/*
+
+
+void Init_VMCB_Real(vmcb_t * vmcb, struct guest_info vm_info) {
+  vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
+  vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
+  uint_t i;
+
+
+  guest_state->rsp = vm_info.vm_regs.rsp;
+  guest_state->rip = vm_info.rip;
+
+
+  guest_state->efer |= EFER_MSR_svm_enable;
+  guest_state->rflags = 0x00000002; // The reserved bit is always 1
+  ctrl_area->svm_instrs.instrs.VMRUN = 1;
+  ctrl_area->guest_ASID = 1;
+  guest_state->cr0 = 0x60000010;
+
+
+  ctrl_area->exceptions.ex_names.de = 1;
+  ctrl_area->exceptions.ex_names.df = 1;
+  ctrl_area->exceptions.ex_names.pf = 1;
+  ctrl_area->exceptions.ex_names.ts = 1;
+  ctrl_area->exceptions.ex_names.ss = 1;
+  ctrl_area->exceptions.ex_names.ac = 1;
+  ctrl_area->exceptions.ex_names.mc = 1;
+  ctrl_area->exceptions.ex_names.gp = 1;
+  ctrl_area->exceptions.ex_names.ud = 1;
+  ctrl_area->exceptions.ex_names.np = 1;
+  ctrl_area->exceptions.ex_names.of = 1;
+  ctrl_area->exceptions.ex_names.nmi = 1;
+
+  guest_state->cs.selector = 0xf000;
+  guest_state->cs.limit=0xffff;
+  guest_state->cs.base =  0xffff0000;
+  guest_state->cs.attrib.raw = 0x9a;
+
+  
+  struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
+  for ( i = 0; segregs[i] != NULL; i++) {
+    struct vmcb_selector * seg = segregs[i];
+    
+    seg->selector = 0x0000;
+    seg->base = 0xffff0000;
+    seg->attrib.raw = 0x9b;
+    seg->limit = 0xffff;
+  }
+  
+  // Set GPRs 
+  //
+  //  EDX == 0xfxx
+  //  EAX, EBX, ECX, ESI, EDI, EBP, ESP == 0x0
+  //
+
+  guest_state->gdtr.base = 0;
+  guest_state->gdtr.limit = 0xffff;
+  guest_state->gdtr.attrib.raw = 0x0;
+
+  guest_state->idtr.base = 0;
+  guest_state->idtr.limit = 0xffff;
+  guest_state->idtr.attrib.raw = 0x0;
+
+  guest_state->ldtr.base = 0;
+  guest_state->ldtr.limit = 0xffff;
+  guest_state->ldtr.attrib.raw = 0x82;
+
+  guest_state->tr.base = 0;
+  guest_state->tr.limit = 0xffff;
+  guest_state->tr.attrib.raw = 0x83;
+
+
+
+
+  if (vm_info.io_map.num_ports > 0) {
+    vmm_io_hook_t * iter;
+    addr_t io_port_bitmap;
+    
+    io_port_bitmap = (addr_t)os_hooks->allocate_pages(3);
+    memset((uchar_t*)io_port_bitmap, 0, PAGE_SIZE * 3);
+    
+    ctrl_area->IOPM_BASE_PA = io_port_bitmap;
+
+    //PrintDebug("Setting up IO Map at 0x%x\n", io_port_bitmap);
+
+    FOREACH_IO_HOOK(vm_info.io_map, iter) {
+      ushort_t port = iter->port;
+      uchar_t * bitmap = (uchar_t *)io_port_bitmap;
+
+      bitmap += (port / 8);
+      PrintDebug("Setting Bit in block %x\n", bitmap);
+      *bitmap |= 1 << (port % 8);
+    }
+
+    ctrl_area->instrs.instrs.IOIO_PROT = 1;
+  }
+
+  ctrl_area->instrs.instrs.INTR = 1;
+
+  // also determine if CPU supports nested paging
+
+  if (vm_info.page_mode == SHADOW_PAGING) {
+    PrintDebug("Creating initial shadow page table\n");
+    vm_info.shdw_pg_state.shadow_cr3.e_reg.low |= ((addr_t)create_passthrough_pde32_pts(&vm_info) & ~0xfff);
+    PrintDebug("Created\n");
+
+    guest_state->cr3 = vm_info.shdw_pg_state.shadow_cr3.r_reg;
+
+    ctrl_area->cr_reads.crs.cr3 = 1;
+    ctrl_area->cr_writes.crs.cr3 = 1;
+    ctrl_area->cr_reads.crs.cr0 = 1;
+    ctrl_area->cr_writes.crs.cr0 = 1;
+
+    ctrl_area->instrs.instrs.INVLPG = 1;
+    ctrl_area->instrs.instrs.INVLPGA = 1;
+
+       
+    guest_state->g_pat = 0x7040600070406ULL;
+
+    vm_info.shdw_pg_state.guest_cr0.e_reg.low = guest_state->cr0;
+    guest_state->cr0 |= 0x80000000;
+  } else if (vm_info.page_mode == NESTED_PAGING) {
+    // Flush the TLB on entries/exits
+    //ctrl_area->TLB_CONTROL = 1;
+
+    // Enable Nested Paging
+    //ctrl_area->NP_ENABLE = 1;
+
+    //PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
+
+        // Set the Nested Page Table pointer
+    //    ctrl_area->N_CR3 = ((addr_t)vm_info.page_tables);
+    // ctrl_area->N_CR3 = (addr_t)(vm_info.page_tables);
+
+    //   ctrl_area->N_CR3 = Get_CR3();
+    // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
+
+    //    guest_state->g_pat = 0x7040600070406ULL;
+  }
+
+}
+*/
Public Palacios Development Repository for the V3VEE Project