uint8_t value;
struct {
uint8_t rsvd1 : 1;
- uint8_t isadma_reg_fwd_en : 1;
+ uint8_t isadma_reg_fwd_en : 1;
uint8_t piix_rsvd : 1;
uint8_t isadma_lo_bios_fwd_en : 1;
uint8_t top_of_mem : 4;
-static int reset_piix3(struct vm_device * dev) {
- struct v3_southbridge * piix3 = (struct v3_southbridge *)(dev->private_data);
+static int reset_piix3(struct v3_southbridge * piix3) {
struct pci_device * pci_dev = piix3->southbridge_pci;
struct piix3_config_space * piix3_cfg = (struct piix3_config_space *)(pci_dev->config_data);
}
-//irq is pirq_rc[intr_pin + pci_dev_num - 1] & 0x3
+//irq is pirq_rc[intr_pin + pci_dev_num - 1] & 0xf
+/*
+struct pirq_rc_reg {
+ uint8_t irq : 4;
+ uint8_t rsvd : 3;
+ uint8_t disabled : 1; // (1=disabled, 0=enabled)
+}
+*/
+
-static int raise_pci_irq(struct vm_device * dev, struct pci_device * pci_dev) {
- struct v3_southbridge * piix3 = (struct v3_southbridge *)(dev->private_data);
+static int raise_pci_irq(struct pci_device * pci_dev, void * dev_data) {
+ struct v3_southbridge * piix3 = dev_data;
struct pci_device * piix3_pci = piix3->southbridge_pci;
struct piix3_config_space * piix3_cfg = (struct piix3_config_space *)(piix3_pci->config_data);
int intr_pin = pci_dev->config_header.intr_pin - 1;
int irq_index = (intr_pin + pci_dev->dev_num - 1) & 0x3;
+
+ /*
+ PrintError("Raising PCI dev %d intr %d via IOAPIC as IRQ %d and via PIRQ as IRQ %d on VM %p\n",
+ pci_dev->dev_num, pci_dev->config_header.intr_pin,
+ 16+irq_index,
+ piix3_cfg->pirq_rc[irq_index], piix3->vm);
+ */
+
+ // deliver first by PIRQ, if it exists
+ //
+ if (piix3_cfg->pirq_rc[irq_index] < 16) {
+ v3_raise_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index] & 0xf);
+ } else {
+ // not an error
+ }
+
+ // deliver next via the PCI0 to ioapic mapping defined in the
+ // mptable (ioapic, pins 16->19 are used for PCI0)
+ // ideally this would check to verify that an ioapic is actually available
+ v3_raise_irq(piix3->vm, 16+irq_index);
- // PrintError("Raising PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]);
-
- v3_raise_irq(dev->vm, piix3_cfg->pirq_rc[irq_index]);
return 0;
}
-static int lower_pci_irq(struct vm_device * dev, struct pci_device * pci_dev) {
- struct v3_southbridge * piix3 = (struct v3_southbridge *)(dev->private_data);
+static int lower_pci_irq(struct pci_device * pci_dev, void * dev_data) {
+ struct v3_southbridge * piix3 = dev_data;
struct pci_device * piix3_pci = piix3->southbridge_pci;
struct piix3_config_space * piix3_cfg = (struct piix3_config_space *)(piix3_pci->config_data);
int intr_pin = pci_dev->config_header.intr_pin - 1;
int irq_index = (intr_pin + pci_dev->dev_num - 1) & 0x3;
// PrintError("Lowering PCI IRQ %d\n", piix3_cfg->pirq_rc[irq_index]);
+
+ // First, lower the pin on the ioapic
+ v3_lower_irq(piix3->vm, irq_index+16);
- v3_lower_irq(dev->vm, piix3_cfg->pirq_rc[irq_index]);
+ // Next, lower whatever we asserted by the PIRQs
+ if (piix3_cfg->pirq_rc[irq_index] < 16) {
+ v3_lower_irq(piix3->vm, piix3_cfg->pirq_rc[irq_index] & 0xf);
+ } else {
+ // not an error
+ }
return 0;
}
-static int piix_free(struct vm_device * dev) {
+static int piix_free(struct v3_southbridge * piix3) {
+
+ // unregister pci
+
+ V3_Free(piix3);
return 0;
}
static struct v3_device_ops dev_ops = {
- .free = piix_free,
- .reset = reset_piix3,
- .start = NULL,
- .stop = NULL,
+ .free = (int (*)(void *))piix_free,
};
-static int setup_pci(struct vm_device * dev) {
- struct v3_southbridge * piix3 = (struct v3_southbridge *)(dev->private_data);
+static int setup_pci(struct v3_southbridge * piix3) {
struct pci_device * pci_dev = NULL;
struct v3_pci_bar bars[6];
int i;
pci_dev = v3_pci_register_device(piix3->pci_bus, PCI_MULTIFUNCTION,
bus_num, -1, 0,
"PIIX3", bars,
- NULL, NULL, NULL, dev);
+ NULL, NULL, NULL, piix3);
if (pci_dev == NULL) {
PrintError("Could not register PCI Device for PIIX3\n");
return -1;
piix3->southbridge_pci = pci_dev;
- v3_pci_set_irq_bridge(piix3->pci_bus, bus_num, raise_pci_irq, lower_pci_irq, dev);
+ v3_pci_set_irq_bridge(piix3->pci_bus, bus_num, raise_pci_irq, lower_pci_irq, piix3);
- reset_piix3(dev);
+ reset_piix3(piix3);
return 0;
}
-static int piix3_init(struct guest_info * vm, v3_cfg_tree_t * cfg) {
+static int piix3_init(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
struct v3_southbridge * piix3 = (struct v3_southbridge *)V3_Malloc(sizeof(struct v3_southbridge));
struct vm_device * dev = NULL;
struct vm_device * pci = v3_find_dev(vm, v3_cfg_val(cfg, "bus"));
- char * name = v3_cfg_val(cfg, "name");
+ char * dev_id = v3_cfg_val(cfg, "ID");
if (!pci) {
PrintError("Could not find PCI device\n");
piix3->pci_bus = pci;
piix3->type = V3_SB_PIIX3;
+ piix3->vm = vm;
- dev = v3_allocate_device(name, &dev_ops, piix3);
+ dev = v3_add_device(vm, dev_id, &dev_ops, piix3);
- if (v3_attach_device(vm, dev) == -1) {
- PrintError("Could not attach device %s\n", name);
+ if (dev == NULL) {
+ PrintError("Could not attach device %s\n", dev_id);
+ V3_Free(piix3);
return -1;
}
PrintDebug("Created PIIX3\n");
- return setup_pci(dev);
+ if (setup_pci(piix3) == -1) {
+ v3_remove_device(dev);
+ return -1;
+ }
+
+ return 0;
}
