#include <devices/ide.h>
#include "ide-types.h"
-
+#define PRI_DEFAULT_IRQ 14
+#define SEC_DEFAULT_IRQ 15
#define PRI_DATA_PORT 0x1f0
#define PRI_FEATURES_PORT 0x1f1
#define SEC_ADDR_REG_PORT 0x377
-typedef enum {IDE_DISK, IDE_CDROM, IDE_NONE} ide_dev_type_t;
+
static const char * ide_dev_type_strs[] = {"HARDDISK", "CDROM", "NONE"};
-static inline const char * device_type_to_str(ide_dev_type_t type) {
+static inline const char * device_type_to_str(v3_ide_dev_type_t type) {
if (type > 2) {
return NULL;
}
struct ide_drive {
// Command Registers
- ide_dev_type_t drive_type;
+ v3_ide_dev_type_t drive_type;
-};
+ union {
+ struct v3_ide_cd_ops * cd_ops;
+ struct v3_ide_hd_ops * hd_ops;
+ };
+ char model[41];
-struct ide_channel {
- struct ide_drive drives[2];
+ uint_t data_offset;
- // Command Registers
- struct ide_error_reg error_reg; // [read] 0x1f1,0x171
- uint8_t sector_count; // 0x1f2,0x172
- uint8_t sector_num; // 0x1f3,0x173
+ // data buffer...
+ uint8_t buffer[2048];
- struct ide_features_reg features;
+ void * private_data;
+ uint8_t sector_count; // 0x1f2,0x172
+ uint8_t sector_num; // 0x1f3,0x173
union {
uint16_t cylinder;
struct {
} __attribute__((packed));
} __attribute__((packed));
+
+};
+
+
+
+struct ide_channel {
+ struct ide_drive drives[2];
+
+ // Command Registers
+ struct ide_error_reg error_reg; // [read] 0x1f1,0x171
+
+ struct ide_features_reg features;
+
struct ide_drive_head_reg drive_head; // 0x1f6,0x176
struct ide_status_reg status; // [read] 0x1f7,0x177
uint8_t command_reg; // [write] 0x1f7,0x177
+ int irq; // this is temporary until we add PCI support
+
// Control Registers
- struct ide_drive_ctrl_reg ctrl_reg; // [write] 0x3f6,0x376
+ struct ide_ctrl_reg ctrl_reg; // [write] 0x3f6,0x376
};
}
+static void ide_raise_irq(struct vm_device * dev, struct ide_channel * channel) {
+ if (channel->ctrl_reg.irq_disable == 0) {
+ v3_raise_irq(dev->vm, channel->irq);
+ }
+}
+
+
+static void drive_reset(struct ide_drive * drive) {
+ drive->sector_count = 0x01;
+ drive->sector_num = 0x01;
+
+ if (drive->drive_type == IDE_CDROM) {
+ drive->cylinder = 0xeb14;
+ } else {
+ drive->cylinder = 0x0000;
+ }
+
+ // Send the reset signal to the connected device callbacks
+ // channel->drives[0].reset();
+ // channel->drives[1].reset();
+}
+
+static void channel_reset(struct ide_channel * channel) {
+
+ // set busy and seek complete flags
+ channel->status.val = 0x90;
+
+ // Clear errors
+ channel->error_reg.val = 0x01;
+
+ // clear commands
+ channel->command_reg = 0x00;
+
+ channel->ctrl_reg.irq_disable = 0;
+}
+
+static void channel_reset_complete(struct ide_channel * channel) {
+ channel->status.busy = 0;
+ channel->status.ready = 1;
+
+ channel->drive_head.head_num = 0;
+
+ drive_reset(&(channel->drives[0]));
+ drive_reset(&(channel->drives[1]));
+}
+
+
+static void ide_abort_command(struct vm_device * dev, struct ide_channel * channel) {
+ channel->status.val = 0x41; // Error + ready
+ channel->error_reg.val = 0x04; // No idea...
+
+ ide_raise_irq(dev, channel);
+}
+
+
+
+
+// Include the ATAPI interface handlers
+#include "atapi.h"
+
+
+
static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
+ struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
+ struct ide_channel * channel = get_selected_channel(ide, port);
+ struct ide_drive * drive = get_selected_drive(channel);
+
+ if (length != 1) {
+ PrintError("Invalid Write Length on IDE command Port %x\n", port);
+ return -1;
+ }
+
+ channel->command_reg = *(uint8_t *)src;
+
+
PrintDebug("IDE: Writing Command Port %x (val=%x)\n", port, *(uint8_t *)src);
+
+ switch (channel->command_reg) {
+
+ case 0xa0: // ATAPI Command Packet
+ if (drive->drive_type != IDE_CDROM) {
+ ide_abort_command(dev, channel);
+ }
+
+ drive->sector_count = 1;
+
+ channel->status.busy = 0;
+ channel->status.write_fault = 0;
+ channel->status.data_req = 1;
+ channel->status.error = 0;
+
+ drive->data_offset = 0;
+
+ case 0xa1: // ATAPI Identify Device Packet
+ atapi_identify_device(drive);
+
+ channel->error_reg.val = 0;
+ channel->status.val = 0x58; // ready, data_req, seek_complete
+
+ ide_raise_irq(dev, channel);
+ case 0xec: // Identify Device
+ if (drive->drive_type != IDE_DISK) {
+ drive_reset(drive);
+
+ // JRL: Should we abort here?
+ ide_abort_command(dev, channel);
+ } else {
+ PrintError("IDE Disks currently not implemented\n");
+ return -1;
+ }
+ break;
+
+ }
+
return -1;
}
static int write_port_std(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
struct ide_internal * ide = (struct ide_internal *)(dev->private_data);
struct ide_channel * channel = get_selected_channel(ide, port);
- // struct ide_drive * drive = get_selected_drive(channel);
-
+ struct ide_drive * drive = get_selected_drive(channel);
+
if (length != 1) {
PrintError("Invalid Write length on IDE port %x\n", port);
return -1;
switch (port) {
// reset and interrupt enable
case PRI_CTRL_PORT:
- case SEC_CTRL_PORT:
- channel->ctrl_reg.val = *(uint8_t *)src;
-
- if (channel->ctrl_reg.soft_reset) {
- //reset_channel(channel);
- return -1;
+ case SEC_CTRL_PORT: {
+ struct ide_ctrl_reg * tmp_ctrl = (struct ide_ctrl_reg *)src;
+
+ // only reset channel on a 0->1 reset bit transition
+ if ((!channel->ctrl_reg.soft_reset) && (tmp_ctrl->soft_reset)) {
+ channel_reset(channel);
+ } else if ((channel->ctrl_reg.soft_reset) && (!tmp_ctrl->soft_reset)) {
+ channel_reset_complete(channel);
}
- break;
+ channel->ctrl_reg.val = tmp_ctrl->val;
+ break;
+ }
case PRI_FEATURES_PORT:
case SEC_FEATURES_PORT:
channel->features.val = *(uint8_t *)src;
case PRI_SECT_CNT_PORT:
case SEC_SECT_CNT_PORT:
- channel->sector_count = *(uint8_t *)src;
+ drive->sector_count = *(uint8_t *)src;
break;
case PRI_SECT_NUM_PORT:
case SEC_SECT_NUM_PORT:
- channel->sector_num = *(uint8_t *)src;
+ drive->sector_num = *(uint8_t *)src;
case PRI_CYL_LOW_PORT:
case SEC_CYL_LOW_PORT:
- channel->cylinder_low = *(uint8_t *)src;
+ drive->cylinder_low = *(uint8_t *)src;
break;
case PRI_CYL_HIGH_PORT:
case SEC_CYL_HIGH_PORT:
- channel->cylinder_high = *(uint8_t *)src;
+ drive->cylinder_high = *(uint8_t *)src;
break;
case PRI_DRV_SEL_PORT:
- case SEC_DRV_SEL_PORT:
+ case SEC_DRV_SEL_PORT: {
channel->drive_head.val = *(uint8_t *)src;
-
+
// make sure the reserved bits are ok..
// JRL TODO: check with new ramdisk to make sure this is right...
channel->drive_head.val |= 0xa0;
-
- return -1;
+ drive = get_selected_drive(channel);
+
+ // Selecting a non-present device is a no-no
+ if (drive->drive_type == IDE_NONE) {
+ PrintDebug("Attempting to select a non-present drive\n");
+ channel->error_reg.abort = 1;
+ channel->status.error = 1;
+ }
+ break;
+ }
default:
PrintError("IDE: Write to unknown Port %x\n", port);
return -1;
case PRI_SECT_CNT_PORT:
case SEC_SECT_CNT_PORT:
- *(uint8_t *)dst = channel->sector_count;
+ *(uint8_t *)dst = drive->sector_count;
break;
case PRI_SECT_NUM_PORT:
case SEC_SECT_NUM_PORT:
- *(uint8_t *)dst = channel->sector_num;
+ *(uint8_t *)dst = drive->sector_num;
break;
case PRI_CYL_LOW_PORT:
case SEC_CYL_LOW_PORT:
- *(uint8_t *)dst = channel->cylinder_low;
+ *(uint8_t *)dst = drive->cylinder_low;
break;
case PRI_CYL_HIGH_PORT:
case SEC_CYL_HIGH_PORT:
- *(uint8_t *)dst = channel->cylinder_high;
+ *(uint8_t *)dst = drive->cylinder_high;
break;
case PRI_DRV_SEL_PORT:
return -1;
}
+ PrintDebug("\tVal=%x\n", *(uint8_t *)dst);
+
return length;
}
static void init_drive(struct ide_drive * drive) {
+ drive->sector_count = 0x01;
+ drive->sector_num = 0x01;
+ drive->cylinder = 0x0000;
drive->drive_type = IDE_NONE;
+ drive->data_offset = 0;
+ memset(drive->model, 0, sizeof(drive->model));
+ memset(drive->buffer, 0, sizeof(drive->buffer));
+
+ drive->private_data = NULL;
+ drive->cd_ops = NULL;
}
static void init_channel(struct ide_channel * channel) {
int i = 0;
channel->error_reg.val = 0x01;
- channel->sector_count = 0x01;
- channel->sector_num = 0x01;
- channel->cylinder = 0x0000;
channel->drive_head.val = 0x00;
channel->status.val = 0x00;
channel->command_reg = 0x00;
channel->ctrl_reg.val = 0x08;
+
for (i = 0; i < 2; i++) {
init_drive(&(channel->drives[i]));
}
for (i = 0; i < 2; i++) {
init_channel(&(ide->channels[i]));
+
+ // JRL: this is a terrible hack...
+ ide->channels[i].irq = PRI_DEFAULT_IRQ + i;
}
}
return device;
}
+
+
+
+
+
+int v3_ide_register_cdrom(struct vm_device * ide_dev,
+ uint_t bus_num,
+ uint_t drive_num,
+ char * dev_name,
+ struct v3_ide_cd_ops * ops,
+ void * private_data) {
+
+ struct ide_internal * ide = (struct ide_internal *)(ide_dev->private_data);
+ struct ide_channel * channel = NULL;
+ struct ide_drive * drive = NULL;
+
+ V3_ASSERT((bus_num >= 0) && (bus_num < 2));
+ V3_ASSERT((drive_num >= 0) && (drive_num < 2));
+
+ channel = &(ide->channels[bus_num]);
+ drive = &(channel->drives[drive_num]);
+
+ if (drive->drive_type != IDE_NONE) {
+ PrintError("Device slot (bus=%d, drive=%d) already occupied\n", bus_num, drive_num);
+ return -1;
+ }
+
+ strncpy(drive->model, dev_name, sizeof(drive->model) - 1);
+
+ while (strlen((char *)(drive->model)) < 40) {
+ strcat((char*)(drive->model), " ");
+ }
+
+
+ drive->drive_type = IDE_CDROM;
+
+ drive->cd_ops = ops;
+
+ drive->private_data = private_data;
+
+ return 0;
+}
+
+
+int v3_ide_register_harddisk(struct vm_device * ide_dev,
+ uint_t bus_num,
+ uint_t drive_num,
+ char * dev_name,
+ struct v3_ide_hd_ops * ops,
+ void * private_data) {
+
+ struct ide_internal * ide = (struct ide_internal *)(ide_dev->private_data);
+ struct ide_channel * channel = NULL;
+ struct ide_drive * drive = NULL;
+
+ V3_ASSERT((bus_num >= 0) && (bus_num < 2));
+ V3_ASSERT((drive_num >= 0) && (drive_num < 2));
+
+ channel = &(ide->channels[bus_num]);
+ drive = &(channel->drives[drive_num]);
+
+ if (drive->drive_type != IDE_NONE) {
+ PrintError("Device slot (bus=%d, drive=%d) already occupied\n", bus_num, drive_num);
+ return -1;
+ }
+
+ strncpy(drive->model, dev_name, sizeof(drive->model) - 1);
+
+ drive->drive_type = IDE_DISK;
+
+ drive->hd_ops = ops;
+
+ drive->private_data = private_data;
+
+ return 0;
+}
