#include <palacios/vmm_types.h>
#include <palacios/vmm.h>
+#ifndef DEBUG_PIC
+#undef PrintDebug
+#define PrintDebug(fmt, args...)
+#endif
typedef enum {RESET, ICW1, ICW2, ICW3, ICW4, READY} pic_state_t;
} else if ((irq > 7) && (irq < 16)) {
state->slave_irr |= 0x01 << (irq - 8); // PAD if -7 then irq 15=no irq
} else {
- PrintDebug("8259 PIC: Invalid IRQ raised (%d)\n", irq);
+ PrintError("8259 PIC: Invalid IRQ raised (%d)\n", irq);
return -1;
}
irq &= 0x7;
irq += 8;
} else {
- PrintDebug("8259 PIC: Could not find IRQ (0x%x) to Begin\n",irq);
+ PrintError("8259 PIC: Could not find IRQ (0x%x) to Begin\n",irq);
return -1;
}
struct pic_internal * state = (struct pic_internal*)dev->private_data;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid Read length (rd_Master1)\n");
+ PrintError("8259 PIC: Invalid Read length (rd_Master1)\n");
return -1;
}
struct pic_internal * state = (struct pic_internal*)dev->private_data;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid Read length (rd_Master2)\n");
+ PrintError("8259 PIC: Invalid Read length (rd_Master2)\n");
return -1;
}
struct pic_internal * state = (struct pic_internal*)dev->private_data;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid Read length (rd_Slave1)\n");
+ PrintError("8259 PIC: Invalid Read length (rd_Slave1)\n");
return -1;
}
struct pic_internal * state = (struct pic_internal*)dev->private_data;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid Read length (rd_Slave2)\n");
+ PrintError("8259 PIC: Invalid Read length (rd_Slave2)\n");
return -1;
}
uchar_t cw = *(uchar_t *)src;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid Write length (wr_Master1)\n");
+ PrintError("8259 PIC: Invalid Write length (wr_Master1)\n");
return -1;
}
}
PrintDebug("8259 PIC: Post ISR = %x (wr_Master1)\n", state->master_isr);
} else {
- PrintDebug("8259 PIC: Command not handled, or in error (wr_Master1)\n");
+ PrintError("8259 PIC: Command not handled, or in error (wr_Master1)\n");
return -1;
}
} else if (IS_OCW3(cw)) {
state->master_ocw3 = cw;
} else {
- PrintDebug("8259 PIC: Invalid OCW to PIC (wr_Master1)\n");
- PrintDebug("8259 PIC: CW=%x\n", cw);
+ PrintError("8259 PIC: Invalid OCW to PIC (wr_Master1)\n");
+ PrintError("8259 PIC: CW=%x\n", cw);
return -1;
}
} else {
- PrintDebug("8259 PIC: Invalid PIC State (wr_Master1)\n");
- PrintDebug("8259 PIC: CW=%x\n", cw);
+ PrintError("8259 PIC: Invalid PIC State (wr_Master1)\n");
+ PrintError("8259 PIC: CW=%x\n", cw);
return -1;
}
uchar_t cw = *(uchar_t *)src;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid Write length (wr_Master2)\n");
+ PrintError("8259 PIC: Invalid Write length (wr_Master2)\n");
return -1;
}
state->master_imr = cw;
} else {
// error
- PrintDebug("8259 PIC: Invalid master PIC State (wr_Master2)\n");
+ PrintError("8259 PIC: Invalid master PIC State (wr_Master2)\n");
return -1;
}
if (length != 1) {
// error
- PrintDebug("8259 PIC: Invalid Write length (wr_Slave1)\n");
+ PrintError("8259 PIC: Invalid Write length (wr_Slave1)\n");
return -1;
}
}
PrintDebug("8259 PIC: Post ISR = %x (wr_Slave1)\n", state->slave_isr);
} else {
- PrintDebug("8259 PIC: Command not handled or invalid (wr_Slave1)\n");
+ PrintError("8259 PIC: Command not handled or invalid (wr_Slave1)\n");
return -1;
}
// Basically sets the IRR/ISR read flag
state->slave_ocw3 = cw;
} else {
- PrintDebug("8259 PIC: Invalid command work (wr_Slave1)\n");
+ PrintError("8259 PIC: Invalid command work (wr_Slave1)\n");
return -1;
}
} else {
- PrintDebug("8259 PIC: Invalid State writing (wr_Slave1)\n");
+ PrintError("8259 PIC: Invalid State writing (wr_Slave1)\n");
return -1;
}
uchar_t cw = *(uchar_t *)src;
if (length != 1) {
- PrintDebug("8259 PIC: Invalid write length (wr_Slave2)\n");
+ PrintError("8259 PIC: Invalid write length (wr_Slave2)\n");
return -1;
}
} else if (state->slave_state == READY) {
state->slave_imr = cw;
} else {
- PrintDebug("8259 PIC: Invalid State at write (wr_Slave2)\n");
+ PrintError("8259 PIC: Invalid State at write (wr_Slave2)\n");
return -1;
}