+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
#include <devices/8254.h>
#include <palacios/vmm.h>
#include <palacios/vmm_time.h>
#include <palacios/vmm_util.h>
+#include <palacios/vmm_intr.h>
-
+#ifndef DEBUG_PIT
+#undef PrintDebug
+#define PrintDebug(fmt, args...)
+#endif
ushort_t counter;
ushort_t reload_value;
+ ushort_t latched_value;
+
+ enum {NOTLATCHED, LATCHED} latch_state;
+
+ enum {LSB, MSB} read_state;
+
uint_t output_pin : 1;
uint_t gate_input_pin : 1;
};
uint_t channel_cycles = 0;
uint_t output_changed = 0;
- PrintDebug("8254 PIT: %d crystal tics\n", oscillations);
+ // PrintDebug("8254 PIT: %d crystal tics\n", oscillations);
if (ch->run_state == PENDING) {
oscillations--;
ch->counter = ch->reload_value;
+
+ if (ch->op_mode == SQR_WAVE) {
+ ch->counter -= ch->counter % 2;
+ }
+
ch->run_state = RUNNING;
} else if (ch->run_state != RUNNING) {
return output_changed;
}
-
+ /*
PrintDebug("8254 PIT: Channel Run State = %d, counter=", ch->run_state);
PrintTraceLL(ch->counter);
PrintDebug("\n");
-
+ */
+ if (ch->op_mode == SQR_WAVE) {
+ oscillations *= 2;
+ }
if (ch->counter > oscillations) {
ch->counter -= oscillations;
return output_changed;
} else {
+ ushort_t reload_val = ch->reload_value;
oscillations -= ch->counter;
ch->counter = 0;
channel_cycles = 1;
- channel_cycles += oscillations / ch->reload_value;
- oscillations = oscillations % ch->reload_value;
+ if (ch->op_mode == SQR_WAVE) {
+ reload_val -= reload_val % 2;
+ }
+
+ channel_cycles += oscillations / reload_val;
+ oscillations = oscillations % reload_val;
- ch->counter = ch->reload_value - oscillations;
+ ch->counter = reload_val - oscillations;
}
- PrintDebug("8254 PIT: Channel Cycles: %d\n", channel_cycles);
+ // PrintDebug("8254 PIT: Channel Cycles: %d\n", channel_cycles);
}
break;
case SQR_WAVE:
+ ch->output_pin = (ch->output_pin + 1) % 2;
+
+ if (ch->output_pin == 1) {
+ output_changed = 1;
+ }
+
break;
case SW_STROBE:
+ return -1;
break;
case HW_STROBE:
+ return -1;
break;
default:
break;
if (handle_crystal_tics(dev, &(state->ch_0), oscillations) == 1) {
// raise interrupt
PrintDebug("8254 PIT: Injecting Timer interrupt to guest\n");
- dev->vm->vm_ops.raise_irq(dev->vm, 0);
+ v3_raise_irq(dev->vm, 0);
}
//handle_crystal_tics(dev, &(state->ch_1), oscillations);
case WAITING_LOBYTE:
ch->reload_value &= 0xff00;
ch->reload_value |= val;
-
+
if (ch->access_mode == LOBYTE_HIBYTE) {
ch->access_state = WAITING_HIBYTE;
} else if ((ch->op_mode != RATE_GEN) || (ch->run_state != RUNNING)) {
ch->run_state = PENDING;
}
-
+
PrintDebug("8254 PIT: updated channel counter: %d\n", ch->reload_value);
PrintDebug("8254 PIT: Channel Run State=%d\n", ch->run_state);
break;
default:
return -1;
- }
-
+ }
+
switch (ch->op_mode) {
case IRQ_ON_TERM_CNT:
case RATE_GEN:
ch->output_pin = 1;
break;
-
-
+ case SQR_WAVE:
+ ch->output_pin = 1;
+ break;
default:
return -1;
break;
static int handle_channel_read(struct channel * ch, char * val) {
- return -1;
+
+ ushort_t * myval;
+
+ if (ch->latch_state == NOTLATCHED) {
+ myval = &(ch->counter);
+ } else {
+ myval = &(ch->latched_value);
+ }
+
+ if (ch->read_state == LSB) {
+ *val = ((char*)myval)[0]; // little endian
+ ch->read_state = MSB;
+ } else {
+ *val = ((char*)myval)[1];
+ ch->read_state = LSB;
+ if (ch->latch_state == LATCHED) {
+ ch->latch_state = NOTLATCHED;
+ }
+ }
+
+ return 0;
+
}
switch (cmd.access_mode) {
case LATCH_COUNT:
- return -1;
+ if (ch->latch_state == NOTLATCHED) {
+ ch->latched_value = ch->counter;
+ ch->latch_state = LATCHED;
+ }
break;
case HIBYTE_ONLY:
ch->access_state = WAITING_HIBYTE;
char * val = (char *)dst;
if (length != 1) {
- PrintDebug("8254 PIT: Invalid Read Write length \n");
+ PrintError("8254 PIT: Invalid Read Write length \n");
return -1;
}
}
break;
default:
- PrintDebug("8254 PIT: Read from invalid port (%d)\n", port);
+ PrintError("8254 PIT: Read from invalid port (%d)\n", port);
return -1;
}
char val = *(char *)src;
if (length != 1) {
- PrintDebug("8254 PIT: Invalid Write Length\n");
+ PrintError("8254 PIT: Invalid Write Length\n");
return -1;
}
}
break;
default:
- PrintDebug("8254 PIT: Write to invalid port (%d)\n", port);
+ PrintError("8254 PIT: Write to invalid port (%d)\n", port);
return -1;
}
PrintDebug("8254 PIT: Write to PIT Command port\n");
PrintDebug("8254 PIT: Writing to channel %d (access_mode = %d, op_mode = %d)\n", cmd->channel, cmd->access_mode, cmd->op_mode);
if (length != 1) {
- PrintDebug("8254 PIT: Write of Invalid length to command port\n");
+ PrintError("8254 PIT: Write of Invalid length to command port\n");
return -1;
}
ch->output_pin = 0;
ch->gate_input_pin = 0;
+ ch->latched_value = 0;
+ ch->latch_state = NOTLATCHED;
+ ch->read_state = LSB;
+
return;
}
uint_t cpu_khz = V3_CPU_KHZ();
ullong_t reload_val = (ullong_t)cpu_khz * 1000;
- dev_hook_io(dev, CHANNEL0_PORT, &pit_read_channel, &pit_write_channel);
- dev_hook_io(dev, CHANNEL1_PORT, &pit_read_channel, &pit_write_channel);
- dev_hook_io(dev, CHANNEL2_PORT, &pit_read_channel, &pit_write_channel);
- dev_hook_io(dev, COMMAND_PORT, NULL, &pit_write_command);
+ v3_dev_hook_io(dev, CHANNEL0_PORT, &pit_read_channel, &pit_write_channel);
+ v3_dev_hook_io(dev, CHANNEL1_PORT, &pit_read_channel, &pit_write_channel);
+ v3_dev_hook_io(dev, CHANNEL2_PORT, &pit_read_channel, &pit_write_channel);
+ v3_dev_hook_io(dev, COMMAND_PORT, NULL, &pit_write_command);
+#ifdef DEBUG_PIT
PrintDebug("8254 PIT: OSC_HZ=%d, reload_val=", OSC_HZ);
PrintTraceLL(reload_val);
PrintDebug("\n");
-
+#endif
v3_add_timer(dev->vm, &timer_ops, dev);
init_channel(&(state->ch_1));
init_channel(&(state->ch_2));
+#ifdef DEBUG_PIT
PrintDebug("8254 PIT: CPU MHZ=%d -- pit count=", cpu_khz / 1000);
PrintTraceLL(state->pit_counter);
PrintDebug("\n");
+#endif
return 0;
}
};
-struct vm_device * create_pit() {
+struct vm_device * v3_create_pit() {
struct pit * pit_state = NULL;
pit_state = (struct pit *)V3_Malloc(sizeof(struct pit));
V3_ASSERT(pit_state != NULL);
- struct vm_device * dev = create_device("PIT", &dev_ops, pit_state);
+ struct vm_device * dev = v3_create_device("PIT", &dev_ops, pit_state);
return dev;
}
