} vmx_exit_t;
/* VMCS Exit QUALIFICATIONs */
-struct vmexit_io_qual {
- uint32_t access_size : 3; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
- uint32_t dir : 1; // (0: Out ;; 1: In)
- uint32_t string : 1; // (0: not string ;; 1: string)
- uint32_t rep : 1; // (0: not REP ;; 1: REP)
- uint32_t op_enc : 1; // (0: DX ;; 1: immediate)
- uint32_t rsvd : 9; // Set to 0
- uint32_t port : 16; // IO Port Number
+struct vmx_exit_io_qual {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t access_size : 3; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
+ uint32_t dir : 1; // (0: Out ;; 1: In)
+ uint32_t string : 1; // (0: not string ;; 1: string)
+ uint32_t rep : 1; // (0: not REP ;; 1: REP)
+ uint32_t op_enc : 1; // (0: DX ;; 1: immediate)
+ uint32_t rsvd : 9; // Set to 0
+ uint32_t port : 16; // IO Port Number
+ } __attribute__((packed));
+ } __attribute__((packed));
} __attribute__((packed));
+struct vmx_exit_io_instr_info {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t undef1 : 7;
+ uint32_t addr_size : 3;
+ uint32_t undef2 : 5;
+ uint32_t seg_reg : 3;
+ uint32_t undef3 : 14;
+ } __attribute__((packed));
+ } __attribute__((packed));
+} __attribute__((packed));
+
+/* Exit Interrupt Vector Info */
+struct vmx_exit_int_info {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t vector : 8; // IRQ number, exception vector, NMI = 2
+ uint32_t type : 3; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
+ uint32_t error_code : 1; // 1: error Code present
+ uint32_t nmi_unblock : 1; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
+ uint32_t rsvd : 18; // always 0
+ uint32_t valid : 1; // always 1 if valid
+ } __attribute__ ((packed));
+ } __attribute__ ((packed));
+} __attribute__((packed));
+
+/* VMX entry interrupt format */
+struct vmx_entry_int_info {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t vector : 8; // IRQ/exception vector number
+ uint32_t type : 3; // (0: ext. IRQ, 2: NMI, 3: hw excp, 4: sw int, 5: priv. sw excp, 6: sw excp, 7: other
+ uint32_t error_code : 1; // 1: deliver error code
+ uint32_t rsvd : 19;
+ uint32_t valid : 1; // 1: valid
+ } __attribute__ ((packed));
+ } __attribute__ ((packed));
+} __attribute__ ((packed));
+
+
struct VMExitDBGQual {
uint32_t src : 2; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
} __attribute__((packed));
-struct vmexit_cr_qual {
- uint32_t cr_id : 4; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
- uint32_t access_type : 2; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
- uint32_t lmsw_op_type : 1; // (0: register ; 1: memory)
- uint32_t rsvd1 : 1; // reserved to 0
- uint32_t gpr : 4; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
- uint32_t rsvd2 : 4; // reserved to 0
- uint32_t lmsw_src : 16; // src data for lmsw
+struct vmx_exit_cr_qual {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t cr_id : 4; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
+ uint32_t access_type : 2; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
+ uint32_t lmsw_op_type : 1; // (0: register ; 1: memory)
+ uint32_t rsvd1 : 1; // reserved to 0
+ uint32_t gpr : 4; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
+ uint32_t rsvd2 : 4; // reserved to 0
+ uint32_t lmsw_src : 16; // src data for lmsw
+ } __attribute__((packed));
+ } __attribute__((packed));
} __attribute__((packed));
struct VMExitMovDRQual {
/* End Exit Qualifications */
-
-int v3_handle_vmx_exit(struct v3_gprs * gprs, struct guest_info * info);
+struct vmx_exit_idt_vec_info {
+ union {
+ uint32_t value;
+ struct {
+ uint32_t vector : 8;
+ uint32_t type : 3;
+ uint32_t error_code : 1;
+ uint32_t undef : 1;
+ uint32_t rsvd : 18;
+ uint32_t valid : 1;
+ } __attribute__ ((packed));
+ } __attribute__ ((packed));
+} __attribute__ ((packed));
+
+int v3_handle_vmx_exit(struct v3_gprs * gprs, struct guest_info * info, struct v3_ctrl_regs * ctrl_regs);
+const char * v3_vmx_exit_code_to_str(vmx_exit_t exit);
#endif
