#include <palacios/vmm_types.h>
-
/* .... Giant fucking switch tables */
SMSW,
CLTS,
INVLPG,
+ INT,
MOV_CR2,
MOV_2CR,
} op_form_t;
-static int get_addr_width(struct guest_info * info, struct x86_instr * instr,
- op_form_t form) {
+static int get_addr_width(struct guest_info * info, struct x86_instr * instr) {
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
return (instr->prefixes.addr_size) ? 4 : 2;
+ case LONG:
+ return 8;
case PROTECTED:
case PROTECTED_PAE:
- return (instr->prefixes.addr_size) ? 2 : 4;
case LONG_32_COMPAT:
- case LONG:
+ if (info->segments.cs.db) {
+ return (instr->prefixes.addr_size) ? 2 : 4;
+ } else {
+ return (instr->prefixes.addr_size) ? 4 : 2;
+ }
default:
PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
case XOR_MEM2_8:
case XOR_IMM2_8:
case INC_8:
+ case INT:
case DEC_8:
case NEG_8:
case NOT_8:
case MOV_MEM2:
case MOV_2MEM:
case MOV_MEM2AX:
- case MOV_AX2MEM:
- case MOV_IMM2:
+ case MOV_AX2MEM:
case MOVS:
case MOVSX:
case MOVZX:
case OR_IMM2SX_8:
case SUB_IMM2SX_8:
case XOR_IMM2SX_8:
+ case MOV_IMM2:
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
return (instr->prefixes.op_size) ? 4 : 2;
+ case LONG:
+ if (instr->prefixes.rex_op_size) {
+ return 8;
+ } else {
+ return (instr->prefixes.op_size) ? 2 : 4;
+ }
case PROTECTED:
case PROTECTED_PAE:
- return (instr->prefixes.op_size) ? 2 : 4;
case LONG_32_COMPAT:
- case LONG:
+ if (info->segments.cs.db) {
+ // default is 32
+ return (instr->prefixes.op_size) ? 2 : 4;
+ } else {
+ return (instr->prefixes.op_size) ? 4 : 2;
+ }
default:
PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
-
case INVLPG:
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
return 0;
case PROTECTED:
case PROTECTED_PAE:
- return 4;
case LONG_32_COMPAT:
+ return 4;
case LONG:
+ return 8;
default:
PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
return 2;
case PROTECTED:
case PROTECTED_PAE:
- return 4;
case LONG_32_COMPAT:
+ return 4;
case LONG:
+ return 8;
default:
PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
+ //case INT:
case MOV_DR2:
case MOV_2DR:
case MOV_CR2:
case REAL:
case PROTECTED:
case PROTECTED_PAE:
- return 4;
case LONG_32_COMPAT:
+
+ return 4;
case LONG:
+ return 8;
default:
PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
return -1;
}
+
return 0;
}
struct v3_gprs;
-static inline int decode_gpr(struct v3_gprs * gprs,
+static inline int decode_gpr(struct guest_info * core,
uint8_t reg_code,
struct x86_operand * reg) {
+ struct v3_gprs * gprs = &(core->vm_regs);
+
switch (reg_code) {
case 0:
reg->operand = (addr_t)&(gprs->rax);
reg->operand = (addr_t)&(gprs->rdi);
}
break;
+ case 8:
+ reg->operand = (addr_t)&(gprs->r8);
+ break;
+ case 9:
+ reg->operand = (addr_t)&(gprs->r9);
+ break;
+ case 10:
+ reg->operand = (addr_t)&(gprs->r10);
+ break;
+ case 11:
+ reg->operand = (addr_t)&(gprs->r11);
+ break;
+ case 12:
+ reg->operand = (addr_t)&(gprs->r12);
+ break;
+ case 13:
+ reg->operand = (addr_t)&(gprs->r13);
+ break;
+ case 14:
+ reg->operand = (addr_t)&(gprs->r14);
+ break;
+ case 15:
+ reg->operand = (addr_t)&(gprs->r15);
+ break;
default:
+ PrintError("Invalid Reg Code (%d)\n", reg_code);
reg->operand = 0;
+ return -1;
+ }
+
+ return 0;
+}
+
+
+
+
+static inline int decode_cr(struct guest_info * core,
+ uint8_t reg_code,
+ struct x86_operand * reg) {
+
+ struct v3_ctrl_regs * crs = &(core->ctrl_regs);
+
+// PrintDebug("\t Ctrl regs %d\n", reg_code);
+
+ switch (reg_code) {
+ case 0:
+ reg->operand = (addr_t)&(crs->cr0);
+ break;
+ case 2:
+ reg->operand = (addr_t)&(crs->cr2);
+ break;
+ case 3:
+ reg->operand = (addr_t)&(crs->cr3);
+ break;
+ case 4:
+ reg->operand = (addr_t)&(crs->cr4);
break;
+ default:
+ reg->operand = 0;
+ PrintError("Invalid Reg Code (%d)\n", reg_code);
+ return -1;
}
return 0;
}
-// This converts the displacement into the appropriate masked value
-/*
- QUESTION: Are the register Values signed ?????
- */
-#define MASK_DISPLACEMENT(reg, mode) ({ \
- sint64_t val = 0; \
- if (mode == DISP8) { \
- val = (sint8_t)(reg & 0xff); \
- } else if (mode == DISP16) { \
- val = (sint16_t)(reg & 0xffff); \
- } else if (mode == DISP32) { \
- val = (sint32_t)(reg & 0xffffffff); \
- } else { \
- PrintError("Error invalid displacement size (%d)\n", mode); \
- V3_ASSERT(0); \
- } \
- val; \
- })
+
+#define ADDR_MASK(val, length) ({ \
+ ullong_t mask = 0x0LL; \
+ switch (length) { \
+ case 2: \
+ mask = 0x00000000000fffffLL; \
+ break; \
+ case 4: \
+ mask = 0x00000000ffffffffLL; \
+ break; \
+ case 8: \
+ mask = 0xffffffffffffffffLL; \
+ break; \
+ } \
+ val & mask; \
+ })
+
+
static int decode_rm_operand16(struct guest_info * core,
uint8_t * modrm_instr,
//PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
operand->type = REG_OPERAND;
- decode_gpr(gprs, modrm->rm, operand);
+ decode_gpr(core, modrm->rm, operand);
} else {
struct v3_segment * seg = NULL;
mod_mode = DISP8;
} else if (modrm->mod == 2) {
mod_mode = DISP16;
+ } else {
+ PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
+ v3_print_instr(instr);
+ return -1;
}
switch (modrm->rm) {
case 0:
- base_addr = gprs->rbx + MASK_DISPLACEMENT(gprs->rsi, mod_mode);
+ base_addr = gprs->rbx + ADDR_MASK(gprs->rsi, 2);
break;
case 1:
- base_addr = gprs->rbx + MASK_DISPLACEMENT(gprs->rdi, mod_mode);
+ base_addr = gprs->rbx + ADDR_MASK(gprs->rdi, 2);
break;
case 2:
- base_addr = gprs->rbp + MASK_DISPLACEMENT(gprs->rsi, mod_mode);
+ base_addr = gprs->rbp + ADDR_MASK(gprs->rsi, 2);
break;
case 3:
- base_addr = gprs->rbp + MASK_DISPLACEMENT(gprs->rdi, mod_mode);
+ base_addr = gprs->rbp + ADDR_MASK(gprs->rdi, 2);
break;
case 4:
- base_addr = gprs->rsi;
+ base_addr = ADDR_MASK(gprs->rsi, 2);
break;
case 5:
- base_addr = gprs->rdi;
+ base_addr = ADDR_MASK(gprs->rdi, 2);
break;
case 6:
if (modrm->mod == 0) {
base_addr = 0;
mod_mode = DISP16;
} else {
- base_addr = gprs->rbp;
+ base_addr = ADDR_MASK(gprs->rbp, 2);
}
break;
case 7:
- base_addr = gprs->rbx;
+ base_addr = ADDR_MASK(gprs->rbx, 2);
break;
}
seg = &(core->segments.ds);
}
- operand->operand = get_addr_linear(core, base_addr, seg);
+ operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
+ get_addr_width(core, instr));
}
operand->type = REG_OPERAND;
// PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
- decode_gpr(gprs, modrm->rm, operand);
+ decode_gpr(core, modrm->rm, operand);
} else {
struct v3_segment * seg = NULL;
mod_mode = DISP8;
} else if (modrm->mod == 2) {
mod_mode = DISP32;
+ } else {
+ PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
+ v3_print_instr(instr);
+ return -1;
}
switch (modrm->rm) {
}
if (has_sib_byte) {
- instr_cursor += 1;
struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
int scale = 0x1 << sib->scale;
switch (sib->base) {
case 0:
- base_addr += MASK_DISPLACEMENT(gprs->rax, mod_mode);
+ base_addr += ADDR_MASK(gprs->rax, 4);
break;
case 1:
- base_addr += MASK_DISPLACEMENT(gprs->rcx, mod_mode);
+ base_addr += ADDR_MASK(gprs->rcx, 4);
break;
case 2:
- base_addr += MASK_DISPLACEMENT(gprs->rdx, mod_mode);
+ base_addr += ADDR_MASK(gprs->rdx, 4);
break;
case 3:
- base_addr += MASK_DISPLACEMENT(gprs->rbx, mod_mode);
+ base_addr += ADDR_MASK(gprs->rbx, 4);
break;
case 4:
- base_addr += MASK_DISPLACEMENT(gprs->rsp, mod_mode);
+ base_addr += ADDR_MASK(gprs->rsp, 4);
break;
case 5:
if (modrm->mod != 0) {
- base_addr += MASK_DISPLACEMENT(gprs->rbp, mod_mode);
+ base_addr += ADDR_MASK(gprs->rbp, 4);
+ } else {
+ mod_mode = DISP32;
+ base_addr = 0;
}
break;
case 6:
- base_addr += MASK_DISPLACEMENT(gprs->rsi, mod_mode);
+ base_addr += ADDR_MASK(gprs->rsi, 4);
break;
case 7:
- base_addr += MASK_DISPLACEMENT(gprs->rdi, mod_mode);
+ base_addr += ADDR_MASK(gprs->rdi, 4);
break;
}
seg = &(core->segments.ds);
}
- operand->operand = get_addr_linear(core, base_addr, seg);
+ operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
+ get_addr_width(core, instr));
}
}
+int decode_rm_operand64(struct guest_info * core, uint8_t * modrm_instr,
+ struct x86_instr * instr, struct x86_operand * operand,
+ uint8_t * reg_code) {
+
+ struct v3_gprs * gprs = &(core->vm_regs);
+ uint8_t * instr_cursor = modrm_instr;
+ struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
+ addr_t base_addr = 0;
+ modrm_mode_t mod_mode = 0;
+ uint_t has_sib_byte = 0;
+
+
+ instr_cursor += 1;
+
+ *reg_code = modrm->reg;
+ *reg_code |= (instr->prefixes.rex_reg << 3);
+
+ if (modrm->mod == 3) {
+ uint8_t rm_val = modrm->rm;
+
+ rm_val |= (instr->prefixes.rex_rm << 3);
+
+ operand->type = REG_OPERAND;
+ // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
+
+ decode_gpr(core, rm_val, operand);
+ } else {
+ struct v3_segment * seg = NULL;
+ uint8_t rm_val = modrm->rm;
+
+ operand->type = MEM_OPERAND;
+
+
+ if (modrm->mod == 0) {
+ mod_mode = DISP0;
+ } else if (modrm->mod == 1) {
+ mod_mode = DISP8;
+ } else if (modrm->mod == 2) {
+ mod_mode = DISP32;
+ } else {
+ PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
+ v3_print_instr(instr);
+ return -1;
+ }
+
+ if (rm_val == 4) {
+ has_sib_byte = 1;
+ } else {
+ rm_val |= (instr->prefixes.rex_rm << 3);
+
+ switch (rm_val) {
+ case 0:
+ base_addr = gprs->rax;
+ break;
+ case 1:
+ base_addr = gprs->rcx;
+ break;
+ case 2:
+ base_addr = gprs->rdx;
+ break;
+ case 3:
+ base_addr = gprs->rbx;
+ break;
+ case 5:
+ if (modrm->mod == 0) {
+ base_addr = 0;
+ mod_mode = DISP32;
+ } else {
+ base_addr = gprs->rbp;
+ }
+ break;
+ case 6:
+ base_addr = gprs->rsi;
+ break;
+ case 7:
+ base_addr = gprs->rdi;
+ break;
+ case 8:
+ base_addr = gprs->r8;
+ break;
+ case 9:
+ base_addr = gprs->r9;
+ break;
+ case 10:
+ base_addr = gprs->r10;
+ break;
+ case 11:
+ base_addr = gprs->r11;
+ break;
+ case 12:
+ base_addr = gprs->r12;
+ break;
+ case 13:
+ base_addr = gprs->r13;
+ break;
+ case 14:
+ base_addr = gprs->r14;
+ break;
+ case 15:
+ base_addr = gprs->r15;
+ break;
+ default:
+ return -1;
+ }
+ }
+
+ if (has_sib_byte) {
+ struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
+ int scale = 0x1 << sib->scale;
+ uint8_t index_val = sib->index;
+ uint8_t base_val = sib->base;
+
+ index_val |= (instr->prefixes.rex_sib_idx << 3);
+ base_val |= (instr->prefixes.rex_rm << 3);
+
+ instr_cursor += 1;
+
+ switch (index_val) {
+ case 0:
+ base_addr = gprs->rax;
+ break;
+ case 1:
+ base_addr = gprs->rcx;
+ break;
+ case 2:
+ base_addr = gprs->rdx;
+ break;
+ case 3:
+ base_addr = gprs->rbx;
+ break;
+ case 4:
+ base_addr = 0;
+ break;
+ case 5:
+ base_addr = gprs->rbp;
+ break;
+ case 6:
+ base_addr = gprs->rsi;
+ break;
+ case 7:
+ base_addr = gprs->rdi;
+ break;
+ case 8:
+ base_addr = gprs->r8;
+ break;
+ case 9:
+ base_addr = gprs->r9;
+ break;
+ case 10:
+ base_addr = gprs->r10;
+ break;
+ case 11:
+ base_addr = gprs->r11;
+ break;
+ case 12:
+ base_addr = gprs->r12;
+ break;
+ case 13:
+ base_addr = gprs->r13;
+ break;
+ case 14:
+ base_addr = gprs->r14;
+ break;
+ case 15:
+ base_addr = gprs->r15;
+ break;
+ }
+
+ base_addr *= scale;
+
+
+ switch (base_val) {
+ case 0:
+ base_addr += gprs->rax;
+ break;
+ case 1:
+ base_addr += gprs->rcx;
+ break;
+ case 2:
+ base_addr += gprs->rdx;
+ break;
+ case 3:
+ base_addr += gprs->rbx;
+ break;
+ case 4:
+ base_addr += gprs->rsp;
+ break;
+ case 5:
+ if (modrm->mod != 0) {
+ base_addr += gprs->rbp;
+ } else {
+ mod_mode = DISP32;
+ base_addr = 0;
+ }
+ break;
+ case 6:
+ base_addr += gprs->rsi;
+ break;
+ case 7:
+ base_addr += gprs->rdi;
+ break;
+ case 8:
+ base_addr += gprs->r8;
+ break;
+ case 9:
+ base_addr += gprs->r9;
+ break;
+ case 10:
+ base_addr += gprs->r10;
+ break;
+ case 11:
+ base_addr += gprs->r11;
+ break;
+ case 12:
+ base_addr += gprs->r12;
+ break;
+ case 13:
+ base_addr += gprs->r13;
+ break;
+ case 14:
+ base_addr += gprs->r14;
+ break;
+ case 15:
+ base_addr += gprs->r15;
+ break;
+ }
+
+ }
+
+
+ if (mod_mode == DISP8) {
+ base_addr += *(sint8_t *)instr_cursor;
+ instr_cursor += 1;
+ } else if (mod_mode == DISP32) {
+ base_addr += *(sint32_t *)instr_cursor;
+ instr_cursor += 4;
+ }
+
+
+
+ //Segments should be ignored
+ // get appropriate segment
+
+ if (instr->prefixes.cs_override) {
+ seg = &(core->segments.cs);
+ } else if (instr->prefixes.es_override) {
+ seg = &(core->segments.es);
+ } else if (instr->prefixes.ss_override) {
+ seg = &(core->segments.ss);
+ } else if (instr->prefixes.fs_override) {
+ seg = &(core->segments.fs);
+ } else if (instr->prefixes.gs_override) {
+ seg = &(core->segments.gs);
+ } else {
+ seg = &(core->segments.ds);
+ }
+
+
+ operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
+ get_addr_width(core, instr));
+ }
+
+
+ return (instr_cursor - modrm_instr);
+
+}
static int decode_rm_operand(struct guest_info * core,
uint8_t * instr_ptr, // input
+ op_form_t form,
struct x86_instr * instr,
struct x86_operand * operand,
uint8_t * reg_code) {
v3_cpu_mode_t mode = v3_get_vm_cpu_mode(core);
- if (mode == REAL) {
- return decode_rm_operand16(core, instr_ptr, instr, operand, reg_code);
- } else if ((mode == PROTECTED) || (mode == PROTECTED_PAE)) {
- return decode_rm_operand32(core, instr_ptr, instr, operand, reg_code);
- } else {
- PrintError("Invalid CPU_MODE (%d)\n", mode);
- return -1;
+ operand->size = get_operand_width(core, instr, form);
+
+ switch (mode) {
+ case REAL:
+ return decode_rm_operand16(core, instr_ptr, instr, operand, reg_code);
+ case LONG:
+ if (instr->prefixes.rex) {
+ return decode_rm_operand64(core, instr_ptr, instr, operand, reg_code);
+ }
+ case PROTECTED:
+ case PROTECTED_PAE:
+ case LONG_32_COMPAT:
+ return decode_rm_operand32(core, instr_ptr, instr, operand, reg_code);
+ default:
+ PrintError("Invalid CPU_MODE (%d)\n", mode);
+ return -1;
}
}
case 0xf4:
return HLT;
+ case 0xcd:
+ return INT;
case 0xf6: {
struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
return INVALID_INSTR;
}
}
+
+
+
+static char * op_form_to_str(op_form_t form) {
+
+ switch (form) {
+ case LMSW: return "LMSW";
+ case SMSW: return "SMSW";
+ case CLTS: return "CLTS";
+ case INVLPG: return "INVLPG";
+ case MOV_CR2: return "MOV_CR2";
+ case MOV_2CR: return "MOV_2CR";
+ case MOV_DR2: return "MOV_DR2";
+ case MOV_2DR: return "MOV_2DR";
+ case MOV_SR2: return "MOV_SR2";
+ case MOV_2SR: return "MOV_2SR";
+ case MOV_MEM2_8: return "MOV_MEM2_8";
+ case MOV_MEM2: return "MOV_MEM2";
+ case MOV_2MEM_8: return "MOV_2MEM_8";
+ case MOV_2MEM: return "MOV_2MEM";
+ case MOV_MEM2AL_8: return "MOV_MEM2AL_8";
+ case MOV_MEM2AX: return "MOV_MEM2AX";
+ case MOV_AL2MEM_8: return "MOV_AL2MEM_8";
+ case MOV_AX2MEM: return "MOV_AX2MEM";
+ case MOV_IMM2_8: return "MOV_IMM2_8";
+ case MOV_IMM2: return "MOV_IMM2";
+ case MOVS_8: return "MOVS_8";
+ case MOVS: return "MOVS";
+ case MOVSX_8: return "MOVSX_8";
+ case MOVSX: return "MOVSX";
+ case MOVZX_8: return "MOVZX_8";
+ case MOVZX: return "MOVZX";
+ case HLT: return "HLT";
+ case PUSHF: return "PUSHF";
+ case POPF: return "POPF";
+ case ADC_2MEM_8: return "ADC_2MEM_8";
+ case ADC_2MEM: return "ADC_2MEM";
+ case ADC_MEM2_8: return "ADC_MEM2_8";
+ case ADC_MEM2: return "ADC_MEM2";
+ case ADC_IMM2_8: return "ADC_IMM2_8";
+ case ADC_IMM2: return "ADC_IMM2";
+ case ADC_IMM2SX_8: return "ADC_IMM2SX_8";
+ case ADD_IMM2_8: return "ADD_IMM2_8";
+ case ADD_IMM2: return "ADD_IMM2";
+ case ADD_IMM2SX_8: return "ADD_IMM2SX_8";
+ case ADD_2MEM_8: return "ADD_2MEM_8";
+ case ADD_2MEM: return "ADD_2MEM";
+ case ADD_MEM2_8: return "ADD_MEM2_8";
+ case ADD_MEM2: return "ADD_MEM2";
+ case AND_MEM2_8: return "AND_MEM2_8";
+ case AND_MEM2: return "AND_MEM2";
+ case AND_2MEM_8: return "AND_2MEM_8";
+ case AND_2MEM: return "AND_2MEM";
+ case AND_IMM2_8: return "AND_IMM2_8";
+ case AND_IMM2: return "AND_IMM2";
+ case AND_IMM2SX_8: return "AND_IMM2SX_8";
+ case OR_2MEM_8: return "OR_2MEM_8";
+ case OR_2MEM: return "OR_2MEM";
+ case OR_MEM2_8: return "OR_MEM2_8";
+ case OR_MEM2: return "OR_MEM2";
+ case OR_IMM2_8: return "OR_IMM2_8";
+ case OR_IMM2: return "OR_IMM2";
+ case OR_IMM2SX_8: return "OR_IMM2SX_8";
+ case SUB_2MEM_8: return "SUB_2MEM_8";
+ case SUB_2MEM: return "SUB_2MEM";
+ case SUB_MEM2_8: return "SUB_MEM2_8";
+ case SUB_MEM2: return "SUB_MEM2";
+ case SUB_IMM2_8: return "SUB_IMM2_8";
+ case SUB_IMM2: return "SUB_IMM2";
+ case SUB_IMM2SX_8: return "SUB_IMM2SX_8";
+ case XOR_2MEM_8: return "XOR_2MEM_8";
+ case XOR_2MEM: return "XOR_2MEM";
+ case XOR_MEM2_8: return "XOR_MEM2_8";
+ case XOR_MEM2: return "XOR_MEM2";
+ case XOR_IMM2_8: return "XOR_IMM2_8";
+ case XOR_IMM2: return "XOR_IMM2";
+ case XOR_IMM2SX_8: return "XOR_IMM2SX_8";
+ case INC_8: return "INC_8";
+ case INC: return "INC";
+ case DEC_8: return "DEC_8";
+ case DEC: return "DEC";
+ case NEG_8: return "NEG_8";
+ case NEG: return "NEG";
+ case NOT_8: return "NOT_8";
+ case NOT: return "NOT";
+ case XCHG_8: return "XCHG_8";
+ case XCHG: return "XCHG";
+ case SETB: return "SETB";
+ case SETBE: return "SETBE";
+ case SETL: return "SETL";
+ case SETLE: return "SETLE";
+ case SETNB: return "SETNB";
+ case SETNBE: return "SETNBE";
+ case SETNL: return "SETNL";
+ case SETNLE: return "SETNLE";
+ case SETNO: return "SETNO";
+ case SETNP: return "SETNP";
+ case SETNS: return "SETNS";
+ case SETNZ: return "SETNZ";
+ case SETP: return "SETP";
+ case SETS: return "SETS";
+ case SETZ: return "SETZ";
+ case SETO: return "SETO";
+ case STOS_8: return "STOS_8";
+ case STOS: return "STOS";
+ case INT: return "INT";
+
+ case INVALID_INSTR:
+ default:
+ return "INVALID_INSTR";
+ }
+}
