#include <palacios/vmm_types.h>
+#include <palacios/vm_guest.h>
+
+/* VM-Exit Controls */
+/* INTEL MANUAL: 20-16 vol. 3B */
+#define HOST_ADDR_SPACE_SIZE 0x00000200
+#define ACK_IRQ_ON_EXIT 0x00008000
+
+/* Control register exit masks */
+#define CR4_VMXE 0x00002000
+
+
+
typedef enum {
VMCS_GUEST_ES_SELECTOR = 0x00000800,
VMCS_HOST_GS_SELECTOR = 0x00000C0A,
VMCS_HOST_TR_SELECTOR = 0x00000C0C,
/* 64 bit control fields */
- IO_BITMAP_A_ADDR = 0x00002000,
- IO_BITMAP_A_ADDR_HIGH = 0x00002001,
- IO_BITMAP_B_ADDR = 0x00002002,
- IO_BITMAP_B_ADDR_HIGH = 0x00002003,
- MSR_BITMAPS = 0x00002004,
- MSR_BITMAPS_HIGH = 0x00002005,
- VM_EXIT_MSR_STORE_ADDR = 0x00002006,
- VM_EXIT_MSR_STORE_ADDR_HIGH = 0x00002007,
- VM_EXIT_MSR_LOAD_ADDR = 0x00002008,
- VM_EXIT_MSR_LOAD_ADDR_HIGH = 0x00002009,
- VM_ENTRY_MSR_LOAD_ADDR = 0x0000200A,
- VM_ENTRY_MSR_LOAD_ADDR_HIGH = 0x0000200B,
- VMCS_EXEC_PTR = 0x0000200C,
- VMCS_EXEC_PTR_HIGH = 0x0000200D,
- TSC_OFFSET = 0x00002010,
- TSC_OFFSET_HIGH = 0x00002011,
- VIRT_APIC_PAGE_ADDR = 0x00002012,
- VIRT_APIC_PAGE_ADDR_HIGH = 0x00002013,
+ VMCS_IO_BITMAP_A_ADDR = 0x00002000,
+ VMCS_IO_BITMAP_A_ADDR_HIGH = 0x00002001,
+ VMCS_IO_BITMAP_B_ADDR = 0x00002002,
+ VMCS_IO_BITMAP_B_ADDR_HIGH = 0x00002003,
+ VMCS_MSR_BITMAP = 0x00002004,
+ VMCS_MSR_BITMAP_HIGH = 0x00002005,
+ VMCS_EXIT_MSR_STORE_ADDR = 0x00002006,
+ VMCS_EXIT_MSR_STORE_ADDR_HIGH = 0x00002007,
+ VMCS_EXIT_MSR_LOAD_ADDR = 0x00002008,
+ VMCS_EXIT_MSR_LOAD_ADDR_HIGH = 0x00002009,
+ VMCS_ENTRY_MSR_LOAD_ADDR = 0x0000200A,
+ VMCS_ENTRY_MSR_LOAD_ADDR_HIGH = 0x0000200B,
+ VMCS_EXEC_PTR = 0x0000200C,
+ VMCS_EXEC_PTR_HIGH = 0x0000200D,
+ VMCS_TSC_OFFSET = 0x00002010,
+ VMCS_TSC_OFFSET_HIGH = 0x00002011,
+ VMCS_VAPIC_ADDR = 0x00002012,
+ VMCS_VAPIC_ADDR_HIGH = 0x00002013,
+ VMCS_APIC_ACCESS_ADDR = 0x00002014,
+ VMCS_APIC_ACCESS_ADDR_HIGH = 0x00002015,
/* 64 bit guest state fields */
- VMCS_LINK_PTR = 0x00002800,
- VMCS_LINK_PTR_HIGH = 0x00002801,
- GUEST_IA32_DEBUGCTL = 0x00002802,
- GUEST_IA32_DEBUGCTL_HIGH = 0x00002803,
- GUEST_IA32_PERF_GLOBAL_CTRL = 0x00002808,
- GUEST_IA32_PERF_GLOBAL_CTRL_HIGH = 0x00002809,
+ VMCS_LINK_PTR = 0x00002800,
+ VMCS_LINK_PTR_HIGH = 0x00002801,
+ VMCS_GUEST_DBG_CTL = 0x00002802,
+ VMCS_GUEST_DBG_CTL_HIGH = 0x00002803,
+ VMCS_GUEST_EFER = 0x00002805,
+ VMCS_GUEST_EFER_HIGH = 0x00002807,
+ VMCS_GUEST_PERF_GLOBAL_CTRL = 0x00002808,
+ VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH = 0x00002809,
+
+ VMCS_HOST_PERF_GLOBAL_CTRL = 0x00002c04,
+ VMCS_HOST_PERF_GLOBAL_CTRL_HIGH = 0x00002c05,
/* 32 bit control fields */
- PIN_VM_EXEC_CTRLS = 0x00004000,
- PROC_VM_EXEC_CTRLS = 0x00004002,
- EXCEPTION_BITMAP = 0x00004004,
- PAGE_FAULT_ERROR_MASK = 0x00004006,
- PAGE_FAULT_ERROR_MATCH = 0x00004008,
- CR3_TARGET_COUNT = 0x0000400A,
- VM_EXIT_CTRLS = 0x0000400C,
- VM_EXIT_MSR_STORE_COUNT = 0x0000400E,
- VM_EXIT_MSR_LOAD_COUNT = 0x00004010,
- VM_ENTRY_CTRLS = 0x00004012,
- VM_ENTRY_MSR_LOAD_COUNT = 0x00004014,
- VM_ENTRY_INT_INFO_FIELD = 0x00004016,
- VM_ENTRY_EXCEPTION_ERROR = 0x00004018,
- VM_ENTRY_INSTR_LENGTH = 0x0000401A,
- TPR_THRESHOLD = 0x0000401C,
+ VMCS_PIN_CTRLS = 0x00004000,
+ VMCS_PROC_CTRLS = 0x00004002,
+ VMCS_EXCP_BITMAP = 0x00004004,
+ VMCS_PG_FAULT_ERR_MASK = 0x00004006,
+ VMCS_PG_FAULT_ERR_MATCH = 0x00004008,
+ VMCS_CR3_TGT_CNT = 0x0000400A,
+ VMCS_EXIT_CTRLS = 0x0000400C,
+ VMCS_EXIT_MSR_STORE_CNT = 0x0000400E,
+ VMCS_EXIT_MSR_LOAD_CNT = 0x00004010,
+ VMCS_ENTRY_CTRLS = 0x00004012,
+ VMCS_ENTRY_MSR_LOAD_CNT = 0x00004014,
+ VMCS_ENTRY_INT_INFO = 0x00004016,
+ VMCS_ENTRY_EXCP_ERR = 0x00004018,
+ VMCS_ENTRY_INSTR_LEN = 0x0000401A,
+ VMCS_TPR_THRESHOLD = 0x0000401C,
+ VMCS_SEC_PROC_CTRLS = 0x0000401e,
/* 32 bit Read Only data fields */
- VM_INSTR_ERROR = 0x00004400,
- EXIT_REASON = 0x00004402,
- VM_EXIT_INT_INFO = 0x00004404,
- VM_EXIT_INT_ERROR = 0x00004406,
- IDT_VECTOR_INFO = 0x00004408,
- IDT_VECTOR_ERROR = 0x0000440A,
- VM_EXIT_INSTR_LENGTH = 0x0000440C,
- VMX_INSTR_INFO = 0x0000440E,
+ VMCS_INSTR_ERR = 0x00004400,
+ VMCS_EXIT_REASON = 0x00004402,
+ VMCS_EXIT_INT_INFO = 0x00004404,
+ VMCS_EXIT_INT_ERR = 0x00004406,
+ VMCS_IDT_VECTOR_INFO = 0x00004408,
+ VMCS_IDT_VECTOR_ERR = 0x0000440A,
+ VMCS_EXIT_INSTR_LEN = 0x0000440C,
+ VMCS_EXIT_INSTR_INFO = 0x0000440E,
/* 32 bit Guest state fields */
- GUEST_ES_LIMIT = 0x00004800,
- GUEST_CS_LIMIT = 0x00004802,
- GUEST_SS_LIMIT = 0x00004804,
- GUEST_DS_LIMIT = 0x00004806,
- GUEST_FS_LIMIT = 0x00004808,
- GUEST_GS_LIMIT = 0x0000480A,
- GUEST_LDTR_LIMIT = 0x0000480C,
- GUEST_TR_LIMIT = 0x0000480E,
- GUEST_GDTR_LIMIT = 0x00004810,
- GUEST_IDTR_LIMIT = 0x00004812,
- GUEST_ES_ACCESS = 0x00004814,
- GUEST_CS_ACCESS = 0x00004816,
- GUEST_SS_ACCESS = 0x00004818,
- GUEST_DS_ACCESS = 0x0000481A,
- GUEST_FS_ACCESS = 0x0000481C,
- GUEST_GS_ACCESS = 0x0000481E,
- GUEST_LDTR_ACCESS = 0x00004820,
- GUEST_TR_ACCESS = 0x00004822,
- GUEST_INT_STATE = 0x00004824,
- GUEST_ACTIVITY_STATE = 0x00004826,
- GUEST_SMBASE = 0x00004828,
- GUEST_IA32_SYSENTER_CS = 0x0000482A,
+ VMCS_GUEST_ES_LIMIT = 0x00004800,
+ VMCS_GUEST_CS_LIMIT = 0x00004802,
+ VMCS_GUEST_SS_LIMIT = 0x00004804,
+ VMCS_GUEST_DS_LIMIT = 0x00004806,
+ VMCS_GUEST_FS_LIMIT = 0x00004808,
+ VMCS_GUEST_GS_LIMIT = 0x0000480A,
+ VMCS_GUEST_LDTR_LIMIT = 0x0000480C,
+ VMCS_GUEST_TR_LIMIT = 0x0000480E,
+ VMCS_GUEST_GDTR_LIMIT = 0x00004810,
+ VMCS_GUEST_IDTR_LIMIT = 0x00004812,
+ VMCS_GUEST_ES_ACCESS = 0x00004814,
+ VMCS_GUEST_CS_ACCESS = 0x00004816,
+ VMCS_GUEST_SS_ACCESS = 0x00004818,
+ VMCS_GUEST_DS_ACCESS = 0x0000481A,
+ VMCS_GUEST_FS_ACCESS = 0x0000481C,
+ VMCS_GUEST_GS_ACCESS = 0x0000481E,
+ VMCS_GUEST_LDTR_ACCESS = 0x00004820,
+ VMCS_GUEST_TR_ACCESS = 0x00004822,
+ VMCS_GUEST_INT_STATE = 0x00004824,
+ VMCS_GUEST_ACTIVITY_STATE = 0x00004826,
+ VMCS_GUEST_SMBASE = 0x00004828,
+ VMCS_GUEST_SYSENTER_CS = 0x0000482A,
/* 32 bit host state field */
- HOST_IA32_SYSENTER_CS = 0x00004C00,
+ VMCS_HOST_SYSENTER_CS = 0x00004C00,
/* Natural Width Control Fields */
- CR0_GUEST_HOST_MASK = 0x00006000,
- CR4_GUEST_HOST_MASK = 0x00006002,
- CR0_READ_SHADOW = 0x00006004,
- CR4_READ_SHADOW = 0x00006006,
- CR3_TARGET_VALUE_0 = 0x00006008,
- CR3_TARGET_VALUE_1 = 0x0000600A,
- CR3_TARGET_VALUE_2 = 0x0000600C,
- CR3_TARGET_VALUE_3 = 0x0000600E,
+ VMCS_CR0_MASK = 0x00006000,
+ VMCS_CR4_MASK = 0x00006002,
+ VMCS_CR0_READ_SHDW = 0x00006004,
+ VMCS_CR4_READ_SHDW = 0x00006006,
+ VMCS_CR3_TGT_VAL_0 = 0x00006008,
+ VMCS_CR3_TGT_VAL_1 = 0x0000600A,
+ VMCS_CR3_TGT_VAL_2 = 0x0000600C,
+ VMCS_CR3_TGT_VAL_3 = 0x0000600E,
/* Natural Width Read Only Fields */
- EXIT_QUALIFICATION = 0x00006400,
- IO_RCX = 0x00006402,
- IO_RSI = 0x00006404,
- IO_RDI = 0x00006406,
- IO_RIP = 0x00006408,
- GUEST_LINEAR_ADDR = 0x0000640A,
+ VMCS_EXIT_QUAL = 0x00006400,
+ VMCS_IO_RCX = 0x00006402,
+ VMCS_IO_RSI = 0x00006404,
+ VMCS_IO_RDI = 0x00006406,
+ VMCS_IO_RIP = 0x00006408,
+ VMCS_GUEST_LINEAR_ADDR = 0x0000640A,
/* Natural Width Guest State Fields */
- GUEST_CR0 = 0x00006800,
- GUEST_CR3 = 0x00006802,
- GUEST_CR4 = 0x00006804,
- GUEST_ES_BASE = 0x00006806,
- GUEST_CS_BASE = 0x00006808,
- GUEST_SS_BASE = 0x0000680A,
- GUEST_DS_BASE = 0x0000680C,
- GUEST_FS_BASE = 0x0000680E,
- GUEST_GS_BASE = 0x00006810,
- GUEST_LDTR_BASE = 0x00006812,
- GUEST_TR_BASE = 0x00006814,
- GUEST_GDTR_BASE = 0x00006816,
- GUEST_IDTR_BASE = 0x00006818,
- GUEST_DR7 = 0x0000681A,
- GUEST_RSP = 0x0000681C,
- GUEST_RIP = 0x0000681E,
- GUEST_RFLAGS = 0x00006820,
- GUEST_PENDING_DEBUG_EXCS = 0x00006822,
- GUEST_IA32_SYSENTER_ESP = 0x00006824,
- GUEST_IA32_SYSENTER_EIP = 0x00006826,
+ VMCS_GUEST_CR0 = 0x00006800,
+ VMCS_GUEST_CR3 = 0x00006802,
+ VMCS_GUEST_CR4 = 0x00006804,
+ VMCS_GUEST_ES_BASE = 0x00006806,
+ VMCS_GUEST_CS_BASE = 0x00006808,
+ VMCS_GUEST_SS_BASE = 0x0000680A,
+ VMCS_GUEST_DS_BASE = 0x0000680C,
+ VMCS_GUEST_FS_BASE = 0x0000680E,
+ VMCS_GUEST_GS_BASE = 0x00006810,
+ VMCS_GUEST_LDTR_BASE = 0x00006812,
+ VMCS_GUEST_TR_BASE = 0x00006814,
+ VMCS_GUEST_GDTR_BASE = 0x00006816,
+ VMCS_GUEST_IDTR_BASE = 0x00006818,
+ VMCS_GUEST_DR7 = 0x0000681A,
+ VMCS_GUEST_RSP = 0x0000681C,
+ VMCS_GUEST_RIP = 0x0000681E,
+ VMCS_GUEST_RFLAGS = 0x00006820,
+ VMCS_GUEST_PENDING_DBG_EXCP = 0x00006822,
+ VMCS_GUEST_SYSENTER_ESP = 0x00006824,
+ VMCS_GUEST_SYSENTER_EIP = 0x00006826,
/* Natural Width Host State Fields */
- HOST_CR0 = 0x00006C00,
- HOST_CR3 = 0x00006C02,
- HOST_CR4 = 0x00006C04,
- HOST_FS_BASE = 0x00006C06,
- HOST_GS_BASE = 0x00006C08,
- HOST_TR_BASE = 0x00006C0A,
- HOST_GDTR_BASE = 0x00006C0C,
- HOST_IDTR_BASE = 0x00006C0E,
- HOST_IA32_SYSENTER_ESP = 0x00006C10,
- HOST_IA32_SYSENTER_EIP = 0x00006C12,
- HOST_RSP = 0x00006C14,
- HOST_RIP = 0x00006C16,
- /* Pin Based VM Execution Controls */
- /* INTEL MANUAL: 20-10 vol 3B */
- EXTERNAL_INTERRUPT_EXITING = 0x00000001,
- NMI_EXITING = 0x00000008,
- VIRTUAL_NMIS = 0x00000020,
- /* Processor Based VM Execution Controls */
- /* INTEL MANUAL: 20-11 vol. 3B */
- INTERRUPT_WINDOWS_EXIT = 0x00000004,
- USE_TSC_OFFSETTING = 0x00000008,
- HLT_EXITING = 0x00000080,
- INVLPG_EXITING = 0x00000200,
- MWAIT_EXITING = 0x00000400,
- RDPMC_EXITING = 0x00000800,
- RDTSC_EXITING = 0x00001000,
- CR8_LOAD_EXITING = 0x00080000,
- CR8_STORE_EXITING = 0x00100000,
- USE_TPR_SHADOW = 0x00200000,
- NMI_WINDOW_EXITING = 0x00400000,
- MOVDR_EXITING = 0x00800000,
- UNCONDITION_IO_EXITING = 0x01000000,
- USE_IO_BITMAPS = 0x02000000,
- USE_MSR_BITMAPS = 0x10000000,
- MONITOR_EXITING = 0x20000000,
- PAUSE_EXITING = 0x40000000,
- /* VM-Exit Controls */
- /* INTEL MANUAL: 20-16 vol. 3B */
- HOST_ADDR_SPACE_SIZE = 0x00000200,
- ACK_IRQ_ON_EXIT = 0x00008000
+ VMCS_HOST_CR0 = 0x00006C00,
+ VMCS_HOST_CR3 = 0x00006C02,
+ VMCS_HOST_CR4 = 0x00006C04,
+ VMCS_HOST_FS_BASE = 0x00006C06,
+ VMCS_HOST_GS_BASE = 0x00006C08,
+ VMCS_HOST_TR_BASE = 0x00006C0A,
+ VMCS_HOST_GDTR_BASE = 0x00006C0C,
+ VMCS_HOST_IDTR_BASE = 0x00006C0E,
+ VMCS_HOST_SYSENTER_ESP = 0x00006C10,
+ VMCS_HOST_SYSENTER_EIP = 0x00006C12,
+ VMCS_HOST_RSP = 0x00006C14,
+ VMCS_HOST_RIP = 0x00006C16,
} vmcs_field_t;
-int vmcs_field_length(vmcs_field_t field);
-char* vmcs_field_name(vmcs_field_t field);
-
-
-
-/* VMCS Exit QUALIFICATIONs */
-struct VMExitIOQual {
- uint32_t accessSize : 3; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
- uint32_t dir : 1; // (0: Out ;; 1: In)
- uint32_t string : 1; // (0: not string ;; 1: string)
- uint32_t REP : 1; // (0: not REP ;; 1: REP)
- uint32_t opEnc : 1; // (0: DX ;; 1: immediate)
- uint32_t rsvd : 9; // Set to 0
- uint32_t port : 16; // IO Port Number
-} __attribute__((packed));
-
-struct VMExitDBGQual {
- uint32_t B0 : 1; // Breakpoint 0 condition met
- uint32_t B1 : 1; // Breakpoint 1 condition met
- uint32_t B2 : 1; // Breakpoint 2 condition met
- uint32_t B3 : 1; // Breakpoint 3 condition met
- uint32_t rsvd : 9; // reserved to 0
- uint32_t BD : 1; // detected DBG reg access
- uint32_t BS : 1; // cause either single instr or taken branch
-} __attribute__((packed));
-
-
-struct VMExitTSQual {
- uint32_t selector : 16; // selector of destination TSS
- uint32_t rsvd : 14; // reserved to 0
- uint32_t src : 2; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
-} __attribute__((packed));
-
-struct VMExitCRQual {
- uint32_t crID : 4; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
- uint32_t accessType : 2; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
- uint32_t lmswOpType : 1; // (0: register ; 1: memory)
- uint32_t rsvd1 : 1; // reserved to 0
- uint32_t gpr : 4; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
- uint32_t rsvd2 : 4; // reserved to 0
- uint32_t lmswSrc : 16; // src data for lmsw
-} __attribute__((packed));
-
-struct VMExitMovDRQual {
- uint32_t regID : 3; // debug register number
- uint32_t rsvd1 : 1; // reserved to 0
- uint32_t dir : 1; // (0: MOV to DR , 1: MOV from DR)
- uint32_t rsvd2 : 3; // reserved to 0
- uint32_t gpr : 4; // (0:RAX, 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
-} __attribute__((packed));
-
-/* End Exit Qualifications */
-
-/* Exit Vector Info */
-struct VMExitIntInfo {
- uint32_t nr : 8; // IRQ number, exception vector, NMI = 2
- uint32_t type : 3; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
- uint32_t errorCode : 1; // 1: error Code present
- uint32_t iret : 1; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
- uint32_t rsvd : 18; // always 0
- uint32_t valid : 1; // always 1 if valid
+struct vmx_exception_bitmap {
+ union {
+ uint32_t value;
+ struct {
+ uint_t de : 1; // (0) divide by zero
+ uint_t db : 1; // (1) Debug
+ uint_t nmi : 1; // (2) Non-maskable interrupt
+ uint_t bp : 1; // (3) Breakpoint
+ uint_t of : 1; // (4) Overflow
+ uint_t br : 1; // (5) Bound-Range
+ uint_t ud : 1; // (6) Invalid-Opcode
+ uint_t nm : 1; // (7) Device-not-available
+ uint_t df : 1; // (8) Double Fault
+ uint_t ex9 : 1;
+ uint_t ts : 1; // (10) Invalid TSS
+ uint_t np : 1; // (11) Segment-not-present
+ uint_t ss : 1; // (12) Stack
+ uint_t gp : 1; // (13) General Protection Fault
+ uint_t pf : 1; // (14) Page fault
+ uint_t ex15 : 1;
+ uint_t mf : 1; // (15) Floating point exception
+ uint_t ac : 1; // (16) Alignment-check
+ uint_t mc : 1; // (17) Machine Check
+ uint_t xf : 1; // (18) SIMD floating-point
+ uint_t ex20 : 1;
+ uint_t ex21 : 1;
+ uint_t ex22 : 1;
+ uint_t ex23 : 1;
+ uint_t ex24 : 1;
+ uint_t ex25 : 1;
+ uint_t ex26 : 1;
+ uint_t ex27 : 1;
+ uint_t ex28 : 1;
+ uint_t ex29 : 1;
+ uint_t sx : 1; // (30) Security Exception
+ uint_t ex31 : 1;
+ } __attribute__ ((packed));
+ } __attribute__ ((packed));
} __attribute__((packed));
-/* End Exit Vector Info */
-
-
-
-
/* Segment Selector Access Rights (32 bits) */
/* INTEL Manual: 20-4 vol 3B */
+struct vmcs_segment {
+ uint16_t selector;
+ uint32_t limit;
+ uint64_t base;
-
-struct vmcs_segment_access {
union {
- uint32_t value;
+ uint32_t val;
struct {
uint32_t type : 4;
uint32_t desc_type : 1;
uint32_t rsvd1 : 4;
uint32_t avail : 1;
uint32_t long_mode : 1; // CS only (64 bit active), reserved otherwise
- uint32_t DB : 1;
+ uint32_t db : 1;
uint32_t granularity : 1;
uint32_t unusable : 1;
uint32_t rsvd2 : 15;
} __attribute__((packed));
- } __attribute__((packed));
-}__attribute__((packed));
+ } __attribute__((packed)) access;
+};
struct vmcs_interrupt_state {
uint32_t rsvd1 : 28;
} __attribute__((packed));
-struct vmcs_pending_debug {
- uint32_t B0 : 1;
- uint32_t B1 : 1;
- uint32_t B2 : 1;
- uint32_t B3 : 1;
- uint32_t rsvd1 : 8;
- uint32_t break_enabled : 1;
- uint32_t rsvd2 : 1;
- uint32_t bs : 1;
- uint32_t rsvd3 : 50;
-} __attribute__((packed));
-
-
-struct VMCSExecCtrlFields {
- uint32_t pinCtrls ; // Table 20-5, Vol 3B. (pg. 20-10)
- uint32_t procCtrls ; // Table 20-6, Vol 3B. (pg. 20-11)
- uint32_t execBitmap ;
- uint32_t pageFaultErrorMask ;
- uint32_t pageFaultErrorMatch ;
- uint32_t ioBitmapA ;
- uint32_t ioBitmapB ;
- uint64_t tscOffset ;
- uint32_t cr0GuestHostMask ; // Should be 64 bits?
- uint32_t cr0ReadShadow ; // Should be 64 bits?
- uint32_t cr4GuestHostMask ; // Should be 64 bits?
- uint32_t cr4ReadShadow ; // Should be 64 bits?
- uint32_t cr3TargetValue0 ; // should be 64 bits?
- uint32_t cr3TargetValue1 ; // should be 64 bits?
- uint32_t cr3TargetValue2 ; // should be 64 bits?
- uint32_t cr3TargetValue3 ; // should be 64 bits?
- uint32_t cr3TargetCount ;
-
-
-
- /* these fields enabled if "use TPR shadow"==1 */
- /* may not need them */
- uint64_t virtApicPageAddr ;
- // uint32_t virtApicPageAddrHigh
- uint32_t tprThreshold ;
- /**/
-
- uint64_t MSRBitmapsBaseAddr;
-
- uint64_t vmcsExecPtr ;
-};
-
-int CopyOutVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
-int CopyInVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
-
-
-
-
-struct VMCSExitCtrlFields {
- uint32_t exitCtrls ; // Table 20-7, Vol. 3B (pg. 20-16)
- uint32_t msrStoreCount ;
- uint64_t msrStoreAddr ;
- uint32_t msrLoadCount ;
- uint64_t msrLoadAddr ;
-};
-
-int CopyOutVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
-int CopyInVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
-
-struct VMCSEntryCtrlFields {
- uint32_t entryCtrls ; // Table 20-9, Vol. 3B (pg. 20-18)
- uint32_t msrLoadCount ;
- uint64_t msrLoadAddr ;
- uint32_t intInfo ; // Table 20-10, Vol. 3B (pg. 20-19)
- uint32_t exceptionErrorCode ;
- uint32_t instrLength ;
-};
-
-
-int CopyOutVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
-int CopyInVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
-
-
-struct VMCSExitInfoFields {
- uint32_t reason; // Table 20-11, Vol. 3B (pg. 20-20)
- uint32_t qualification ; // Should be 64 bits?
- uint32_t intInfo ;
- uint32_t intErrorCode ;
- uint32_t idtVectorInfo ;
- uint32_t idtVectorErrorCode ;
- uint32_t instrLength ;
- uint64_t guestLinearAddr ; // Should be 64 bits?
- uint32_t instrInfo ;
- uint64_t ioRCX ; // Should be 64 bits?
- uint64_t ioRSI ; // Should be 64 bits?
- uint64_t ioRDI ; // Should be 64 bits?
- uint64_t ioRIP ; // Should be 64 bits?
- uint32_t instrErrorField ;
-
-};
+struct vmcs_data {
+ uint32_t revision ;
+ uint32_t abort ;
+} __attribute__((packed));
-int CopyOutVMCSExitInfoFields(struct VMCSExitInfoFields *p);
+int v3_vmcs_get_field_len(vmcs_field_t field);
+const char * v3_vmcs_field_to_str(vmcs_field_t field);
-typedef struct vmcs_data {
- uint32_t revision ;
- uint32_t abort ;
-} __attribute__((packed)) vmcs_data_t;
+void v3_print_vmcs();
-int CopyOutVMCSData(struct VMCSData *p);
-int CopyInVMCSData(struct VMCSData *p);
+int v3_vmx_save_vmcs(struct guest_info * info);
+int v3_vmx_restore_vmcs(struct guest_info * info);
-struct VMXRegs {
- uint32_t edi;
- uint32_t esi;
- uint32_t ebp;
- uint32_t esp;
- uint32_t ebx;
- uint32_t edx;
- uint32_t ecx;
- uint32_t eax;
-};
-
-void PrintTrace_VMX_Regs(struct VMXRegs *regs);
-void PrintTrace_VMCSData(struct VMCSData * vmcs);
-void PrintTrace_VMCSGuestStateArea(struct VMCSGuestStateArea * guestState);
-void PrintTrace_VMCSHostStateArea(struct VMCSHostStateArea * hostState);
-void PrintTrace_VMCSExecCtrlFields(struct VMCSExecCtrlFields * execCtrls);
-void PrintTrace_VMCSExitCtrlFields(struct VMCSExitCtrlFields * exitCtrls);
-void PrintTrace_VMCSEntryCtrlFields(struct VMCSEntryCtrlFields * entryCtrls);
-void PrintTrace_VMCSExitInfoFields(struct VMCSExitInfoFields * exitInfo);
-void PrintTrace_VMCSSegment(char * segname, struct VMCSSegment * seg, int abbr);
+int v3_update_vmcs_host_state(struct guest_info * info);
+int v3_update_vmcs_ctrl_fields(struct guest_info * info);
-//uint_t VMCSRead(uint_t tag, void * val);
+int v3_read_vmcs_segments(struct v3_segments * segs);
+int v3_write_vmcs_segments(struct v3_segments * segs);
+void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg);
+void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg);
#endif // ! __V3VEE__
