Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


added support for Intel EPT with(?) and without unrestricted guest support
[palacios.git] / palacios / src / palacios / vmx_hw_info.c
1 /* 
2  * This file is part of the Palacios Virtual Machine Monitor developed
3  * by the V3VEE Project with funding from the United States National 
4  * Science Foundation and the Department of Energy.  
5  *
6  * The V3VEE Project is a joint project between Northwestern University
7  * and the University of New Mexico.  You can find out more at 
8  * http://www.v3vee.org
9  *
10  * Copyright (c) 2011, Jack Lange <jarusl@cs.northwestern.edu> 
11  * Copyright (c) 2011, The V3VEE Project <http://www.v3vee.org> 
12  * All rights reserved.
13  *
14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
15  *
16  * This is free software.  You are permitted to use,
17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
18  */
19
20 #include <palacios/vmm.h>
21 #include <palacios/vmm_lowlevel.h>
22 #include <palacios/vmx_hw_info.h>
23 #include <palacios/vmm_msr.h>
24
25 // Intel VMX Feature MSRs
26
27
28 uint32_t v3_vmx_get_ctrl_features(struct vmx_ctrl_field * fields) {
29     // features are available if they are hardwired to 1, or the mask is 0 (they can be changed)
30     uint32_t features = 0;
31    
32     features = fields->req_val;
33     features |= ~(fields->req_mask);
34
35     return features;
36 }
37
38
39 static int get_ex_ctrl_caps(struct vmx_hw_info * hw_info, struct vmx_ctrl_field * field, 
40                             uint32_t old_msr, uint32_t true_msr) {
41     uint32_t old_0;  /* Bit is 1 => MB1 */
42     uint32_t old_1;  /* Bit is 0 => MBZ */
43     uint32_t true_0; /* Bit is 1 => MB1 */
44     uint32_t true_1; /* Bit is 0 => MBZ */
45
46     v3_get_msr(old_msr, &old_1, &old_0);
47     field->def_val = old_0;
48
49     if (hw_info->basic_info.def1_maybe_0) {
50         v3_get_msr(true_msr, &true_1, &true_0);
51     } else {
52         true_0 = old_0;
53         true_1 = old_1;
54     }
55     
56     field->req_val = true_0;
57     field->req_mask = ~(true_1 ^ true_0);
58
59     return 0;
60 }
61
62
63 static int get_ctrl_caps(struct vmx_ctrl_field * field, uint32_t msr) {
64     uint32_t mbz = 0; /* Bit is 0 => MBZ */
65     uint32_t mb1 = 0; /* Bit is 1 => MB1 */
66     
67     v3_get_msr(msr, &mbz, &mb1);
68     
69     field->def_val = mb1;
70     field->req_val = mb1;
71     field->req_mask = ~(mbz ^ mb1);
72
73     return 0;
74 }
75
76
77
78 static int get_cr_fields(struct vmx_cr_field * field, uint32_t fixed_1_msr, uint32_t fixed_0_msr) {
79     struct v3_msr mbz; /* Bit is 0 => MBZ */
80     struct v3_msr mb1; /* Bit is 0 => MBZ */
81
82     v3_get_msr(fixed_1_msr, &(mbz.hi), &(mbz.lo));
83     v3_get_msr(fixed_0_msr, &(mb1.hi), &(mb1.lo));
84      
85     field->def_val = mb1.value;
86     field->req_val = mb1.value;
87     field->req_mask = ~(mbz.value ^ mb1.value);
88
89     return 0;
90 }
91
92
93
94
95
96 int v3_init_vmx_hw(struct vmx_hw_info * hw_info) {
97     //  extern v3_cpu_arch_t v3_cpu_types[];
98
99     memset(hw_info, 0, sizeof(struct vmx_hw_info));
100
101     v3_get_msr(VMX_BASIC_MSR, &(hw_info->basic_info.hi), &(hw_info->basic_info.lo));
102     v3_get_msr(VMX_MISC_MSR, &(hw_info->misc_info.hi), &(hw_info->misc_info.lo));
103     v3_get_msr(VMX_EPT_VPID_CAP_MSR, &(hw_info->ept_info.hi), &(hw_info->ept_info.lo));
104
105     PrintError("BASIC_MSR: Lo: %x, Hi: %x\n", hw_info->basic_info.lo, hw_info->basic_info.hi);
106
107     get_ex_ctrl_caps(hw_info, &(hw_info->pin_ctrls), VMX_PINBASED_CTLS_MSR, VMX_TRUE_PINBASED_CTLS_MSR);
108     get_ex_ctrl_caps(hw_info, &(hw_info->proc_ctrls), VMX_PROCBASED_CTLS_MSR, VMX_TRUE_PROCBASED_CTLS_MSR);
109     get_ex_ctrl_caps(hw_info, &(hw_info->exit_ctrls), VMX_EXIT_CTLS_MSR, VMX_TRUE_EXIT_CTLS_MSR);
110     get_ex_ctrl_caps(hw_info, &(hw_info->entry_ctrls), VMX_ENTRY_CTLS_MSR, VMX_TRUE_ENTRY_CTLS_MSR);
111
112     /* Get secondary PROCBASED controls if secondary controls are available (optional or required) */
113     /* Intel Manual 3B. Sect. G.3.3 */
114     if ( ((hw_info->proc_ctrls.req_mask & 0x80000000) == 0) || 
115          ((hw_info->proc_ctrls.req_val & 0x80000000) == 1) ) {
116         get_ctrl_caps(&(hw_info->sec_proc_ctrls), VMX_PROCBASED_CTLS2_MSR);
117     }
118     
119     get_cr_fields(&(hw_info->cr0), VMX_CR0_FIXED1_MSR, VMX_CR0_FIXED0_MSR);
120     get_cr_fields(&(hw_info->cr4), VMX_CR4_FIXED1_MSR, VMX_CR4_FIXED0_MSR);
121
122     return 0;
123 }