palacios/src/palacios/vmcs.c

   1 /*
   2  * This file is part of the Palacios Virtual Machine Monitor developed
   3  * by the V3VEE Project with funding from the United States National
   4  * Science Foundation and the Department of Energy.
   5  *
   6  * The V3VEE Project is a joint project between Northwestern University
   7  * and the University of New Mexico.  You can find out more at
   8  * http://www.v3vee.org
   9  *
  10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
  11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
  12  * All rights reserved.
  13  *
  14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
  15  *
  16  * This is free software.  You are permitted to use,
  17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
  18  */
  19
  20 #include <palacios/vmcs.h>
  21 #include <palacios/vmx_lowlevel.h>
  22 #include <palacios/vmm.h>
  23 #include <palacios/vmx.h>
  24 #include <palacios/vm_guest_mem.h>
  25 #include <palacios/vmm_ctrl_regs.h>
  26 #include <palacios/vmm_lowlevel.h>
  27
  28
  29
  30
  31
  32 static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
  33     int ret = 0;
  34     ret = vmcs_write(field, val);
  35
  36     if (ret != VMX_SUCCESS) {
  37         PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
  38         return 1;
  39     }
  40
  41     return 0;
  42 }
  43
  44 static int inline check_vmcs_read(vmcs_field_t field, void * val) {
  45     int ret = 0;
  46     ret = vmcs_read(field, val);
  47
  48     if (ret != VMX_SUCCESS) {
  49         PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
  50     }
  51
  52     return ret;
  53 }
  54
  55
  56
  57
  58
  59
  60
  61 typedef enum { ES = 0,
  62                CS = 2,
  63                SS = 4,
  64                DS = 6,
  65                FS = 8,
  66                GS = 10,
  67                LDTR = 12,
  68                TR = 14,
  69                GDTR = 16,
  70                IDTR = 18} vmcs_seg_offsets_t;
  71
  72 typedef enum {BASE = VMCS_GUEST_ES_BASE,
  73               LIMIT = VMCS_GUEST_ES_LIMIT,
  74               ACCESS = VMCS_GUEST_ES_ACCESS,
  75               SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t;
  76
  77
  78
  79 static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
  80     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
  81     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
  82     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
  83     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
  84     struct vmcs_segment vmcs_seg;
  85
  86     memset(&vmcs_seg, 0, sizeof(struct vmcs_segment));
  87
  88     check_vmcs_read(limit, &(vmcs_seg.limit));
  89     check_vmcs_read(base, &(vmcs_seg.base));
  90
  91     if ((seg_type != GDTR) && (seg_type != IDTR)) {
  92         check_vmcs_read(selector, &(vmcs_seg.selector));
  93         check_vmcs_read(access, &(vmcs_seg.access.val));
  94     }
  95
  96     v3_vmxseg_to_seg(&vmcs_seg, seg);
  97
  98     return 0;
  99 }
 100
 101 static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
 102     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
 103     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
 104     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
 105     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
 106     struct vmcs_segment vmcs_seg;
 107
 108     v3_seg_to_vmxseg(seg, &vmcs_seg);
 109
 110     check_vmcs_write(limit, vmcs_seg.limit);
 111     check_vmcs_write(base, vmcs_seg.base);
 112
 113     if ((seg_type != GDTR) && (seg_type != IDTR)) {
 114         check_vmcs_write(access, vmcs_seg.access.val);
 115         check_vmcs_write(selector, vmcs_seg.selector);
 116     }
 117
 118     return 0;
 119 }
 120
 121 int v3_read_vmcs_segments(struct v3_segments * segs) {
 122     v3_read_vmcs_segment(&(segs->cs), CS);
 123     v3_read_vmcs_segment(&(segs->ds), DS);
 124     v3_read_vmcs_segment(&(segs->es), ES);
 125     v3_read_vmcs_segment(&(segs->fs), FS);
 126     v3_read_vmcs_segment(&(segs->gs), GS);
 127     v3_read_vmcs_segment(&(segs->ss), SS);
 128     v3_read_vmcs_segment(&(segs->ldtr), LDTR);
 129     v3_read_vmcs_segment(&(segs->gdtr), GDTR);
 130     v3_read_vmcs_segment(&(segs->idtr), IDTR);
 131     v3_read_vmcs_segment(&(segs->tr), TR);
 132
 133     return 0;
 134 }
 135
 136 int v3_write_vmcs_segments(struct v3_segments * segs) {
 137     v3_write_vmcs_segment(&(segs->cs), CS);
 138     v3_write_vmcs_segment(&(segs->ds), DS);
 139     v3_write_vmcs_segment(&(segs->es), ES);
 140     v3_write_vmcs_segment(&(segs->fs), FS);
 141     v3_write_vmcs_segment(&(segs->gs), GS);
 142     v3_write_vmcs_segment(&(segs->ss), SS);
 143     v3_write_vmcs_segment(&(segs->ldtr), LDTR);
 144     v3_write_vmcs_segment(&(segs->gdtr), GDTR);
 145     v3_write_vmcs_segment(&(segs->idtr), IDTR);
 146     v3_write_vmcs_segment(&(segs->tr), TR);
 147
 148     return 0;
 149 }
 150
 151
 152 void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) {
 153     memset(seg, 0, sizeof(struct v3_segment));
 154
 155     seg->selector = vmcs_seg->selector;
 156     seg->limit = vmcs_seg->limit;
 157     seg->base = vmcs_seg->base;
 158
 159     seg->type = vmcs_seg->access.type;
 160     seg->system = vmcs_seg->access.desc_type;
 161     seg->dpl = vmcs_seg->access.dpl;
 162     seg->present = vmcs_seg->access.present;
 163     seg->avail = vmcs_seg->access.avail;
 164     seg->long_mode = vmcs_seg->access.long_mode;
 165     seg->db = vmcs_seg->access.db;
 166     seg->granularity = vmcs_seg->access.granularity;
 167     seg->unusable = vmcs_seg->access.unusable;
 168
 169 }
 170
 171 void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) {
 172     memset(vmcs_seg, 0, sizeof(struct vmcs_segment));
 173
 174     vmcs_seg->selector = seg->selector;
 175     vmcs_seg->limit = seg->limit;
 176     vmcs_seg->base = seg->base;
 177
 178     vmcs_seg->access.type = seg->type;
 179     vmcs_seg->access.desc_type = seg->system;
 180     vmcs_seg->access.dpl = seg->dpl;
 181     vmcs_seg->access.present = seg->present;
 182     vmcs_seg->access.avail = seg->avail;
 183     vmcs_seg->access.long_mode = seg->long_mode;
 184     vmcs_seg->access.db = seg->db;
 185     vmcs_seg->access.granularity = seg->granularity;
 186     vmcs_seg->access.unusable = seg->unusable;
 187 }
 188
 189
 190
 191
 192 int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
 193     int vmx_ret = 0;
 194     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
 195
 196     vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value);
 197     vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value);
 198
 199     if (arch_data->pri_proc_ctrls.sec_ctrls) {
 200         vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value);
 201     }
 202
 203     vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value);
 204     vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value);
 205     vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, arch_data->excp_bmap.value);
 206
 207     if (info->shdw_pg_mode == NESTED_PAGING) {
 208         vmx_ret |= check_vmcs_write(VMCS_EPT_PTR, info->direct_map_pt);
 209     }
 210
 211     return vmx_ret;
 212 }
 213
 214
 215
 216
 217
 218
 219 int v3_vmx_save_vmcs(struct guest_info * info) {
 220     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
 221     int error = 0;
 222
 223     check_vmcs_read(VMCS_GUEST_RIP, &(info->rip));
 224     check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp));
 225
 226     check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0));
 227     check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0));
 228     check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3));
 229     check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4));
 230     check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4));
 231     check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7));
 232
 233     check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags));
 234
 235 #ifdef __V3_64BIT__
 236     check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer));
 237 #endif
 238
 239     error =  v3_read_vmcs_segments(&(info->segments));
 240
 241     return error;
 242 }
 243
 244
 245 int v3_vmx_restore_vmcs(struct guest_info * info) {
 246     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
 247     int error = 0;
 248
 249     check_vmcs_write(VMCS_GUEST_RIP, info->rip);
 250     check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
 251
 252     check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
 253     check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
 254     check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
 255     check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
 256     check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4);
 257     check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7);
 258
 259     check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
 260
 261 #ifdef __V3_64BIT__
 262     check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer);
 263 #endif
 264
 265
 266
 267
 268     error = v3_write_vmcs_segments(&(info->segments));
 269
 270     return error;
 271
 272 }
 273
 274
 275
 276 int v3_update_vmcs_host_state(struct guest_info * info) {
 277     int vmx_ret = 0;
 278     addr_t tmp;
 279     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
 280     struct v3_msr tmp_msr;
 281
 282 #ifdef __V3_64BIT__
 283     __asm__ __volatile__ ( "movq    %%cr0, %0; "
 284                            : "=q"(tmp)
 285                            :
 286     );
 287 #else
 288     __asm__ __volatile__ ( "movl    %%cr0, %0; "
 289                            : "=q"(tmp)
 290                            :
 291     );
 292 #endif
 293     vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp);
 294
 295
 296 #ifdef __V3_64BIT__
 297     __asm__ __volatile__ ( "movq %%cr3, %0; "
 298                            : "=q"(tmp)
 299                            :
 300     );
 301 #else
 302     __asm__ __volatile__ ( "movl %%cr3, %0; "
 303                            : "=q"(tmp)
 304                            :
 305     );
 306 #endif
 307     vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp);
 308
 309
 310 #ifdef __V3_64BIT__
 311     __asm__ __volatile__ ( "movq %%cr4, %0; "
 312                            : "=q"(tmp)
 313                            :
 314     );
 315 #else
 316     __asm__ __volatile__ ( "movl %%cr4, %0; "
 317                            : "=q"(tmp)
 318                            :
 319     );
 320 #endif
 321     vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp);
 322
 323
 324
 325     vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, arch_data->host_state.gdtr.base);
 326     vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, arch_data->host_state.idtr.base);
 327     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, arch_data->host_state.tr.base);
 328
 329 #define FS_BASE_MSR 0xc0000100
 330 #define GS_BASE_MSR 0xc0000101
 331
 332     // FS.BASE MSR
 333     v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 334     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value);
 335
 336     // GS.BASE MSR
 337     v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 338     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value);
 339
 340
 341
 342 #ifdef __V3_64BIT__
 343     __asm__ __volatile__ ( "movq %%cs, %0; "
 344                            : "=q"(tmp)
 345                            :
 346     );
 347 #else
 348     __asm__ __volatile__ ( "movl %%cs, %0; "
 349                            : "=q"(tmp)
 350                            :
 351     );
 352 #endif
 353     vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp);
 354
 355 #ifdef __V3_64BIT__
 356     __asm__ __volatile__ ( "movq %%ss, %0; "
 357                            : "=q"(tmp)
 358                            :
 359     );
 360 #else
 361     __asm__ __volatile__ ( "movl %%ss, %0; "
 362                            : "=q"(tmp)
 363                            :
 364     );
 365 #endif
 366     vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp);
 367
 368 #ifdef __V3_64BIT__
 369     __asm__ __volatile__ ( "movq %%ds, %0; "
 370                            : "=q"(tmp)
 371                            :
 372     );
 373 #else
 374     __asm__ __volatile__ ( "movl %%ds, %0; "
 375                            : "=q"(tmp)
 376                            :
 377     );
 378 #endif
 379     vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp);
 380
 381 #ifdef __V3_64BIT__
 382     __asm__ __volatile__ ( "movq %%es, %0; "
 383                            : "=q"(tmp)
 384                            :
 385     );
 386 #else
 387     __asm__ __volatile__ ( "movl %%es, %0; "
 388                            : "=q"(tmp)
 389                            :
 390     );
 391 #endif
 392     vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp);
 393
 394 #ifdef __V3_64BIT__
 395     __asm__ __volatile__ ( "movq %%fs, %0; "
 396                            : "=q"(tmp)
 397                            :
 398     );
 399 #else
 400     __asm__ __volatile__ ( "movl %%fs, %0; "
 401                            : "=q"(tmp)
 402                            :
 403     );
 404 #endif
 405     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp);
 406
 407 #ifdef __V3_64BIT__
 408     __asm__ __volatile__ ( "movq %%gs, %0; "
 409                            : "=q"(tmp)
 410                            :
 411     );
 412 #else
 413     __asm__ __volatile__ ( "movl %%gs, %0; "
 414                            : "=q"(tmp)
 415                            :
 416     );
 417 #endif
 418     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp);
 419
 420     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, arch_data->host_state.tr.selector);
 421
 422
 423 #define SYSENTER_CS_MSR 0x00000174
 424 #define SYSENTER_ESP_MSR 0x00000175
 425 #define SYSENTER_EIP_MSR 0x00000176
 426 #define EFER_MSR 0xc0000080
 427
 428     // SYSENTER CS MSR
 429     v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 430     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo);
 431
 432     // SYSENTER_ESP MSR
 433     v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 434     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value);
 435
 436     // SYSENTER_EIP MSR
 437     v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 438     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value);
 439
 440     // EFER
 441     v3_get_msr(EFER_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 442     vmx_ret |= check_vmcs_write(VMCS_HOST_EFER, tmp_msr.value);
 443
 444     return vmx_ret;
 445 }
 446
 447
 448
 449
 450
 451
 452 static inline void print_vmcs_field(vmcs_field_t vmcs_index) {
 453     int len = v3_vmcs_get_field_len(vmcs_index);
 454     addr_t val;
 455
 456     if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) {
 457         PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index));
 458         return;
 459     };
 460
 461     if (len == 2) {
 462         PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
 463     } else if (len == 4) {
 464         PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
 465     } else if (len == 8) {
 466         PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
 467     }
 468 }
 469
 470
 471 static void print_vmcs_segments() {
 472     struct v3_segments segs;
 473
 474     v3_read_vmcs_segments(&segs);
 475     v3_print_segments(&segs);
 476
 477
 478     PrintDebug("   ==> CS\n");
 479     print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
 480     print_vmcs_field(VMCS_GUEST_CS_BASE);
 481     print_vmcs_field(VMCS_GUEST_CS_LIMIT);
 482     print_vmcs_field(VMCS_GUEST_CS_ACCESS);
 483
 484     PrintDebug("   ==> SS\n");
 485     print_vmcs_field(VMCS_GUEST_SS_SELECTOR);
 486     print_vmcs_field(VMCS_GUEST_SS_BASE);
 487     print_vmcs_field(VMCS_GUEST_SS_LIMIT);
 488     print_vmcs_field(VMCS_GUEST_SS_ACCESS);
 489
 490     PrintDebug("   ==> DS\n");
 491     print_vmcs_field(VMCS_GUEST_DS_SELECTOR);
 492     print_vmcs_field(VMCS_GUEST_DS_BASE);
 493     print_vmcs_field(VMCS_GUEST_DS_LIMIT);
 494     print_vmcs_field(VMCS_GUEST_DS_ACCESS);
 495
 496     PrintDebug("   ==> ES\n");
 497     print_vmcs_field(VMCS_GUEST_ES_SELECTOR);
 498     print_vmcs_field(VMCS_GUEST_ES_BASE);
 499     print_vmcs_field(VMCS_GUEST_ES_LIMIT);
 500     print_vmcs_field(VMCS_GUEST_ES_ACCESS);
 501
 502     PrintDebug("   ==> FS\n");
 503     print_vmcs_field(VMCS_GUEST_FS_SELECTOR);
 504     print_vmcs_field(VMCS_GUEST_FS_BASE);
 505     print_vmcs_field(VMCS_GUEST_FS_LIMIT);
 506     print_vmcs_field(VMCS_GUEST_FS_ACCESS);
 507
 508     PrintDebug("   ==> GS\n");
 509     print_vmcs_field(VMCS_GUEST_GS_SELECTOR);
 510     print_vmcs_field(VMCS_GUEST_GS_BASE);
 511     print_vmcs_field(VMCS_GUEST_GS_LIMIT);
 512     print_vmcs_field(VMCS_GUEST_GS_ACCESS);
 513
 514     PrintDebug("   ==> LDTR\n");
 515     print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR);
 516     print_vmcs_field(VMCS_GUEST_LDTR_BASE);
 517     print_vmcs_field(VMCS_GUEST_LDTR_LIMIT);
 518     print_vmcs_field(VMCS_GUEST_LDTR_ACCESS);
 519
 520     PrintDebug("   ==> TR\n");
 521     print_vmcs_field(VMCS_GUEST_TR_SELECTOR);
 522     print_vmcs_field(VMCS_GUEST_TR_BASE);
 523     print_vmcs_field(VMCS_GUEST_TR_LIMIT);
 524     print_vmcs_field(VMCS_GUEST_TR_ACCESS);
 525
 526     PrintDebug("   ==> GDTR\n");
 527     print_vmcs_field(VMCS_GUEST_GDTR_BASE);
 528     print_vmcs_field(VMCS_GUEST_GDTR_LIMIT);
 529
 530     PrintDebug("   ==> IDTR\n");
 531     print_vmcs_field(VMCS_GUEST_IDTR_BASE);
 532     print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
 533
 534
 535 }
 536
 537
 538
 539
 540 static void print_guest_state()
 541 {
 542     PrintDebug("VMCS_GUEST_STATE\n");
 543     print_vmcs_field(VMCS_GUEST_RIP);
 544     print_vmcs_field(VMCS_GUEST_RSP);
 545     print_vmcs_field(VMCS_GUEST_RFLAGS);
 546     print_vmcs_field(VMCS_GUEST_CR0);
 547     print_vmcs_field(VMCS_GUEST_CR3);
 548     print_vmcs_field(VMCS_GUEST_CR4);
 549     print_vmcs_field(VMCS_GUEST_DR7);
 550
 551     // if save IA32_EFER
 552     print_vmcs_field(VMCS_GUEST_EFER);
 553 #ifdef __V3_32BIT__
 554     print_vmcs_field(VMCS_GUEST_EFER_HIGH);
 555 #endif
 556
 557
 558     PrintDebug("\n");
 559
 560     print_vmcs_segments();
 561
 562     PrintDebug("\n");
 563
 564     print_vmcs_field(VMCS_GUEST_DBG_CTL);
 565 #ifdef __V3_32BIT__
 566     print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH);
 567 #endif
 568     print_vmcs_field(VMCS_GUEST_SYSENTER_CS);
 569     print_vmcs_field(VMCS_GUEST_SYSENTER_ESP);
 570     print_vmcs_field(VMCS_GUEST_SYSENTER_EIP);
 571
 572
 573     // if save IA32_PAT
 574     print_vmcs_field(VMCS_GUEST_PAT);
 575 #ifdef __V3_32BIT__
 576     print_vmcs_field(VMCS_GUEST_PAT_HIGH);
 577 #endif
 578
 579     //if load  IA32_PERF_GLOBAL_CTRL
 580     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL);
 581 #ifdef __V3_32BIT__
 582     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH);
 583 #endif
 584
 585     print_vmcs_field(VMCS_GUEST_SMBASE);
 586
 587
 588
 589
 590     PrintDebug("GUEST_NON_REGISTER_STATE\n");
 591
 592     print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
 593     print_vmcs_field(VMCS_GUEST_INT_STATE);
 594     print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
 595
 596     // if VMX preempt timer
 597     print_vmcs_field(VMCS_PREEMPT_TIMER);
 598
 599 }
 600
 601 static void print_host_state()
 602 {
 603     PrintDebug("VMCS_HOST_STATE\n");
 604
 605     print_vmcs_field(VMCS_HOST_RIP);
 606     print_vmcs_field(VMCS_HOST_RSP);
 607     print_vmcs_field(VMCS_HOST_CR0);
 608     print_vmcs_field(VMCS_HOST_CR3);
 609     print_vmcs_field(VMCS_HOST_CR4);
 610
 611
 612
 613     // if load IA32_EFER
 614     print_vmcs_field(VMCS_HOST_EFER);
 615 #ifdef __V3_32BIT__
 616     print_vmcs_field(VMCS_HOST_EFER_HIGH);
 617 #endif
 618
 619
 620     PrintDebug("\n");
 621     print_vmcs_field(VMCS_HOST_CS_SELECTOR);
 622     print_vmcs_field(VMCS_HOST_SS_SELECTOR);
 623     print_vmcs_field(VMCS_HOST_DS_SELECTOR);
 624     print_vmcs_field(VMCS_HOST_ES_SELECTOR);
 625     print_vmcs_field(VMCS_HOST_FS_SELECTOR);
 626     print_vmcs_field(VMCS_HOST_GS_SELECTOR);
 627     print_vmcs_field(VMCS_HOST_TR_SELECTOR);
 628
 629     PrintDebug("\n");
 630     print_vmcs_field(VMCS_HOST_FS_BASE);
 631     print_vmcs_field(VMCS_HOST_GS_BASE);
 632     print_vmcs_field(VMCS_HOST_TR_BASE);
 633     print_vmcs_field(VMCS_HOST_GDTR_BASE);
 634     print_vmcs_field(VMCS_HOST_IDTR_BASE);
 635
 636     PrintDebug("\n");
 637     print_vmcs_field(VMCS_HOST_SYSENTER_CS);
 638     print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
 639     print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
 640
 641
 642     // if load IA32_PAT
 643     print_vmcs_field(VMCS_HOST_PAT);
 644 #ifdef __V3_32BIT__
 645     print_vmcs_field(VMCS_HOST_PAT_HIGH);
 646 #endif
 647
 648     // if load IA32_PERF_GLOBAL_CTRL
 649     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL);
 650 #ifdef __V3_32BIT__
 651     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH);
 652 #endif
 653 }
 654
 655
 656 static void print_exec_ctrls() {
 657     PrintDebug("VMCS_EXEC_CTRL_FIELDS\n");
 658     print_vmcs_field(VMCS_PIN_CTRLS);
 659     print_vmcs_field(VMCS_PROC_CTRLS);
 660
 661     // if activate secondary controls
 662     print_vmcs_field(VMCS_SEC_PROC_CTRLS);
 663
 664     print_vmcs_field(VMCS_EXCP_BITMAP);
 665     print_vmcs_field(VMCS_PG_FAULT_ERR_MASK);
 666     print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH);
 667
 668     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR);
 669 #ifdef __V3_32BIT__
 670     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH);
 671 #endif
 672
 673     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR);
 674 #ifdef __V3_32BIT__
 675     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH);
 676 #endif
 677
 678     print_vmcs_field(VMCS_TSC_OFFSET);
 679 #ifdef __V3_32BIT__
 680     print_vmcs_field(VMCS_TSC_OFFSET_HIGH);
 681 #endif
 682
 683     PrintDebug("\n");
 684
 685     print_vmcs_field(VMCS_CR0_MASK);
 686     print_vmcs_field(VMCS_CR0_READ_SHDW);
 687     print_vmcs_field(VMCS_CR4_MASK);
 688     print_vmcs_field(VMCS_CR4_READ_SHDW);
 689
 690     print_vmcs_field(VMCS_CR3_TGT_CNT);
 691     print_vmcs_field(VMCS_CR3_TGT_VAL_0);
 692     print_vmcs_field(VMCS_CR3_TGT_VAL_1);
 693     print_vmcs_field(VMCS_CR3_TGT_VAL_2);
 694     print_vmcs_field(VMCS_CR3_TGT_VAL_3);
 695
 696     // Check max number of CR3 targets... may continue...
 697
 698
 699     PrintDebug("\n");
 700
 701     // if virtualize apic accesses
 702     print_vmcs_field(VMCS_APIC_ACCESS_ADDR);
 703 #ifdef __V3_32BIT__
 704     print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH);
 705 #endif
 706
 707     // if use tpr shadow
 708     print_vmcs_field(VMCS_VAPIC_ADDR);
 709 #ifdef __V3_32BIT__
 710     print_vmcs_field(VMCS_VAPIC_ADDR_HIGH);
 711 #endif
 712
 713     // if use tpr shadow
 714     print_vmcs_field(VMCS_TPR_THRESHOLD);
 715
 716
 717     // if use MSR bitmaps
 718     print_vmcs_field(VMCS_MSR_BITMAP);
 719 #ifdef __V3_32BIT__
 720     print_vmcs_field(VMCS_MSR_BITMAP_HIGH);
 721 #endif
 722
 723     print_vmcs_field(VMCS_EXEC_PTR);
 724 #ifdef __V3_32BIT__
 725     print_vmcs_field(VMCS_EXEC_PTR_HIGH);
 726 #endif
 727
 728
 729 }
 730
 731 static void print_ept_state() {
 732     V3_Print("VMCS EPT INFO\n");
 733
 734     // if enable vpid
 735     print_vmcs_field(VMCS_VPID);
 736
 737     print_vmcs_field(VMCS_EPT_PTR);
 738 #ifdef __V3_32BIT__
 739     print_vmcs_field(VMCS_EPT_PTR_HIGH);
 740 #endif
 741
 742     print_vmcs_field(VMCS_GUEST_PHYS_ADDR);
 743 #ifdef __V3_32BIT__
 744     print_vmcs_field(VMCS_GUEST_PHYS_ADDR_HIGH);
 745 #endif
 746
 747
 748
 749     print_vmcs_field(VMCS_GUEST_PDPTE0);
 750 #ifdef __V3_32BIT__
 751     print_vmcs_field(VMCS_GUEST_PDPTE0_HIGH);
 752 #endif
 753
 754     print_vmcs_field(VMCS_GUEST_PDPTE1);
 755 #ifdef __V3_32BIT__
 756     print_vmcs_field(VMCS_GUEST_PDPTE1_HIGH);
 757 #endif
 758
 759     print_vmcs_field(VMCS_GUEST_PDPTE2);
 760 #ifdef __V3_32BIT__
 761     print_vmcs_field(VMCS_GUEST_PDPTE2_HIGH);
 762 #endif
 763
 764     print_vmcs_field(VMCS_GUEST_PDPTE3);
 765 #ifdef __V3_32BIT__
 766     print_vmcs_field(VMCS_GUEST_PDPTE3_HIGH);
 767 #endif
 768
 769
 770
 771 }
 772
 773
 774 static void print_exit_ctrls() {
 775     PrintDebug("VMCS_EXIT_CTRLS\n");
 776
 777     print_vmcs_field(VMCS_EXIT_CTRLS);
 778
 779
 780     print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT);
 781     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR);
 782 #ifdef __V3_32BIT__
 783     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH);
 784 #endif
 785
 786     print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT);
 787     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR);
 788 #ifdef __V3_32BIT__
 789     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH);
 790 #endif
 791
 792
 793     // if pause loop exiting
 794     print_vmcs_field(VMCS_PLE_GAP);
 795     print_vmcs_field(VMCS_PLE_WINDOW);
 796
 797 }
 798
 799
 800 static void print_entry_ctrls() {
 801     PrintDebug("VMCS_ENTRY_CTRLS\n");
 802
 803     print_vmcs_field(VMCS_ENTRY_CTRLS);
 804
 805     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT);
 806     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR);
 807 #ifdef __V3_32BIT__
 808     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH);
 809 #endif
 810
 811     print_vmcs_field(VMCS_ENTRY_INT_INFO);
 812     print_vmcs_field(VMCS_ENTRY_EXCP_ERR);
 813     print_vmcs_field(VMCS_ENTRY_INSTR_LEN);
 814
 815
 816 }
 817
 818
 819 static void print_exit_info() {
 820     PrintDebug("VMCS_EXIT_INFO\n");
 821
 822     print_vmcs_field(VMCS_EXIT_REASON);
 823     print_vmcs_field(VMCS_EXIT_QUAL);
 824
 825     print_vmcs_field(VMCS_EXIT_INT_INFO);
 826     print_vmcs_field(VMCS_EXIT_INT_ERR);
 827
 828     print_vmcs_field(VMCS_IDT_VECTOR_INFO);
 829     print_vmcs_field(VMCS_IDT_VECTOR_ERR);
 830
 831     print_vmcs_field(VMCS_EXIT_INSTR_LEN);
 832
 833     print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
 834     print_vmcs_field(VMCS_EXIT_INSTR_INFO);
 835
 836     print_vmcs_field(VMCS_IO_RCX);
 837     print_vmcs_field(VMCS_IO_RSI);
 838     print_vmcs_field(VMCS_IO_RDI);
 839     print_vmcs_field(VMCS_IO_RIP);
 840
 841
 842     print_vmcs_field(VMCS_INSTR_ERR);
 843 }
 844
 845 void v3_print_vmcs() {
 846
 847     print_vmcs_field(VMCS_LINK_PTR);
 848 #ifdef __V3_32BIT__
 849     print_vmcs_field(VMCS_LINK_PTR_HIGH);
 850 #endif
 851
 852     print_guest_state();
 853     print_host_state();
 854
 855     print_ept_state();
 856
 857     print_exec_ctrls();
 858     print_exit_ctrls();
 859     print_entry_ctrls();
 860     print_exit_info();
 861
 862 }
 863
 864
 865 /*
 866  * Returns the field length in bytes
 867  *   It doesn't get much uglier than this... Thanks Intel
 868  */
 869 int v3_vmcs_get_field_len(vmcs_field_t field) {
 870     struct vmcs_field_encoding * enc = (struct vmcs_field_encoding *)&field;
 871
 872     switch (enc->width)  {
 873         case 0:
 874             return 2;
 875         case 1: {
 876             if (enc->access_type == 1) {
 877                 return 4;
 878             } else {
 879                 return sizeof(addr_t);
 880             }
 881         }
 882         case 2:
 883             return 4;
 884         case 3:
 885             return sizeof(addr_t);
 886         default:
 887             PrintError("Invalid VMCS field: 0x%x\n", field);
 888             return -1;
 889     }
 890 }
 891
 892
 893
 894
 895
 896
 897
 898
 899
 900
 901
 902 static const char VMCS_VPID_STR[] = "VPID";
 903 static const char VMCS_GUEST_ES_SELECTOR_STR[] = "GUEST_ES_SELECTOR";
 904 static const char VMCS_GUEST_CS_SELECTOR_STR[] = "GUEST_CS_SELECTOR";
 905 static const char VMCS_GUEST_SS_SELECTOR_STR[] = "GUEST_SS_SELECTOR";
 906 static const char VMCS_GUEST_DS_SELECTOR_STR[] = "GUEST_DS_SELECTOR";
 907 static const char VMCS_GUEST_FS_SELECTOR_STR[] = "GUEST_FS_SELECTOR";
 908 static const char VMCS_GUEST_GS_SELECTOR_STR[] = "GUEST_GS_SELECTOR";
 909 static const char VMCS_GUEST_LDTR_SELECTOR_STR[] = "GUEST_LDTR_SELECTOR";
 910 static const char VMCS_GUEST_TR_SELECTOR_STR[] = "GUEST_TR_SELECTOR";
 911 static const char VMCS_HOST_ES_SELECTOR_STR[] = "HOST_ES_SELECTOR";
 912 static const char VMCS_HOST_CS_SELECTOR_STR[] = "HOST_CS_SELECTOR";
 913 static const char VMCS_HOST_SS_SELECTOR_STR[] = "HOST_SS_SELECTOR";
 914 static const char VMCS_HOST_DS_SELECTOR_STR[] = "HOST_DS_SELECTOR";
 915 static const char VMCS_HOST_FS_SELECTOR_STR[] = "HOST_FS_SELECTOR";
 916 static const char VMCS_HOST_GS_SELECTOR_STR[] = "HOST_GS_SELECTOR";
 917 static const char VMCS_HOST_TR_SELECTOR_STR[] = "HOST_TR_SELECTOR";
 918 static const char VMCS_IO_BITMAP_A_ADDR_STR[] = "IO_BITMAP_A_ADDR";
 919 static const char VMCS_IO_BITMAP_A_ADDR_HIGH_STR[] = "IO_BITMAP_A_ADDR_HIGH";
 920 static const char VMCS_IO_BITMAP_B_ADDR_STR[] = "IO_BITMAP_B_ADDR";
 921 static const char VMCS_IO_BITMAP_B_ADDR_HIGH_STR[] = "IO_BITMAP_B_ADDR_HIGH";
 922 static const char VMCS_MSR_BITMAP_STR[] = "MSR_BITMAPS";
 923 static const char VMCS_MSR_BITMAP_HIGH_STR[] = "MSR_BITMAPS_HIGH";
 924 static const char VMCS_EXIT_MSR_STORE_ADDR_STR[] = "EXIT_MSR_STORE_ADDR";
 925 static const char VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR[] = "EXIT_MSR_STORE_ADDR_HIGH";
 926 static const char VMCS_EXIT_MSR_LOAD_ADDR_STR[] = "EXIT_MSR_LOAD_ADDR";
 927 static const char VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR[] = "EXIT_MSR_LOAD_ADDR_HIGH";
 928 static const char VMCS_ENTRY_MSR_LOAD_ADDR_STR[] = "ENTRY_MSR_LOAD_ADDR";
 929 static const char VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR[] = "ENTRY_MSR_LOAD_ADDR_HIGH";
 930 static const char VMCS_EXEC_PTR_STR[] = "VMCS_EXEC_PTR";
 931 static const char VMCS_EXEC_PTR_HIGH_STR[] = "VMCS_EXEC_PTR_HIGH";
 932 static const char VMCS_TSC_OFFSET_STR[] = "TSC_OFFSET";
 933 static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH";
 934 static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR";
 935 static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH";
 936 static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR";
 937 static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH";
 938 static const char VMCS_EPT_PTR_STR[] = "VMCS_EPT_PTR";
 939 static const char VMCS_EPT_PTR_HIGH_STR[] = "VMCS_EPT_PTR_HIGH";
 940 static const char VMCS_GUEST_PHYS_ADDR_STR[] = "VMCS_GUEST_PHYS_ADDR";
 941 static const char VMCS_GUEST_PHYS_ADDR_HIGH_STR[] = "VMCS_GUEST_PHYS_ADDR_HIGH";
 942 static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR";
 943 static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH";
 944 static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL";
 945 static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH";
 946 static const char VMCS_GUEST_PAT_STR[] = "GUEST_PAT";
 947 static const char VMCS_GUEST_PAT_HIGH_STR[] = "GUEST_PAT_HIGH";
 948 static const char VMCS_GUEST_EFER_STR[] = "GUEST_EFER";
 949 static const char VMCS_GUEST_EFER_HIGH_STR[] = "GUEST_EFER_HIGH";
 950 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL";
 951 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH";
 952 static const char VMCS_GUEST_PDPTE0_STR[] = "GUEST_PDPTE0";
 953 static const char VMCS_GUEST_PDPTE0_HIGH_STR[] = "GUEST_PDPTE0_HIGH";
 954 static const char VMCS_GUEST_PDPTE1_STR[] = "GUEST_PDPTE1";
 955 static const char VMCS_GUEST_PDPTE1_HIGH_STR[] = "GUEST_PDPTE1_HIGH";
 956 static const char VMCS_GUEST_PDPTE2_STR[] = "GUEST_PDPTE2";
 957 static const char VMCS_GUEST_PDPTE2_HIGH_STR[] = "GUEST_PDPTE2_HIGH";
 958 static const char VMCS_GUEST_PDPTE3_STR[] = "GUEST_PDPTE3";
 959 static const char VMCS_GUEST_PDPTE3_HIGH_STR[] = "GUEST_PDPTE3_HIGH";
 960 static const char VMCS_HOST_PAT_STR[] = "HOST_PAT";
 961 static const char VMCS_HOST_PAT_HIGH_STR[] = "HOST_PAT_HIGH";
 962 static const char VMCS_HOST_EFER_STR[] = "VMCS_HOST_EFER";
 963 static const char VMCS_HOST_EFER_HIGH_STR[] = "VMCS_HOST_EFER_HIGH";
 964 static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL";
 965 static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH";
 966 static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS";
 967 static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS";
 968 static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP";
 969 static const char VMCS_PG_FAULT_ERR_MASK_STR[] = "PAGE_FAULT_ERROR_MASK";
 970 static const char VMCS_PG_FAULT_ERR_MATCH_STR[] = "PAGE_FAULT_ERROR_MATCH";
 971 static const char VMCS_CR3_TGT_CNT_STR[] = "CR3_TARGET_COUNT";
 972 static const char VMCS_EXIT_CTRLS_STR[] = "VM_EXIT_CTRLS";
 973 static const char VMCS_EXIT_MSR_STORE_CNT_STR[] = "VM_EXIT_MSR_STORE_COUNT";
 974 static const char VMCS_EXIT_MSR_LOAD_CNT_STR[] = "VM_EXIT_MSR_LOAD_COUNT";
 975 static const char VMCS_ENTRY_CTRLS_STR[] = "VM_ENTRY_CTRLS";
 976 static const char VMCS_ENTRY_MSR_LOAD_CNT_STR[] = "VM_ENTRY_MSR_LOAD_COUNT";
 977 static const char VMCS_ENTRY_INT_INFO_STR[] = "VM_ENTRY_INT_INFO_FIELD";
 978 static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR";
 979 static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH";
 980 static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD";
 981 static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS";
 982 static const char VMCS_PLE_GAP_STR[] = "PLE_GAP";
 983 static const char VMCS_PLE_WINDOW_STR[] = "PLE_WINDOW";
 984 static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR";
 985 static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON";
 986 static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO";
 987 static const char VMCS_EXIT_INT_ERR_STR[] = "VM_EXIT_INT_ERROR";
 988 static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO";
 989 static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR";
 990 static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH";
 991 static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
 992 static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT";
 993 static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT";
 994 static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT";
 995 static const char VMCS_GUEST_DS_LIMIT_STR[] = "GUEST_DS_LIMIT";
 996 static const char VMCS_GUEST_FS_LIMIT_STR[] = "GUEST_FS_LIMIT";
 997 static const char VMCS_GUEST_GS_LIMIT_STR[] = "GUEST_GS_LIMIT";
 998 static const char VMCS_GUEST_LDTR_LIMIT_STR[] = "GUEST_LDTR_LIMIT";
 999 static const char VMCS_GUEST_TR_LIMIT_STR[] = "GUEST_TR_LIMIT";
1000 static const char VMCS_GUEST_GDTR_LIMIT_STR[] = "GUEST_GDTR_LIMIT";
1001 static const char VMCS_GUEST_IDTR_LIMIT_STR[] = "GUEST_IDTR_LIMIT";
1002 static const char VMCS_GUEST_ES_ACCESS_STR[] = "GUEST_ES_ACCESS";
1003 static const char VMCS_GUEST_CS_ACCESS_STR[] = "GUEST_CS_ACCESS";
1004 static const char VMCS_GUEST_SS_ACCESS_STR[] = "GUEST_SS_ACCESS";
1005 static const char VMCS_GUEST_DS_ACCESS_STR[] = "GUEST_DS_ACCESS";
1006 static const char VMCS_GUEST_FS_ACCESS_STR[] = "GUEST_FS_ACCESS";
1007 static const char VMCS_GUEST_GS_ACCESS_STR[] = "GUEST_GS_ACCESS";
1008 static const char VMCS_GUEST_LDTR_ACCESS_STR[] = "GUEST_LDTR_ACCESS";
1009 static const char VMCS_GUEST_TR_ACCESS_STR[] = "GUEST_TR_ACCESS";
1010 static const char VMCS_GUEST_INT_STATE_STR[] = "GUEST_INT_STATE";
1011 static const char VMCS_GUEST_ACTIVITY_STATE_STR[] = "GUEST_ACTIVITY_STATE";
1012 static const char VMCS_GUEST_SMBASE_STR[] = "GUEST_SMBASE";
1013 static const char VMCS_GUEST_SYSENTER_CS_STR[] = "GUEST_SYSENTER_CS";
1014 static const char VMCS_PREEMPT_TIMER_STR[] = "PREEMPT_TIMER";
1015 static const char VMCS_HOST_SYSENTER_CS_STR[] = "HOST_SYSENTER_CS";
1016 static const char VMCS_CR0_MASK_STR[] = "CR0_GUEST_HOST_MASK";
1017 static const char VMCS_CR4_MASK_STR[] = "CR4_GUEST_HOST_MASK";
1018 static const char VMCS_CR0_READ_SHDW_STR[] = "CR0_READ_SHADOW";
1019 static const char VMCS_CR4_READ_SHDW_STR[] = "CR4_READ_SHADOW";
1020 static const char VMCS_CR3_TGT_VAL_0_STR[] = "CR3_TARGET_VALUE_0";
1021 static const char VMCS_CR3_TGT_VAL_1_STR[] = "CR3_TARGET_VALUE_1";
1022 static const char VMCS_CR3_TGT_VAL_2_STR[] = "CR3_TARGET_VALUE_2";
1023 static const char VMCS_CR3_TGT_VAL_3_STR[] = "CR3_TARGET_VALUE_3";
1024 static const char VMCS_EXIT_QUAL_STR[] = "EXIT_QUALIFICATION";
1025 static const char VMCS_IO_RCX_STR[] = "IO_RCX";
1026 static const char VMCS_IO_RSI_STR[] = "IO_RSI";
1027 static const char VMCS_IO_RDI_STR[] = "IO_RDI";
1028 static const char VMCS_IO_RIP_STR[] = "IO_RIP";
1029 static const char VMCS_GUEST_LINEAR_ADDR_STR[] = "GUEST_LINEAR_ADDR";
1030 static const char VMCS_GUEST_CR0_STR[] = "GUEST_CR0";
1031 static const char VMCS_GUEST_CR3_STR[] = "GUEST_CR3";
1032 static const char VMCS_GUEST_CR4_STR[] = "GUEST_CR4";
1033 static const char VMCS_GUEST_ES_BASE_STR[] = "GUEST_ES_BASE";
1034 static const char VMCS_GUEST_CS_BASE_STR[] = "GUEST_CS_BASE";
1035 static const char VMCS_GUEST_SS_BASE_STR[] = "GUEST_SS_BASE";
1036 static const char VMCS_GUEST_DS_BASE_STR[] = "GUEST_DS_BASE";
1037 static const char VMCS_GUEST_FS_BASE_STR[] = "GUEST_FS_BASE";
1038 static const char VMCS_GUEST_GS_BASE_STR[] = "GUEST_GS_BASE";
1039 static const char VMCS_GUEST_LDTR_BASE_STR[] = "GUEST_LDTR_BASE";
1040 static const char VMCS_GUEST_TR_BASE_STR[] = "GUEST_TR_BASE";
1041 static const char VMCS_GUEST_GDTR_BASE_STR[] = "GUEST_GDTR_BASE";
1042 static const char VMCS_GUEST_IDTR_BASE_STR[] = "GUEST_IDTR_BASE";
1043 static const char VMCS_GUEST_DR7_STR[] = "GUEST_DR7";
1044 static const char VMCS_GUEST_RSP_STR[] = "GUEST_RSP";
1045 static const char VMCS_GUEST_RIP_STR[] = "GUEST_RIP";
1046 static const char VMCS_GUEST_RFLAGS_STR[] = "GUEST_RFLAGS";
1047 static const char VMCS_GUEST_PENDING_DBG_EXCP_STR[] = "GUEST_PENDING_DEBUG_EXCS";
1048 static const char VMCS_GUEST_SYSENTER_ESP_STR[] = "GUEST_SYSENTER_ESP";
1049 static const char VMCS_GUEST_SYSENTER_EIP_STR[] = "GUEST_SYSENTER_EIP";
1050 static const char VMCS_HOST_CR0_STR[] = "HOST_CR0";
1051 static const char VMCS_HOST_CR3_STR[] = "HOST_CR3";
1052 static const char VMCS_HOST_CR4_STR[] = "HOST_CR4";
1053 static const char VMCS_HOST_FS_BASE_STR[] = "HOST_FS_BASE";
1054 static const char VMCS_HOST_GS_BASE_STR[] = "HOST_GS_BASE";
1055 static const char VMCS_HOST_TR_BASE_STR[] = "HOST_TR_BASE";
1056 static const char VMCS_HOST_GDTR_BASE_STR[] = "HOST_GDTR_BASE";
1057 static const char VMCS_HOST_IDTR_BASE_STR[] = "HOST_IDTR_BASE";
1058 static const char VMCS_HOST_SYSENTER_ESP_STR[] = "HOST_SYSENTER_ESP";
1059 static const char VMCS_HOST_SYSENTER_EIP_STR[] = "HOST_SYSENTER_EIP";
1060 static const char VMCS_HOST_RSP_STR[] = "HOST_RSP";
1061 static const char VMCS_HOST_RIP_STR[] = "HOST_RIP";
1062
1063
1064
1065 const char * v3_vmcs_field_to_str(vmcs_field_t field) {
1066     switch (field) {
1067         case VMCS_VPID:
1068             return VMCS_VPID_STR;
1069         case VMCS_GUEST_ES_SELECTOR:
1070             return VMCS_GUEST_ES_SELECTOR_STR;
1071         case VMCS_GUEST_CS_SELECTOR:
1072             return VMCS_GUEST_CS_SELECTOR_STR;
1073         case VMCS_GUEST_SS_SELECTOR:
1074             return VMCS_GUEST_SS_SELECTOR_STR;
1075         case VMCS_GUEST_DS_SELECTOR:
1076             return VMCS_GUEST_DS_SELECTOR_STR;
1077         case VMCS_GUEST_FS_SELECTOR:
1078             return VMCS_GUEST_FS_SELECTOR_STR;
1079         case VMCS_GUEST_GS_SELECTOR:
1080             return VMCS_GUEST_GS_SELECTOR_STR;
1081         case VMCS_GUEST_LDTR_SELECTOR:
1082             return VMCS_GUEST_LDTR_SELECTOR_STR;
1083         case VMCS_GUEST_TR_SELECTOR:
1084             return VMCS_GUEST_TR_SELECTOR_STR;
1085         case VMCS_HOST_ES_SELECTOR:
1086             return VMCS_HOST_ES_SELECTOR_STR;
1087         case VMCS_HOST_CS_SELECTOR:
1088             return VMCS_HOST_CS_SELECTOR_STR;
1089         case VMCS_HOST_SS_SELECTOR:
1090             return VMCS_HOST_SS_SELECTOR_STR;
1091         case VMCS_HOST_DS_SELECTOR:
1092             return VMCS_HOST_DS_SELECTOR_STR;
1093         case VMCS_HOST_FS_SELECTOR:
1094             return VMCS_HOST_FS_SELECTOR_STR;
1095         case VMCS_HOST_GS_SELECTOR:
1096             return VMCS_HOST_GS_SELECTOR_STR;
1097         case VMCS_HOST_TR_SELECTOR:
1098             return VMCS_HOST_TR_SELECTOR_STR;
1099         case VMCS_IO_BITMAP_A_ADDR:
1100             return VMCS_IO_BITMAP_A_ADDR_STR;
1101         case VMCS_IO_BITMAP_A_ADDR_HIGH:
1102             return VMCS_IO_BITMAP_A_ADDR_HIGH_STR;
1103         case VMCS_IO_BITMAP_B_ADDR:
1104             return VMCS_IO_BITMAP_B_ADDR_STR;
1105         case VMCS_IO_BITMAP_B_ADDR_HIGH:
1106             return VMCS_IO_BITMAP_B_ADDR_HIGH_STR;
1107         case VMCS_MSR_BITMAP:
1108             return VMCS_MSR_BITMAP_STR;
1109         case VMCS_MSR_BITMAP_HIGH:
1110             return VMCS_MSR_BITMAP_HIGH_STR;
1111         case VMCS_EXIT_MSR_STORE_ADDR:
1112             return VMCS_EXIT_MSR_STORE_ADDR_STR;
1113         case VMCS_EXIT_MSR_STORE_ADDR_HIGH:
1114             return VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR;
1115         case VMCS_EXIT_MSR_LOAD_ADDR:
1116             return VMCS_EXIT_MSR_LOAD_ADDR_STR;
1117         case VMCS_EXIT_MSR_LOAD_ADDR_HIGH:
1118             return VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR;
1119         case VMCS_ENTRY_MSR_LOAD_ADDR:
1120             return VMCS_ENTRY_MSR_LOAD_ADDR_STR;
1121         case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH:
1122             return VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR;
1123         case VMCS_EXEC_PTR:
1124             return VMCS_EXEC_PTR_STR;
1125         case VMCS_EXEC_PTR_HIGH:
1126             return VMCS_EXEC_PTR_HIGH_STR;
1127         case VMCS_TSC_OFFSET:
1128             return VMCS_TSC_OFFSET_STR;
1129         case VMCS_TSC_OFFSET_HIGH:
1130             return VMCS_TSC_OFFSET_HIGH_STR;
1131         case VMCS_VAPIC_ADDR:
1132             return VMCS_VAPIC_ADDR_STR;
1133         case VMCS_VAPIC_ADDR_HIGH:
1134             return VMCS_VAPIC_ADDR_HIGH_STR;
1135         case VMCS_APIC_ACCESS_ADDR:
1136             return VMCS_APIC_ACCESS_ADDR_STR;
1137         case VMCS_APIC_ACCESS_ADDR_HIGH:
1138             return VMCS_APIC_ACCESS_ADDR_HIGH_STR;
1139         case VMCS_EPT_PTR:
1140             return VMCS_EPT_PTR_STR;
1141         case VMCS_EPT_PTR_HIGH:
1142             return VMCS_EPT_PTR_HIGH_STR;
1143         case VMCS_GUEST_PHYS_ADDR:
1144             return VMCS_GUEST_PHYS_ADDR_STR;
1145         case VMCS_GUEST_PHYS_ADDR_HIGH:
1146             return VMCS_GUEST_PHYS_ADDR_HIGH_STR;
1147         case VMCS_LINK_PTR:
1148             return VMCS_LINK_PTR_STR;
1149         case VMCS_LINK_PTR_HIGH:
1150             return VMCS_LINK_PTR_HIGH_STR;
1151         case VMCS_GUEST_DBG_CTL:
1152             return VMCS_GUEST_DBG_CTL_STR;
1153         case VMCS_GUEST_DBG_CTL_HIGH:
1154             return VMCS_GUEST_DBG_CTL_HIGH_STR;
1155         case VMCS_GUEST_PAT:
1156             return VMCS_GUEST_PAT_STR;
1157         case VMCS_GUEST_PAT_HIGH:
1158             return VMCS_GUEST_PAT_HIGH_STR;
1159         case VMCS_GUEST_EFER:
1160             return VMCS_GUEST_EFER_STR;
1161         case VMCS_GUEST_EFER_HIGH:
1162             return VMCS_GUEST_EFER_HIGH_STR;
1163         case VMCS_GUEST_PERF_GLOBAL_CTRL:
1164             return VMCS_GUEST_PERF_GLOBAL_CTRL_STR;
1165         case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
1166             return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR;
1167         case VMCS_GUEST_PDPTE0:
1168             return VMCS_GUEST_PDPTE0_STR;
1169         case VMCS_GUEST_PDPTE0_HIGH:
1170             return VMCS_GUEST_PDPTE0_HIGH_STR;
1171         case VMCS_GUEST_PDPTE1:
1172             return VMCS_GUEST_PDPTE1_STR;
1173         case VMCS_GUEST_PDPTE1_HIGH:
1174             return VMCS_GUEST_PDPTE1_HIGH_STR;
1175         case VMCS_GUEST_PDPTE2:
1176             return VMCS_GUEST_PDPTE2_STR;
1177         case VMCS_GUEST_PDPTE2_HIGH:
1178             return VMCS_GUEST_PDPTE2_HIGH_STR;
1179         case VMCS_GUEST_PDPTE3:
1180             return VMCS_GUEST_PDPTE3_STR;
1181         case VMCS_GUEST_PDPTE3_HIGH:
1182             return VMCS_GUEST_PDPTE3_HIGH_STR;
1183         case VMCS_HOST_PAT:
1184             return VMCS_HOST_PAT_STR;
1185         case VMCS_HOST_PAT_HIGH:
1186             return VMCS_HOST_PAT_HIGH_STR;
1187         case VMCS_HOST_EFER:
1188             return VMCS_HOST_EFER_STR;
1189         case VMCS_HOST_EFER_HIGH:
1190             return VMCS_HOST_EFER_HIGH_STR;
1191         case VMCS_HOST_PERF_GLOBAL_CTRL:
1192             return VMCS_HOST_PERF_GLOBAL_CTRL_STR;
1193         case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
1194             return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR;
1195         case VMCS_PIN_CTRLS:
1196             return VMCS_PIN_CTRLS_STR;
1197         case VMCS_PROC_CTRLS:
1198             return VMCS_PROC_CTRLS_STR;
1199         case VMCS_EXCP_BITMAP:
1200             return VMCS_EXCP_BITMAP_STR;
1201         case VMCS_PG_FAULT_ERR_MASK:
1202             return VMCS_PG_FAULT_ERR_MASK_STR;
1203         case VMCS_PG_FAULT_ERR_MATCH:
1204             return VMCS_PG_FAULT_ERR_MATCH_STR;
1205         case VMCS_CR3_TGT_CNT:
1206             return VMCS_CR3_TGT_CNT_STR;
1207         case VMCS_EXIT_CTRLS:
1208             return VMCS_EXIT_CTRLS_STR;
1209         case VMCS_EXIT_MSR_STORE_CNT:
1210             return VMCS_EXIT_MSR_STORE_CNT_STR;
1211         case VMCS_EXIT_MSR_LOAD_CNT:
1212             return VMCS_EXIT_MSR_LOAD_CNT_STR;
1213         case VMCS_ENTRY_CTRLS:
1214             return VMCS_ENTRY_CTRLS_STR;
1215         case VMCS_ENTRY_MSR_LOAD_CNT:
1216             return VMCS_ENTRY_MSR_LOAD_CNT_STR;
1217         case VMCS_ENTRY_INT_INFO:
1218             return VMCS_ENTRY_INT_INFO_STR;
1219         case VMCS_ENTRY_EXCP_ERR:
1220             return VMCS_ENTRY_EXCP_ERR_STR;
1221         case VMCS_ENTRY_INSTR_LEN:
1222             return VMCS_ENTRY_INSTR_LEN_STR;
1223         case VMCS_TPR_THRESHOLD:
1224             return VMCS_TPR_THRESHOLD_STR;
1225         case VMCS_SEC_PROC_CTRLS:
1226             return VMCS_SEC_PROC_CTRLS_STR;
1227         case VMCS_PLE_GAP:
1228             return VMCS_PLE_GAP_STR;
1229         case VMCS_PLE_WINDOW:
1230             return VMCS_PLE_WINDOW_STR;
1231         case VMCS_INSTR_ERR:
1232             return VMCS_INSTR_ERR_STR;
1233         case VMCS_EXIT_REASON:
1234             return VMCS_EXIT_REASON_STR;
1235         case VMCS_EXIT_INT_INFO:
1236             return VMCS_EXIT_INT_INFO_STR;
1237         case VMCS_EXIT_INT_ERR:
1238             return VMCS_EXIT_INT_ERR_STR;
1239         case VMCS_IDT_VECTOR_INFO:
1240             return VMCS_IDT_VECTOR_INFO_STR;
1241         case VMCS_IDT_VECTOR_ERR:
1242             return VMCS_IDT_VECTOR_ERR_STR;
1243         case VMCS_EXIT_INSTR_LEN:
1244             return VMCS_EXIT_INSTR_LEN_STR;
1245         case VMCS_EXIT_INSTR_INFO:
1246             return VMCS_EXIT_INSTR_INFO_STR;
1247         case VMCS_GUEST_ES_LIMIT:
1248             return VMCS_GUEST_ES_LIMIT_STR;
1249         case VMCS_GUEST_CS_LIMIT:
1250             return VMCS_GUEST_CS_LIMIT_STR;
1251         case VMCS_GUEST_SS_LIMIT:
1252             return VMCS_GUEST_SS_LIMIT_STR;
1253         case VMCS_GUEST_DS_LIMIT:
1254             return VMCS_GUEST_DS_LIMIT_STR;
1255         case VMCS_GUEST_FS_LIMIT:
1256             return VMCS_GUEST_FS_LIMIT_STR;
1257         case VMCS_GUEST_GS_LIMIT:
1258             return VMCS_GUEST_GS_LIMIT_STR;
1259         case VMCS_GUEST_LDTR_LIMIT:
1260             return VMCS_GUEST_LDTR_LIMIT_STR;
1261         case VMCS_GUEST_TR_LIMIT:
1262             return VMCS_GUEST_TR_LIMIT_STR;
1263         case VMCS_GUEST_GDTR_LIMIT:
1264             return VMCS_GUEST_GDTR_LIMIT_STR;
1265         case VMCS_GUEST_IDTR_LIMIT:
1266             return VMCS_GUEST_IDTR_LIMIT_STR;
1267         case VMCS_GUEST_ES_ACCESS:
1268             return VMCS_GUEST_ES_ACCESS_STR;
1269         case VMCS_GUEST_CS_ACCESS:
1270             return VMCS_GUEST_CS_ACCESS_STR;
1271         case VMCS_GUEST_SS_ACCESS:
1272             return VMCS_GUEST_SS_ACCESS_STR;
1273         case VMCS_GUEST_DS_ACCESS:
1274             return VMCS_GUEST_DS_ACCESS_STR;
1275         case VMCS_GUEST_FS_ACCESS:
1276             return VMCS_GUEST_FS_ACCESS_STR;
1277         case VMCS_GUEST_GS_ACCESS:
1278             return VMCS_GUEST_GS_ACCESS_STR;
1279         case VMCS_GUEST_LDTR_ACCESS:
1280             return VMCS_GUEST_LDTR_ACCESS_STR;
1281         case VMCS_GUEST_TR_ACCESS:
1282             return VMCS_GUEST_TR_ACCESS_STR;
1283         case VMCS_GUEST_INT_STATE:
1284             return VMCS_GUEST_INT_STATE_STR;
1285         case VMCS_GUEST_ACTIVITY_STATE:
1286             return VMCS_GUEST_ACTIVITY_STATE_STR;
1287         case VMCS_GUEST_SMBASE:
1288             return VMCS_GUEST_SMBASE_STR;
1289         case VMCS_GUEST_SYSENTER_CS:
1290             return VMCS_GUEST_SYSENTER_CS_STR;
1291         case VMCS_PREEMPT_TIMER:
1292             return VMCS_PREEMPT_TIMER_STR;
1293         case VMCS_HOST_SYSENTER_CS:
1294             return VMCS_HOST_SYSENTER_CS_STR;
1295         case VMCS_CR0_MASK:
1296             return VMCS_CR0_MASK_STR;
1297         case VMCS_CR4_MASK:
1298             return VMCS_CR4_MASK_STR;
1299         case VMCS_CR0_READ_SHDW:
1300             return VMCS_CR0_READ_SHDW_STR;
1301         case VMCS_CR4_READ_SHDW:
1302             return VMCS_CR4_READ_SHDW_STR;
1303         case VMCS_CR3_TGT_VAL_0:
1304             return VMCS_CR3_TGT_VAL_0_STR;
1305         case VMCS_CR3_TGT_VAL_1:
1306             return VMCS_CR3_TGT_VAL_1_STR;
1307         case VMCS_CR3_TGT_VAL_2:
1308             return VMCS_CR3_TGT_VAL_2_STR;
1309         case VMCS_CR3_TGT_VAL_3:
1310             return VMCS_CR3_TGT_VAL_3_STR;
1311         case VMCS_EXIT_QUAL:
1312             return VMCS_EXIT_QUAL_STR;
1313         case VMCS_IO_RCX:
1314             return VMCS_IO_RCX_STR;
1315         case VMCS_IO_RSI:
1316             return VMCS_IO_RSI_STR;
1317         case VMCS_IO_RDI:
1318             return VMCS_IO_RDI_STR;
1319         case VMCS_IO_RIP:
1320             return VMCS_IO_RIP_STR;
1321         case VMCS_GUEST_LINEAR_ADDR:
1322             return VMCS_GUEST_LINEAR_ADDR_STR;
1323         case VMCS_GUEST_CR0:
1324             return VMCS_GUEST_CR0_STR;
1325         case VMCS_GUEST_CR3:
1326             return VMCS_GUEST_CR3_STR;
1327         case VMCS_GUEST_CR4:
1328             return VMCS_GUEST_CR4_STR;
1329         case VMCS_GUEST_ES_BASE:
1330             return VMCS_GUEST_ES_BASE_STR;
1331         case VMCS_GUEST_CS_BASE:
1332             return VMCS_GUEST_CS_BASE_STR;
1333         case VMCS_GUEST_SS_BASE:
1334             return VMCS_GUEST_SS_BASE_STR;
1335         case VMCS_GUEST_DS_BASE:
1336             return VMCS_GUEST_DS_BASE_STR;
1337         case VMCS_GUEST_FS_BASE:
1338             return VMCS_GUEST_FS_BASE_STR;
1339         case VMCS_GUEST_GS_BASE:
1340             return VMCS_GUEST_GS_BASE_STR;
1341         case VMCS_GUEST_LDTR_BASE:
1342             return VMCS_GUEST_LDTR_BASE_STR;
1343         case VMCS_GUEST_TR_BASE:
1344             return VMCS_GUEST_TR_BASE_STR;
1345         case VMCS_GUEST_GDTR_BASE:
1346             return VMCS_GUEST_GDTR_BASE_STR;
1347         case VMCS_GUEST_IDTR_BASE:
1348             return VMCS_GUEST_IDTR_BASE_STR;
1349         case VMCS_GUEST_DR7:
1350             return VMCS_GUEST_DR7_STR;
1351         case VMCS_GUEST_RSP:
1352             return VMCS_GUEST_RSP_STR;
1353         case VMCS_GUEST_RIP:
1354             return VMCS_GUEST_RIP_STR;
1355         case VMCS_GUEST_RFLAGS:
1356             return VMCS_GUEST_RFLAGS_STR;
1357         case VMCS_GUEST_PENDING_DBG_EXCP:
1358             return VMCS_GUEST_PENDING_DBG_EXCP_STR;
1359         case VMCS_GUEST_SYSENTER_ESP:
1360             return VMCS_GUEST_SYSENTER_ESP_STR;
1361         case VMCS_GUEST_SYSENTER_EIP:
1362             return VMCS_GUEST_SYSENTER_EIP_STR;
1363         case VMCS_HOST_CR0:
1364             return VMCS_HOST_CR0_STR;
1365         case VMCS_HOST_CR3:
1366             return VMCS_HOST_CR3_STR;
1367         case VMCS_HOST_CR4:
1368             return VMCS_HOST_CR4_STR;
1369         case VMCS_HOST_FS_BASE:
1370             return VMCS_HOST_FS_BASE_STR;
1371         case VMCS_HOST_GS_BASE:
1372             return VMCS_HOST_GS_BASE_STR;
1373         case VMCS_HOST_TR_BASE:
1374             return VMCS_HOST_TR_BASE_STR;
1375         case VMCS_HOST_GDTR_BASE:
1376             return VMCS_HOST_GDTR_BASE_STR;
1377         case VMCS_HOST_IDTR_BASE:
1378             return VMCS_HOST_IDTR_BASE_STR;
1379         case VMCS_HOST_SYSENTER_ESP:
1380             return VMCS_HOST_SYSENTER_ESP_STR;
1381         case VMCS_HOST_SYSENTER_EIP:
1382             return VMCS_HOST_SYSENTER_EIP_STR;
1383         case VMCS_HOST_RSP:
1384             return VMCS_HOST_RSP_STR;
1385         case VMCS_HOST_RIP:
1386             return VMCS_HOST_RIP_STR;
1387         default:
1388             return NULL;
1389     }
1390 }
1391
1392
1393