Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


Additional VMX support. Bootstrapping code added.
[palacios.git] / palacios / src / palacios / vmcs.c
1 /* 
2  * This file is part of the Palacios Virtual Machine Monitor developed
3  * by the V3VEE Project with funding from the United States National 
4  * Science Foundation and the Department of Energy.  
5  *
6  * The V3VEE Project is a joint project between Northwestern University
7  * and the University of New Mexico.  You can find out more at 
8  * http://www.v3vee.org
9  *
10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
12  * All rights reserved.
13  *
14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
15  *
16  * This is free software.  You are permitted to use,
17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
18  */
19
20 #include <palacios/vmcs.h>
21
22
23
24 //extern char * exception_names;
25 //
26 // Ignores "HIGH" addresses - 32 bit only for now
27 //
28
29
30 static inline void print_vmcs_field(uint_t vmcs_index) {
31     int len = v3_vmcs_get_field_len(vmcs_index);
32     addr_t val;
33     
34     if (vmcs_read(vmcs_index, &val, len) != VMX_SUCCESS) {
35         PrintError("VMCS_READ error for index %x\n", vmcs_index);
36         return;
37     };
38     
39     if (len == 2) {
40         PrintDebug("%s: %x\n", v3_vmcs_get_field_name(vmcs_index), (uint16_t)val);
41     } else if (len == 4) {
42         PrintDebug("%s: %x\n", v3_vmcs_get_field_name(vmcs_index), (uint32_t)val);
43     } else if (len == 8) {
44         PrintDebug("%s: %p\n", v3_vmcs_get_field_name(vmcs_index), (void *)(addr_t)val);
45     }
46 }
47
48
49 static inline void print_vmcs_segments() {
50     // see vm_guest.c
51 }
52
53
54
55
56
57 void print_debug_vmcs_load_guest() {
58     const int wordsize = sizeof(addr_t);
59     uint64_t temp;
60     vmcs_segment tmp_seg;
61
62     PrintDebug("\n====== Loading Guest State ======\n");
63     PRINT_VMREAD("Guest CR0: %x\n", GUEST_CR0, wordsize);
64     PRINT_VMREAD("Guest CR3: %x\n", GUEST_CR3, wordsize);
65     PRINT_VMREAD("Guest CR4: %x\n", GUEST_CR4, wordsize);
66     PRINT_VMREAD("Guest DR7: %x\n", GUEST_DR7, wordsize);
67
68     READ_VMCS_SEG(&tmp_seg,CS,wordsize);
69     print_vmcs_segment("CS", &tmp_seg);
70     
71     READ_VMCS_SEG(&tmp_seg,SS,wordsize);
72     print_vmcs_segment("SS", &tmp_seg);
73
74     READ_VMCS_SEG(&tmp,DS,wordsize);
75     print_vmcs_segment("DS", &tmp_seg);
76
77     READ_VMCS_SEG(&tmp_seg,ES,wordsize);
78     print_vmcs_segment("ES", &tmp_seg);
79
80     READ_VMCS_SEG(&tmp_seg,FS,wordsize);
81     print_vmcs_segment("FS", &tmp_seg);
82
83     READ_VMCS_SEG(&tmp_seg,GS,wordsize);
84     print_vmcs_segment("GS", &tmp_seg);
85
86     READ_VMCS_SEG(&tmp_seg,TR,wordsize);
87     print_vmcs_segment("TR", &tmp_seg);
88
89     READ_VMCS_SEG(&tmp_seg,LDTR,wordsize);
90     print_vmcs_segment("LDTR", &tmp_seg);
91     
92     PrintDebug("\n==GDTR==\n");
93     PRINT_VMREAD("GDTR Base: %x\n", GUEST_GDTR_BASE, wordsize);
94     PRINT_VMREAD("GDTR Limit: %x\n", GUEST_GDTR_LIMIT, 32);
95     PrintDebug("====\n");
96
97     PrintDebug("\n==LDTR==\n");
98     PRINT_VMREAD("LDTR Base: %x\n", GUEST_LDTR_BASE, wordsize);
99     PRINT_VMREAD("LDTR Limit: %x\n", GUEST_LDTR_LIMIT, 32);
100     PrintDebug("=====\n");
101
102     PRINT_VMREAD("Guest RSP: %x\n", GUEST_RSP, wordsize);
103     PRINT_VMREAD("Guest RIP: %x\n", GUEST_RIP, wordsize);
104     PRINT_VMREAD("Guest RFLAGS: %x\n", GUEST_RFLAGS, wordsize);
105     PRINT_VMREAD("Guest Activity state: %x\n", GUEST_ACTIVITY_STATE, 32);
106     PRINT_VMREAD("Guest Interruptibility state: %x\n", GUEST_INT_STATE, 32);
107     PRINT_VMREAD("Guest pending debug: %x\n", GUEST_PENDING_DEBUG_EXCS, wordsize);
108
109     PRINT_VMREAD("IA32_DEBUGCTL: %x\n", GUEST_IA32_DEBUGCTL, 64);
110     PRINT_VMREAD("IA32_SYSENTER_CS: %x\n", GUEST_IA32_SYSENTER_CS, 32);
111     PRINT_VMREAD("IA32_SYSTENTER_ESP: %x\n", GUEST_IA32_SYSENTER_ESP, wordsize);
112     PRINT_VMREAD("IA32_SYSTENTER_EIP: %x\n", GUEST_IA32_SYSENTER_EIP, wordsize);
113     PRINT_VMREAD("IA32_PERF_GLOBAL_CTRL: %x\n", GUEST_IA32_PERF_GLOBAL_CTRL, wordsize);
114     PRINT_VMREAD("VMCS Link Ptr: %x\n", VMCS_LINK_PTR, 64);
115     // TODO: Maybe add VMX preemption timer and PDTE (Intel 20-8 Vol. 3b)
116 }
117
118 void print_debug_load_host() {
119     const int wordsize = sizeof(addr_t);
120     uint64_t temp;
121     vmcs_segment tmp_seg;
122
123     PrintDebug("\n====== Host State ========\n");
124     PRINT_VMREAD("Host CR0: %x\n", HOST_CR0, wordsize);
125     PRINT_VMREAD("Host CR3: %x\n", HOST_CR3, wordsize);
126     PRINT_VMREAD("Host CR4: %x\n", HOST_CR4, wordsize);
127     PRINT_VMREAD("Host RSP: %x\n", HOST_RSP, wordsize);
128     PRINT_VMREAD("Host RIP: %x\n", HOST_RIP, wordsize);
129     PRINT_VMREAD("IA32_SYSENTER_CS: %x\n", HOST_IA32_SYSENTER_CS, 32);
130     PRINT_VMREAD("IA32_SYSENTER_ESP: %x\n", HOST_IA32_SYSENTER_ESP, wordsize);
131     PRINT_VMREAD("IA32_SYSENTER_EIP: %x\n", HOST_IA32_SYSENTER_EIP, wordsize);
132         
133     PRINT_VMREAD("Host CS Selector: %x\n", HOST_CS_SELECTOR, 16);
134     PRINT_VMREAD("Host SS Selector: %x\n", HOST_SS_SELECTOR, 16);
135     PRINT_VMREAD("Host DS Selector: %x\n", HOST_DS_SELECTOR, 16);
136     PRINT_VMREAD("Host ES Selector: %x\n", HOST_ES_SELECTOR, 16);
137     PRINT_VMREAD("Host FS Selector: %x\n", HOST_FS_SELECTOR, 16);
138     PRINT_VMREAD("Host GS Selector: %x\n", HOST_GS_SELECTOR, 16);
139     PRINT_VMREAD("Host TR Selector: %x\n", HOST_TR_SELECTOR, 16);
140
141     PRINT_VMREAD("Host FS Base: %x\n", HOST_FS_BASE, wordsize);
142     PRINT_VMREAD("Host GS Base: %x\n", HOST_GS_BASE, wordsize);
143     PRINT_VMREAD("Host TR Base: %x\n", HOST_TR_BASE, wordsize);
144     PRINT_VMREAD("Host GDTR Base: %x\n", HOST_GDTR_BASE, wordsize);
145     PRINT_VMREAD("Host IDTR Base: %x\n", HOSE_IDTR_BASE, wordsize);
146 }
147
148 void print_vmcs_segment(char * name, vmcs_segment* seg)
149 {
150     PrintDebug("\n==VMCS %s Segment==\n",name);
151     PrintDebug("\tSelector: %x\n", seg->selector);
152     PrintDebug("\tBase Address: %x\n", seg->baseAddr);
153     PrintDebug("\tLimit: %x\n", seg->limit);
154     PrintDebug("\tAccess: %x\n", seg->access);
155 }
156
157 /*
158  * Returns the field length in bytes
159  */
160 int vmcs_field_length(vmcs_field_t field)
161 {
162     switch(field)
163     {
164         case VMCS_GUEST_ES_SELECTOR:
165         case VMCS_GUEST_CS_SELECTOR:
166         case VMCS_GUEST_SS_SELECTOR:
167         case VMCS_GUEST_DS_SELECTOR:
168         case VMCS_GUEST_FS_SELECTOR:
169         case VMCS_GUEST_GS_SELECTOR:
170         case VMCS_GUEST_LDTR_SELECTOR:
171         case VMCS_GUEST_TR_SELECTOR:
172             /* 16 bit host state */
173         case VMCS_HOST_ES_SELECTOR:
174         case VMCS_HOST_CS_SELECTOR:
175         case VMCS_HOST_SS_SELECTOR:
176         case VMCS_HOST_DS_SELECTOR:
177         case VMCS_HOST_FS_SELECTOR:
178         case VMCS_HOST_GS_SELECTOR:
179         case VMCS_HOST_TR_SELECTOR:
180             return 2;
181             /* 64 bit control fields */
182         case IO_BITMAP_A_ADDR:
183         case IO_BITMAP_A_ADDR_HIGH:
184         case IO_BITMAP_B_ADDR:
185         case IO_BITMAP_B_ADDR_HIGH:
186         case MSR_BITMAPS:
187         case MSR_BITMAPS_HIGH:
188         case VM_EXIT_MSR_STORE_ADDR:
189         case VM_EXIT_MSR_STORE_ADDR_HIGH:
190         case VM_EXIT_MSR_LOAD_ADDR:
191         case VM_EXIT_MSR_LOAD_ADDR_HIGH:
192         case VM_ENTRY_MSR_LOAD_ADDR:
193         case VM_ENTRY_MSR_LOAD_ADDR_HIGH:
194         case VMCS_EXEC_PTR:
195         case VMCS_EXEC_PTR_HIGH:
196         case TSC_OFFSET:
197         case TSC_OFFSET_HIGH:
198         case VIRT_APIC_PAGE_ADDR:
199         case VIRT_APIC_PAGE_ADDR_HIGH:
200             /* 64 bit guest state fields */
201         case VMCS_LINK_PTR:
202         case VMCS_LINK_PTR_HIGH:
203         case GUEST_IA32_DEBUGCTL:
204         case GUEST_IA32_DEBUGCTL_HIGH:
205         case GUEST_IA32_PERF_GLOBAL_CTRL:
206         case GUEST_IA32_PERF_GLOBAL_CTRL_HIGH:
207             return 8;
208             /* 32 bit control fields */
209         case PIN_VM_EXEC_CTRLS:
210         case PROC_VM_EXEC_CTRLS:
211         case EXCEPTION_BITMAP:
212         case PAGE_FAULT_ERROR_MASK:
213         case PAGE_FAULT_ERROR_MATCH:
214         case CR3_TARGET_COUNT:
215         case VM_EXIT_CTRLS:
216         case VM_EXIT_MSR_STORE_COUNT:
217         case VM_EXIT_MSR_LOAD_COUNT:
218         case VM_ENTRY_CTRLS:
219         case VM_ENTRY_MSR_LOAD_COUNT:
220         case VM_ENTRY_INT_INFO_FIELD:
221         case VM_ENTRY_EXCEPTION_ERROR:
222         case VM_ENTRY_INSTR_LENGTH:
223         case TPR_THRESHOLD:
224             /* 32 bit Read Only data fields */
225         case VM_INSTR_ERROR:
226         case EXIT_REASON:
227         case VM_EXIT_INT_INFO:
228         case VM_EXIT_INT_ERROR:
229         case IDT_VECTOR_INFO:
230         case IDT_VECTOR_ERROR:
231         case VM_EXIT_INSTR_LENGTH:
232         case VMX_INSTR_INFO:
233             /* 32 bit Guest state fields */
234         case GUEST_ES_LIMIT:
235         case GUEST_CS_LIMIT:
236         case GUEST_SS_LIMIT:
237         case GUEST_DS_LIMIT:
238         case GUEST_FS_LIMIT:
239         case GUEST_GS_LIMIT:
240         case GUEST_LDTR_LIMIT:
241         case GUEST_TR_LIMIT:
242         case GUEST_GDTR_LIMIT:
243         case GUEST_IDTR_LIMIT:
244         case GUEST_ES_ACCESS:
245         case GUEST_CS_ACCESS:
246         case GUEST_SS_ACCESS:
247         case GUEST_DS_ACCESS:
248         case GUEST_FS_ACCESS:
249         case GUEST_GS_ACCESS:
250         case GUEST_LDTR_ACCESS:
251         case GUEST_TR_ACCESS:
252         case GUEST_INT_STATE:
253         case GUEST_ACTIVITY_STATE:
254         case GUEST_SMBASE:
255         case GUEST_IA32_SYSENTER_CS:
256             /* 32 bit host state field */
257         case HOST_IA32_SYSENTER_CS:
258             return 4;
259             /* Natural Width Control Fields */
260         case CR0_GUEST_HOST_MASK:
261         case CR4_GUEST_HOST_MASK:
262         case CR0_READ_SHADOW:
263         case CR4_READ_SHADOW:
264         case CR3_TARGET_VALUE_0:
265         case CR3_TARGET_VALUE_1:
266         case CR3_TARGET_VALUE_2:
267         case CR3_TARGET_VALUE_3:
268             /* Natural Width Read Only Fields */
269         case EXIT_QUALIFICATION:
270         case IO_RCX:
271         case IO_RSI:
272         case IO_RDI:
273         case IO_RIP:
274         case GUEST_LINEAR_ADDR:
275             /* Natural Width Guest State Fields */
276         case GUEST_CR0:
277         case GUEST_CR3:
278         case GUEST_CR4:
279         case GUEST_ES_BASE:
280         case GUEST_CS_BASE:
281         case GUEST_SS_BASE:
282         case GUEST_DS_BASE:
283         case GUEST_FS_BASE:
284         case GUEST_GS_BASE:
285         case GUEST_LDTR_BASE:
286         case GUEST_TR_BASE:
287         case GUEST_GDTR_BASE:
288         case GUEST_IDTR_BASE:
289         case GUEST_DR7:
290         case GUEST_RSP:
291         case GUEST_RIP:
292         case GUEST_RFLAGS:
293         case GUEST_PENDING_DEBUG_EXCS:
294         case GUEST_IA32_SYSENTER_ESP:
295         case GUEST_IA32_SYSENTER_EIP:
296             /* Natural Width Host State Fields */
297         case HOST_CR0:
298         case HOST_CR3:
299         case HOST_CR4:
300         case HOST_FS_BASE:
301         case HOST_GS_BASE:
302         case HOST_TR_BASE:
303         case HOST_GDTR_BASE:
304         case HOST_IDTR_BASE:
305         case HOST_IA32_SYSENTER_ESP:
306         case HOST_IA32_SYSENTER_EIP:
307         case HOST_RSP:
308         case HOST_RIP:
309             /* Pin Based VM Execution Controls */
310             /* INTEL MANUAL: 20-10 vol 3B */
311         case EXTERNAL_INTERRUPT_EXITING:
312         case NMI_EXITING:
313         case VIRTUAL_NMIS:
314             /* Processor Based VM Execution Controls */
315             /* INTEL MANUAL: 20-11 vol. 3B */
316         case INTERRUPT_WINDOWS_EXIT:
317         case USE_TSC_OFFSETTING:
318         case HLT_EXITING:
319         case INVLPG_EXITING:
320         case MWAIT_EXITING:
321         case RDPMC_EXITING:
322         case RDTSC_EXITING:
323         case CR8_LOAD_EXITING:
324         case CR8_STORE_EXITING:
325         case USE_TPR_SHADOW:
326         case NMI_WINDOW_EXITING:
327         case MOVDR_EXITING:
328         case UNCONDITION_IO_EXITING:
329         case USE_IO_BITMAPS:
330         case USE_MSR_BITMAPS:
331         case MONITOR_EXITING:
332         case PAUSE_EXITING:
333             /* VM-Exit Controls */
334             /* INTEL MANUAL: 20-16 vol. 3B */
335         case HOST_ADDR_SPACE_SIZE:
336         case ACK_IRQ_ON_EXIT:
337 #ifdef __V3_64BIT__
338             return 8;
339 #else
340             return 4;
341 #endif
342         default:
343             return -1;
344     }
345 }
346
347 char* vmcs_field_name(vmcs_field_t field)
348 {   
349     case(field)
350     {
351         case VMCS_GUEST_ES_SELECTOR:
352             return "VMCS_GUEST_ES_SELECTOR";
353         case VMCS_GUEST_CS_SELECTOR:
354             return "VMCS_GUEST_CS_SELECTOR";
355         case VMCS_GUEST_SS_SELECTOR:
356             return "VMCS_GUEST_SS_SELECTOR";
357         case VMCS_GUEST_DS_SELECTOR:
358             return "VMCS_GUEST_DS_SELECTOR";
359         case VMCS_GUEST_FS_SELECTOR:
360             return "VMCS_GUEST_FS_SELECTOR";
361         case VMCS_GUEST_GS_SELECTOR:
362             return "VMCS_GUEST_GS_SELECTOR";
363         case VMCS_GUEST_LDTR_SELECTOR:
364             return "VMCS_GUEST_LDTR_SELECTOR";
365         case VMCS_GUEST_TR_SELECTOR:
366             return "VMCS_GUEST_TR_SELECTOR";
367         case VMCS_HOST_ES_SELECTOR:
368             return "VMCS_HOST_ES_SELECTOR";
369         case VMCS_HOST_CS_SELECTOR:
370             return "VMCS_HOST_CS_SELECTOR";
371         case VMCS_HOST_SS_SELECTOR:
372             return "VMCS_HOST_SS_SELECTOR";
373         case VMCS_HOST_DS_SELECTOR:
374             return "VMCS_HOST_DS_SELECTOR";
375         case VMCS_HOST_FS_SELECTOR:
376             return "VMCS_HOST_FS_SELECTOR";
377         case VMCS_HOST_GS_SELECTOR:
378             return "VMCS_HOST_GS_SELECTOR";
379         case VMCS_HOST_TR_SELECTOR:
380             return "VMCS_HOST_TR_SELECTOR";
381         case IO_BITMAP_A_ADDR:
382             return "IO_BITMAP_A_ADDR";
383         case IO_BITMAP_A_ADDR_HIGH:
384             return "IO_BITMAP_A_ADDR_HIGH";
385         case IO_BITMAP_B_ADDR:
386             return "IO_BITMAP_B_ADDR";
387         case IO_BITMAP_B_ADDR_HIGH:
388             return "IO_BITMAP_B_ADDR_HIGH";
389         case MSR_BITMAPS:
390             return "MSR_BITMAPS";
391         case MSR_BITMAPS_HIGH:
392             return "MSR_BITMAPS_HIGH";
393         case VM_EXIT_MSR_STORE_ADDR:
394             return "VM_EXIT_MSR_STORE_ADDR";
395         case VM_EXIT_MSR_STORE_ADDR_HIGH:
396             return "VM_EXIT_MSR_STORE_ADDR_HIGH";
397         case VM_EXIT_MSR_LOAD_ADDR:
398             return "VM_EXIT_MSR_LOAD_ADDR";
399         case VM_EXIT_MSR_LOAD_ADDR_HIGH:
400             return "VM_EXIT_MSR_LOAD_ADDR_HIGH";
401         case VM_ENTRY_MSR_LOAD_ADDR:
402             return "VM_ENTRY_MSR_LOAD_ADDR";
403         case VM_ENTRY_MSR_LOAD_ADDR_HIGH:
404             return "VM_ENTRY_MSR_LOAD_ADDR_HIGH";
405         case VMCS_EXEC_PTR:
406             return "VMCS_EXEC_PTR";
407         case VMCS_EXEC_PTR_HIGH:
408             return "VMCS_EXEC_PTR_HIGH";
409         case TSC_OFFSET:
410             return "TSC_OFFSET";
411         case TSC_OFFSET_HIGH:
412             return "TSC_OFFSET_HIGH";
413         case VIRT_APIC_PAGE_ADDR:
414             return "VIRT_APIC_PAGE_ADDR";
415         case VIRT_APIC_PAGE_ADDR_HIGH:
416             return "VIRT_APIC_PAGE_ADDR_HIGH";
417         case VMCS_LINK_PTR:
418             return "VMCS_LINK_PTR";
419         case VMCS_LINK_PTR_HIGH:
420             return "VMCS_LINK_PTR_HIGH";
421         case GUEST_IA32_DEBUGCTL:
422             return "GUEST_IA32_DEBUGCTL";
423         case GUEST_IA32_DEBUGCTL_HIGH:
424             return "GUEST_IA32_DEBUGCTL_HIGH";
425         case GUEST_IA32_PERF_GLOBAL_CTRL:
426             return "GUEST_IA32_PERF_GLOBAL_CTRL";
427         case GUEST_IA32_PERF_GLOBAL_CTRL_HIGH:
428             return "GUEST_IA32_PERF_GLOBAL_CTRL_HIGH";
429         case PIN_VM_EXEC_CTRLS:
430             return "PIN_VM_EXEC_CTRLS";
431         case PROC_VM_EXEC_CTRLS:
432             return "PROC_VM_EXEC_CTRLS";
433         case EXCEPTION_BITMAP:
434             return "EXCEPTION_BITMAP";
435         case PAGE_FAULT_ERROR_MASK:
436             return "PAGE_FAULT_ERROR_MASK";
437         case PAGE_FAULT_ERROR_MATCH:
438             return "PAGE_FAULT_ERROR_MATCH";
439         case CR3_TARGET_COUNT:
440             return "CR3_TARGET_COUNT";
441         case VM_EXIT_CTRLS:
442             return "VM_EXIT_CTRLS";
443         case VM_EXIT_MSR_STORE_COUNT:
444             return "VM_EXIT_MSR_STORE_COUNT";
445         case VM_EXIT_MSR_LOAD_COUNT:
446             return "VM_EXIT_MSR_LOAD_COUNT";
447         case VM_ENTRY_CTRLS:
448             return "VM_ENTRY_CTRLS";
449         case VM_ENTRY_MSR_LOAD_COUNT:
450             return "VM_ENTRY_MSR_LOAD_COUNT";
451         case VM_ENTRY_INT_INFO_FIELD:
452             return "VM_ENTRY_INT_INFO_FIELD";
453         case VM_ENTRY_EXCEPTION_ERROR:
454             return "VM_ENTRY_EXCEPTION_ERROR";
455         case VM_ENTRY_INSTR_LENGTH:
456             return "VM_ENTRY_INSTR_LENGTH";
457         case TPR_THRESHOLD:
458             return "TPR_THRESHOLD";
459         case VM_INSTR_ERROR:
460             return "VM_INSTR_ERROR";
461         case EXIT_REASON:
462             return "EXIT_REASON";
463         case VM_EXIT_INT_INFO:
464             return "VM_EXIT_INT_INFO";
465         case VM_EXIT_INT_ERROR:
466             return "VM_EXIT_INT_ERROR";
467         case IDT_VECTOR_INFO:
468             return "IDT_VECTOR_INFO";
469         case IDT_VECTOR_ERROR:
470             return "IDT_VECTOR_ERROR";
471         case VM_EXIT_INSTR_LENGTH:
472             return "VM_EXIT_INSTR_LENGTH";
473         case VMX_INSTR_INFO:
474             return "VMX_INSTR_INFO";
475         case GUEST_ES_LIMIT:
476             return "GUEST_ES_LIMIT";
477         case GUEST_CS_LIMIT:
478             return "GUEST_CS_LIMIT";
479         case GUEST_SS_LIMIT:
480             return "GUEST_SS_LIMIT";
481         case GUEST_DS_LIMIT:
482             return "GUEST_DS_LIMIT";
483         case GUEST_FS_LIMIT:
484             return "GUEST_FS_LIMIT";
485         case GUEST_GS_LIMIT:
486             return "GUEST_GS_LIMIT";
487         case GUEST_LDTR_LIMIT:
488             return "GUEST_LDTR_LIMIT";
489         case GUEST_TR_LIMIT:
490             return "GUEST_TR_LIMIT";
491         case GUEST_GDTR_LIMIT:
492             return "GUEST_GDTR_LIMIT";
493         case GUEST_IDTR_LIMIT:
494             return "GUEST_IDTR_LIMIT";
495         case GUEST_ES_ACCESS:
496             return "GUEST_ES_ACCESS";
497         case GUEST_CS_ACCESS:
498             return "GUEST_CS_ACCESS";
499         case GUEST_SS_ACCESS:
500             return "GUEST_SS_ACCESS";
501         case GUEST_DS_ACCESS:
502             return "GUEST_DS_ACCESS";
503         case GUEST_FS_ACCESS:
504             return "GUEST_FS_ACCESS";
505         case GUEST_GS_ACCESS:
506             return "GUEST_GS_ACCESS";
507         case GUEST_LDTR_ACCESS:
508             return "GUEST_LDTR_ACCESS";
509         case GUEST_TR_ACCESS:
510             return "GUEST_TR_ACCESS";
511         case GUEST_INT_STATE:
512             return "GUEST_INT_STATE";
513         case GUEST_ACTIVITY_STATE:
514             return "GUEST_ACTIVITY_STATE";
515         case GUEST_SMBASE:
516             return "GUEST_SMBASE";
517         case GUEST_IA32_SYSENTER_CS:
518             return "GUEST_IA32_SYSENTER_CS";
519         case HOST_IA32_SYSENTER_CS:
520             return "HOST_IA32_SYSENTER_CS";
521         case CR0_GUEST_HOST_MASK:
522             return "CR0_GUEST_HOST_MASK";
523         case CR4_GUEST_HOST_MASK:
524             return "CR4_GUEST_HOST_MASK";
525         case CR0_READ_SHADOW:
526             return "CR0_READ_SHADOW";
527         case CR4_READ_SHADOW:
528             return "CR4_READ_SHADOW";
529         case CR3_TARGET_VALUE_0:
530             return "CR3_TARGET_VALUE_0";
531         case CR3_TARGET_VALUE_1:
532             return "CR3_TARGET_VALUE_1";
533         case CR3_TARGET_VALUE_2:
534             return "CR3_TARGET_VALUE_2";
535         case CR3_TARGET_VALUE_3:
536             return "CR3_TARGET_VALUE_3";
537         case EXIT_QUALIFICATION:
538             return "EXIT_QUALIFICATION";
539         case IO_RCX:
540             return "IO_RCX";
541         case IO_RSI:
542             return "IO_RSI";
543         case IO_RDI:
544             return "IO_RDI";
545         case IO_RIP:
546             return "IO_RIP";
547         case GUEST_LINEAR_ADDR:
548             return "GUEST_LINEAR_ADDR";
549         case GUEST_CR0:
550             return "GUEST_CR0";
551         case GUEST_CR3:
552             return "GUEST_CR3";
553         case GUEST_CR4:
554             return "GUEST_CR4";
555         case GUEST_ES_BASE:
556             return "GUEST_ES_BASE";
557         case GUEST_CS_BASE:
558             return "GUEST_CS_BASE";
559         case GUEST_SS_BASE:
560             return "GUEST_SS_BASE";
561         case GUEST_DS_BASE:
562             return "GUEST_DS_BASE";
563         case GUEST_FS_BASE:
564             return "GUEST_FS_BASE";
565         case GUEST_GS_BASE:
566             return "GUEST_GS_BASE";
567         case GUEST_LDTR_BASE:
568             return "GUEST_LDTR_BASE";
569         case GUEST_TR_BASE:
570             return "GUEST_TR_BASE";
571         case GUEST_GDTR_BASE:
572             return "GUEST_GDTR_BASE";
573         case GUEST_IDTR_BASE:
574             return "GUEST_IDTR_BASE";
575         case GUEST_DR7:
576             return "GUEST_DR7";
577         case GUEST_RSP:
578             return "GUEST_RSP";
579         case GUEST_RIP:
580             return "GUEST_RIP";
581         case GUEST_RFLAGS:
582             return "GUEST_RFLAGS";
583         case GUEST_PENDING_DEBUG_EXCS:
584             return "GUEST_PENDING_DEBUG_EXCS";
585         case GUEST_IA32_SYSENTER_ESP:
586             return "GUEST_IA32_SYSENTER_ESP";
587         case GUEST_IA32_SYSENTER_EIP:
588             return "GUEST_IA32_SYSENTER_EIP";
589         case HOST_CR0:
590             return "HOST_CR0";
591         case HOST_CR3:
592             return "HOST_CR3";
593         case HOST_CR4:
594             return "HOST_CR4";
595         case HOST_FS_BASE:
596             return "HOST_FS_BASE";
597         case HOST_GS_BASE:
598             return "HOST_GS_BASE";
599         case HOST_TR_BASE:
600             return "HOST_TR_BASE";
601         case HOST_GDTR_BASE:
602             return "HOST_GDTR_BASE";
603         case HOST_IDTR_BASE:
604             return "HOST_IDTR_BASE";
605         case HOST_IA32_SYSENTER_ESP:
606             return "HOST_IA32_SYSENTER_ESP";
607         case HOST_IA32_SYSENTER_EIP:
608             return "HOST_IA32_SYSENTER_EIP";
609         case HOST_RSP:
610             return "HOST_RSP";
611         case HOST_RIP:
612             return "HOST_RIP";
613         case EXTERNAL_INTERRUPT_EXITING:
614             return "EXTERNAL_INTERRUPT_EXITING";
615         case NMI_EXITING:
616             return "NMI_EXITING";
617         case VIRTUAL_NMIS:
618             return "VIRTUAL_NMIS";
619         case INTERRUPT_WINDOWS_EXIT:
620             return "INTERRUPT_WINDOWS_EXIT";
621         case USE_TSC_OFFSETTING:
622             return "USE_TSC_OFFSETTING";
623         case HLT_EXITING:
624             return "HLT_EXITING";
625         case INVLPG_EXITING:
626             return "INVLPG_EXITING";
627         case MWAIT_EXITING:
628             return "MWAIT_EXITING";
629         case RDPMC_EXITING:
630             return "RDPMC_EXITING";
631         case RDTSC_EXITING:
632             return "RDTSC_EXITING";
633         case CR8_LOAD_EXITING:
634             return "CR8_LOAD_EXITING";
635         case CR8_STORE_EXITING:
636             return "CR8_STORE_EXITING";
637         case USE_TPR_SHADOW:
638             return "USE_TPR_SHADOW";
639         case NMI_WINDOW_EXITING:
640             return "NMI_WINDOW_EXITING";
641         case MOVDR_EXITING:
642             return "MOVDR_EXITING";
643         case UNCONDITION_IO_EXITING:
644             return "UNCONDITION_IO_EXITING";
645         case USE_IO_BITMAPS:
646             return "USE_IO_BITMAPS";
647         case USE_MSR_BITMAPS:
648             return "USE_MSR_BITMAPS";
649         case MONITOR_EXITING:
650             return "MONITOR_EXITING";
651         case PAUSE_EXITING:
652             return "PAUSE_EXITING";
653         case HOST_ADDR_SPACE_SIZE:
654             return "HOST_ADDR_SPACE_SIZE";
655         case ACK_IRQ_ON_EXIT:
656             return "ACK_IRQ_ON_EXIT";
657         default:
658             return NULL;
659     }
660 }
661
662
663 void PrintTrace_VMCSHostStateArea(struct VMCSHostStateArea * hostState) {
664   PrintTrace("\n==> Host State Area\n");
665   PrintTrace("HOST_CR0: %x\n", (uint_t)hostState->cr0);
666   PrintTrace("HOST_CR3: %x\n", (uint_t)hostState->cr3);
667   PrintTrace("HOST_CR4: %x\n", (uint_t)hostState->cr4);
668   PrintTrace("HOST_RSP: %x\n", (uint_t)hostState->rsp);
669   PrintTrace("HOST_RIP: %x\n", (uint_t)hostState->rip);
670   PrintTrace("VMCS_HOST_CS_SELECTOR: %x\n", (uint_t)hostState->csSelector);
671   PrintTrace("VMCS_HOST_SS_SELECTOR: %x\n", (uint_t)hostState->ssSelector);
672   PrintTrace("VMCS_HOST_DS_SELECTOR: %x\n", (uint_t)hostState->dsSelector);
673   PrintTrace("VMCS_HOST_ES_SELECTOR: %x\n", (uint_t)hostState->esSelector);
674   PrintTrace("VMCS_HOST_FS_SELECTOR: %x\n", (uint_t)hostState->fsSelector);
675   PrintTrace("VMCS_HOST_GS_SELECTOR: %x\n", (uint_t)hostState->gsSelector);
676   PrintTrace("VMCS_HOST_TR_SELECTOR: %x\n", (uint_t)hostState->trSelector);
677   PrintTrace("HOST_FS_BASE: %x\n", (uint_t)hostState->fsBaseAddr);
678   PrintTrace("HOST_GS_BASE: %x\n", (uint_t)hostState->gsBaseAddr);
679   PrintTrace("HOST_TR_BASE: %x\n", (uint_t)hostState->trBaseAddr);
680   PrintTrace("HOST_GDTR_BASE: %x\n", (uint_t)hostState->gdtrBaseAddr);
681   PrintTrace("HOST_IDTR_BASE: %x\n", (uint_t)hostState->idtrBaseAddr);
682   PrintTrace("HOST_IA32_SYSENTER_CS: %x\n", (uint_t)hostState->sysenter_cs);
683   PrintTrace("HOST_IA32_SYSENTER_ESP: %x\n", (uint_t)hostState->sysenter_esp);
684   PrintTrace("HOST_IA32_SYSENTER_EIP: %x\n", (uint_t)hostState->sysenter_eip);
685 }
686
687 void PrintTrace_VMCSExecCtrlFields(struct VMCSExecCtrlFields * execCtrls) {
688   PrintTrace("\n==> VM-Execution Controls:\n");
689   PrintTrace("PIN_VM_EXEC_CTRLS: %x\n", (uint_t) execCtrls->pinCtrls);
690   PrintTrace("PROC_VM_EXEC_CTRLS: %x\n", (uint_t) execCtrls->procCtrls);
691   PrintTrace("EXCEPTION_BITMAP: %x\n", (uint_t) execCtrls->execBitmap);
692   PrintTrace("PAGE_FAULT_ERROR_MASK: %x\n", (uint_t) execCtrls->pageFaultErrorMask);
693   PrintTrace("PAGE_FAULT_ERROR_MATCH: %x\n", (uint_t) execCtrls->pageFaultErrorMatch);
694   PrintTrace("IO_BITMAP_A_ADDR: %x\n", (uint_t) execCtrls->ioBitmapA);
695   //  PrintTrace("IO_BITMAP_A_ADDR_HIGH: %x\n", (uint_t) execCtrls->);
696   PrintTrace("IO_BITMAP_B_ADDR: %x\n", (uint_t) execCtrls->ioBitmapB);
697   // PrintTrace("IO_BITMAP_B_ADDR_HIGH: %x\n", (uint_t) execCtrls->);
698   PrintTrace("TSC_OFFSET: %x\n", (uint_t) execCtrls->tscOffset & 0xffffffff);
699   PrintTrace("TSC_OFFSET_HIGH: %x\n", (uint_t) (execCtrls->tscOffset >> 32) & 0xffffffff);
700   PrintTrace("CR0_GUEST_HOST_MASK: %x\n", (uint_t) execCtrls->cr0GuestHostMask);
701   PrintTrace("CR0_READ_SHADOW: %x\n", (uint_t) execCtrls->cr0ReadShadow);
702   PrintTrace("CR4_GUEST_HOST_MASK: %x\n", (uint_t) execCtrls->cr4GuestHostMask);
703   PrintTrace("CR4_READ_SHADOW: %x\n", (uint_t) execCtrls->cr4ReadShadow);
704   PrintTrace("CR3_TARGET_COUNT: %x\n", (uint_t) execCtrls->cr3TargetCount);
705   PrintTrace("CR3_TARGET_VALUE_0: %x\n", (uint_t) execCtrls->cr3TargetValue0);
706   PrintTrace("CR3_TARGET_VALUE_1: %x\n", (uint_t) execCtrls->cr3TargetValue1);
707   PrintTrace("CR3_TARGET_VALUE_2: %x\n", (uint_t) execCtrls->cr3TargetValue2);
708   PrintTrace("CR3_TARGET_VALUE_3: %x\n", (uint_t) execCtrls->cr3TargetValue3);
709   PrintTrace("VIRT_APIC_PAGE_ADDR: %x\n", (uint_t) execCtrls->virtApicPageAddr & 0xffffffff);
710   PrintTrace("VIRT_APIC_PAGE_ADDR_HIGH: %x\n", (uint_t) (execCtrls->virtApicPageAddr >> 32) & 0xffffffff);
711   PrintTrace("TPR_THRESHOLD: %x\n", (uint_t) execCtrls->tprThreshold);
712   PrintTrace("MSR_BITMAPS: %x\n", (uint_t) execCtrls->MSRBitmapsBaseAddr & 0xffffffff);
713   PrintTrace("MSR_BITMAPS_HIGH: %x\n", (uint_t) (execCtrls->MSRBitmapsBaseAddr >> 32) & 0xffffffff);
714   PrintTrace("VMCS_EXEC_PTR: %x\n", (uint_t) execCtrls->vmcsExecPtr & 0xffffffff);
715   PrintTrace("VMCS_EXEC_PTR_HIGH: %x\n", (uint_t) (execCtrls->vmcsExecPtr >> 32) & 0xffffffff);
716 }
717
718 void PrintTrace_VMCSExitCtrlFields(struct VMCSExitCtrlFields * exitCtrls) {
719   PrintTrace("\n==> VM Exit Controls\n");
720   PrintTrace("VM_EXIT_CTRLS: %x\n", (uint_t) exitCtrls->exitCtrls);
721   PrintTrace("VM_EXIT_MSR_STORE_COUNT: %x\n", (uint_t) exitCtrls->msrStoreCount);
722   PrintTrace("VM_EXIT_MSR_STORE_ADDR: %x\n", (uint_t) exitCtrls->msrStoreAddr & 0xffffffff);
723   PrintTrace("VM_EXIT_MSR_STORE_ADDR_HIGH: %x\n", (uint_t) (exitCtrls->msrStoreAddr >> 32) & 0xffffffff);
724   PrintTrace("VM_EXIT_MSR_LOAD_COUNT: %x\n", (uint_t) exitCtrls->msrLoadCount);
725   PrintTrace("VM_EXIT_MSR_LOAD_ADDR: %x\n", (uint_t) exitCtrls->msrLoadAddr & 0xffffffff);
726   PrintTrace("VM_EXIT_MSR_LOAD_ADDR_HIGH: %x\n", (uint_t) (exitCtrls->msrLoadAddr >> 32) & 0xffffffff);
727 }
728
729 void PrintTrace_VMCSEntryCtrlFields(struct VMCSEntryCtrlFields * entryCtrls) {
730   PrintTrace("\n==> VM Entry Controls\n");
731   PrintTrace("VM_ENTRY_CTRLS: %x\n", (uint_t) entryCtrls->entryCtrls);
732   PrintTrace("VM_ENTRY_MSR_LOAD_COUNT: %x\n", (uint_t) entryCtrls->msrLoadCount);
733   PrintTrace("VM_ENTRY_MSR_LOAD_ADDR: %x\n", (uint_t) entryCtrls->msrLoadAddr & 0xffffffff);
734   PrintTrace("VM_ENTRY_MSR_LOAD_ADDR_HIGH: %x\n", (uint_t) (entryCtrls->msrLoadAddr >> 32) & 0xffffffff);
735   PrintTrace("VM_ENTRY_INT_INFO_FIELD: %x\n", (uint_t) entryCtrls->intInfo);
736   PrintTrace("VM_ENTRY_EXCEPTION_ERROR: %x\n", (uint_t) entryCtrls->exceptionErrorCode);
737   PrintTrace("VM_ENTRY_INSTR_LENGTH: %x\n", (uint_t) entryCtrls->instrLength);
738 }
739
740 void PrintTrace_VMCSExitInfoFields(struct VMCSExitInfoFields * exitInfo) {
741   PrintTrace("\n==> VM Exit Info\n");
742   PrintTrace("EXIT_REASON: %x\n", (uint_t) exitInfo->reason);
743   PrintTrace("EXIT_QUALIFICATION: %x\n", (uint_t) exitInfo->qualification);
744   PrintTrace("VM_EXIT_INT_INFO: %x\n", (uint_t) exitInfo->intInfo);
745   PrintTrace("VM_EXIT_INT_ERROR: %x\n", (uint_t) exitInfo->intErrorCode);
746   PrintTrace("IDT_VECTOR_INFO: %x\n", (uint_t) exitInfo->idtVectorInfo);
747   PrintTrace("IDT_VECTOR_ERROR: %x\n", (uint_t) exitInfo->idtVectorErrorCode);
748   PrintTrace("VM_EXIT_INSTR_LENGTH: %x\n", (uint_t) exitInfo->instrLength);
749   PrintTrace("GUEST_LINEAR_ADDR: %x\n", (uint_t) exitInfo->guestLinearAddr);
750   PrintTrace("VMX_INSTR_INFO: %x\n", (uint_t) exitInfo->instrInfo);
751   PrintTrace("IO_RCX: %x\n", (uint_t) exitInfo->ioRCX);
752   PrintTrace("IO_RSI: %x\n", (uint_t) exitInfo->ioRSI);
753   PrintTrace("IO_RDI: %x\n", (uint_t) exitInfo->ioRDI);
754   PrintTrace("IO_RIP: %x\n", (uint_t) exitInfo->ioRIP);
755   PrintTrace("VM_INSTR_ERROR: %x\n", (uint_t) exitInfo->instrErrorField);
756 }
757
758
759 void PrintTrace_VMCSData(struct VMCSData * vmcs) {
760   PrintTrace("VMCSData Structure\n");
761
762   PrintTrace_VMCSGuestStateArea(&(vmcs->guestStateArea));
763   PrintTrace_VMCSHostStateArea(&(vmcs->hostStateArea));
764   PrintTrace_VMCSExecCtrlFields(&(vmcs->execCtrlFields));
765   PrintTrace_VMCSExitCtrlFields(&(vmcs->exitCtrlFields));
766   PrintTrace_VMCSEntryCtrlFields(&(vmcs->entryCtrlFields));
767   PrintTrace_VMCSExitInfoFields(&(vmcs->exitInfoFields));
768   PrintTrace("\n");
769 }