palacios/src/palacios/vmcs.c

   1 /*
   2  * This file is part of the Palacios Virtual Machine Monitor developed
   3  * by the V3VEE Project with funding from the United States National
   4  * Science Foundation and the Department of Energy.
   5  *
   6  * The V3VEE Project is a joint project between Northwestern University
   7  * and the University of New Mexico.  You can find out more at
   8  * http://www.v3vee.org
   9  *
  10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
  11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
  12  * All rights reserved.
  13  *
  14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
  15  *
  16  * This is free software.  You are permitted to use,
  17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
  18  */
  19
  20 #include <palacios/vmcs.h>
  21 #include <palacios/vmx_lowlevel.h>
  22 #include <palacios/vmm.h>
  23 #include <palacios/vmx.h>
  24 #include <palacios/vm_guest_mem.h>
  25 #include <palacios/vmm_ctrl_regs.h>
  26 #include <palacios/vmm_lowlevel.h>
  27
  28
  29
  30
  31
  32 static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
  33     int ret = 0;
  34     ret = vmcs_write(field, val);
  35
  36     if (ret != VMX_SUCCESS) {
  37         PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
  38         return 1;
  39     }
  40
  41     return 0;
  42 }
  43
  44 static int inline check_vmcs_read(vmcs_field_t field, void * val) {
  45     int ret = 0;
  46     ret = vmcs_read(field, val);
  47
  48     if (ret != VMX_SUCCESS) {
  49         PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
  50     }
  51
  52     return ret;
  53 }
  54
  55
  56
  57
  58
  59
  60
  61 typedef enum { ES = 0,
  62                CS = 2,
  63                SS = 4,
  64                DS = 6,
  65                FS = 8,
  66                GS = 10,
  67                LDTR = 12,
  68                TR = 14,
  69                GDTR = 16,
  70                IDTR = 18} vmcs_seg_offsets_t;
  71
  72 typedef enum {BASE = VMCS_GUEST_ES_BASE,
  73               LIMIT = VMCS_GUEST_ES_LIMIT,
  74               ACCESS = VMCS_GUEST_ES_ACCESS,
  75               SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t;
  76
  77
  78
  79 static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
  80     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
  81     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
  82     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
  83     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
  84     struct vmcs_segment vmcs_seg;
  85
  86     memset(&vmcs_seg, 0, sizeof(struct vmcs_segment));
  87
  88     check_vmcs_read(limit, &(vmcs_seg.limit));
  89     check_vmcs_read(base, &(vmcs_seg.base));
  90
  91     if ((seg_type != GDTR) && (seg_type != IDTR)) {
  92         check_vmcs_read(selector, &(vmcs_seg.selector));
  93         check_vmcs_read(access, &(vmcs_seg.access.val));
  94     }
  95
  96     v3_vmxseg_to_seg(&vmcs_seg, seg);
  97
  98     return 0;
  99 }
 100
 101 static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
 102     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
 103     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
 104     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
 105     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
 106     struct vmcs_segment vmcs_seg;
 107
 108     v3_seg_to_vmxseg(seg, &vmcs_seg);
 109
 110     check_vmcs_write(limit, vmcs_seg.limit);
 111     check_vmcs_write(base, vmcs_seg.base);
 112
 113     if ((seg_type != GDTR) && (seg_type != IDTR)) {
 114         check_vmcs_write(access, vmcs_seg.access.val);
 115         check_vmcs_write(selector, vmcs_seg.selector);
 116     }
 117
 118     return 0;
 119 }
 120
 121 int v3_read_vmcs_segments(struct v3_segments * segs) {
 122     v3_read_vmcs_segment(&(segs->cs), CS);
 123     v3_read_vmcs_segment(&(segs->ds), DS);
 124     v3_read_vmcs_segment(&(segs->es), ES);
 125     v3_read_vmcs_segment(&(segs->fs), FS);
 126     v3_read_vmcs_segment(&(segs->gs), GS);
 127     v3_read_vmcs_segment(&(segs->ss), SS);
 128     v3_read_vmcs_segment(&(segs->ldtr), LDTR);
 129     v3_read_vmcs_segment(&(segs->gdtr), GDTR);
 130     v3_read_vmcs_segment(&(segs->idtr), IDTR);
 131     v3_read_vmcs_segment(&(segs->tr), TR);
 132
 133     return 0;
 134 }
 135
 136 int v3_write_vmcs_segments(struct v3_segments * segs) {
 137     v3_write_vmcs_segment(&(segs->cs), CS);
 138     v3_write_vmcs_segment(&(segs->ds), DS);
 139     v3_write_vmcs_segment(&(segs->es), ES);
 140     v3_write_vmcs_segment(&(segs->fs), FS);
 141     v3_write_vmcs_segment(&(segs->gs), GS);
 142     v3_write_vmcs_segment(&(segs->ss), SS);
 143     v3_write_vmcs_segment(&(segs->ldtr), LDTR);
 144     v3_write_vmcs_segment(&(segs->gdtr), GDTR);
 145     v3_write_vmcs_segment(&(segs->idtr), IDTR);
 146     v3_write_vmcs_segment(&(segs->tr), TR);
 147
 148     return 0;
 149 }
 150
 151
 152 void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) {
 153     memset(seg, 0, sizeof(struct v3_segment));
 154
 155     seg->selector = vmcs_seg->selector;
 156     seg->limit = vmcs_seg->limit;
 157     seg->base = vmcs_seg->base;
 158
 159     seg->type = vmcs_seg->access.type;
 160     seg->system = vmcs_seg->access.desc_type;
 161     seg->dpl = vmcs_seg->access.dpl;
 162     seg->present = vmcs_seg->access.present;
 163     seg->avail = vmcs_seg->access.avail;
 164     seg->long_mode = vmcs_seg->access.long_mode;
 165     seg->db = vmcs_seg->access.db;
 166     seg->granularity = vmcs_seg->access.granularity;
 167     seg->unusable = vmcs_seg->access.unusable;
 168
 169 }
 170
 171 void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) {
 172     memset(vmcs_seg, 0, sizeof(struct vmcs_segment));
 173
 174     vmcs_seg->selector = seg->selector;
 175     vmcs_seg->limit = seg->limit;
 176     vmcs_seg->base = seg->base;
 177
 178     vmcs_seg->access.type = seg->type;
 179     vmcs_seg->access.desc_type = seg->system;
 180     vmcs_seg->access.dpl = seg->dpl;
 181     vmcs_seg->access.present = seg->present;
 182     vmcs_seg->access.avail = seg->avail;
 183     vmcs_seg->access.long_mode = seg->long_mode;
 184     vmcs_seg->access.db = seg->db;
 185     vmcs_seg->access.granularity = seg->granularity;
 186     vmcs_seg->access.unusable = seg->unusable;
 187 }
 188
 189
 190
 191
 192 int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
 193     int vmx_ret = 0;
 194     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
 195
 196     vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value);
 197     vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value);
 198
 199     if (arch_data->pri_proc_ctrls.sec_ctrls) {
 200         vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value);
 201     }
 202
 203     vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value);
 204     vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value);
 205     vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, arch_data->excp_bmap.value);
 206
 207     if (info->shdw_pg_mode == NESTED_PAGING) {
 208         vmx_ret |= check_vmcs_write(VMCS_EPT_PTR, info->direct_map_pt);
 209     }
 210
 211     return vmx_ret;
 212 }
 213
 214
 215
 216
 217
 218
 219 int v3_vmx_save_vmcs(struct guest_info * info) {
 220     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
 221     int error = 0;
 222
 223     check_vmcs_read(VMCS_GUEST_RIP, &(info->rip));
 224     check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp));
 225
 226     check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0));
 227     check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0));
 228     check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3));
 229     check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4));
 230     check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4));
 231     check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7));
 232
 233     check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags));
 234
 235 #ifdef __V3_64BIT__
 236     check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer));
 237 #endif
 238
 239     error =  v3_read_vmcs_segments(&(info->segments));
 240
 241     return error;
 242 }
 243
 244
 245 int v3_vmx_restore_vmcs(struct guest_info * info) {
 246     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
 247     int error = 0;
 248
 249     check_vmcs_write(VMCS_GUEST_RIP, info->rip);
 250     check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
 251
 252     check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
 253     check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
 254     check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
 255     check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
 256     check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4);
 257     check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7);
 258
 259     check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
 260
 261 #ifdef __V3_64BIT__
 262     check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer);
 263     check_vmcs_write(VMCS_ENTRY_CTRLS, vmx_info->entry_ctrls.value);
 264 #endif
 265
 266
 267
 268
 269     error = v3_write_vmcs_segments(&(info->segments));
 270
 271     return error;
 272
 273 }
 274
 275
 276
 277 int v3_update_vmcs_host_state(struct guest_info * info) {
 278     int vmx_ret = 0;
 279     addr_t tmp;
 280     struct v3_msr tmp_msr;
 281     addr_t gdtr_base;
 282     struct {
 283         uint16_t selector;
 284         addr_t   base;
 285     } __attribute__((packed)) tmp_seg;
 286
 287 #ifdef __V3_64BIT__
 288     __asm__ __volatile__ ( "movq    %%cr0, %0; "
 289                            : "=q"(tmp)
 290                            :
 291     );
 292 #else
 293     __asm__ __volatile__ ( "movl    %%cr0, %0; "
 294                            : "=q"(tmp)
 295                            :
 296     );
 297 #endif
 298     vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp);
 299
 300
 301 #ifdef __V3_64BIT__
 302     __asm__ __volatile__ ( "movq %%cr3, %0; "
 303                            : "=q"(tmp)
 304                            :
 305     );
 306 #else
 307     __asm__ __volatile__ ( "movl %%cr3, %0; "
 308                            : "=q"(tmp)
 309                            :
 310     );
 311 #endif
 312     vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp);
 313
 314
 315 #ifdef __V3_64BIT__
 316     __asm__ __volatile__ ( "movq %%cr4, %0; "
 317                            : "=q"(tmp)
 318                            :
 319     );
 320 #else
 321     __asm__ __volatile__ ( "movl %%cr4, %0; "
 322                            : "=q"(tmp)
 323                            :
 324     );
 325 #endif
 326     vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp);
 327
 328
 329     __asm__ __volatile__(
 330                          "sgdt (%0);"
 331                          :
 332                          : "q"(&tmp_seg)
 333                          : "memory"
 334                          );
 335     gdtr_base = tmp_seg.base;
 336     vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, tmp_seg.base);
 337
 338     __asm__ __volatile__(
 339                          "sidt (%0);"
 340                          :
 341                          : "q"(&tmp_seg)
 342                          : "memory"
 343                          );
 344     vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, tmp_seg.base);
 345
 346     __asm__ __volatile__(
 347                          "str (%0);"
 348                          :
 349                          : "q"(&tmp_seg)
 350                          : "memory"
 351                          );
 352     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, tmp_seg.selector);
 353
 354     /* The GDTR *index* is bits 3-15 of the selector. */
 355     {
 356         struct tss_descriptor * desc = NULL;
 357         desc = (struct tss_descriptor *)(gdtr_base + (8 * (tmp_seg.selector >> 3)));
 358
 359         tmp_seg.base = ((desc->base1) |
 360                         (desc->base2 << 16) |
 361                         (desc->base3 << 24) |
 362 #ifdef __V3_64BIT__
 363                         ((uint64_t)desc->base4 << 32)
 364 #else
 365                         (0)
 366 #endif
 367                         );
 368
 369         vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, tmp_seg.base);
 370     }
 371
 372
 373 #ifdef __V3_64BIT__
 374     __asm__ __volatile__ ( "movq %%cs, %0; "
 375                            : "=q"(tmp)
 376                            :
 377     );
 378 #else
 379     __asm__ __volatile__ ( "movl %%cs, %0; "
 380                            : "=q"(tmp)
 381                            :
 382     );
 383 #endif
 384     vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp);
 385
 386 #ifdef __V3_64BIT__
 387     __asm__ __volatile__ ( "movq %%ss, %0; "
 388                            : "=q"(tmp)
 389                            :
 390     );
 391 #else
 392     __asm__ __volatile__ ( "movl %%ss, %0; "
 393                            : "=q"(tmp)
 394                            :
 395     );
 396 #endif
 397     vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp);
 398
 399 #ifdef __V3_64BIT__
 400     __asm__ __volatile__ ( "movq %%ds, %0; "
 401                            : "=q"(tmp)
 402                            :
 403     );
 404 #else
 405     __asm__ __volatile__ ( "movl %%ds, %0; "
 406                            : "=q"(tmp)
 407                            :
 408     );
 409 #endif
 410     vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp);
 411
 412 #ifdef __V3_64BIT__
 413     __asm__ __volatile__ ( "movq %%es, %0; "
 414                            : "=q"(tmp)
 415                            :
 416     );
 417 #else
 418     __asm__ __volatile__ ( "movl %%es, %0; "
 419                            : "=q"(tmp)
 420                            :
 421     );
 422 #endif
 423     vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp);
 424
 425 #ifdef __V3_64BIT__
 426     __asm__ __volatile__ ( "movq %%fs, %0; "
 427                            : "=q"(tmp)
 428                            :
 429     );
 430 #else
 431     __asm__ __volatile__ ( "movl %%fs, %0; "
 432                            : "=q"(tmp)
 433                            :
 434     );
 435 #endif
 436     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp);
 437
 438 #ifdef __V3_64BIT__
 439     __asm__ __volatile__ ( "movq %%gs, %0; "
 440                            : "=q"(tmp)
 441                            :
 442     );
 443 #else
 444     __asm__ __volatile__ ( "movl %%gs, %0; "
 445                            : "=q"(tmp)
 446                            :
 447     );
 448 #endif
 449     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp);
 450
 451
 452 #define SYSENTER_CS_MSR 0x00000174
 453 #define SYSENTER_ESP_MSR 0x00000175
 454 #define SYSENTER_EIP_MSR 0x00000176
 455 #define FS_BASE_MSR 0xc0000100
 456 #define GS_BASE_MSR 0xc0000101
 457 #define EFER_MSR 0xc0000080
 458
 459
 460     // SYSENTER CS MSR
 461     v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 462     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo);
 463
 464     // SYSENTER_ESP MSR
 465     v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 466     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value);
 467
 468     // SYSENTER_EIP MSR
 469     v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 470     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value);
 471
 472
 473     // FS.BASE MSR
 474     v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 475     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value);
 476
 477     // GS.BASE MSR
 478     v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 479     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value);
 480
 481
 482     // EFER
 483     v3_get_msr(EFER_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
 484     vmx_ret |= check_vmcs_write(VMCS_HOST_EFER, tmp_msr.value);
 485
 486     // PERF GLOBAL CONTROL
 487
 488     // PAT
 489
 490
 491     // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area
 492     {
 493         struct vmx_data * vmx_state = (struct vmx_data *)info->vmm_data;
 494         struct vmcs_msr_save_area * msr_entries = vmx_state->msr_area;
 495
 496
 497         v3_get_msr(IA32_STAR_MSR, &(msr_entries->host_star.hi), &(msr_entries->host_star.lo));
 498         v3_get_msr(IA32_LSTAR_MSR, &(msr_entries->host_lstar.hi), &(msr_entries->host_lstar.lo));
 499         v3_get_msr(IA32_FMASK_MSR, &(msr_entries->host_fmask.hi), &(msr_entries->host_fmask.lo));
 500         v3_get_msr(IA32_KERN_GS_BASE_MSR, &(msr_entries->host_kern_gs.hi), &(msr_entries->host_kern_gs.lo));
 501     }
 502
 503
 504
 505
 506
 507     return vmx_ret;
 508 }
 509
 510
 511
 512
 513
 514
 515 static inline void print_vmcs_field(vmcs_field_t vmcs_index) {
 516     int len = v3_vmcs_get_field_len(vmcs_index);
 517     addr_t val;
 518
 519     if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) {
 520         PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index));
 521         return;
 522     };
 523
 524     if (len == 2) {
 525         PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
 526     } else if (len == 4) {
 527         PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
 528     } else if (len == 8) {
 529         PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
 530     }
 531 }
 532
 533
 534 static void print_vmcs_segments() {
 535     struct v3_segments segs;
 536
 537     v3_read_vmcs_segments(&segs);
 538     v3_print_segments(&segs);
 539
 540
 541     PrintDebug("   ==> CS\n");
 542     print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
 543     print_vmcs_field(VMCS_GUEST_CS_BASE);
 544     print_vmcs_field(VMCS_GUEST_CS_LIMIT);
 545     print_vmcs_field(VMCS_GUEST_CS_ACCESS);
 546
 547     PrintDebug("   ==> SS\n");
 548     print_vmcs_field(VMCS_GUEST_SS_SELECTOR);
 549     print_vmcs_field(VMCS_GUEST_SS_BASE);
 550     print_vmcs_field(VMCS_GUEST_SS_LIMIT);
 551     print_vmcs_field(VMCS_GUEST_SS_ACCESS);
 552
 553     PrintDebug("   ==> DS\n");
 554     print_vmcs_field(VMCS_GUEST_DS_SELECTOR);
 555     print_vmcs_field(VMCS_GUEST_DS_BASE);
 556     print_vmcs_field(VMCS_GUEST_DS_LIMIT);
 557     print_vmcs_field(VMCS_GUEST_DS_ACCESS);
 558
 559     PrintDebug("   ==> ES\n");
 560     print_vmcs_field(VMCS_GUEST_ES_SELECTOR);
 561     print_vmcs_field(VMCS_GUEST_ES_BASE);
 562     print_vmcs_field(VMCS_GUEST_ES_LIMIT);
 563     print_vmcs_field(VMCS_GUEST_ES_ACCESS);
 564
 565     PrintDebug("   ==> FS\n");
 566     print_vmcs_field(VMCS_GUEST_FS_SELECTOR);
 567     print_vmcs_field(VMCS_GUEST_FS_BASE);
 568     print_vmcs_field(VMCS_GUEST_FS_LIMIT);
 569     print_vmcs_field(VMCS_GUEST_FS_ACCESS);
 570
 571     PrintDebug("   ==> GS\n");
 572     print_vmcs_field(VMCS_GUEST_GS_SELECTOR);
 573     print_vmcs_field(VMCS_GUEST_GS_BASE);
 574     print_vmcs_field(VMCS_GUEST_GS_LIMIT);
 575     print_vmcs_field(VMCS_GUEST_GS_ACCESS);
 576
 577     PrintDebug("   ==> LDTR\n");
 578     print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR);
 579     print_vmcs_field(VMCS_GUEST_LDTR_BASE);
 580     print_vmcs_field(VMCS_GUEST_LDTR_LIMIT);
 581     print_vmcs_field(VMCS_GUEST_LDTR_ACCESS);
 582
 583     PrintDebug("   ==> TR\n");
 584     print_vmcs_field(VMCS_GUEST_TR_SELECTOR);
 585     print_vmcs_field(VMCS_GUEST_TR_BASE);
 586     print_vmcs_field(VMCS_GUEST_TR_LIMIT);
 587     print_vmcs_field(VMCS_GUEST_TR_ACCESS);
 588
 589     PrintDebug("   ==> GDTR\n");
 590     print_vmcs_field(VMCS_GUEST_GDTR_BASE);
 591     print_vmcs_field(VMCS_GUEST_GDTR_LIMIT);
 592
 593     PrintDebug("   ==> IDTR\n");
 594     print_vmcs_field(VMCS_GUEST_IDTR_BASE);
 595     print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
 596
 597
 598 }
 599
 600
 601
 602
 603 static void print_guest_state()
 604 {
 605     PrintDebug("VMCS_GUEST_STATE\n");
 606     print_vmcs_field(VMCS_GUEST_RIP);
 607     print_vmcs_field(VMCS_GUEST_RSP);
 608     print_vmcs_field(VMCS_GUEST_RFLAGS);
 609     print_vmcs_field(VMCS_GUEST_CR0);
 610     print_vmcs_field(VMCS_GUEST_CR3);
 611     print_vmcs_field(VMCS_GUEST_CR4);
 612     print_vmcs_field(VMCS_GUEST_DR7);
 613
 614     // if save IA32_EFER
 615     print_vmcs_field(VMCS_GUEST_EFER);
 616 #ifdef __V3_32BIT__
 617     print_vmcs_field(VMCS_GUEST_EFER_HIGH);
 618 #endif
 619
 620
 621     PrintDebug("\n");
 622
 623     print_vmcs_segments();
 624
 625     PrintDebug("\n");
 626
 627     print_vmcs_field(VMCS_GUEST_DBG_CTL);
 628 #ifdef __V3_32BIT__
 629     print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH);
 630 #endif
 631     print_vmcs_field(VMCS_GUEST_SYSENTER_CS);
 632     print_vmcs_field(VMCS_GUEST_SYSENTER_ESP);
 633     print_vmcs_field(VMCS_GUEST_SYSENTER_EIP);
 634
 635
 636     // if save IA32_PAT
 637     print_vmcs_field(VMCS_GUEST_PAT);
 638 #ifdef __V3_32BIT__
 639     print_vmcs_field(VMCS_GUEST_PAT_HIGH);
 640 #endif
 641
 642     //if load  IA32_PERF_GLOBAL_CTRL
 643     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL);
 644 #ifdef __V3_32BIT__
 645     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH);
 646 #endif
 647
 648     print_vmcs_field(VMCS_GUEST_SMBASE);
 649
 650
 651
 652
 653     PrintDebug("GUEST_NON_REGISTER_STATE\n");
 654
 655     print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
 656     print_vmcs_field(VMCS_GUEST_INT_STATE);
 657     print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
 658
 659     // if VMX preempt timer
 660     print_vmcs_field(VMCS_PREEMPT_TIMER);
 661
 662 }
 663
 664 static void print_host_state()
 665 {
 666     PrintDebug("VMCS_HOST_STATE\n");
 667
 668     print_vmcs_field(VMCS_HOST_RIP);
 669     print_vmcs_field(VMCS_HOST_RSP);
 670     print_vmcs_field(VMCS_HOST_CR0);
 671     print_vmcs_field(VMCS_HOST_CR3);
 672     print_vmcs_field(VMCS_HOST_CR4);
 673
 674
 675
 676     // if load IA32_EFER
 677     print_vmcs_field(VMCS_HOST_EFER);
 678 #ifdef __V3_32BIT__
 679     print_vmcs_field(VMCS_HOST_EFER_HIGH);
 680 #endif
 681
 682
 683     PrintDebug("\n");
 684     print_vmcs_field(VMCS_HOST_CS_SELECTOR);
 685     print_vmcs_field(VMCS_HOST_SS_SELECTOR);
 686     print_vmcs_field(VMCS_HOST_DS_SELECTOR);
 687     print_vmcs_field(VMCS_HOST_ES_SELECTOR);
 688     print_vmcs_field(VMCS_HOST_FS_SELECTOR);
 689     print_vmcs_field(VMCS_HOST_GS_SELECTOR);
 690     print_vmcs_field(VMCS_HOST_TR_SELECTOR);
 691
 692     PrintDebug("\n");
 693     print_vmcs_field(VMCS_HOST_FS_BASE);
 694     print_vmcs_field(VMCS_HOST_GS_BASE);
 695     print_vmcs_field(VMCS_HOST_TR_BASE);
 696     print_vmcs_field(VMCS_HOST_GDTR_BASE);
 697     print_vmcs_field(VMCS_HOST_IDTR_BASE);
 698
 699     PrintDebug("\n");
 700     print_vmcs_field(VMCS_HOST_SYSENTER_CS);
 701     print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
 702     print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
 703
 704
 705     // if load IA32_PAT
 706     print_vmcs_field(VMCS_HOST_PAT);
 707 #ifdef __V3_32BIT__
 708     print_vmcs_field(VMCS_HOST_PAT_HIGH);
 709 #endif
 710
 711     // if load IA32_PERF_GLOBAL_CTRL
 712     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL);
 713 #ifdef __V3_32BIT__
 714     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH);
 715 #endif
 716 }
 717
 718
 719 static void print_exec_ctrls() {
 720     PrintDebug("VMCS_EXEC_CTRL_FIELDS\n");
 721     print_vmcs_field(VMCS_PIN_CTRLS);
 722     print_vmcs_field(VMCS_PROC_CTRLS);
 723
 724     // if activate secondary controls
 725     print_vmcs_field(VMCS_SEC_PROC_CTRLS);
 726
 727     print_vmcs_field(VMCS_EXCP_BITMAP);
 728     print_vmcs_field(VMCS_PG_FAULT_ERR_MASK);
 729     print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH);
 730
 731     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR);
 732 #ifdef __V3_32BIT__
 733     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH);
 734 #endif
 735
 736     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR);
 737 #ifdef __V3_32BIT__
 738     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH);
 739 #endif
 740
 741     print_vmcs_field(VMCS_TSC_OFFSET);
 742 #ifdef __V3_32BIT__
 743     print_vmcs_field(VMCS_TSC_OFFSET_HIGH);
 744 #endif
 745
 746     PrintDebug("\n");
 747
 748     print_vmcs_field(VMCS_CR0_MASK);
 749     print_vmcs_field(VMCS_CR0_READ_SHDW);
 750     print_vmcs_field(VMCS_CR4_MASK);
 751     print_vmcs_field(VMCS_CR4_READ_SHDW);
 752
 753     print_vmcs_field(VMCS_CR3_TGT_CNT);
 754     print_vmcs_field(VMCS_CR3_TGT_VAL_0);
 755     print_vmcs_field(VMCS_CR3_TGT_VAL_1);
 756     print_vmcs_field(VMCS_CR3_TGT_VAL_2);
 757     print_vmcs_field(VMCS_CR3_TGT_VAL_3);
 758
 759     // Check max number of CR3 targets... may continue...
 760
 761
 762     PrintDebug("\n");
 763
 764     // if virtualize apic accesses
 765     print_vmcs_field(VMCS_APIC_ACCESS_ADDR);
 766 #ifdef __V3_32BIT__
 767     print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH);
 768 #endif
 769
 770     // if use tpr shadow
 771     print_vmcs_field(VMCS_VAPIC_ADDR);
 772 #ifdef __V3_32BIT__
 773     print_vmcs_field(VMCS_VAPIC_ADDR_HIGH);
 774 #endif
 775
 776     // if use tpr shadow
 777     print_vmcs_field(VMCS_TPR_THRESHOLD);
 778
 779
 780     // if use MSR bitmaps
 781     print_vmcs_field(VMCS_MSR_BITMAP);
 782 #ifdef __V3_32BIT__
 783     print_vmcs_field(VMCS_MSR_BITMAP_HIGH);
 784 #endif
 785
 786     print_vmcs_field(VMCS_EXEC_PTR);
 787 #ifdef __V3_32BIT__
 788     print_vmcs_field(VMCS_EXEC_PTR_HIGH);
 789 #endif
 790
 791
 792 }
 793
 794 static void print_ept_state() {
 795     V3_Print("VMCS EPT INFO\n");
 796
 797     // if enable vpid
 798     print_vmcs_field(VMCS_VPID);
 799
 800     print_vmcs_field(VMCS_EPT_PTR);
 801 #ifdef __V3_32BIT__
 802     print_vmcs_field(VMCS_EPT_PTR_HIGH);
 803 #endif
 804
 805     print_vmcs_field(VMCS_GUEST_PHYS_ADDR);
 806 #ifdef __V3_32BIT__
 807     print_vmcs_field(VMCS_GUEST_PHYS_ADDR_HIGH);
 808 #endif
 809
 810
 811
 812     print_vmcs_field(VMCS_GUEST_PDPTE0);
 813 #ifdef __V3_32BIT__
 814     print_vmcs_field(VMCS_GUEST_PDPTE0_HIGH);
 815 #endif
 816
 817     print_vmcs_field(VMCS_GUEST_PDPTE1);
 818 #ifdef __V3_32BIT__
 819     print_vmcs_field(VMCS_GUEST_PDPTE1_HIGH);
 820 #endif
 821
 822     print_vmcs_field(VMCS_GUEST_PDPTE2);
 823 #ifdef __V3_32BIT__
 824     print_vmcs_field(VMCS_GUEST_PDPTE2_HIGH);
 825 #endif
 826
 827     print_vmcs_field(VMCS_GUEST_PDPTE3);
 828 #ifdef __V3_32BIT__
 829     print_vmcs_field(VMCS_GUEST_PDPTE3_HIGH);
 830 #endif
 831
 832
 833
 834 }
 835
 836
 837 static void print_exit_ctrls() {
 838     PrintDebug("VMCS_EXIT_CTRLS\n");
 839
 840     print_vmcs_field(VMCS_EXIT_CTRLS);
 841
 842
 843     print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT);
 844     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR);
 845 #ifdef __V3_32BIT__
 846     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH);
 847 #endif
 848
 849     print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT);
 850     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR);
 851 #ifdef __V3_32BIT__
 852     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH);
 853 #endif
 854
 855
 856     // if pause loop exiting
 857     print_vmcs_field(VMCS_PLE_GAP);
 858     print_vmcs_field(VMCS_PLE_WINDOW);
 859
 860 }
 861
 862
 863 static void print_entry_ctrls() {
 864     PrintDebug("VMCS_ENTRY_CTRLS\n");
 865
 866     print_vmcs_field(VMCS_ENTRY_CTRLS);
 867
 868     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT);
 869     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR);
 870 #ifdef __V3_32BIT__
 871     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH);
 872 #endif
 873
 874     print_vmcs_field(VMCS_ENTRY_INT_INFO);
 875     print_vmcs_field(VMCS_ENTRY_EXCP_ERR);
 876     print_vmcs_field(VMCS_ENTRY_INSTR_LEN);
 877
 878
 879 }
 880
 881
 882 static void print_exit_info() {
 883     PrintDebug("VMCS_EXIT_INFO\n");
 884
 885     print_vmcs_field(VMCS_EXIT_REASON);
 886     print_vmcs_field(VMCS_EXIT_QUAL);
 887
 888     print_vmcs_field(VMCS_EXIT_INT_INFO);
 889     print_vmcs_field(VMCS_EXIT_INT_ERR);
 890
 891     print_vmcs_field(VMCS_IDT_VECTOR_INFO);
 892     print_vmcs_field(VMCS_IDT_VECTOR_ERR);
 893
 894     print_vmcs_field(VMCS_EXIT_INSTR_LEN);
 895
 896     print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
 897     print_vmcs_field(VMCS_EXIT_INSTR_INFO);
 898
 899     print_vmcs_field(VMCS_IO_RCX);
 900     print_vmcs_field(VMCS_IO_RSI);
 901     print_vmcs_field(VMCS_IO_RDI);
 902     print_vmcs_field(VMCS_IO_RIP);
 903
 904
 905     print_vmcs_field(VMCS_INSTR_ERR);
 906 }
 907
 908 void v3_print_vmcs() {
 909
 910     print_vmcs_field(VMCS_LINK_PTR);
 911 #ifdef __V3_32BIT__
 912     print_vmcs_field(VMCS_LINK_PTR_HIGH);
 913 #endif
 914
 915     print_guest_state();
 916     print_host_state();
 917
 918     print_ept_state();
 919
 920     print_exec_ctrls();
 921     print_exit_ctrls();
 922     print_entry_ctrls();
 923     print_exit_info();
 924
 925 }
 926
 927
 928 /*
 929  * Returns the field length in bytes
 930  *   It doesn't get much uglier than this... Thanks Intel
 931  */
 932 int v3_vmcs_get_field_len(vmcs_field_t field) {
 933     struct vmcs_field_encoding * enc = (struct vmcs_field_encoding *)&field;
 934
 935     switch (enc->width)  {
 936         case 0:
 937             return 2;
 938         case 1: {
 939             if (enc->access_type == 1) {
 940                 return 4;
 941             } else {
 942                 return sizeof(addr_t);
 943             }
 944         }
 945         case 2:
 946             return 4;
 947         case 3:
 948             return sizeof(addr_t);
 949         default:
 950             PrintError("Invalid VMCS field: 0x%x\n", field);
 951             return -1;
 952     }
 953 }
 954
 955
 956
 957
 958
 959
 960
 961
 962
 963
 964
 965 static const char VMCS_VPID_STR[] = "VPID";
 966 static const char VMCS_GUEST_ES_SELECTOR_STR[] = "GUEST_ES_SELECTOR";
 967 static const char VMCS_GUEST_CS_SELECTOR_STR[] = "GUEST_CS_SELECTOR";
 968 static const char VMCS_GUEST_SS_SELECTOR_STR[] = "GUEST_SS_SELECTOR";
 969 static const char VMCS_GUEST_DS_SELECTOR_STR[] = "GUEST_DS_SELECTOR";
 970 static const char VMCS_GUEST_FS_SELECTOR_STR[] = "GUEST_FS_SELECTOR";
 971 static const char VMCS_GUEST_GS_SELECTOR_STR[] = "GUEST_GS_SELECTOR";
 972 static const char VMCS_GUEST_LDTR_SELECTOR_STR[] = "GUEST_LDTR_SELECTOR";
 973 static const char VMCS_GUEST_TR_SELECTOR_STR[] = "GUEST_TR_SELECTOR";
 974 static const char VMCS_HOST_ES_SELECTOR_STR[] = "HOST_ES_SELECTOR";
 975 static const char VMCS_HOST_CS_SELECTOR_STR[] = "HOST_CS_SELECTOR";
 976 static const char VMCS_HOST_SS_SELECTOR_STR[] = "HOST_SS_SELECTOR";
 977 static const char VMCS_HOST_DS_SELECTOR_STR[] = "HOST_DS_SELECTOR";
 978 static const char VMCS_HOST_FS_SELECTOR_STR[] = "HOST_FS_SELECTOR";
 979 static const char VMCS_HOST_GS_SELECTOR_STR[] = "HOST_GS_SELECTOR";
 980 static const char VMCS_HOST_TR_SELECTOR_STR[] = "HOST_TR_SELECTOR";
 981 static const char VMCS_IO_BITMAP_A_ADDR_STR[] = "IO_BITMAP_A_ADDR";
 982 static const char VMCS_IO_BITMAP_A_ADDR_HIGH_STR[] = "IO_BITMAP_A_ADDR_HIGH";
 983 static const char VMCS_IO_BITMAP_B_ADDR_STR[] = "IO_BITMAP_B_ADDR";
 984 static const char VMCS_IO_BITMAP_B_ADDR_HIGH_STR[] = "IO_BITMAP_B_ADDR_HIGH";
 985 static const char VMCS_MSR_BITMAP_STR[] = "MSR_BITMAPS";
 986 static const char VMCS_MSR_BITMAP_HIGH_STR[] = "MSR_BITMAPS_HIGH";
 987 static const char VMCS_EXIT_MSR_STORE_ADDR_STR[] = "EXIT_MSR_STORE_ADDR";
 988 static const char VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR[] = "EXIT_MSR_STORE_ADDR_HIGH";
 989 static const char VMCS_EXIT_MSR_LOAD_ADDR_STR[] = "EXIT_MSR_LOAD_ADDR";
 990 static const char VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR[] = "EXIT_MSR_LOAD_ADDR_HIGH";
 991 static const char VMCS_ENTRY_MSR_LOAD_ADDR_STR[] = "ENTRY_MSR_LOAD_ADDR";
 992 static const char VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR[] = "ENTRY_MSR_LOAD_ADDR_HIGH";
 993 static const char VMCS_EXEC_PTR_STR[] = "VMCS_EXEC_PTR";
 994 static const char VMCS_EXEC_PTR_HIGH_STR[] = "VMCS_EXEC_PTR_HIGH";
 995 static const char VMCS_TSC_OFFSET_STR[] = "TSC_OFFSET";
 996 static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH";
 997 static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR";
 998 static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH";
 999 static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR";
1000 static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH";
1001 static const char VMCS_EPT_PTR_STR[] = "VMCS_EPT_PTR";
1002 static const char VMCS_EPT_PTR_HIGH_STR[] = "VMCS_EPT_PTR_HIGH";
1003 static const char VMCS_GUEST_PHYS_ADDR_STR[] = "VMCS_GUEST_PHYS_ADDR";
1004 static const char VMCS_GUEST_PHYS_ADDR_HIGH_STR[] = "VMCS_GUEST_PHYS_ADDR_HIGH";
1005 static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR";
1006 static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH";
1007 static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL";
1008 static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH";
1009 static const char VMCS_GUEST_PAT_STR[] = "GUEST_PAT";
1010 static const char VMCS_GUEST_PAT_HIGH_STR[] = "GUEST_PAT_HIGH";
1011 static const char VMCS_GUEST_EFER_STR[] = "GUEST_EFER";
1012 static const char VMCS_GUEST_EFER_HIGH_STR[] = "GUEST_EFER_HIGH";
1013 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL";
1014 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH";
1015 static const char VMCS_GUEST_PDPTE0_STR[] = "GUEST_PDPTE0";
1016 static const char VMCS_GUEST_PDPTE0_HIGH_STR[] = "GUEST_PDPTE0_HIGH";
1017 static const char VMCS_GUEST_PDPTE1_STR[] = "GUEST_PDPTE1";
1018 static const char VMCS_GUEST_PDPTE1_HIGH_STR[] = "GUEST_PDPTE1_HIGH";
1019 static const char VMCS_GUEST_PDPTE2_STR[] = "GUEST_PDPTE2";
1020 static const char VMCS_GUEST_PDPTE2_HIGH_STR[] = "GUEST_PDPTE2_HIGH";
1021 static const char VMCS_GUEST_PDPTE3_STR[] = "GUEST_PDPTE3";
1022 static const char VMCS_GUEST_PDPTE3_HIGH_STR[] = "GUEST_PDPTE3_HIGH";
1023 static const char VMCS_HOST_PAT_STR[] = "HOST_PAT";
1024 static const char VMCS_HOST_PAT_HIGH_STR[] = "HOST_PAT_HIGH";
1025 static const char VMCS_HOST_EFER_STR[] = "VMCS_HOST_EFER";
1026 static const char VMCS_HOST_EFER_HIGH_STR[] = "VMCS_HOST_EFER_HIGH";
1027 static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL";
1028 static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH";
1029 static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS";
1030 static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS";
1031 static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP";
1032 static const char VMCS_PG_FAULT_ERR_MASK_STR[] = "PAGE_FAULT_ERROR_MASK";
1033 static const char VMCS_PG_FAULT_ERR_MATCH_STR[] = "PAGE_FAULT_ERROR_MATCH";
1034 static const char VMCS_CR3_TGT_CNT_STR[] = "CR3_TARGET_COUNT";
1035 static const char VMCS_EXIT_CTRLS_STR[] = "VM_EXIT_CTRLS";
1036 static const char VMCS_EXIT_MSR_STORE_CNT_STR[] = "VM_EXIT_MSR_STORE_COUNT";
1037 static const char VMCS_EXIT_MSR_LOAD_CNT_STR[] = "VM_EXIT_MSR_LOAD_COUNT";
1038 static const char VMCS_ENTRY_CTRLS_STR[] = "VM_ENTRY_CTRLS";
1039 static const char VMCS_ENTRY_MSR_LOAD_CNT_STR[] = "VM_ENTRY_MSR_LOAD_COUNT";
1040 static const char VMCS_ENTRY_INT_INFO_STR[] = "VM_ENTRY_INT_INFO_FIELD";
1041 static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR";
1042 static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH";
1043 static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD";
1044 static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS";
1045 static const char VMCS_PLE_GAP_STR[] = "PLE_GAP";
1046 static const char VMCS_PLE_WINDOW_STR[] = "PLE_WINDOW";
1047 static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR";
1048 static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON";
1049 static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO";
1050 static const char VMCS_EXIT_INT_ERR_STR[] = "VM_EXIT_INT_ERROR";
1051 static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO";
1052 static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR";
1053 static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH";
1054 static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
1055 static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT";
1056 static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT";
1057 static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT";
1058 static const char VMCS_GUEST_DS_LIMIT_STR[] = "GUEST_DS_LIMIT";
1059 static const char VMCS_GUEST_FS_LIMIT_STR[] = "GUEST_FS_LIMIT";
1060 static const char VMCS_GUEST_GS_LIMIT_STR[] = "GUEST_GS_LIMIT";
1061 static const char VMCS_GUEST_LDTR_LIMIT_STR[] = "GUEST_LDTR_LIMIT";
1062 static const char VMCS_GUEST_TR_LIMIT_STR[] = "GUEST_TR_LIMIT";
1063 static const char VMCS_GUEST_GDTR_LIMIT_STR[] = "GUEST_GDTR_LIMIT";
1064 static const char VMCS_GUEST_IDTR_LIMIT_STR[] = "GUEST_IDTR_LIMIT";
1065 static const char VMCS_GUEST_ES_ACCESS_STR[] = "GUEST_ES_ACCESS";
1066 static const char VMCS_GUEST_CS_ACCESS_STR[] = "GUEST_CS_ACCESS";
1067 static const char VMCS_GUEST_SS_ACCESS_STR[] = "GUEST_SS_ACCESS";
1068 static const char VMCS_GUEST_DS_ACCESS_STR[] = "GUEST_DS_ACCESS";
1069 static const char VMCS_GUEST_FS_ACCESS_STR[] = "GUEST_FS_ACCESS";
1070 static const char VMCS_GUEST_GS_ACCESS_STR[] = "GUEST_GS_ACCESS";
1071 static const char VMCS_GUEST_LDTR_ACCESS_STR[] = "GUEST_LDTR_ACCESS";
1072 static const char VMCS_GUEST_TR_ACCESS_STR[] = "GUEST_TR_ACCESS";
1073 static const char VMCS_GUEST_INT_STATE_STR[] = "GUEST_INT_STATE";
1074 static const char VMCS_GUEST_ACTIVITY_STATE_STR[] = "GUEST_ACTIVITY_STATE";
1075 static const char VMCS_GUEST_SMBASE_STR[] = "GUEST_SMBASE";
1076 static const char VMCS_GUEST_SYSENTER_CS_STR[] = "GUEST_SYSENTER_CS";
1077 static const char VMCS_PREEMPT_TIMER_STR[] = "PREEMPT_TIMER";
1078 static const char VMCS_HOST_SYSENTER_CS_STR[] = "HOST_SYSENTER_CS";
1079 static const char VMCS_CR0_MASK_STR[] = "CR0_GUEST_HOST_MASK";
1080 static const char VMCS_CR4_MASK_STR[] = "CR4_GUEST_HOST_MASK";
1081 static const char VMCS_CR0_READ_SHDW_STR[] = "CR0_READ_SHADOW";
1082 static const char VMCS_CR4_READ_SHDW_STR[] = "CR4_READ_SHADOW";
1083 static const char VMCS_CR3_TGT_VAL_0_STR[] = "CR3_TARGET_VALUE_0";
1084 static const char VMCS_CR3_TGT_VAL_1_STR[] = "CR3_TARGET_VALUE_1";
1085 static const char VMCS_CR3_TGT_VAL_2_STR[] = "CR3_TARGET_VALUE_2";
1086 static const char VMCS_CR3_TGT_VAL_3_STR[] = "CR3_TARGET_VALUE_3";
1087 static const char VMCS_EXIT_QUAL_STR[] = "EXIT_QUALIFICATION";
1088 static const char VMCS_IO_RCX_STR[] = "IO_RCX";
1089 static const char VMCS_IO_RSI_STR[] = "IO_RSI";
1090 static const char VMCS_IO_RDI_STR[] = "IO_RDI";
1091 static const char VMCS_IO_RIP_STR[] = "IO_RIP";
1092 static const char VMCS_GUEST_LINEAR_ADDR_STR[] = "GUEST_LINEAR_ADDR";
1093 static const char VMCS_GUEST_CR0_STR[] = "GUEST_CR0";
1094 static const char VMCS_GUEST_CR3_STR[] = "GUEST_CR3";
1095 static const char VMCS_GUEST_CR4_STR[] = "GUEST_CR4";
1096 static const char VMCS_GUEST_ES_BASE_STR[] = "GUEST_ES_BASE";
1097 static const char VMCS_GUEST_CS_BASE_STR[] = "GUEST_CS_BASE";
1098 static const char VMCS_GUEST_SS_BASE_STR[] = "GUEST_SS_BASE";
1099 static const char VMCS_GUEST_DS_BASE_STR[] = "GUEST_DS_BASE";
1100 static const char VMCS_GUEST_FS_BASE_STR[] = "GUEST_FS_BASE";
1101 static const char VMCS_GUEST_GS_BASE_STR[] = "GUEST_GS_BASE";
1102 static const char VMCS_GUEST_LDTR_BASE_STR[] = "GUEST_LDTR_BASE";
1103 static const char VMCS_GUEST_TR_BASE_STR[] = "GUEST_TR_BASE";
1104 static const char VMCS_GUEST_GDTR_BASE_STR[] = "GUEST_GDTR_BASE";
1105 static const char VMCS_GUEST_IDTR_BASE_STR[] = "GUEST_IDTR_BASE";
1106 static const char VMCS_GUEST_DR7_STR[] = "GUEST_DR7";
1107 static const char VMCS_GUEST_RSP_STR[] = "GUEST_RSP";
1108 static const char VMCS_GUEST_RIP_STR[] = "GUEST_RIP";
1109 static const char VMCS_GUEST_RFLAGS_STR[] = "GUEST_RFLAGS";
1110 static const char VMCS_GUEST_PENDING_DBG_EXCP_STR[] = "GUEST_PENDING_DEBUG_EXCS";
1111 static const char VMCS_GUEST_SYSENTER_ESP_STR[] = "GUEST_SYSENTER_ESP";
1112 static const char VMCS_GUEST_SYSENTER_EIP_STR[] = "GUEST_SYSENTER_EIP";
1113 static const char VMCS_HOST_CR0_STR[] = "HOST_CR0";
1114 static const char VMCS_HOST_CR3_STR[] = "HOST_CR3";
1115 static const char VMCS_HOST_CR4_STR[] = "HOST_CR4";
1116 static const char VMCS_HOST_FS_BASE_STR[] = "HOST_FS_BASE";
1117 static const char VMCS_HOST_GS_BASE_STR[] = "HOST_GS_BASE";
1118 static const char VMCS_HOST_TR_BASE_STR[] = "HOST_TR_BASE";
1119 static const char VMCS_HOST_GDTR_BASE_STR[] = "HOST_GDTR_BASE";
1120 static const char VMCS_HOST_IDTR_BASE_STR[] = "HOST_IDTR_BASE";
1121 static const char VMCS_HOST_SYSENTER_ESP_STR[] = "HOST_SYSENTER_ESP";
1122 static const char VMCS_HOST_SYSENTER_EIP_STR[] = "HOST_SYSENTER_EIP";
1123 static const char VMCS_HOST_RSP_STR[] = "HOST_RSP";
1124 static const char VMCS_HOST_RIP_STR[] = "HOST_RIP";
1125
1126
1127
1128 const char * v3_vmcs_field_to_str(vmcs_field_t field) {
1129     switch (field) {
1130         case VMCS_VPID:
1131             return VMCS_VPID_STR;
1132         case VMCS_GUEST_ES_SELECTOR:
1133             return VMCS_GUEST_ES_SELECTOR_STR;
1134         case VMCS_GUEST_CS_SELECTOR:
1135             return VMCS_GUEST_CS_SELECTOR_STR;
1136         case VMCS_GUEST_SS_SELECTOR:
1137             return VMCS_GUEST_SS_SELECTOR_STR;
1138         case VMCS_GUEST_DS_SELECTOR:
1139             return VMCS_GUEST_DS_SELECTOR_STR;
1140         case VMCS_GUEST_FS_SELECTOR:
1141             return VMCS_GUEST_FS_SELECTOR_STR;
1142         case VMCS_GUEST_GS_SELECTOR:
1143             return VMCS_GUEST_GS_SELECTOR_STR;
1144         case VMCS_GUEST_LDTR_SELECTOR:
1145             return VMCS_GUEST_LDTR_SELECTOR_STR;
1146         case VMCS_GUEST_TR_SELECTOR:
1147             return VMCS_GUEST_TR_SELECTOR_STR;
1148         case VMCS_HOST_ES_SELECTOR:
1149             return VMCS_HOST_ES_SELECTOR_STR;
1150         case VMCS_HOST_CS_SELECTOR:
1151             return VMCS_HOST_CS_SELECTOR_STR;
1152         case VMCS_HOST_SS_SELECTOR:
1153             return VMCS_HOST_SS_SELECTOR_STR;
1154         case VMCS_HOST_DS_SELECTOR:
1155             return VMCS_HOST_DS_SELECTOR_STR;
1156         case VMCS_HOST_FS_SELECTOR:
1157             return VMCS_HOST_FS_SELECTOR_STR;
1158         case VMCS_HOST_GS_SELECTOR:
1159             return VMCS_HOST_GS_SELECTOR_STR;
1160         case VMCS_HOST_TR_SELECTOR:
1161             return VMCS_HOST_TR_SELECTOR_STR;
1162         case VMCS_IO_BITMAP_A_ADDR:
1163             return VMCS_IO_BITMAP_A_ADDR_STR;
1164         case VMCS_IO_BITMAP_A_ADDR_HIGH:
1165             return VMCS_IO_BITMAP_A_ADDR_HIGH_STR;
1166         case VMCS_IO_BITMAP_B_ADDR:
1167             return VMCS_IO_BITMAP_B_ADDR_STR;
1168         case VMCS_IO_BITMAP_B_ADDR_HIGH:
1169             return VMCS_IO_BITMAP_B_ADDR_HIGH_STR;
1170         case VMCS_MSR_BITMAP:
1171             return VMCS_MSR_BITMAP_STR;
1172         case VMCS_MSR_BITMAP_HIGH:
1173             return VMCS_MSR_BITMAP_HIGH_STR;
1174         case VMCS_EXIT_MSR_STORE_ADDR:
1175             return VMCS_EXIT_MSR_STORE_ADDR_STR;
1176         case VMCS_EXIT_MSR_STORE_ADDR_HIGH:
1177             return VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR;
1178         case VMCS_EXIT_MSR_LOAD_ADDR:
1179             return VMCS_EXIT_MSR_LOAD_ADDR_STR;
1180         case VMCS_EXIT_MSR_LOAD_ADDR_HIGH:
1181             return VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR;
1182         case VMCS_ENTRY_MSR_LOAD_ADDR:
1183             return VMCS_ENTRY_MSR_LOAD_ADDR_STR;
1184         case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH:
1185             return VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR;
1186         case VMCS_EXEC_PTR:
1187             return VMCS_EXEC_PTR_STR;
1188         case VMCS_EXEC_PTR_HIGH:
1189             return VMCS_EXEC_PTR_HIGH_STR;
1190         case VMCS_TSC_OFFSET:
1191             return VMCS_TSC_OFFSET_STR;
1192         case VMCS_TSC_OFFSET_HIGH:
1193             return VMCS_TSC_OFFSET_HIGH_STR;
1194         case VMCS_VAPIC_ADDR:
1195             return VMCS_VAPIC_ADDR_STR;
1196         case VMCS_VAPIC_ADDR_HIGH:
1197             return VMCS_VAPIC_ADDR_HIGH_STR;
1198         case VMCS_APIC_ACCESS_ADDR:
1199             return VMCS_APIC_ACCESS_ADDR_STR;
1200         case VMCS_APIC_ACCESS_ADDR_HIGH:
1201             return VMCS_APIC_ACCESS_ADDR_HIGH_STR;
1202         case VMCS_EPT_PTR:
1203             return VMCS_EPT_PTR_STR;
1204         case VMCS_EPT_PTR_HIGH:
1205             return VMCS_EPT_PTR_HIGH_STR;
1206         case VMCS_GUEST_PHYS_ADDR:
1207             return VMCS_GUEST_PHYS_ADDR_STR;
1208         case VMCS_GUEST_PHYS_ADDR_HIGH:
1209             return VMCS_GUEST_PHYS_ADDR_HIGH_STR;
1210         case VMCS_LINK_PTR:
1211             return VMCS_LINK_PTR_STR;
1212         case VMCS_LINK_PTR_HIGH:
1213             return VMCS_LINK_PTR_HIGH_STR;
1214         case VMCS_GUEST_DBG_CTL:
1215             return VMCS_GUEST_DBG_CTL_STR;
1216         case VMCS_GUEST_DBG_CTL_HIGH:
1217             return VMCS_GUEST_DBG_CTL_HIGH_STR;
1218         case VMCS_GUEST_PAT:
1219             return VMCS_GUEST_PAT_STR;
1220         case VMCS_GUEST_PAT_HIGH:
1221             return VMCS_GUEST_PAT_HIGH_STR;
1222         case VMCS_GUEST_EFER:
1223             return VMCS_GUEST_EFER_STR;
1224         case VMCS_GUEST_EFER_HIGH:
1225             return VMCS_GUEST_EFER_HIGH_STR;
1226         case VMCS_GUEST_PERF_GLOBAL_CTRL:
1227             return VMCS_GUEST_PERF_GLOBAL_CTRL_STR;
1228         case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
1229             return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR;
1230         case VMCS_GUEST_PDPTE0:
1231             return VMCS_GUEST_PDPTE0_STR;
1232         case VMCS_GUEST_PDPTE0_HIGH:
1233             return VMCS_GUEST_PDPTE0_HIGH_STR;
1234         case VMCS_GUEST_PDPTE1:
1235             return VMCS_GUEST_PDPTE1_STR;
1236         case VMCS_GUEST_PDPTE1_HIGH:
1237             return VMCS_GUEST_PDPTE1_HIGH_STR;
1238         case VMCS_GUEST_PDPTE2:
1239             return VMCS_GUEST_PDPTE2_STR;
1240         case VMCS_GUEST_PDPTE2_HIGH:
1241             return VMCS_GUEST_PDPTE2_HIGH_STR;
1242         case VMCS_GUEST_PDPTE3:
1243             return VMCS_GUEST_PDPTE3_STR;
1244         case VMCS_GUEST_PDPTE3_HIGH:
1245             return VMCS_GUEST_PDPTE3_HIGH_STR;
1246         case VMCS_HOST_PAT:
1247             return VMCS_HOST_PAT_STR;
1248         case VMCS_HOST_PAT_HIGH:
1249             return VMCS_HOST_PAT_HIGH_STR;
1250         case VMCS_HOST_EFER:
1251             return VMCS_HOST_EFER_STR;
1252         case VMCS_HOST_EFER_HIGH:
1253             return VMCS_HOST_EFER_HIGH_STR;
1254         case VMCS_HOST_PERF_GLOBAL_CTRL:
1255             return VMCS_HOST_PERF_GLOBAL_CTRL_STR;
1256         case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
1257             return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR;
1258         case VMCS_PIN_CTRLS:
1259             return VMCS_PIN_CTRLS_STR;
1260         case VMCS_PROC_CTRLS:
1261             return VMCS_PROC_CTRLS_STR;
1262         case VMCS_EXCP_BITMAP:
1263             return VMCS_EXCP_BITMAP_STR;
1264         case VMCS_PG_FAULT_ERR_MASK:
1265             return VMCS_PG_FAULT_ERR_MASK_STR;
1266         case VMCS_PG_FAULT_ERR_MATCH:
1267             return VMCS_PG_FAULT_ERR_MATCH_STR;
1268         case VMCS_CR3_TGT_CNT:
1269             return VMCS_CR3_TGT_CNT_STR;
1270         case VMCS_EXIT_CTRLS:
1271             return VMCS_EXIT_CTRLS_STR;
1272         case VMCS_EXIT_MSR_STORE_CNT:
1273             return VMCS_EXIT_MSR_STORE_CNT_STR;
1274         case VMCS_EXIT_MSR_LOAD_CNT:
1275             return VMCS_EXIT_MSR_LOAD_CNT_STR;
1276         case VMCS_ENTRY_CTRLS:
1277             return VMCS_ENTRY_CTRLS_STR;
1278         case VMCS_ENTRY_MSR_LOAD_CNT:
1279             return VMCS_ENTRY_MSR_LOAD_CNT_STR;
1280         case VMCS_ENTRY_INT_INFO:
1281             return VMCS_ENTRY_INT_INFO_STR;
1282         case VMCS_ENTRY_EXCP_ERR:
1283             return VMCS_ENTRY_EXCP_ERR_STR;
1284         case VMCS_ENTRY_INSTR_LEN:
1285             return VMCS_ENTRY_INSTR_LEN_STR;
1286         case VMCS_TPR_THRESHOLD:
1287             return VMCS_TPR_THRESHOLD_STR;
1288         case VMCS_SEC_PROC_CTRLS:
1289             return VMCS_SEC_PROC_CTRLS_STR;
1290         case VMCS_PLE_GAP:
1291             return VMCS_PLE_GAP_STR;
1292         case VMCS_PLE_WINDOW:
1293             return VMCS_PLE_WINDOW_STR;
1294         case VMCS_INSTR_ERR:
1295             return VMCS_INSTR_ERR_STR;
1296         case VMCS_EXIT_REASON:
1297             return VMCS_EXIT_REASON_STR;
1298         case VMCS_EXIT_INT_INFO:
1299             return VMCS_EXIT_INT_INFO_STR;
1300         case VMCS_EXIT_INT_ERR:
1301             return VMCS_EXIT_INT_ERR_STR;
1302         case VMCS_IDT_VECTOR_INFO:
1303             return VMCS_IDT_VECTOR_INFO_STR;
1304         case VMCS_IDT_VECTOR_ERR:
1305             return VMCS_IDT_VECTOR_ERR_STR;
1306         case VMCS_EXIT_INSTR_LEN:
1307             return VMCS_EXIT_INSTR_LEN_STR;
1308         case VMCS_EXIT_INSTR_INFO:
1309             return VMCS_EXIT_INSTR_INFO_STR;
1310         case VMCS_GUEST_ES_LIMIT:
1311             return VMCS_GUEST_ES_LIMIT_STR;
1312         case VMCS_GUEST_CS_LIMIT:
1313             return VMCS_GUEST_CS_LIMIT_STR;
1314         case VMCS_GUEST_SS_LIMIT:
1315             return VMCS_GUEST_SS_LIMIT_STR;
1316         case VMCS_GUEST_DS_LIMIT:
1317             return VMCS_GUEST_DS_LIMIT_STR;
1318         case VMCS_GUEST_FS_LIMIT:
1319             return VMCS_GUEST_FS_LIMIT_STR;
1320         case VMCS_GUEST_GS_LIMIT:
1321             return VMCS_GUEST_GS_LIMIT_STR;
1322         case VMCS_GUEST_LDTR_LIMIT:
1323             return VMCS_GUEST_LDTR_LIMIT_STR;
1324         case VMCS_GUEST_TR_LIMIT:
1325             return VMCS_GUEST_TR_LIMIT_STR;
1326         case VMCS_GUEST_GDTR_LIMIT:
1327             return VMCS_GUEST_GDTR_LIMIT_STR;
1328         case VMCS_GUEST_IDTR_LIMIT:
1329             return VMCS_GUEST_IDTR_LIMIT_STR;
1330         case VMCS_GUEST_ES_ACCESS:
1331             return VMCS_GUEST_ES_ACCESS_STR;
1332         case VMCS_GUEST_CS_ACCESS:
1333             return VMCS_GUEST_CS_ACCESS_STR;
1334         case VMCS_GUEST_SS_ACCESS:
1335             return VMCS_GUEST_SS_ACCESS_STR;
1336         case VMCS_GUEST_DS_ACCESS:
1337             return VMCS_GUEST_DS_ACCESS_STR;
1338         case VMCS_GUEST_FS_ACCESS:
1339             return VMCS_GUEST_FS_ACCESS_STR;
1340         case VMCS_GUEST_GS_ACCESS:
1341             return VMCS_GUEST_GS_ACCESS_STR;
1342         case VMCS_GUEST_LDTR_ACCESS:
1343             return VMCS_GUEST_LDTR_ACCESS_STR;
1344         case VMCS_GUEST_TR_ACCESS:
1345             return VMCS_GUEST_TR_ACCESS_STR;
1346         case VMCS_GUEST_INT_STATE:
1347             return VMCS_GUEST_INT_STATE_STR;
1348         case VMCS_GUEST_ACTIVITY_STATE:
1349             return VMCS_GUEST_ACTIVITY_STATE_STR;
1350         case VMCS_GUEST_SMBASE:
1351             return VMCS_GUEST_SMBASE_STR;
1352         case VMCS_GUEST_SYSENTER_CS:
1353             return VMCS_GUEST_SYSENTER_CS_STR;
1354         case VMCS_PREEMPT_TIMER:
1355             return VMCS_PREEMPT_TIMER_STR;
1356         case VMCS_HOST_SYSENTER_CS:
1357             return VMCS_HOST_SYSENTER_CS_STR;
1358         case VMCS_CR0_MASK:
1359             return VMCS_CR0_MASK_STR;
1360         case VMCS_CR4_MASK:
1361             return VMCS_CR4_MASK_STR;
1362         case VMCS_CR0_READ_SHDW:
1363             return VMCS_CR0_READ_SHDW_STR;
1364         case VMCS_CR4_READ_SHDW:
1365             return VMCS_CR4_READ_SHDW_STR;
1366         case VMCS_CR3_TGT_VAL_0:
1367             return VMCS_CR3_TGT_VAL_0_STR;
1368         case VMCS_CR3_TGT_VAL_1:
1369             return VMCS_CR3_TGT_VAL_1_STR;
1370         case VMCS_CR3_TGT_VAL_2:
1371             return VMCS_CR3_TGT_VAL_2_STR;
1372         case VMCS_CR3_TGT_VAL_3:
1373             return VMCS_CR3_TGT_VAL_3_STR;
1374         case VMCS_EXIT_QUAL:
1375             return VMCS_EXIT_QUAL_STR;
1376         case VMCS_IO_RCX:
1377             return VMCS_IO_RCX_STR;
1378         case VMCS_IO_RSI:
1379             return VMCS_IO_RSI_STR;
1380         case VMCS_IO_RDI:
1381             return VMCS_IO_RDI_STR;
1382         case VMCS_IO_RIP:
1383             return VMCS_IO_RIP_STR;
1384         case VMCS_GUEST_LINEAR_ADDR:
1385             return VMCS_GUEST_LINEAR_ADDR_STR;
1386         case VMCS_GUEST_CR0:
1387             return VMCS_GUEST_CR0_STR;
1388         case VMCS_GUEST_CR3:
1389             return VMCS_GUEST_CR3_STR;
1390         case VMCS_GUEST_CR4:
1391             return VMCS_GUEST_CR4_STR;
1392         case VMCS_GUEST_ES_BASE:
1393             return VMCS_GUEST_ES_BASE_STR;
1394         case VMCS_GUEST_CS_BASE:
1395             return VMCS_GUEST_CS_BASE_STR;
1396         case VMCS_GUEST_SS_BASE:
1397             return VMCS_GUEST_SS_BASE_STR;
1398         case VMCS_GUEST_DS_BASE:
1399             return VMCS_GUEST_DS_BASE_STR;
1400         case VMCS_GUEST_FS_BASE:
1401             return VMCS_GUEST_FS_BASE_STR;
1402         case VMCS_GUEST_GS_BASE:
1403             return VMCS_GUEST_GS_BASE_STR;
1404         case VMCS_GUEST_LDTR_BASE:
1405             return VMCS_GUEST_LDTR_BASE_STR;
1406         case VMCS_GUEST_TR_BASE:
1407             return VMCS_GUEST_TR_BASE_STR;
1408         case VMCS_GUEST_GDTR_BASE:
1409             return VMCS_GUEST_GDTR_BASE_STR;
1410         case VMCS_GUEST_IDTR_BASE:
1411             return VMCS_GUEST_IDTR_BASE_STR;
1412         case VMCS_GUEST_DR7:
1413             return VMCS_GUEST_DR7_STR;
1414         case VMCS_GUEST_RSP:
1415             return VMCS_GUEST_RSP_STR;
1416         case VMCS_GUEST_RIP:
1417             return VMCS_GUEST_RIP_STR;
1418         case VMCS_GUEST_RFLAGS:
1419             return VMCS_GUEST_RFLAGS_STR;
1420         case VMCS_GUEST_PENDING_DBG_EXCP:
1421             return VMCS_GUEST_PENDING_DBG_EXCP_STR;
1422         case VMCS_GUEST_SYSENTER_ESP:
1423             return VMCS_GUEST_SYSENTER_ESP_STR;
1424         case VMCS_GUEST_SYSENTER_EIP:
1425             return VMCS_GUEST_SYSENTER_EIP_STR;
1426         case VMCS_HOST_CR0:
1427             return VMCS_HOST_CR0_STR;
1428         case VMCS_HOST_CR3:
1429             return VMCS_HOST_CR3_STR;
1430         case VMCS_HOST_CR4:
1431             return VMCS_HOST_CR4_STR;
1432         case VMCS_HOST_FS_BASE:
1433             return VMCS_HOST_FS_BASE_STR;
1434         case VMCS_HOST_GS_BASE:
1435             return VMCS_HOST_GS_BASE_STR;
1436         case VMCS_HOST_TR_BASE:
1437             return VMCS_HOST_TR_BASE_STR;
1438         case VMCS_HOST_GDTR_BASE:
1439             return VMCS_HOST_GDTR_BASE_STR;
1440         case VMCS_HOST_IDTR_BASE:
1441             return VMCS_HOST_IDTR_BASE_STR;
1442         case VMCS_HOST_SYSENTER_ESP:
1443             return VMCS_HOST_SYSENTER_ESP_STR;
1444         case VMCS_HOST_SYSENTER_EIP:
1445             return VMCS_HOST_SYSENTER_EIP_STR;
1446         case VMCS_HOST_RSP:
1447             return VMCS_HOST_RSP_STR;
1448         case VMCS_HOST_RIP:
1449             return VMCS_HOST_RIP_STR;
1450         default:
1451             return NULL;
1452     }
1453 }
1454
1455
1456