Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


2d36a3ff0def5b95a32f0b6ac61bb74b55adae50
[palacios.git] / palacios / src / palacios / vmcs.c
1 /* 
2  * This file is part of the Palacios Virtual Machine Monitor developed
3  * by the V3VEE Project with funding from the United States National 
4  * Science Foundation and the Department of Energy.  
5  *
6  * The V3VEE Project is a joint project between Northwestern University
7  * and the University of New Mexico.  You can find out more at 
8  * http://www.v3vee.org
9  *
10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
12  * All rights reserved.
13  *
14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
15  *
16  * This is free software.  You are permitted to use,
17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
18  */
19
20 #include <palacios/vmcs.h>
21 #include <palacios/vmx_lowlevel.h>
22 #include <palacios/vmm.h>
23 #include <palacios/vmx.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
26 #include <palacios/vmm_lowlevel.h>
27
28
29
30
31
32 static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
33     int ret = 0;
34     ret = vmcs_write(field, val);
35
36     if (ret != VMX_SUCCESS) {
37         PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
38         return 1;
39     }
40
41     return 0;
42 }
43
44 static int inline check_vmcs_read(vmcs_field_t field, void * val) {
45     int ret = 0;
46     ret = vmcs_read(field, val);
47
48     if (ret != VMX_SUCCESS) {
49         PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
50     }
51
52     return ret;
53 }
54
55
56
57
58
59
60
61 typedef enum { ES = 0, 
62                CS = 2,
63                SS = 4,
64                DS = 6, 
65                FS = 8, 
66                GS = 10, 
67                LDTR = 12, 
68                TR = 14, 
69                GDTR = 16, 
70                IDTR = 18} vmcs_seg_offsets_t;
71
72 typedef enum {BASE = VMCS_GUEST_ES_BASE,
73               LIMIT = VMCS_GUEST_ES_LIMIT, 
74               ACCESS = VMCS_GUEST_ES_ACCESS, 
75               SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t;
76  
77
78
79 static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
80     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
81     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
82     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
83     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
84     struct vmcs_segment vmcs_seg;
85
86     memset(&vmcs_seg, 0, sizeof(struct vmcs_segment));
87
88     check_vmcs_read(limit, &(vmcs_seg.limit));
89     check_vmcs_read(base, &(vmcs_seg.base));
90
91     if ((seg_type != GDTR) && (seg_type != IDTR)) {
92         check_vmcs_read(selector, &(vmcs_seg.selector));
93         check_vmcs_read(access, &(vmcs_seg.access.val)); 
94     }
95
96     v3_vmxseg_to_seg(&vmcs_seg, seg);
97
98     return 0;
99 }
100
101 static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
102     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
103     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
104     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
105     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
106     struct vmcs_segment vmcs_seg;
107
108     v3_seg_to_vmxseg(seg, &vmcs_seg);
109
110     check_vmcs_write(limit, vmcs_seg.limit);
111     check_vmcs_write(base, vmcs_seg.base);
112
113     if ((seg_type != GDTR) && (seg_type != IDTR)) {
114         check_vmcs_write(access, vmcs_seg.access.val); 
115         check_vmcs_write(selector, vmcs_seg.selector);
116     }
117
118     return 0;
119 }
120
121 int v3_read_vmcs_segments(struct v3_segments * segs) {
122     v3_read_vmcs_segment(&(segs->cs), CS);
123     v3_read_vmcs_segment(&(segs->ds), DS);
124     v3_read_vmcs_segment(&(segs->es), ES);
125     v3_read_vmcs_segment(&(segs->fs), FS);
126     v3_read_vmcs_segment(&(segs->gs), GS);
127     v3_read_vmcs_segment(&(segs->ss), SS);
128     v3_read_vmcs_segment(&(segs->ldtr), LDTR);
129     v3_read_vmcs_segment(&(segs->gdtr), GDTR);
130     v3_read_vmcs_segment(&(segs->idtr), IDTR);
131     v3_read_vmcs_segment(&(segs->tr), TR);
132
133     return 0;
134 }
135
136 int v3_write_vmcs_segments(struct v3_segments * segs) {
137     v3_write_vmcs_segment(&(segs->cs), CS);
138     v3_write_vmcs_segment(&(segs->ds), DS);
139     v3_write_vmcs_segment(&(segs->es), ES);
140     v3_write_vmcs_segment(&(segs->fs), FS);
141     v3_write_vmcs_segment(&(segs->gs), GS);
142     v3_write_vmcs_segment(&(segs->ss), SS);
143     v3_write_vmcs_segment(&(segs->ldtr), LDTR);
144     v3_write_vmcs_segment(&(segs->gdtr), GDTR);
145     v3_write_vmcs_segment(&(segs->idtr), IDTR);
146     v3_write_vmcs_segment(&(segs->tr), TR);
147
148     return 0;
149 }
150
151
152 void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) {
153     memset(seg, 0, sizeof(struct v3_segment));
154
155     seg->selector = vmcs_seg->selector;
156     seg->limit = vmcs_seg->limit;
157     seg->base = vmcs_seg->base;
158
159     seg->type = vmcs_seg->access.type;
160     seg->system = vmcs_seg->access.desc_type;
161     seg->dpl = vmcs_seg->access.dpl;
162     seg->present = vmcs_seg->access.present;
163     seg->avail = vmcs_seg->access.avail;
164     seg->long_mode = vmcs_seg->access.long_mode;
165     seg->db = vmcs_seg->access.db;
166     seg->granularity = vmcs_seg->access.granularity;
167     seg->unusable = vmcs_seg->access.unusable;
168
169 }
170
171 void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) {
172     memset(vmcs_seg, 0, sizeof(struct vmcs_segment));
173
174     vmcs_seg->selector = seg->selector;
175     vmcs_seg->limit = seg->limit;
176     vmcs_seg->base = seg->base;
177
178     vmcs_seg->access.type = seg->type;
179     vmcs_seg->access.desc_type = seg->system;
180     vmcs_seg->access.dpl = seg->dpl;
181     vmcs_seg->access.present = seg->present;
182     vmcs_seg->access.avail = seg->avail;
183     vmcs_seg->access.long_mode = seg->long_mode;
184     vmcs_seg->access.db = seg->db;
185     vmcs_seg->access.granularity = seg->granularity;
186     vmcs_seg->access.unusable = seg->unusable;
187 }
188
189
190
191
192 int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
193     int vmx_ret = 0;
194     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
195
196     vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value);
197     vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value);
198
199     if (arch_data->pri_proc_ctrls.sec_ctrls) {
200         vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value);
201     }
202
203     vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value);
204     vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value);
205     vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, arch_data->excp_bmap.value);
206
207     if (info->shdw_pg_mode == NESTED_PAGING) {
208         vmx_ret |= check_vmcs_write(VMCS_EPT_PTR, info->direct_map_pt);
209     }
210
211     return vmx_ret;
212 }
213
214
215
216
217
218
219 int v3_vmx_save_vmcs(struct guest_info * info) {
220     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
221     int error = 0;
222
223     check_vmcs_read(VMCS_GUEST_RIP, &(info->rip));
224     check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp));
225
226     check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0));
227     check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0));
228     check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3));
229     check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4));
230     check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4));
231     check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7));
232
233     check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags));
234
235 #ifdef __V3_64BIT__
236     check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer));
237 #endif
238     
239     error =  v3_read_vmcs_segments(&(info->segments));
240
241     return error;
242 }
243
244
245 int v3_vmx_restore_vmcs(struct guest_info * info) {
246     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
247     int error = 0;
248
249     check_vmcs_write(VMCS_GUEST_RIP, info->rip);
250     check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
251
252     check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
253     check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
254     check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
255     check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
256     check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4);
257     check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7);
258
259     check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
260
261 #ifdef __V3_64BIT__
262     check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer);
263     check_vmcs_write(VMCS_ENTRY_CTRLS, vmx_info->entry_ctrls.value);
264 #endif
265
266
267
268
269     error = v3_write_vmcs_segments(&(info->segments));
270
271     return error;
272
273 }
274
275
276
277 int v3_update_vmcs_host_state(struct guest_info * info) {
278     int vmx_ret = 0;
279     addr_t tmp;
280     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
281     struct v3_msr tmp_msr;
282
283 #ifdef __V3_64BIT__
284     __asm__ __volatile__ ( "movq    %%cr0, %0; "                
285                            : "=q"(tmp)
286                            :
287     );
288 #else
289     __asm__ __volatile__ ( "movl    %%cr0, %0; "                
290                            : "=q"(tmp)
291                            :
292     );
293 #endif    
294     vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp);
295
296
297 #ifdef __V3_64BIT__
298     __asm__ __volatile__ ( "movq %%cr3, %0; "           
299                            : "=q"(tmp)
300                            :
301     );
302 #else
303     __asm__ __volatile__ ( "movl %%cr3, %0; "           
304                            : "=q"(tmp)
305                            :
306     );
307 #endif
308     vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp);
309
310
311 #ifdef __V3_64BIT__
312     __asm__ __volatile__ ( "movq %%cr4, %0; "           
313                            : "=q"(tmp)
314                            :
315     );
316 #else
317     __asm__ __volatile__ ( "movl %%cr4, %0; "           
318                            : "=q"(tmp)
319                            :
320     );
321 #endif
322     vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp);
323
324
325
326     vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, arch_data->host_state.gdtr.base);
327     vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, arch_data->host_state.idtr.base);
328     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, arch_data->host_state.tr.base);
329
330
331
332
333 #ifdef __V3_64BIT__
334     __asm__ __volatile__ ( "movq %%cs, %0; "            
335                            : "=q"(tmp)
336                            :
337     );
338 #else
339     __asm__ __volatile__ ( "movl %%cs, %0; "            
340                            : "=q"(tmp)
341                            :
342     );
343 #endif
344     vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp);
345
346 #ifdef __V3_64BIT__
347     __asm__ __volatile__ ( "movq %%ss, %0; "            
348                            : "=q"(tmp)
349                            :
350     );
351 #else
352     __asm__ __volatile__ ( "movl %%ss, %0; "            
353                            : "=q"(tmp)
354                            :
355     );
356 #endif
357     vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp);
358
359 #ifdef __V3_64BIT__
360     __asm__ __volatile__ ( "movq %%ds, %0; "            
361                            : "=q"(tmp)
362                            :
363     );
364 #else
365     __asm__ __volatile__ ( "movl %%ds, %0; "            
366                            : "=q"(tmp)
367                            :
368     );
369 #endif
370     vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp);
371
372 #ifdef __V3_64BIT__
373     __asm__ __volatile__ ( "movq %%es, %0; "            
374                            : "=q"(tmp)
375                            :
376     );
377 #else
378     __asm__ __volatile__ ( "movl %%es, %0; "            
379                            : "=q"(tmp)
380                            :
381     );
382 #endif
383     vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp);
384
385 #ifdef __V3_64BIT__
386     __asm__ __volatile__ ( "movq %%fs, %0; "            
387                            : "=q"(tmp)
388                            :
389     );
390 #else
391     __asm__ __volatile__ ( "movl %%fs, %0; "            
392                            : "=q"(tmp)
393                            :
394     );
395 #endif
396     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp);
397
398 #ifdef __V3_64BIT__
399     __asm__ __volatile__ ( "movq %%gs, %0; "            
400                            : "=q"(tmp)
401                            :
402     );
403 #else
404     __asm__ __volatile__ ( "movl %%gs, %0; "            
405                            : "=q"(tmp)
406                            :
407     );
408 #endif
409     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp);
410
411     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, arch_data->host_state.tr.selector);
412
413
414 #define SYSENTER_CS_MSR 0x00000174
415 #define SYSENTER_ESP_MSR 0x00000175
416 #define SYSENTER_EIP_MSR 0x00000176
417 #define FS_BASE_MSR 0xc0000100
418 #define GS_BASE_MSR 0xc0000101
419 #define EFER_MSR 0xc0000080
420
421
422     // SYSENTER CS MSR
423     v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
424     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo);
425
426     // SYSENTER_ESP MSR
427     v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
428     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value);
429
430     // SYSENTER_EIP MSR
431     v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
432     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value);
433
434
435     // FS.BASE MSR
436     v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
437     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value);    
438
439     // GS.BASE MSR
440     v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
441     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value);    
442
443
444     // EFER
445     v3_get_msr(EFER_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
446     vmx_ret |= check_vmcs_write(VMCS_HOST_EFER, tmp_msr.value);
447
448     // PERF GLOBAL CONTROL
449
450     // PAT
451
452
453     // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area
454
455     
456
457     
458
459
460
461     return vmx_ret;
462 }
463
464
465
466
467
468
469 static inline void print_vmcs_field(vmcs_field_t vmcs_index) {
470     int len = v3_vmcs_get_field_len(vmcs_index);
471     addr_t val;
472     
473     if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) {
474         PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index));
475         return;
476     };
477     
478     if (len == 2) {
479         PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
480     } else if (len == 4) {
481         PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
482     } else if (len == 8) {
483         PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
484     }
485 }
486
487
488 static void print_vmcs_segments() {
489     struct v3_segments segs; 
490
491     v3_read_vmcs_segments(&segs);
492     v3_print_segments(&segs);
493
494
495     PrintDebug("   ==> CS\n");
496     print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
497     print_vmcs_field(VMCS_GUEST_CS_BASE);
498     print_vmcs_field(VMCS_GUEST_CS_LIMIT);
499     print_vmcs_field(VMCS_GUEST_CS_ACCESS);
500
501     PrintDebug("   ==> SS\n");
502     print_vmcs_field(VMCS_GUEST_SS_SELECTOR);
503     print_vmcs_field(VMCS_GUEST_SS_BASE);
504     print_vmcs_field(VMCS_GUEST_SS_LIMIT);
505     print_vmcs_field(VMCS_GUEST_SS_ACCESS);
506
507     PrintDebug("   ==> DS\n");
508     print_vmcs_field(VMCS_GUEST_DS_SELECTOR);
509     print_vmcs_field(VMCS_GUEST_DS_BASE);
510     print_vmcs_field(VMCS_GUEST_DS_LIMIT);
511     print_vmcs_field(VMCS_GUEST_DS_ACCESS);
512
513     PrintDebug("   ==> ES\n");
514     print_vmcs_field(VMCS_GUEST_ES_SELECTOR);
515     print_vmcs_field(VMCS_GUEST_ES_BASE);
516     print_vmcs_field(VMCS_GUEST_ES_LIMIT);
517     print_vmcs_field(VMCS_GUEST_ES_ACCESS);
518
519     PrintDebug("   ==> FS\n");
520     print_vmcs_field(VMCS_GUEST_FS_SELECTOR);
521     print_vmcs_field(VMCS_GUEST_FS_BASE);
522     print_vmcs_field(VMCS_GUEST_FS_LIMIT);
523     print_vmcs_field(VMCS_GUEST_FS_ACCESS);
524
525     PrintDebug("   ==> GS\n");
526     print_vmcs_field(VMCS_GUEST_GS_SELECTOR);
527     print_vmcs_field(VMCS_GUEST_GS_BASE);
528     print_vmcs_field(VMCS_GUEST_GS_LIMIT);
529     print_vmcs_field(VMCS_GUEST_GS_ACCESS);
530
531     PrintDebug("   ==> LDTR\n");
532     print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR);
533     print_vmcs_field(VMCS_GUEST_LDTR_BASE);
534     print_vmcs_field(VMCS_GUEST_LDTR_LIMIT);
535     print_vmcs_field(VMCS_GUEST_LDTR_ACCESS);
536
537     PrintDebug("   ==> TR\n");
538     print_vmcs_field(VMCS_GUEST_TR_SELECTOR);
539     print_vmcs_field(VMCS_GUEST_TR_BASE);
540     print_vmcs_field(VMCS_GUEST_TR_LIMIT);
541     print_vmcs_field(VMCS_GUEST_TR_ACCESS);
542
543     PrintDebug("   ==> GDTR\n");
544     print_vmcs_field(VMCS_GUEST_GDTR_BASE);
545     print_vmcs_field(VMCS_GUEST_GDTR_LIMIT);
546
547     PrintDebug("   ==> IDTR\n");
548     print_vmcs_field(VMCS_GUEST_IDTR_BASE);
549     print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
550
551
552 }
553
554
555
556
557 static void print_guest_state()
558 {
559     PrintDebug("VMCS_GUEST_STATE\n");
560     print_vmcs_field(VMCS_GUEST_RIP);
561     print_vmcs_field(VMCS_GUEST_RSP);
562     print_vmcs_field(VMCS_GUEST_RFLAGS);
563     print_vmcs_field(VMCS_GUEST_CR0);
564     print_vmcs_field(VMCS_GUEST_CR3);
565     print_vmcs_field(VMCS_GUEST_CR4);
566     print_vmcs_field(VMCS_GUEST_DR7);
567
568     // if save IA32_EFER
569     print_vmcs_field(VMCS_GUEST_EFER);
570 #ifdef __V3_32BIT__
571     print_vmcs_field(VMCS_GUEST_EFER_HIGH);
572 #endif
573
574
575     PrintDebug("\n");
576
577     print_vmcs_segments();
578
579     PrintDebug("\n");
580
581     print_vmcs_field(VMCS_GUEST_DBG_CTL);
582 #ifdef __V3_32BIT__
583     print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH);
584 #endif
585     print_vmcs_field(VMCS_GUEST_SYSENTER_CS);
586     print_vmcs_field(VMCS_GUEST_SYSENTER_ESP);
587     print_vmcs_field(VMCS_GUEST_SYSENTER_EIP);
588
589
590     // if save IA32_PAT
591     print_vmcs_field(VMCS_GUEST_PAT);
592 #ifdef __V3_32BIT__
593     print_vmcs_field(VMCS_GUEST_PAT_HIGH);
594 #endif
595
596     //if load  IA32_PERF_GLOBAL_CTRL
597     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL);
598 #ifdef __V3_32BIT__
599     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH);
600 #endif
601
602     print_vmcs_field(VMCS_GUEST_SMBASE);
603
604
605
606
607     PrintDebug("GUEST_NON_REGISTER_STATE\n");
608
609     print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
610     print_vmcs_field(VMCS_GUEST_INT_STATE);
611     print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
612
613     // if VMX preempt timer
614     print_vmcs_field(VMCS_PREEMPT_TIMER);
615
616 }
617        
618 static void print_host_state()
619 {
620     PrintDebug("VMCS_HOST_STATE\n");
621
622     print_vmcs_field(VMCS_HOST_RIP);
623     print_vmcs_field(VMCS_HOST_RSP);
624     print_vmcs_field(VMCS_HOST_CR0);
625     print_vmcs_field(VMCS_HOST_CR3);
626     print_vmcs_field(VMCS_HOST_CR4);
627     
628
629
630     // if load IA32_EFER
631     print_vmcs_field(VMCS_HOST_EFER);
632 #ifdef __V3_32BIT__
633     print_vmcs_field(VMCS_HOST_EFER_HIGH);
634 #endif
635
636
637     PrintDebug("\n");
638     print_vmcs_field(VMCS_HOST_CS_SELECTOR);
639     print_vmcs_field(VMCS_HOST_SS_SELECTOR);
640     print_vmcs_field(VMCS_HOST_DS_SELECTOR);
641     print_vmcs_field(VMCS_HOST_ES_SELECTOR);
642     print_vmcs_field(VMCS_HOST_FS_SELECTOR);
643     print_vmcs_field(VMCS_HOST_GS_SELECTOR);
644     print_vmcs_field(VMCS_HOST_TR_SELECTOR);
645
646     PrintDebug("\n");
647     print_vmcs_field(VMCS_HOST_FS_BASE);
648     print_vmcs_field(VMCS_HOST_GS_BASE);
649     print_vmcs_field(VMCS_HOST_TR_BASE);
650     print_vmcs_field(VMCS_HOST_GDTR_BASE);
651     print_vmcs_field(VMCS_HOST_IDTR_BASE);
652
653     PrintDebug("\n");
654     print_vmcs_field(VMCS_HOST_SYSENTER_CS);
655     print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
656     print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
657
658
659     // if load IA32_PAT
660     print_vmcs_field(VMCS_HOST_PAT);
661 #ifdef __V3_32BIT__
662     print_vmcs_field(VMCS_HOST_PAT_HIGH);
663 #endif
664
665     // if load IA32_PERF_GLOBAL_CTRL
666     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL);
667 #ifdef __V3_32BIT__
668     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH);
669 #endif
670 }
671
672
673 static void print_exec_ctrls() {
674     PrintDebug("VMCS_EXEC_CTRL_FIELDS\n");
675     print_vmcs_field(VMCS_PIN_CTRLS);
676     print_vmcs_field(VMCS_PROC_CTRLS);
677     
678     // if activate secondary controls
679     print_vmcs_field(VMCS_SEC_PROC_CTRLS);
680     
681     print_vmcs_field(VMCS_EXCP_BITMAP);
682     print_vmcs_field(VMCS_PG_FAULT_ERR_MASK);
683     print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH);
684
685     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR);
686 #ifdef __V3_32BIT__
687     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH);
688 #endif
689
690     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR);
691 #ifdef __V3_32BIT__
692     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH);
693 #endif
694
695     print_vmcs_field(VMCS_TSC_OFFSET);
696 #ifdef __V3_32BIT__
697     print_vmcs_field(VMCS_TSC_OFFSET_HIGH);
698 #endif
699
700     PrintDebug("\n");
701
702     print_vmcs_field(VMCS_CR0_MASK);
703     print_vmcs_field(VMCS_CR0_READ_SHDW);
704     print_vmcs_field(VMCS_CR4_MASK);
705     print_vmcs_field(VMCS_CR4_READ_SHDW);
706
707     print_vmcs_field(VMCS_CR3_TGT_CNT);
708     print_vmcs_field(VMCS_CR3_TGT_VAL_0);
709     print_vmcs_field(VMCS_CR3_TGT_VAL_1);
710     print_vmcs_field(VMCS_CR3_TGT_VAL_2);
711     print_vmcs_field(VMCS_CR3_TGT_VAL_3);
712
713     // Check max number of CR3 targets... may continue...
714
715
716     PrintDebug("\n");
717
718     // if virtualize apic accesses
719     print_vmcs_field(VMCS_APIC_ACCESS_ADDR);    
720 #ifdef __V3_32BIT__
721     print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH);
722 #endif
723
724     // if use tpr shadow
725     print_vmcs_field(VMCS_VAPIC_ADDR);    
726 #ifdef __V3_32BIT__
727     print_vmcs_field(VMCS_VAPIC_ADDR_HIGH);
728 #endif
729
730     // if use tpr shadow
731     print_vmcs_field(VMCS_TPR_THRESHOLD);
732
733
734     // if use MSR bitmaps
735     print_vmcs_field(VMCS_MSR_BITMAP);
736 #ifdef __V3_32BIT__
737     print_vmcs_field(VMCS_MSR_BITMAP_HIGH);
738 #endif
739
740     print_vmcs_field(VMCS_EXEC_PTR);
741 #ifdef __V3_32BIT__
742     print_vmcs_field(VMCS_EXEC_PTR_HIGH);
743 #endif
744
745
746 }
747
748 static void print_ept_state() {
749     V3_Print("VMCS EPT INFO\n");
750
751     // if enable vpid
752     print_vmcs_field(VMCS_VPID);
753
754     print_vmcs_field(VMCS_EPT_PTR);
755 #ifdef __V3_32BIT__
756     print_vmcs_field(VMCS_EPT_PTR_HIGH);
757 #endif
758
759     print_vmcs_field(VMCS_GUEST_PHYS_ADDR);
760 #ifdef __V3_32BIT__
761     print_vmcs_field(VMCS_GUEST_PHYS_ADDR_HIGH);
762 #endif
763
764
765
766     print_vmcs_field(VMCS_GUEST_PDPTE0);
767 #ifdef __V3_32BIT__
768     print_vmcs_field(VMCS_GUEST_PDPTE0_HIGH);
769 #endif
770
771     print_vmcs_field(VMCS_GUEST_PDPTE1);
772 #ifdef __V3_32BIT__
773     print_vmcs_field(VMCS_GUEST_PDPTE1_HIGH);
774 #endif
775
776     print_vmcs_field(VMCS_GUEST_PDPTE2);
777 #ifdef __V3_32BIT__
778     print_vmcs_field(VMCS_GUEST_PDPTE2_HIGH);
779 #endif
780
781     print_vmcs_field(VMCS_GUEST_PDPTE3);
782 #ifdef __V3_32BIT__
783     print_vmcs_field(VMCS_GUEST_PDPTE3_HIGH);
784 #endif
785
786
787
788 }
789
790
791 static void print_exit_ctrls() {
792     PrintDebug("VMCS_EXIT_CTRLS\n");
793
794     print_vmcs_field(VMCS_EXIT_CTRLS);
795
796
797     print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT);
798     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR);
799 #ifdef __V3_32BIT__
800     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH);
801 #endif
802
803     print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT);
804     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR);
805 #ifdef __V3_32BIT__
806     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH);
807 #endif
808
809
810     // if pause loop exiting
811     print_vmcs_field(VMCS_PLE_GAP);
812     print_vmcs_field(VMCS_PLE_WINDOW);
813
814 }
815
816
817 static void print_entry_ctrls() {
818     PrintDebug("VMCS_ENTRY_CTRLS\n");
819     
820     print_vmcs_field(VMCS_ENTRY_CTRLS);
821
822     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT);
823     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR);
824 #ifdef __V3_32BIT__
825     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH);
826 #endif
827
828     print_vmcs_field(VMCS_ENTRY_INT_INFO);
829     print_vmcs_field(VMCS_ENTRY_EXCP_ERR);
830     print_vmcs_field(VMCS_ENTRY_INSTR_LEN);
831
832
833 }
834
835
836 static void print_exit_info() {
837     PrintDebug("VMCS_EXIT_INFO\n");
838
839     print_vmcs_field(VMCS_EXIT_REASON);
840     print_vmcs_field(VMCS_EXIT_QUAL);
841
842     print_vmcs_field(VMCS_EXIT_INT_INFO);
843     print_vmcs_field(VMCS_EXIT_INT_ERR);
844
845     print_vmcs_field(VMCS_IDT_VECTOR_INFO);
846     print_vmcs_field(VMCS_IDT_VECTOR_ERR);
847
848     print_vmcs_field(VMCS_EXIT_INSTR_LEN);
849
850     print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
851     print_vmcs_field(VMCS_EXIT_INSTR_INFO);
852
853     print_vmcs_field(VMCS_IO_RCX);
854     print_vmcs_field(VMCS_IO_RSI);
855     print_vmcs_field(VMCS_IO_RDI);
856     print_vmcs_field(VMCS_IO_RIP);
857
858
859     print_vmcs_field(VMCS_INSTR_ERR);
860 }
861
862 void v3_print_vmcs() {
863
864     print_vmcs_field(VMCS_LINK_PTR);
865 #ifdef __V3_32BIT__
866     print_vmcs_field(VMCS_LINK_PTR_HIGH);
867 #endif
868
869     print_guest_state();
870     print_host_state();
871
872     print_ept_state();
873
874     print_exec_ctrls();
875     print_exit_ctrls();
876     print_entry_ctrls();
877     print_exit_info();
878
879 }
880
881
882 /*
883  * Returns the field length in bytes
884  *   It doesn't get much uglier than this... Thanks Intel
885  */
886 int v3_vmcs_get_field_len(vmcs_field_t field) {
887     struct vmcs_field_encoding * enc = (struct vmcs_field_encoding *)&field;
888
889     switch (enc->width)  {
890         case 0:
891             return 2;
892         case 1: {
893             if (enc->access_type == 1) {
894                 return 4;
895             } else {
896                 return sizeof(addr_t);
897             }
898         }
899         case 2:
900             return 4;
901         case 3:
902             return sizeof(addr_t);
903         default:
904             PrintError("Invalid VMCS field: 0x%x\n", field);
905             return -1;
906     }
907 }
908
909
910
911
912
913
914
915
916
917
918
919 static const char VMCS_VPID_STR[] = "VPID";
920 static const char VMCS_GUEST_ES_SELECTOR_STR[] = "GUEST_ES_SELECTOR";
921 static const char VMCS_GUEST_CS_SELECTOR_STR[] = "GUEST_CS_SELECTOR";
922 static const char VMCS_GUEST_SS_SELECTOR_STR[] = "GUEST_SS_SELECTOR";
923 static const char VMCS_GUEST_DS_SELECTOR_STR[] = "GUEST_DS_SELECTOR";
924 static const char VMCS_GUEST_FS_SELECTOR_STR[] = "GUEST_FS_SELECTOR";
925 static const char VMCS_GUEST_GS_SELECTOR_STR[] = "GUEST_GS_SELECTOR";
926 static const char VMCS_GUEST_LDTR_SELECTOR_STR[] = "GUEST_LDTR_SELECTOR";
927 static const char VMCS_GUEST_TR_SELECTOR_STR[] = "GUEST_TR_SELECTOR";
928 static const char VMCS_HOST_ES_SELECTOR_STR[] = "HOST_ES_SELECTOR";
929 static const char VMCS_HOST_CS_SELECTOR_STR[] = "HOST_CS_SELECTOR";
930 static const char VMCS_HOST_SS_SELECTOR_STR[] = "HOST_SS_SELECTOR";
931 static const char VMCS_HOST_DS_SELECTOR_STR[] = "HOST_DS_SELECTOR";
932 static const char VMCS_HOST_FS_SELECTOR_STR[] = "HOST_FS_SELECTOR";
933 static const char VMCS_HOST_GS_SELECTOR_STR[] = "HOST_GS_SELECTOR";
934 static const char VMCS_HOST_TR_SELECTOR_STR[] = "HOST_TR_SELECTOR";
935 static const char VMCS_IO_BITMAP_A_ADDR_STR[] = "IO_BITMAP_A_ADDR";
936 static const char VMCS_IO_BITMAP_A_ADDR_HIGH_STR[] = "IO_BITMAP_A_ADDR_HIGH";
937 static const char VMCS_IO_BITMAP_B_ADDR_STR[] = "IO_BITMAP_B_ADDR";
938 static const char VMCS_IO_BITMAP_B_ADDR_HIGH_STR[] = "IO_BITMAP_B_ADDR_HIGH";
939 static const char VMCS_MSR_BITMAP_STR[] = "MSR_BITMAPS";
940 static const char VMCS_MSR_BITMAP_HIGH_STR[] = "MSR_BITMAPS_HIGH";
941 static const char VMCS_EXIT_MSR_STORE_ADDR_STR[] = "EXIT_MSR_STORE_ADDR";
942 static const char VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR[] = "EXIT_MSR_STORE_ADDR_HIGH";
943 static const char VMCS_EXIT_MSR_LOAD_ADDR_STR[] = "EXIT_MSR_LOAD_ADDR";
944 static const char VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR[] = "EXIT_MSR_LOAD_ADDR_HIGH";
945 static const char VMCS_ENTRY_MSR_LOAD_ADDR_STR[] = "ENTRY_MSR_LOAD_ADDR";
946 static const char VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR[] = "ENTRY_MSR_LOAD_ADDR_HIGH";
947 static const char VMCS_EXEC_PTR_STR[] = "VMCS_EXEC_PTR";
948 static const char VMCS_EXEC_PTR_HIGH_STR[] = "VMCS_EXEC_PTR_HIGH";
949 static const char VMCS_TSC_OFFSET_STR[] = "TSC_OFFSET";
950 static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH";
951 static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR";
952 static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH";
953 static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR";
954 static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH";
955 static const char VMCS_EPT_PTR_STR[] = "VMCS_EPT_PTR";
956 static const char VMCS_EPT_PTR_HIGH_STR[] = "VMCS_EPT_PTR_HIGH";
957 static const char VMCS_GUEST_PHYS_ADDR_STR[] = "VMCS_GUEST_PHYS_ADDR";
958 static const char VMCS_GUEST_PHYS_ADDR_HIGH_STR[] = "VMCS_GUEST_PHYS_ADDR_HIGH";
959 static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR";
960 static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH";
961 static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL";
962 static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH";
963 static const char VMCS_GUEST_PAT_STR[] = "GUEST_PAT";
964 static const char VMCS_GUEST_PAT_HIGH_STR[] = "GUEST_PAT_HIGH";
965 static const char VMCS_GUEST_EFER_STR[] = "GUEST_EFER";
966 static const char VMCS_GUEST_EFER_HIGH_STR[] = "GUEST_EFER_HIGH";
967 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL";
968 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH";
969 static const char VMCS_GUEST_PDPTE0_STR[] = "GUEST_PDPTE0";
970 static const char VMCS_GUEST_PDPTE0_HIGH_STR[] = "GUEST_PDPTE0_HIGH";
971 static const char VMCS_GUEST_PDPTE1_STR[] = "GUEST_PDPTE1";
972 static const char VMCS_GUEST_PDPTE1_HIGH_STR[] = "GUEST_PDPTE1_HIGH";
973 static const char VMCS_GUEST_PDPTE2_STR[] = "GUEST_PDPTE2";
974 static const char VMCS_GUEST_PDPTE2_HIGH_STR[] = "GUEST_PDPTE2_HIGH";
975 static const char VMCS_GUEST_PDPTE3_STR[] = "GUEST_PDPTE3";
976 static const char VMCS_GUEST_PDPTE3_HIGH_STR[] = "GUEST_PDPTE3_HIGH";
977 static const char VMCS_HOST_PAT_STR[] = "HOST_PAT";
978 static const char VMCS_HOST_PAT_HIGH_STR[] = "HOST_PAT_HIGH";
979 static const char VMCS_HOST_EFER_STR[] = "VMCS_HOST_EFER";
980 static const char VMCS_HOST_EFER_HIGH_STR[] = "VMCS_HOST_EFER_HIGH";
981 static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL";
982 static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH";
983 static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS";
984 static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS";
985 static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP";
986 static const char VMCS_PG_FAULT_ERR_MASK_STR[] = "PAGE_FAULT_ERROR_MASK";
987 static const char VMCS_PG_FAULT_ERR_MATCH_STR[] = "PAGE_FAULT_ERROR_MATCH";
988 static const char VMCS_CR3_TGT_CNT_STR[] = "CR3_TARGET_COUNT";
989 static const char VMCS_EXIT_CTRLS_STR[] = "VM_EXIT_CTRLS";
990 static const char VMCS_EXIT_MSR_STORE_CNT_STR[] = "VM_EXIT_MSR_STORE_COUNT";
991 static const char VMCS_EXIT_MSR_LOAD_CNT_STR[] = "VM_EXIT_MSR_LOAD_COUNT";
992 static const char VMCS_ENTRY_CTRLS_STR[] = "VM_ENTRY_CTRLS";
993 static const char VMCS_ENTRY_MSR_LOAD_CNT_STR[] = "VM_ENTRY_MSR_LOAD_COUNT";
994 static const char VMCS_ENTRY_INT_INFO_STR[] = "VM_ENTRY_INT_INFO_FIELD";
995 static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR";
996 static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH";
997 static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD";
998 static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS";
999 static const char VMCS_PLE_GAP_STR[] = "PLE_GAP";
1000 static const char VMCS_PLE_WINDOW_STR[] = "PLE_WINDOW";
1001 static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR";
1002 static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON";
1003 static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO";
1004 static const char VMCS_EXIT_INT_ERR_STR[] = "VM_EXIT_INT_ERROR";
1005 static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO";
1006 static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR";
1007 static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH";
1008 static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
1009 static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT";
1010 static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT";
1011 static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT";
1012 static const char VMCS_GUEST_DS_LIMIT_STR[] = "GUEST_DS_LIMIT";
1013 static const char VMCS_GUEST_FS_LIMIT_STR[] = "GUEST_FS_LIMIT";
1014 static const char VMCS_GUEST_GS_LIMIT_STR[] = "GUEST_GS_LIMIT";
1015 static const char VMCS_GUEST_LDTR_LIMIT_STR[] = "GUEST_LDTR_LIMIT";
1016 static const char VMCS_GUEST_TR_LIMIT_STR[] = "GUEST_TR_LIMIT";
1017 static const char VMCS_GUEST_GDTR_LIMIT_STR[] = "GUEST_GDTR_LIMIT";
1018 static const char VMCS_GUEST_IDTR_LIMIT_STR[] = "GUEST_IDTR_LIMIT";
1019 static const char VMCS_GUEST_ES_ACCESS_STR[] = "GUEST_ES_ACCESS";
1020 static const char VMCS_GUEST_CS_ACCESS_STR[] = "GUEST_CS_ACCESS";
1021 static const char VMCS_GUEST_SS_ACCESS_STR[] = "GUEST_SS_ACCESS";
1022 static const char VMCS_GUEST_DS_ACCESS_STR[] = "GUEST_DS_ACCESS";
1023 static const char VMCS_GUEST_FS_ACCESS_STR[] = "GUEST_FS_ACCESS";
1024 static const char VMCS_GUEST_GS_ACCESS_STR[] = "GUEST_GS_ACCESS";
1025 static const char VMCS_GUEST_LDTR_ACCESS_STR[] = "GUEST_LDTR_ACCESS";
1026 static const char VMCS_GUEST_TR_ACCESS_STR[] = "GUEST_TR_ACCESS";
1027 static const char VMCS_GUEST_INT_STATE_STR[] = "GUEST_INT_STATE";
1028 static const char VMCS_GUEST_ACTIVITY_STATE_STR[] = "GUEST_ACTIVITY_STATE";
1029 static const char VMCS_GUEST_SMBASE_STR[] = "GUEST_SMBASE";
1030 static const char VMCS_GUEST_SYSENTER_CS_STR[] = "GUEST_SYSENTER_CS";
1031 static const char VMCS_PREEMPT_TIMER_STR[] = "PREEMPT_TIMER";
1032 static const char VMCS_HOST_SYSENTER_CS_STR[] = "HOST_SYSENTER_CS";
1033 static const char VMCS_CR0_MASK_STR[] = "CR0_GUEST_HOST_MASK";
1034 static const char VMCS_CR4_MASK_STR[] = "CR4_GUEST_HOST_MASK";
1035 static const char VMCS_CR0_READ_SHDW_STR[] = "CR0_READ_SHADOW";
1036 static const char VMCS_CR4_READ_SHDW_STR[] = "CR4_READ_SHADOW";
1037 static const char VMCS_CR3_TGT_VAL_0_STR[] = "CR3_TARGET_VALUE_0";
1038 static const char VMCS_CR3_TGT_VAL_1_STR[] = "CR3_TARGET_VALUE_1";
1039 static const char VMCS_CR3_TGT_VAL_2_STR[] = "CR3_TARGET_VALUE_2";
1040 static const char VMCS_CR3_TGT_VAL_3_STR[] = "CR3_TARGET_VALUE_3";
1041 static const char VMCS_EXIT_QUAL_STR[] = "EXIT_QUALIFICATION";
1042 static const char VMCS_IO_RCX_STR[] = "IO_RCX";
1043 static const char VMCS_IO_RSI_STR[] = "IO_RSI";
1044 static const char VMCS_IO_RDI_STR[] = "IO_RDI";
1045 static const char VMCS_IO_RIP_STR[] = "IO_RIP";
1046 static const char VMCS_GUEST_LINEAR_ADDR_STR[] = "GUEST_LINEAR_ADDR";
1047 static const char VMCS_GUEST_CR0_STR[] = "GUEST_CR0";
1048 static const char VMCS_GUEST_CR3_STR[] = "GUEST_CR3";
1049 static const char VMCS_GUEST_CR4_STR[] = "GUEST_CR4";
1050 static const char VMCS_GUEST_ES_BASE_STR[] = "GUEST_ES_BASE";
1051 static const char VMCS_GUEST_CS_BASE_STR[] = "GUEST_CS_BASE";
1052 static const char VMCS_GUEST_SS_BASE_STR[] = "GUEST_SS_BASE";
1053 static const char VMCS_GUEST_DS_BASE_STR[] = "GUEST_DS_BASE";
1054 static const char VMCS_GUEST_FS_BASE_STR[] = "GUEST_FS_BASE";
1055 static const char VMCS_GUEST_GS_BASE_STR[] = "GUEST_GS_BASE";
1056 static const char VMCS_GUEST_LDTR_BASE_STR[] = "GUEST_LDTR_BASE";
1057 static const char VMCS_GUEST_TR_BASE_STR[] = "GUEST_TR_BASE";
1058 static const char VMCS_GUEST_GDTR_BASE_STR[] = "GUEST_GDTR_BASE";
1059 static const char VMCS_GUEST_IDTR_BASE_STR[] = "GUEST_IDTR_BASE";
1060 static const char VMCS_GUEST_DR7_STR[] = "GUEST_DR7";
1061 static const char VMCS_GUEST_RSP_STR[] = "GUEST_RSP";
1062 static const char VMCS_GUEST_RIP_STR[] = "GUEST_RIP";
1063 static const char VMCS_GUEST_RFLAGS_STR[] = "GUEST_RFLAGS";
1064 static const char VMCS_GUEST_PENDING_DBG_EXCP_STR[] = "GUEST_PENDING_DEBUG_EXCS";
1065 static const char VMCS_GUEST_SYSENTER_ESP_STR[] = "GUEST_SYSENTER_ESP";
1066 static const char VMCS_GUEST_SYSENTER_EIP_STR[] = "GUEST_SYSENTER_EIP";
1067 static const char VMCS_HOST_CR0_STR[] = "HOST_CR0";
1068 static const char VMCS_HOST_CR3_STR[] = "HOST_CR3";
1069 static const char VMCS_HOST_CR4_STR[] = "HOST_CR4";
1070 static const char VMCS_HOST_FS_BASE_STR[] = "HOST_FS_BASE";
1071 static const char VMCS_HOST_GS_BASE_STR[] = "HOST_GS_BASE";
1072 static const char VMCS_HOST_TR_BASE_STR[] = "HOST_TR_BASE";
1073 static const char VMCS_HOST_GDTR_BASE_STR[] = "HOST_GDTR_BASE";
1074 static const char VMCS_HOST_IDTR_BASE_STR[] = "HOST_IDTR_BASE";
1075 static const char VMCS_HOST_SYSENTER_ESP_STR[] = "HOST_SYSENTER_ESP";
1076 static const char VMCS_HOST_SYSENTER_EIP_STR[] = "HOST_SYSENTER_EIP";
1077 static const char VMCS_HOST_RSP_STR[] = "HOST_RSP";
1078 static const char VMCS_HOST_RIP_STR[] = "HOST_RIP";
1079
1080
1081
1082 const char * v3_vmcs_field_to_str(vmcs_field_t field) {   
1083     switch (field) {
1084         case VMCS_VPID:
1085             return VMCS_VPID_STR;
1086         case VMCS_GUEST_ES_SELECTOR:
1087             return VMCS_GUEST_ES_SELECTOR_STR;
1088         case VMCS_GUEST_CS_SELECTOR:
1089             return VMCS_GUEST_CS_SELECTOR_STR;
1090         case VMCS_GUEST_SS_SELECTOR:
1091             return VMCS_GUEST_SS_SELECTOR_STR;
1092         case VMCS_GUEST_DS_SELECTOR:
1093             return VMCS_GUEST_DS_SELECTOR_STR;
1094         case VMCS_GUEST_FS_SELECTOR:
1095             return VMCS_GUEST_FS_SELECTOR_STR;
1096         case VMCS_GUEST_GS_SELECTOR:
1097             return VMCS_GUEST_GS_SELECTOR_STR;
1098         case VMCS_GUEST_LDTR_SELECTOR:
1099             return VMCS_GUEST_LDTR_SELECTOR_STR;
1100         case VMCS_GUEST_TR_SELECTOR:
1101             return VMCS_GUEST_TR_SELECTOR_STR;
1102         case VMCS_HOST_ES_SELECTOR:
1103             return VMCS_HOST_ES_SELECTOR_STR;
1104         case VMCS_HOST_CS_SELECTOR:
1105             return VMCS_HOST_CS_SELECTOR_STR;
1106         case VMCS_HOST_SS_SELECTOR:
1107             return VMCS_HOST_SS_SELECTOR_STR;
1108         case VMCS_HOST_DS_SELECTOR:
1109             return VMCS_HOST_DS_SELECTOR_STR;
1110         case VMCS_HOST_FS_SELECTOR:
1111             return VMCS_HOST_FS_SELECTOR_STR;
1112         case VMCS_HOST_GS_SELECTOR:
1113             return VMCS_HOST_GS_SELECTOR_STR;
1114         case VMCS_HOST_TR_SELECTOR:
1115             return VMCS_HOST_TR_SELECTOR_STR;
1116         case VMCS_IO_BITMAP_A_ADDR:
1117             return VMCS_IO_BITMAP_A_ADDR_STR;
1118         case VMCS_IO_BITMAP_A_ADDR_HIGH:
1119             return VMCS_IO_BITMAP_A_ADDR_HIGH_STR;
1120         case VMCS_IO_BITMAP_B_ADDR:
1121             return VMCS_IO_BITMAP_B_ADDR_STR;
1122         case VMCS_IO_BITMAP_B_ADDR_HIGH:
1123             return VMCS_IO_BITMAP_B_ADDR_HIGH_STR;
1124         case VMCS_MSR_BITMAP:
1125             return VMCS_MSR_BITMAP_STR;
1126         case VMCS_MSR_BITMAP_HIGH:
1127             return VMCS_MSR_BITMAP_HIGH_STR;
1128         case VMCS_EXIT_MSR_STORE_ADDR:
1129             return VMCS_EXIT_MSR_STORE_ADDR_STR;
1130         case VMCS_EXIT_MSR_STORE_ADDR_HIGH:
1131             return VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR;
1132         case VMCS_EXIT_MSR_LOAD_ADDR:
1133             return VMCS_EXIT_MSR_LOAD_ADDR_STR;
1134         case VMCS_EXIT_MSR_LOAD_ADDR_HIGH:
1135             return VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR;
1136         case VMCS_ENTRY_MSR_LOAD_ADDR:
1137             return VMCS_ENTRY_MSR_LOAD_ADDR_STR;
1138         case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH:
1139             return VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR;
1140         case VMCS_EXEC_PTR:
1141             return VMCS_EXEC_PTR_STR;
1142         case VMCS_EXEC_PTR_HIGH:
1143             return VMCS_EXEC_PTR_HIGH_STR;
1144         case VMCS_TSC_OFFSET:
1145             return VMCS_TSC_OFFSET_STR;
1146         case VMCS_TSC_OFFSET_HIGH:
1147             return VMCS_TSC_OFFSET_HIGH_STR;
1148         case VMCS_VAPIC_ADDR:
1149             return VMCS_VAPIC_ADDR_STR;
1150         case VMCS_VAPIC_ADDR_HIGH:
1151             return VMCS_VAPIC_ADDR_HIGH_STR;
1152         case VMCS_APIC_ACCESS_ADDR:
1153             return VMCS_APIC_ACCESS_ADDR_STR;
1154         case VMCS_APIC_ACCESS_ADDR_HIGH:
1155             return VMCS_APIC_ACCESS_ADDR_HIGH_STR;
1156         case VMCS_EPT_PTR:
1157             return VMCS_EPT_PTR_STR;
1158         case VMCS_EPT_PTR_HIGH:
1159             return VMCS_EPT_PTR_HIGH_STR;
1160         case VMCS_GUEST_PHYS_ADDR:
1161             return VMCS_GUEST_PHYS_ADDR_STR;
1162         case VMCS_GUEST_PHYS_ADDR_HIGH:
1163             return VMCS_GUEST_PHYS_ADDR_HIGH_STR;
1164         case VMCS_LINK_PTR:
1165             return VMCS_LINK_PTR_STR;
1166         case VMCS_LINK_PTR_HIGH:
1167             return VMCS_LINK_PTR_HIGH_STR;
1168         case VMCS_GUEST_DBG_CTL:
1169             return VMCS_GUEST_DBG_CTL_STR;
1170         case VMCS_GUEST_DBG_CTL_HIGH:
1171             return VMCS_GUEST_DBG_CTL_HIGH_STR;
1172         case VMCS_GUEST_PAT:
1173             return VMCS_GUEST_PAT_STR;
1174         case VMCS_GUEST_PAT_HIGH:
1175             return VMCS_GUEST_PAT_HIGH_STR;
1176         case VMCS_GUEST_EFER:
1177             return VMCS_GUEST_EFER_STR;
1178         case VMCS_GUEST_EFER_HIGH:
1179             return VMCS_GUEST_EFER_HIGH_STR;
1180         case VMCS_GUEST_PERF_GLOBAL_CTRL:
1181             return VMCS_GUEST_PERF_GLOBAL_CTRL_STR;
1182         case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
1183             return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR;
1184         case VMCS_GUEST_PDPTE0:
1185             return VMCS_GUEST_PDPTE0_STR;
1186         case VMCS_GUEST_PDPTE0_HIGH:
1187             return VMCS_GUEST_PDPTE0_HIGH_STR;
1188         case VMCS_GUEST_PDPTE1:
1189             return VMCS_GUEST_PDPTE1_STR;
1190         case VMCS_GUEST_PDPTE1_HIGH:
1191             return VMCS_GUEST_PDPTE1_HIGH_STR;
1192         case VMCS_GUEST_PDPTE2:
1193             return VMCS_GUEST_PDPTE2_STR;
1194         case VMCS_GUEST_PDPTE2_HIGH:
1195             return VMCS_GUEST_PDPTE2_HIGH_STR;
1196         case VMCS_GUEST_PDPTE3:
1197             return VMCS_GUEST_PDPTE3_STR;
1198         case VMCS_GUEST_PDPTE3_HIGH:
1199             return VMCS_GUEST_PDPTE3_HIGH_STR;
1200         case VMCS_HOST_PAT:
1201             return VMCS_HOST_PAT_STR;
1202         case VMCS_HOST_PAT_HIGH:
1203             return VMCS_HOST_PAT_HIGH_STR;
1204         case VMCS_HOST_EFER:
1205             return VMCS_HOST_EFER_STR;
1206         case VMCS_HOST_EFER_HIGH:
1207             return VMCS_HOST_EFER_HIGH_STR;
1208         case VMCS_HOST_PERF_GLOBAL_CTRL:
1209             return VMCS_HOST_PERF_GLOBAL_CTRL_STR;
1210         case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
1211             return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR;
1212         case VMCS_PIN_CTRLS:
1213             return VMCS_PIN_CTRLS_STR;
1214         case VMCS_PROC_CTRLS:
1215             return VMCS_PROC_CTRLS_STR;
1216         case VMCS_EXCP_BITMAP:
1217             return VMCS_EXCP_BITMAP_STR;
1218         case VMCS_PG_FAULT_ERR_MASK:
1219             return VMCS_PG_FAULT_ERR_MASK_STR;
1220         case VMCS_PG_FAULT_ERR_MATCH:
1221             return VMCS_PG_FAULT_ERR_MATCH_STR;
1222         case VMCS_CR3_TGT_CNT:
1223             return VMCS_CR3_TGT_CNT_STR;
1224         case VMCS_EXIT_CTRLS:
1225             return VMCS_EXIT_CTRLS_STR;
1226         case VMCS_EXIT_MSR_STORE_CNT:
1227             return VMCS_EXIT_MSR_STORE_CNT_STR;
1228         case VMCS_EXIT_MSR_LOAD_CNT:
1229             return VMCS_EXIT_MSR_LOAD_CNT_STR;
1230         case VMCS_ENTRY_CTRLS:
1231             return VMCS_ENTRY_CTRLS_STR;
1232         case VMCS_ENTRY_MSR_LOAD_CNT:
1233             return VMCS_ENTRY_MSR_LOAD_CNT_STR;
1234         case VMCS_ENTRY_INT_INFO:
1235             return VMCS_ENTRY_INT_INFO_STR;
1236         case VMCS_ENTRY_EXCP_ERR:
1237             return VMCS_ENTRY_EXCP_ERR_STR;
1238         case VMCS_ENTRY_INSTR_LEN:
1239             return VMCS_ENTRY_INSTR_LEN_STR;
1240         case VMCS_TPR_THRESHOLD:
1241             return VMCS_TPR_THRESHOLD_STR;
1242         case VMCS_SEC_PROC_CTRLS:
1243             return VMCS_SEC_PROC_CTRLS_STR;
1244         case VMCS_PLE_GAP:
1245             return VMCS_PLE_GAP_STR;
1246         case VMCS_PLE_WINDOW:
1247             return VMCS_PLE_WINDOW_STR;
1248         case VMCS_INSTR_ERR:
1249             return VMCS_INSTR_ERR_STR;
1250         case VMCS_EXIT_REASON:
1251             return VMCS_EXIT_REASON_STR;
1252         case VMCS_EXIT_INT_INFO:
1253             return VMCS_EXIT_INT_INFO_STR;
1254         case VMCS_EXIT_INT_ERR:
1255             return VMCS_EXIT_INT_ERR_STR;
1256         case VMCS_IDT_VECTOR_INFO:
1257             return VMCS_IDT_VECTOR_INFO_STR;
1258         case VMCS_IDT_VECTOR_ERR:
1259             return VMCS_IDT_VECTOR_ERR_STR;
1260         case VMCS_EXIT_INSTR_LEN:
1261             return VMCS_EXIT_INSTR_LEN_STR;
1262         case VMCS_EXIT_INSTR_INFO:
1263             return VMCS_EXIT_INSTR_INFO_STR;
1264         case VMCS_GUEST_ES_LIMIT:
1265             return VMCS_GUEST_ES_LIMIT_STR;
1266         case VMCS_GUEST_CS_LIMIT:
1267             return VMCS_GUEST_CS_LIMIT_STR;
1268         case VMCS_GUEST_SS_LIMIT:
1269             return VMCS_GUEST_SS_LIMIT_STR;
1270         case VMCS_GUEST_DS_LIMIT:
1271             return VMCS_GUEST_DS_LIMIT_STR;
1272         case VMCS_GUEST_FS_LIMIT:
1273             return VMCS_GUEST_FS_LIMIT_STR;
1274         case VMCS_GUEST_GS_LIMIT:
1275             return VMCS_GUEST_GS_LIMIT_STR;
1276         case VMCS_GUEST_LDTR_LIMIT:
1277             return VMCS_GUEST_LDTR_LIMIT_STR;
1278         case VMCS_GUEST_TR_LIMIT:
1279             return VMCS_GUEST_TR_LIMIT_STR;
1280         case VMCS_GUEST_GDTR_LIMIT:
1281             return VMCS_GUEST_GDTR_LIMIT_STR;
1282         case VMCS_GUEST_IDTR_LIMIT:
1283             return VMCS_GUEST_IDTR_LIMIT_STR;
1284         case VMCS_GUEST_ES_ACCESS:
1285             return VMCS_GUEST_ES_ACCESS_STR;
1286         case VMCS_GUEST_CS_ACCESS:
1287             return VMCS_GUEST_CS_ACCESS_STR;
1288         case VMCS_GUEST_SS_ACCESS:
1289             return VMCS_GUEST_SS_ACCESS_STR;
1290         case VMCS_GUEST_DS_ACCESS:
1291             return VMCS_GUEST_DS_ACCESS_STR;
1292         case VMCS_GUEST_FS_ACCESS:
1293             return VMCS_GUEST_FS_ACCESS_STR;
1294         case VMCS_GUEST_GS_ACCESS:
1295             return VMCS_GUEST_GS_ACCESS_STR;
1296         case VMCS_GUEST_LDTR_ACCESS:
1297             return VMCS_GUEST_LDTR_ACCESS_STR;
1298         case VMCS_GUEST_TR_ACCESS:
1299             return VMCS_GUEST_TR_ACCESS_STR;
1300         case VMCS_GUEST_INT_STATE:
1301             return VMCS_GUEST_INT_STATE_STR;
1302         case VMCS_GUEST_ACTIVITY_STATE:
1303             return VMCS_GUEST_ACTIVITY_STATE_STR;
1304         case VMCS_GUEST_SMBASE:
1305             return VMCS_GUEST_SMBASE_STR;
1306         case VMCS_GUEST_SYSENTER_CS:
1307             return VMCS_GUEST_SYSENTER_CS_STR;
1308         case VMCS_PREEMPT_TIMER:
1309             return VMCS_PREEMPT_TIMER_STR;
1310         case VMCS_HOST_SYSENTER_CS:         
1311             return VMCS_HOST_SYSENTER_CS_STR;
1312         case VMCS_CR0_MASK:
1313             return VMCS_CR0_MASK_STR;
1314         case VMCS_CR4_MASK:
1315             return VMCS_CR4_MASK_STR;
1316         case VMCS_CR0_READ_SHDW:
1317             return VMCS_CR0_READ_SHDW_STR;
1318         case VMCS_CR4_READ_SHDW:
1319             return VMCS_CR4_READ_SHDW_STR;
1320         case VMCS_CR3_TGT_VAL_0:
1321             return VMCS_CR3_TGT_VAL_0_STR;
1322         case VMCS_CR3_TGT_VAL_1:
1323             return VMCS_CR3_TGT_VAL_1_STR;
1324         case VMCS_CR3_TGT_VAL_2:
1325             return VMCS_CR3_TGT_VAL_2_STR;
1326         case VMCS_CR3_TGT_VAL_3:
1327             return VMCS_CR3_TGT_VAL_3_STR;
1328         case VMCS_EXIT_QUAL:
1329             return VMCS_EXIT_QUAL_STR;
1330         case VMCS_IO_RCX:
1331             return VMCS_IO_RCX_STR;
1332         case VMCS_IO_RSI:
1333             return VMCS_IO_RSI_STR;
1334         case VMCS_IO_RDI:
1335             return VMCS_IO_RDI_STR;
1336         case VMCS_IO_RIP:
1337             return VMCS_IO_RIP_STR;
1338         case VMCS_GUEST_LINEAR_ADDR:
1339             return VMCS_GUEST_LINEAR_ADDR_STR;
1340         case VMCS_GUEST_CR0:
1341             return VMCS_GUEST_CR0_STR;
1342         case VMCS_GUEST_CR3:
1343             return VMCS_GUEST_CR3_STR;
1344         case VMCS_GUEST_CR4:
1345             return VMCS_GUEST_CR4_STR;
1346         case VMCS_GUEST_ES_BASE:
1347             return VMCS_GUEST_ES_BASE_STR;
1348         case VMCS_GUEST_CS_BASE:
1349             return VMCS_GUEST_CS_BASE_STR;
1350         case VMCS_GUEST_SS_BASE:
1351             return VMCS_GUEST_SS_BASE_STR;
1352         case VMCS_GUEST_DS_BASE:
1353             return VMCS_GUEST_DS_BASE_STR;
1354         case VMCS_GUEST_FS_BASE:
1355             return VMCS_GUEST_FS_BASE_STR;
1356         case VMCS_GUEST_GS_BASE:
1357             return VMCS_GUEST_GS_BASE_STR;
1358         case VMCS_GUEST_LDTR_BASE:
1359             return VMCS_GUEST_LDTR_BASE_STR;
1360         case VMCS_GUEST_TR_BASE:
1361             return VMCS_GUEST_TR_BASE_STR;
1362         case VMCS_GUEST_GDTR_BASE:
1363             return VMCS_GUEST_GDTR_BASE_STR;
1364         case VMCS_GUEST_IDTR_BASE:
1365             return VMCS_GUEST_IDTR_BASE_STR;
1366         case VMCS_GUEST_DR7:
1367             return VMCS_GUEST_DR7_STR;
1368         case VMCS_GUEST_RSP:
1369             return VMCS_GUEST_RSP_STR;
1370         case VMCS_GUEST_RIP:
1371             return VMCS_GUEST_RIP_STR;
1372         case VMCS_GUEST_RFLAGS:
1373             return VMCS_GUEST_RFLAGS_STR;
1374         case VMCS_GUEST_PENDING_DBG_EXCP:
1375             return VMCS_GUEST_PENDING_DBG_EXCP_STR;
1376         case VMCS_GUEST_SYSENTER_ESP:
1377             return VMCS_GUEST_SYSENTER_ESP_STR;
1378         case VMCS_GUEST_SYSENTER_EIP:
1379             return VMCS_GUEST_SYSENTER_EIP_STR;
1380         case VMCS_HOST_CR0:
1381             return VMCS_HOST_CR0_STR;
1382         case VMCS_HOST_CR3:
1383             return VMCS_HOST_CR3_STR;
1384         case VMCS_HOST_CR4:
1385             return VMCS_HOST_CR4_STR;
1386         case VMCS_HOST_FS_BASE:
1387             return VMCS_HOST_FS_BASE_STR;
1388         case VMCS_HOST_GS_BASE:
1389             return VMCS_HOST_GS_BASE_STR;
1390         case VMCS_HOST_TR_BASE:
1391             return VMCS_HOST_TR_BASE_STR;
1392         case VMCS_HOST_GDTR_BASE:
1393             return VMCS_HOST_GDTR_BASE_STR;
1394         case VMCS_HOST_IDTR_BASE:
1395             return VMCS_HOST_IDTR_BASE_STR;
1396         case VMCS_HOST_SYSENTER_ESP:
1397             return VMCS_HOST_SYSENTER_ESP_STR;
1398         case VMCS_HOST_SYSENTER_EIP:
1399             return VMCS_HOST_SYSENTER_EIP_STR;
1400         case VMCS_HOST_RSP:
1401             return VMCS_HOST_RSP_STR;
1402         case VMCS_HOST_RIP:
1403             return VMCS_HOST_RIP_STR;
1404         default:
1405             return NULL;
1406     }
1407 }
1408
1409
1410