palacios/src/palacios/svm.c

   1 /*
   2  * This file is part of the Palacios Virtual Machine Monitor developed
   3  * by the V3VEE Project with funding from the United States National
   4  * Science Foundation and the Department of Energy.
   5  *
   6  * The V3VEE Project is a joint project between Northwestern University
   7  * and the University of New Mexico.  You can find out more at
   8  * http://www.v3vee.org
   9  *
  10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
  11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
  12  * All rights reserved.
  13  *
  14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
  15  *
  16  * This is free software.  You are permitted to use,
  17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
  18  */
  19
  20
  21 #include <palacios/svm.h>
  22 #include <palacios/vmm.h>
  23
  24 #include <palacios/vmcb.h>
  25 #include <palacios/vmm_mem.h>
  26 #include <palacios/vmm_paging.h>
  27 #include <palacios/svm_handler.h>
  28
  29 #include <palacios/vmm_debug.h>
  30 #include <palacios/vm_guest_mem.h>
  31
  32 #include <palacios/vmm_decoder.h>
  33 #include <palacios/vmm_string.h>
  34 #include <palacios/vmm_lowlevel.h>
  35 #include <palacios/svm_msr.h>
  36
  37 #include <palacios/vmm_rbtree.h>
  38 #include <palacios/vmm_barrier.h>
  39
  40 #ifdef V3_CONFIG_CHECKPOINT
  41 #include <palacios/vmm_checkpoint.h>
  42 #endif
  43
  44 #include <palacios/vmm_direct_paging.h>
  45
  46 #include <palacios/vmm_ctrl_regs.h>
  47 #include <palacios/svm_io.h>
  48
  49 #include <palacios/vmm_sprintf.h>
  50
  51
  52 #ifndef V3_CONFIG_DEBUG_SVM
  53 #undef PrintDebug
  54 #define PrintDebug(fmt, args...)
  55 #endif
  56
  57
  58 uint32_t v3_last_exit;
  59
  60 // This is a global pointer to the host's VMCB
  61 static addr_t host_vmcbs[V3_CONFIG_MAX_CPUS] = { [0 ... V3_CONFIG_MAX_CPUS - 1] = 0};
  62
  63
  64
  65 extern void v3_stgi();
  66 extern void v3_clgi();
  67 //extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
  68 extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
  69
  70
  71 static vmcb_t * Allocate_VMCB() {
  72     vmcb_t * vmcb_page = NULL;
  73     addr_t vmcb_pa = (addr_t)V3_AllocPages(1);
  74
  75     if ((void *)vmcb_pa == NULL) {
  76         PrintError("Error allocating VMCB\n");
  77         return NULL;
  78     }
  79
  80     vmcb_page = (vmcb_t *)V3_VAddr((void *)vmcb_pa);
  81
  82     memset(vmcb_page, 0, 4096);
  83
  84     return vmcb_page;
  85 }
  86
  87
  88 static int v3_svm_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data)
  89 {
  90     int status;
  91
  92     // Call arch-independent handler
  93     if ((status = v3_handle_efer_write(core, msr, src, priv_data)) != 0) {
  94         return status;
  95     }
  96
  97     // SVM-specific code
  98     {
  99         // Ensure that hardware visible EFER.SVME bit is set (SVM Enable)
 100         struct efer_64 * hw_efer = (struct efer_64 *)&(core->ctrl_regs.efer);
 101         hw_efer->svme = 1;
 102     }
 103
 104     return 0;
 105 }
 106
 107
 108 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) {
 109     vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
 110     vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
 111     uint_t i;
 112
 113
 114     //
 115     ctrl_area->svm_instrs.VMRUN = 1;
 116     ctrl_area->svm_instrs.VMMCALL = 1;
 117     ctrl_area->svm_instrs.VMLOAD = 1;
 118     ctrl_area->svm_instrs.VMSAVE = 1;
 119     ctrl_area->svm_instrs.STGI = 1;
 120     ctrl_area->svm_instrs.CLGI = 1;
 121     ctrl_area->svm_instrs.SKINIT = 1;
 122     ctrl_area->svm_instrs.ICEBP = 1;
 123     ctrl_area->svm_instrs.WBINVD = 1;
 124     ctrl_area->svm_instrs.MONITOR = 1;
 125     ctrl_area->svm_instrs.MWAIT_always = 1;
 126     ctrl_area->svm_instrs.MWAIT_if_armed = 1;
 127     ctrl_area->instrs.INVLPGA = 1;
 128     ctrl_area->instrs.CPUID = 1;
 129
 130     ctrl_area->instrs.HLT = 1;
 131
 132 #ifdef V3_CONFIG_TIME_VIRTUALIZE_TSC
 133     ctrl_area->instrs.RDTSC = 1;
 134     ctrl_area->svm_instrs.RDTSCP = 1;
 135 #endif
 136
 137     // guest_state->cr0 = 0x00000001;    // PE
 138
 139     /*
 140       ctrl_area->exceptions.de = 1;
 141       ctrl_area->exceptions.df = 1;
 142
 143       ctrl_area->exceptions.ts = 1;
 144       ctrl_area->exceptions.ss = 1;
 145       ctrl_area->exceptions.ac = 1;
 146       ctrl_area->exceptions.mc = 1;
 147       ctrl_area->exceptions.gp = 1;
 148       ctrl_area->exceptions.ud = 1;
 149       ctrl_area->exceptions.np = 1;
 150       ctrl_area->exceptions.of = 1;
 151
 152       ctrl_area->exceptions.nmi = 1;
 153     */
 154
 155
 156     ctrl_area->instrs.NMI = 1;
 157     ctrl_area->instrs.SMI = 0; // allow SMIs to run in guest
 158     ctrl_area->instrs.INIT = 1;
 159     ctrl_area->instrs.PAUSE = 1;
 160     ctrl_area->instrs.shutdown_evts = 1;
 161
 162
 163     /* DEBUG FOR RETURN CODE */
 164     ctrl_area->exit_code = 1;
 165
 166
 167     /* Setup Guest Machine state */
 168
 169     core->vm_regs.rsp = 0x00;
 170     core->rip = 0xfff0;
 171
 172     core->vm_regs.rdx = 0x00000f00;
 173
 174
 175     core->cpl = 0;
 176
 177     core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1
 178     core->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode
 179     core->ctrl_regs.efer |= EFER_MSR_svm_enable;
 180
 181
 182
 183
 184
 185     core->segments.cs.selector = 0xf000;
 186     core->segments.cs.limit = 0xffff;
 187     core->segments.cs.base = 0x0000000f0000LL;
 188
 189     // (raw attributes = 0xf3)
 190     core->segments.cs.type = 0x3;
 191     core->segments.cs.system = 0x1;
 192     core->segments.cs.dpl = 0x3;
 193     core->segments.cs.present = 1;
 194
 195
 196
 197     struct v3_segment * segregs [] = {&(core->segments.ss), &(core->segments.ds),
 198                                       &(core->segments.es), &(core->segments.fs),
 199                                       &(core->segments.gs), NULL};
 200
 201     for ( i = 0; segregs[i] != NULL; i++) {
 202         struct v3_segment * seg = segregs[i];
 203
 204         seg->selector = 0x0000;
 205         //    seg->base = seg->selector << 4;
 206         seg->base = 0x00000000;
 207         seg->limit = ~0u;
 208
 209         // (raw attributes = 0xf3)
 210         seg->type = 0x3;
 211         seg->system = 0x1;
 212         seg->dpl = 0x3;
 213         seg->present = 1;
 214     }
 215
 216     core->segments.gdtr.limit = 0x0000ffff;
 217     core->segments.gdtr.base = 0x0000000000000000LL;
 218     core->segments.idtr.limit = 0x0000ffff;
 219     core->segments.idtr.base = 0x0000000000000000LL;
 220
 221     core->segments.ldtr.selector = 0x0000;
 222     core->segments.ldtr.limit = 0x0000ffff;
 223     core->segments.ldtr.base = 0x0000000000000000LL;
 224     core->segments.tr.selector = 0x0000;
 225     core->segments.tr.limit = 0x0000ffff;
 226     core->segments.tr.base = 0x0000000000000000LL;
 227
 228
 229     core->dbg_regs.dr6 = 0x00000000ffff0ff0LL;
 230     core->dbg_regs.dr7 = 0x0000000000000400LL;
 231
 232
 233     ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->io_map.arch_data);
 234     ctrl_area->instrs.IOIO_PROT = 1;
 235
 236     ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->msr_map.arch_data);
 237     ctrl_area->instrs.MSR_PROT = 1;
 238
 239
 240     PrintDebug("Exiting on interrupts\n");
 241     ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
 242     ctrl_area->instrs.INTR = 1;
 243
 244
 245     v3_hook_msr(core->vm_info, EFER_MSR,
 246                 &v3_handle_efer_read,
 247                 &v3_svm_handle_efer_write,
 248                 core);
 249
 250     if (core->shdw_pg_mode == SHADOW_PAGING) {
 251         PrintDebug("Creating initial shadow page table\n");
 252
 253         /* JRL: This is a performance killer, and a simplistic solution */
 254         /* We need to fix this */
 255         ctrl_area->TLB_CONTROL = 1;
 256         ctrl_area->guest_ASID = 1;
 257
 258
 259         if (v3_init_passthrough_pts(core) == -1) {
 260             PrintError("Could not initialize passthrough page tables\n");
 261             return ;
 262         }
 263
 264
 265         core->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
 266         PrintDebug("Created\n");
 267
 268         core->ctrl_regs.cr0 |= 0x80000000;
 269         core->ctrl_regs.cr3 = core->direct_map_pt;
 270
 271         ctrl_area->cr_reads.cr0 = 1;
 272         ctrl_area->cr_writes.cr0 = 1;
 273         //ctrl_area->cr_reads.cr4 = 1;
 274         ctrl_area->cr_writes.cr4 = 1;
 275         ctrl_area->cr_reads.cr3 = 1;
 276         ctrl_area->cr_writes.cr3 = 1;
 277
 278
 279
 280         ctrl_area->instrs.INVLPG = 1;
 281
 282         ctrl_area->exceptions.pf = 1;
 283
 284         guest_state->g_pat = 0x7040600070406ULL;
 285
 286
 287
 288     } else if (core->shdw_pg_mode == NESTED_PAGING) {
 289         // Flush the TLB on entries/exits
 290         ctrl_area->TLB_CONTROL = 1;
 291         ctrl_area->guest_ASID = 1;
 292
 293         // Enable Nested Paging
 294         ctrl_area->NP_ENABLE = 1;
 295
 296         PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
 297
 298         // Set the Nested Page Table pointer
 299         if (v3_init_passthrough_pts(core) == -1) {
 300             PrintError("Could not initialize Nested page tables\n");
 301             return ;
 302         }
 303
 304         ctrl_area->N_CR3 = core->direct_map_pt;
 305
 306         guest_state->g_pat = 0x7040600070406ULL;
 307     }
 308
 309     /* tell the guest that we don't support SVM */
 310     v3_hook_msr(core->vm_info, SVM_VM_CR_MSR,
 311         &v3_handle_vm_cr_read,
 312         &v3_handle_vm_cr_write,
 313         core);
 314
 315
 316     {
 317 #define INT_PENDING_AMD_MSR             0xc0010055
 318
 319         v3_hook_msr(core->vm_info, IA32_STAR_MSR, NULL, NULL, NULL);
 320         v3_hook_msr(core->vm_info, IA32_LSTAR_MSR, NULL, NULL, NULL);
 321         v3_hook_msr(core->vm_info, IA32_FMASK_MSR, NULL, NULL, NULL);
 322         v3_hook_msr(core->vm_info, IA32_KERN_GS_BASE_MSR, NULL, NULL, NULL);
 323         v3_hook_msr(core->vm_info, IA32_CSTAR_MSR, NULL, NULL, NULL);
 324
 325         v3_hook_msr(core->vm_info, SYSENTER_CS_MSR, NULL, NULL, NULL);
 326         v3_hook_msr(core->vm_info, SYSENTER_ESP_MSR, NULL, NULL, NULL);
 327         v3_hook_msr(core->vm_info, SYSENTER_EIP_MSR, NULL, NULL, NULL);
 328
 329
 330         v3_hook_msr(core->vm_info, FS_BASE_MSR, NULL, NULL, NULL);
 331         v3_hook_msr(core->vm_info, GS_BASE_MSR, NULL, NULL, NULL);
 332
 333         // Passthrough read operations are ok.
 334         v3_hook_msr(core->vm_info, INT_PENDING_AMD_MSR, NULL, v3_msr_unhandled_write, NULL);
 335     }
 336 }
 337
 338
 339 int v3_init_svm_vmcb(struct guest_info * core, v3_vm_class_t vm_class) {
 340
 341     PrintDebug("Allocating VMCB\n");
 342     core->vmm_data = (void *)Allocate_VMCB();
 343
 344     if (core->vmm_data == NULL) {
 345         PrintError("Could not allocate VMCB, Exiting...\n");
 346         return -1;
 347     }
 348
 349     if (vm_class == V3_PC_VM) {
 350         PrintDebug("Initializing VMCB (addr=%p)\n", (void *)core->vmm_data);
 351         Init_VMCB_BIOS((vmcb_t*)(core->vmm_data), core);
 352     } else {
 353         PrintError("Invalid VM class\n");
 354         return -1;
 355     }
 356
 357     return 0;
 358 }
 359
 360
 361 int v3_deinit_svm_vmcb(struct guest_info * core) {
 362     V3_FreePages(V3_PAddr(core->vmm_data), 1);
 363     return 0;
 364 }
 365
 366
 367 #ifdef V3_CONFIG_CHECKPOINT
 368 int v3_svm_save_core(struct guest_info * core, void * ctx){
 369
 370     v3_chkpt_save_8(ctx, "cpl", &(core->cpl));
 371     v3_chkpt_save(ctx, "vmcb_data", PAGE_SIZE, core->vmm_data);
 372
 373     return 0;
 374 }
 375
 376 int v3_svm_load_core(struct guest_info * core, void * ctx){
 377
 378     v3_chkpt_load_8(ctx, "cpl", &(core->cpl));
 379
 380     if (v3_chkpt_load(ctx, "vmcb_data", PAGE_SIZE, core->vmm_data) == -1) {
 381         return -1;
 382     }
 383
 384     return 0;
 385 }
 386 #endif
 387
 388 static int update_irq_exit_state(struct guest_info * info) {
 389     vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 390
 391     // Fix for QEMU bug using EVENTINJ as an internal cache
 392     guest_ctrl->EVENTINJ.valid = 0;
 393
 394     if ((info->intr_core_state.irq_pending == 1) && (guest_ctrl->guest_ctrl.V_IRQ == 0)) {
 395
 396 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 397         PrintDebug("INTAK cycle completed for irq %d\n", info->intr_core_state.irq_vector);
 398 #endif
 399
 400         info->intr_core_state.irq_started = 1;
 401         info->intr_core_state.irq_pending = 0;
 402
 403         v3_injecting_intr(info, info->intr_core_state.irq_vector, V3_EXTERNAL_IRQ);
 404     }
 405
 406     if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 0)) {
 407 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 408         PrintDebug("Interrupt %d taken by guest\n", info->intr_core_state.irq_vector);
 409 #endif
 410
 411         // Interrupt was taken fully vectored
 412         info->intr_core_state.irq_started = 0;
 413
 414     } else if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 1)) {
 415 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 416         PrintDebug("EXIT INT INFO is set (vec=%d)\n", guest_ctrl->exit_int_info.vector);
 417 #endif
 418     }
 419
 420     return 0;
 421 }
 422
 423
 424 static int update_irq_entry_state(struct guest_info * info) {
 425     vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 426
 427
 428     if (info->intr_core_state.irq_pending == 0) {
 429         guest_ctrl->guest_ctrl.V_IRQ = 0;
 430         guest_ctrl->guest_ctrl.V_INTR_VECTOR = 0;
 431     }
 432
 433     if (v3_excp_pending(info)) {
 434         uint_t excp = v3_get_excp_number(info);
 435
 436         guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
 437
 438         if (info->excp_state.excp_error_code_valid) {
 439             guest_ctrl->EVENTINJ.error_code = info->excp_state.excp_error_code;
 440             guest_ctrl->EVENTINJ.ev = 1;
 441 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 442             PrintDebug("Injecting exception %d with error code %x\n", excp, guest_ctrl->EVENTINJ.error_code);
 443 #endif
 444         }
 445
 446         guest_ctrl->EVENTINJ.vector = excp;
 447
 448         guest_ctrl->EVENTINJ.valid = 1;
 449
 450 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 451         PrintDebug("<%d> Injecting Exception %d (CR2=%p) (EIP=%p)\n",
 452                    (int)info->num_exits,
 453                    guest_ctrl->EVENTINJ.vector,
 454                    (void *)(addr_t)info->ctrl_regs.cr2,
 455                    (void *)(addr_t)info->rip);
 456 #endif
 457
 458         v3_injecting_excp(info, excp);
 459     } else if (info->intr_core_state.irq_started == 1) {
 460 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 461         PrintDebug("IRQ pending from previous injection\n");
 462 #endif
 463         guest_ctrl->guest_ctrl.V_IRQ = 1;
 464         guest_ctrl->guest_ctrl.V_INTR_VECTOR = info->intr_core_state.irq_vector;
 465         guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
 466         guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
 467
 468     } else {
 469         switch (v3_intr_pending(info)) {
 470             case V3_EXTERNAL_IRQ: {
 471                 uint32_t irq = v3_get_intr(info);
 472
 473                 guest_ctrl->guest_ctrl.V_IRQ = 1;
 474                 guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
 475                 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
 476                 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
 477
 478 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 479                 PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
 480                            guest_ctrl->guest_ctrl.V_INTR_VECTOR,
 481                            (void *)(addr_t)info->rip);
 482 #endif
 483
 484                 info->intr_core_state.irq_pending = 1;
 485                 info->intr_core_state.irq_vector = irq;
 486
 487                 break;
 488             }
 489             case V3_NMI:
 490                 guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
 491                 break;
 492             case V3_SOFTWARE_INTR:
 493                 guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
 494
 495 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
 496                 PrintDebug("Injecting software interrupt --  type: %d, vector: %d\n",
 497                            SVM_INJECTION_SOFT_INTR, info->intr_core_state.swintr_vector);
 498 #endif
 499                 guest_ctrl->EVENTINJ.vector = info->intr_core_state.swintr_vector;
 500                 guest_ctrl->EVENTINJ.valid = 1;
 501
 502                 /* reset swintr state */
 503                 info->intr_core_state.swintr_posted = 0;
 504                 info->intr_core_state.swintr_vector = 0;
 505
 506                 break;
 507             case V3_VIRTUAL_IRQ:
 508                 guest_ctrl->EVENTINJ.type = SVM_INJECTION_IRQ;
 509                 break;
 510
 511             case V3_INVALID_INTR:
 512             default:
 513                 break;
 514         }
 515
 516     }
 517
 518     return 0;
 519 }
 520
 521
 522 /*
 523  * CAUTION and DANGER!!!
 524  *
 525  * The VMCB CANNOT(!!) be accessed outside of the clgi/stgi calls inside this function
 526  * When exectuing a symbiotic call, the VMCB WILL be overwritten, so any dependencies
 527  * on its contents will cause things to break. The contents at the time of the exit WILL
 528  * change before the exit handler is executed.
 529  */
 530 int v3_svm_enter(struct guest_info * info) {
 531     vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 532     vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
 533     addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0;
 534     sint64_t tsc_offset;
 535     uint64_t guest_cycles = 0;
 536
 537     // Conditionally yield the CPU if the timeslice has expired
 538     v3_yield_cond(info);
 539
 540     // disable global interrupts for vm state transition
 541     v3_clgi();
 542
 543     // Update timer devices after being in the VM, with interupts
 544     // disabled, but before doing IRQ updates, so that any interrupts they
 545     //raise get seen immediately.
 546     v3_advance_time(info);
 547     v3_update_timers(info);
 548
 549     // Synchronize the guest state to the VMCB
 550     guest_state->cr0 = info->ctrl_regs.cr0;
 551     guest_state->cr2 = info->ctrl_regs.cr2;
 552     guest_state->cr3 = info->ctrl_regs.cr3;
 553     guest_state->cr4 = info->ctrl_regs.cr4;
 554     guest_state->dr6 = info->dbg_regs.dr6;
 555     guest_state->dr7 = info->dbg_regs.dr7;
 556     guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
 557     guest_state->rflags = info->ctrl_regs.rflags;
 558     guest_state->efer = info->ctrl_regs.efer;
 559
 560     guest_state->cpl = info->cpl;
 561
 562     v3_set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
 563
 564     guest_state->rax = info->vm_regs.rax;
 565     guest_state->rip = info->rip;
 566     guest_state->rsp = info->vm_regs.rsp;
 567
 568 #ifdef V3_CONFIG_SYMCALL
 569     if (info->sym_core_state.symcall_state.sym_call_active == 0) {
 570         update_irq_entry_state(info);
 571     }
 572 #else
 573     update_irq_entry_state(info);
 574 #endif
 575
 576
 577     /* ** */
 578
 579     /*
 580       PrintDebug("SVM Entry to CS=%p  rip=%p...\n",
 581       (void *)(addr_t)info->segments.cs.base,
 582       (void *)(addr_t)info->rip);
 583     */
 584
 585 #ifdef V3_CONFIG_SYMCALL
 586     if (info->sym_core_state.symcall_state.sym_call_active == 1) {
 587         if (guest_ctrl->guest_ctrl.V_IRQ == 1) {
 588             V3_Print("!!! Injecting Interrupt during Sym call !!!\n");
 589         }
 590     }
 591 #endif
 592
 593     v3_time_enter_vm(info);
 594     tsc_offset = v3_tsc_host_offset(&info->time_state);
 595     guest_ctrl->TSC_OFFSET = tsc_offset;
 596
 597
 598     //V3_Print("Calling v3_svm_launch\n");
 599     {
 600         uint64_t entry_tsc = 0;
 601         uint64_t exit_tsc = 0;
 602
 603         rdtscll(entry_tsc);
 604
 605         v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[V3_Get_CPU()]);
 606
 607         rdtscll(exit_tsc);
 608
 609         guest_cycles = exit_tsc - entry_tsc;
 610     }
 611
 612
 613     //V3_Print("SVM Returned: Exit Code: %x, guest_rip=%lx\n", (uint32_t)(guest_ctrl->exit_code), (unsigned long)guest_state->rip);
 614
 615     v3_last_exit = (uint32_t)(guest_ctrl->exit_code);
 616
 617     // Immediate exit from VM time bookkeeping
 618     v3_time_exit_vm(info, &guest_cycles);
 619
 620     info->num_exits++;
 621
 622     // Save Guest state from VMCB
 623     info->rip = guest_state->rip;
 624     info->vm_regs.rsp = guest_state->rsp;
 625     info->vm_regs.rax = guest_state->rax;
 626
 627     info->cpl = guest_state->cpl;
 628
 629     info->ctrl_regs.cr0 = guest_state->cr0;
 630     info->ctrl_regs.cr2 = guest_state->cr2;
 631     info->ctrl_regs.cr3 = guest_state->cr3;
 632     info->ctrl_regs.cr4 = guest_state->cr4;
 633     info->dbg_regs.dr6 = guest_state->dr6;
 634     info->dbg_regs.dr7 = guest_state->dr7;
 635     info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
 636     info->ctrl_regs.rflags = guest_state->rflags;
 637     info->ctrl_regs.efer = guest_state->efer;
 638
 639     v3_get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
 640     info->cpu_mode = v3_get_vm_cpu_mode(info);
 641     info->mem_mode = v3_get_vm_mem_mode(info);
 642     /* ** */
 643
 644     // save exit info here
 645     exit_code = guest_ctrl->exit_code;
 646     exit_info1 = guest_ctrl->exit_info1;
 647     exit_info2 = guest_ctrl->exit_info2;
 648
 649 #ifdef V3_CONFIG_SYMCALL
 650     if (info->sym_core_state.symcall_state.sym_call_active == 0) {
 651         update_irq_exit_state(info);
 652     }
 653 #else
 654     update_irq_exit_state(info);
 655 #endif
 656
 657     // reenable global interrupts after vm exit
 658     v3_stgi();
 659
 660     // Conditionally yield the CPU if the timeslice has expired
 661     v3_yield_cond(info);
 662
 663     {
 664         int ret = v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2);
 665
 666         if (ret != 0) {
 667             PrintError("Error in SVM exit handler (ret=%d)\n", ret);
 668             PrintError("  last Exit was %d (exit code=0x%llx)\n", v3_last_exit, (uint64_t) exit_code);
 669             return -1;
 670         }
 671     }
 672
 673     if (info->timeouts.timeout_active) {
 674         /* Check to see if any timeouts have expired */
 675         v3_handle_timeouts(info, guest_cycles);
 676     }
 677
 678
 679     return 0;
 680 }
 681
 682
 683 int v3_start_svm_guest(struct guest_info * info) {
 684     //    vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
 685     //  vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 686
 687     PrintDebug("Starting SVM core %u (on logical core %u)\n", info->vcpu_id, info->pcpu_id);
 688
 689     if (info->vcpu_id == 0) {
 690         info->core_run_state = CORE_RUNNING;
 691     } else  {
 692         PrintDebug("SVM core %u (on %u): Waiting for core initialization\n", info->vcpu_id, info->pcpu_id);
 693
 694         while (info->core_run_state == CORE_STOPPED) {
 695
 696             if (info->vm_info->run_state == VM_STOPPED) {
 697                 // The VM was stopped before this core was initialized.
 698                 return 0;
 699             }
 700
 701             v3_yield(info);
 702             //PrintDebug("SVM core %u: still waiting for INIT\n", info->vcpu_id);
 703         }
 704
 705         PrintDebug("SVM core %u(on %u) initialized\n", info->vcpu_id, info->pcpu_id);
 706
 707         // We'll be paranoid about race conditions here
 708         v3_wait_at_barrier(info);
 709     }
 710
 711     PrintDebug("SVM core %u(on %u): I am starting at CS=0x%x (base=0x%p, limit=0x%x),  RIP=0x%p\n",
 712                info->vcpu_id, info->pcpu_id,
 713                info->segments.cs.selector, (void *)(info->segments.cs.base),
 714                info->segments.cs.limit, (void *)(info->rip));
 715
 716
 717
 718     PrintDebug("SVM core %u: Launching SVM VM (vmcb=%p) (on cpu %u)\n",
 719                info->vcpu_id, (void *)info->vmm_data, info->pcpu_id);
 720     //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
 721
 722     v3_start_time(info);
 723
 724     while (1) {
 725
 726         if (info->vm_info->run_state == VM_STOPPED) {
 727             info->core_run_state = CORE_STOPPED;
 728             break;
 729         }
 730
 731         if (v3_svm_enter(info) == -1) {
 732             vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
 733             addr_t host_addr;
 734             addr_t linear_addr = 0;
 735
 736             info->vm_info->run_state = VM_ERROR;
 737
 738             V3_Print("SVM core %u: SVM ERROR!!\n", info->vcpu_id);
 739
 740             v3_print_guest_state(info);
 741
 742             V3_Print("SVM core %u: SVM Exit Code: %p\n", info->vcpu_id, (void *)(addr_t)guest_ctrl->exit_code);
 743
 744             V3_Print("SVM core %u: exit_info1 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info1));
 745             V3_Print("SVM core %u: exit_info1 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
 746
 747             V3_Print("SVM core %u: exit_info2 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info2));
 748             V3_Print("SVM core %u: exit_info2 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
 749
 750             linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
 751
 752             if (info->mem_mode == PHYSICAL_MEM) {
 753                 v3_gpa_to_hva(info, linear_addr, &host_addr);
 754             } else if (info->mem_mode == VIRTUAL_MEM) {
 755                 v3_gva_to_hva(info, linear_addr, &host_addr);
 756             }
 757
 758             V3_Print("SVM core %u: Host Address of rip = 0x%p\n", info->vcpu_id, (void *)host_addr);
 759
 760             V3_Print("SVM core %u: Instr (15 bytes) at %p:\n", info->vcpu_id, (void *)host_addr);
 761             v3_dump_mem((uint8_t *)host_addr, 15);
 762
 763             v3_print_stack(info);
 764
 765             break;
 766         }
 767
 768         v3_wait_at_barrier(info);
 769
 770
 771         if (info->vm_info->run_state == VM_STOPPED) {
 772             info->core_run_state = CORE_STOPPED;
 773             break;
 774         }
 775
 776
 777
 778 /*
 779         if ((info->num_exits % 50000) == 0) {
 780             V3_Print("SVM Exit number %d\n", (uint32_t)info->num_exits);
 781             v3_print_guest_state(info);
 782         }
 783 */
 784
 785     }
 786
 787     // Need to take down the other cores on error...
 788
 789     return 0;
 790 }
 791
 792
 793
 794
 795 int v3_reset_svm_vm_core(struct guest_info * core, addr_t rip) {
 796     // init vmcb_bios
 797
 798     // Write the RIP, CS, and descriptor
 799     // assume the rest is already good to go
 800     //
 801     // vector VV -> rip at 0
 802     //              CS = VV00
 803     //  This means we start executing at linear address VV000
 804     //
 805     // So the selector needs to be VV00
 806     // and the base needs to be VV000
 807     //
 808     core->rip = 0;
 809     core->segments.cs.selector = rip << 8;
 810     core->segments.cs.limit = 0xffff;
 811     core->segments.cs.base = rip << 12;
 812
 813     return 0;
 814 }
 815
 816
 817
 818
 819
 820
 821 /* Checks machine SVM capability */
 822 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
 823 int v3_is_svm_capable() {
 824     uint_t vm_cr_low = 0, vm_cr_high = 0;
 825     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
 826
 827     v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
 828
 829     PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx);
 830
 831     if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
 832       V3_Print("SVM Not Available\n");
 833       return 0;
 834     }  else {
 835         v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
 836
 837         PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
 838
 839         if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
 840             V3_Print("SVM is available but is disabled.\n");
 841
 842             v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
 843
 844             PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
 845
 846             if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
 847                 V3_Print("SVM BIOS Disabled, not unlockable\n");
 848             } else {
 849                 V3_Print("SVM is locked with a key\n");
 850             }
 851             return 0;
 852
 853         } else {
 854             V3_Print("SVM is available and  enabled.\n");
 855
 856             v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
 857             PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax);
 858             PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx);
 859             PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx);
 860             PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
 861
 862             return 1;
 863         }
 864     }
 865 }
 866
 867 static int has_svm_nested_paging() {
 868     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
 869
 870     v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
 871
 872     //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
 873
 874     if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
 875         V3_Print("SVM Nested Paging not supported\n");
 876         return 0;
 877     } else {
 878         V3_Print("SVM Nested Paging supported\n");
 879         return 1;
 880     }
 881  }
 882
 883
 884
 885 void v3_init_svm_cpu(int cpu_id) {
 886     reg_ex_t msr;
 887     extern v3_cpu_arch_t v3_cpu_types[];
 888
 889     // Enable SVM on the CPU
 890     v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
 891     msr.e_reg.low |= EFER_MSR_svm_enable;
 892     v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
 893
 894     V3_Print("SVM Enabled\n");
 895
 896     // Setup the host state save area
 897     host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4);
 898
 899     /* 64-BIT-ISSUE */
 900     //  msr.e_reg.high = 0;
 901     //msr.e_reg.low = (uint_t)host_vmcb;
 902     msr.r_reg = host_vmcbs[cpu_id];
 903
 904     PrintDebug("Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]);
 905     v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
 906
 907
 908     if (has_svm_nested_paging() == 1) {
 909         v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU;
 910     } else {
 911         v3_cpu_types[cpu_id] = V3_SVM_CPU;
 912     }
 913 }
 914
 915
 916
 917 void v3_deinit_svm_cpu(int cpu_id) {
 918     reg_ex_t msr;
 919     extern v3_cpu_arch_t v3_cpu_types[];
 920
 921     // reset SVM_VM_HSAVE_PA_MSR
 922     // Does setting it to NULL disable??
 923     msr.r_reg = 0;
 924     v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
 925
 926     // Disable SVM?
 927     v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
 928     msr.e_reg.low &= ~EFER_MSR_svm_enable;
 929     v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
 930
 931     v3_cpu_types[cpu_id] = V3_INVALID_CPU;
 932
 933     V3_FreePages((void *)host_vmcbs[cpu_id], 4);
 934
 935     V3_Print("Host CPU %d host area freed, and SVM disabled\n", cpu_id);
 936     return;
 937 }
 938
 939
 940
 941
 942
 943
 944
 945
 946
 947
 948
 949
 950
 951
 952
 953
 954
 955
 956
 957
 958
 959
 960
 961
 962
 963
 964
 965
 966
 967
 968
 969
 970
 971
 972
 973
 974
 975
 976
 977
 978
 979
 980
 981
 982
 983
 984
 985
 986
 987
 988 #if 0
 989 /*
 990  * Test VMSAVE/VMLOAD Latency
 991  */
 992 #define vmsave ".byte 0x0F,0x01,0xDB ; "
 993 #define vmload ".byte 0x0F,0x01,0xDA ; "
 994 {
 995     uint32_t start_lo, start_hi;
 996     uint32_t end_lo, end_hi;
 997     uint64_t start, end;
 998
 999     __asm__ __volatile__ (
1000                           "rdtsc ; "
1001                           "movl %%eax, %%esi ; "
1002                           "movl %%edx, %%edi ; "
1003                           "movq  %%rcx, %%rax ; "
1004                           vmsave
1005                           "rdtsc ; "
1006                           : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
1007                           : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
1008                           );
1009
1010     start = start_hi;
1011     start <<= 32;
1012     start += start_lo;
1013
1014     end = end_hi;
1015     end <<= 32;
1016     end += end_lo;
1017
1018     PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
1019
1020     __asm__ __volatile__ (
1021                           "rdtsc ; "
1022                           "movl %%eax, %%esi ; "
1023                           "movl %%edx, %%edi ; "
1024                           "movq  %%rcx, %%rax ; "
1025                           vmload
1026                           "rdtsc ; "
1027                           : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
1028                               : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
1029                               );
1030
1031         start = start_hi;
1032         start <<= 32;
1033         start += start_lo;
1034
1035         end = end_hi;
1036         end <<= 32;
1037         end += end_lo;
1038
1039
1040         PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
1041     }
1042     /* End Latency Test */
1043
1044 #endif
1045
1046
1047
1048
1049
1050
1051
1052 #if 0
1053 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
1054   vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
1055   vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
1056   uint_t i = 0;
1057
1058
1059   guest_state->rsp = vm_info.vm_regs.rsp;
1060   guest_state->rip = vm_info.rip;
1061
1062
1063   /* I pretty much just gutted this from TVMM */
1064   /* Note: That means its probably wrong */
1065
1066   // set the segment registers to mirror ours
1067   guest_state->cs.selector = 1<<3;
1068   guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
1069   guest_state->cs.attrib.fields.S = 1;
1070   guest_state->cs.attrib.fields.P = 1;
1071   guest_state->cs.attrib.fields.db = 1;
1072   guest_state->cs.attrib.fields.G = 1;
1073   guest_state->cs.limit = 0xfffff;
1074   guest_state->cs.base = 0;
1075
1076   struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
1077   for ( i = 0; segregs[i] != NULL; i++) {
1078     struct vmcb_selector * seg = segregs[i];
1079
1080     seg->selector = 2<<3;
1081     seg->attrib.fields.type = 0x2; // Data Segment+read/write
1082     seg->attrib.fields.S = 1;
1083     seg->attrib.fields.P = 1;
1084     seg->attrib.fields.db = 1;
1085     seg->attrib.fields.G = 1;
1086     seg->limit = 0xfffff;
1087     seg->base = 0;
1088   }
1089
1090
1091   {
1092     /* JRL THIS HAS TO GO */
1093
1094     //    guest_state->tr.selector = GetTR_Selector();
1095     guest_state->tr.attrib.fields.type = 0x9;
1096     guest_state->tr.attrib.fields.P = 1;
1097     // guest_state->tr.limit = GetTR_Limit();
1098     //guest_state->tr.base = GetTR_Base();// - 0x2000;
1099     /* ** */
1100   }
1101
1102
1103   /* ** */
1104
1105
1106   guest_state->efer |= EFER_MSR_svm_enable;
1107   guest_state->rflags = 0x00000002; // The reserved bit is always 1
1108   ctrl_area->svm_instrs.VMRUN = 1;
1109   guest_state->cr0 = 0x00000001;    // PE
1110   ctrl_area->guest_ASID = 1;
1111
1112
1113   //  guest_state->cpl = 0;
1114
1115
1116
1117   // Setup exits
1118
1119   ctrl_area->cr_writes.cr4 = 1;
1120
1121   ctrl_area->exceptions.de = 1;
1122   ctrl_area->exceptions.df = 1;
1123   ctrl_area->exceptions.pf = 1;
1124   ctrl_area->exceptions.ts = 1;
1125   ctrl_area->exceptions.ss = 1;
1126   ctrl_area->exceptions.ac = 1;
1127   ctrl_area->exceptions.mc = 1;
1128   ctrl_area->exceptions.gp = 1;
1129   ctrl_area->exceptions.ud = 1;
1130   ctrl_area->exceptions.np = 1;
1131   ctrl_area->exceptions.of = 1;
1132   ctrl_area->exceptions.nmi = 1;
1133
1134
1135
1136   ctrl_area->instrs.IOIO_PROT = 1;
1137   ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
1138
1139   {
1140     reg_ex_t tmp_reg;
1141     tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
1142     memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
1143   }
1144
1145   ctrl_area->instrs.INTR = 1;
1146
1147
1148   {
1149     char gdt_buf[6];
1150     char idt_buf[6];
1151
1152     memset(gdt_buf, 0, 6);
1153     memset(idt_buf, 0, 6);
1154
1155
1156     uint_t gdt_base, idt_base;
1157     ushort_t gdt_limit, idt_limit;
1158
1159     GetGDTR(gdt_buf);
1160     gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
1161     gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
1162     PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
1163
1164     GetIDTR(idt_buf);
1165     idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
1166     idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
1167     PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
1168
1169
1170     // gdt_base -= 0x2000;
1171     //idt_base -= 0x2000;
1172
1173     guest_state->gdtr.base = gdt_base;
1174     guest_state->gdtr.limit = gdt_limit;
1175     guest_state->idtr.base = idt_base;
1176     guest_state->idtr.limit = idt_limit;
1177
1178
1179   }
1180
1181
1182   // also determine if CPU supports nested paging
1183   /*
1184   if (vm_info.page_tables) {
1185     //   if (0) {
1186     // Flush the TLB on entries/exits
1187     ctrl_area->TLB_CONTROL = 1;
1188
1189     // Enable Nested Paging
1190     ctrl_area->NP_ENABLE = 1;
1191
1192     PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
1193
1194         // Set the Nested Page Table pointer
1195     ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
1196
1197
1198     //   ctrl_area->N_CR3 = Get_CR3();
1199     // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
1200
1201     guest_state->g_pat = 0x7040600070406ULL;
1202
1203     PrintDebug("Set Nested CR3: lo: 0x%x  hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
1204     PrintDebug("Set Guest CR3: lo: 0x%x  hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
1205     // Enable Paging
1206     //    guest_state->cr0 |= 0x80000000;
1207   }
1208   */
1209
1210 }
1211
1212
1213
1214
1215
1216 #endif
1217
1218