palacios/src/devices/ramdisk.c

   1
   2 /*
   3  *
   4  *   Copyright (C) 2002  MandrakeSoft S.A.
   5  *
   6  *     MandrakeSoft S.A.
   7  *     43, rue d'Aboukir
   8  *     75002 Paris - France
   9  *     http://www.linux-mandrake.com/
  10  *     http://www.mandrakesoft.com/
  11  *
  12  *   This library is free software; you can redistribute it and/or
  13  *   modify it under the terms of the GNU Lesser General Public
  14  *   License as published by the Free Software Foundation; either
  15  *   version 2 of the License, or (at your option) any later version.
  16  *
  17  *   This library is distributed in the hope that it will be useful,
  18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  20  *   Lesser General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU Lesser General Public
  23  *  License along with this library; if not, write to the Free Software
  24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  25  *
  26  * Major modifications made for the V3VEE project
  27  *
  28  * The V3VEE Project is a joint project between Northwestern University
  29  * and the University of New Mexico.  You can find out more at
  30  * http://www.v3vee.org
  31  *
  32  * Copyright (c) 2008, Zheng Cui <cuizheng@cs.unm.edu>
  33  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
  34  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
  35  * All rights reserved for original changes
  36  *
  37  */
  38
  39
  40 #include <devices/ramdisk.h>
  41 #include <palacios/vmm.h>
  42 #include <string.h>
  43
  44 #ifdef DEBUG_RAMDISK
  45 #define Ramdisk_Print(_f, _a...) PrintTrace("\nramdisk.c(%d) " _f, __LINE__, ## _a)
  46 #else
  47 #define Ramdisk_Print(_f, _a...)
  48 #endif
  49
  50 #define RD_PANIC(_f, _a...)     \
  51   do {                       \
  52     PrintDebug("ramdisk.c(%d) " _f, __LINE__, ## _a);   \
  53       while(1);              \
  54     }                        \
  55    while(0)
  56
  57 #define RD_ERROR(_f, _a...) PrintTrace("\nramdisk.c(%d) " _f, __LINE__, ## _a)
  58
  59 /*
  60  * Debug facilities
  61  */
  62
  63 #define ATA_DETECT                     0xf0 //0X3E8
  64 #define ATA_RESET                      0xf1 //0X3E9
  65 #define ATA_CMD_DATA_IN                0xf2 //0X3EA
  66 #define ATA_CMD_DATA_OUT               0xf3 //0X3EB
  67 #define ATA_CMD_PACKET                 0xf4 //0X3EC
  68 #define ATAPI_GET_SENSE                0xf5 //0X3ED
  69 #define ATAPI_IS_READY                 0xf6 //0X3EE
  70 #define ATAPI_IS_CDROM                 0xf7 //0X3EF
  71
  72 #define CDEMU_INIT                     0xf8 //0X2E8
  73 #define CDEMU_ISACTIVE                 0xf9 //0X2E9
  74 #define CDEMU_EMULATED_DRIVE           0xfa //0X2EA
  75 #define CDROM_BOOT                     0xfb //0X2EB
  76
  77
  78 #define HARD_DRIVE_POST                0xfc //0X2EC
  79
  80
  81 #define ATA_DEVICE_NO                  0xfd //0X2ED
  82 #define ATA_DEVICE_TYPE                0xfe //0X2ED
  83
  84 #define INT13_HARDDISK                 0xff //0x2ef
  85 #define INT13_CDROM                    0xe0 //0x2f8
  86 #define INT13_CDEMU                    0xe1 //0x2f9
  87 #define INT13_ELTORITO                 0xe2 //0x2fa
  88 #define INT13_DISKETTE_FUNCTION        0xe3 //0x2fb
  89
  90 // some packet handling macros
  91 #define EXTRACT_FIELD(arr,byte,start,num_bits) (((arr)[(byte)] >> (start)) & ((1 << (num_bits)) - 1))
  92 #define get_packet_field(c,b,s,n) (EXTRACT_FIELD((SELECTED_CONTROLLER((c)).buffer),(b),(s),(n)))
  93 #define get_packet_byte(c,b) (SELECTED_CONTROLLER((c)).buffer[(b)])
  94 #define get_packet_word(c,b) (((uint16)SELECTED_CONTROLLER((c)).buffer[(b)] << 8) | SELECTED_CONTROLLER((c)).buffer[(b)+1])
  95
  96
  97 #define CONTROLLER(c,a) (channels[(c)].drives[(a)]).controller
  98 #define DRIVE(c,a) (channels[(c)].drives[(a)])
  99 #define SELECTED_CONTROLLER(c) (CONTROLLER((c), channels[(c)].drive_select))
 100 #define SELECTED_DRIVE(c) (DRIVE((c), channels[(c)].drive_select))
 101
 102
 103 #define DRIVE_IS_PRESENT(c,a) (channels[(c)].drives[(a)].device_type != IDE_NONE)
 104 #define DRIVE_IS_HD(c,a) (channels[(c)].drives[(a)].device_type == IDE_DISK)
 105 #define DRIVE_IS_CD(c,a) (channels[(c)].drives[(a)].device_type == IDE_CDROM)
 106 #define SELECTED_MODEL(c) (channels[(c)].drives[channels[(c)].drive_select].model_no)
 107
 108 #define MASTER_SELECTED(c) (!channels[(c)].drive_select)
 109 #define SLAVE_SELECTED(c)  (channels[(c)].drive_select)
 110
 111 #define SELECTED_IS_PRESENT(c) (DRIVE_IS_PRESENT((c),SLAVE_SELECTED((c))))
 112 #define SELECTED_IS_HD(c) (DRIVE_IS_HD((c),SLAVE_SELECTED((c))))
 113 #define SELECTED_IS_CD(c) (DRIVE_IS_CD((c),SLAVE_SELECTED((c))))
 114
 115 #define ANY_IS_PRESENT(c) (DRIVE_IS_PRESENT((c),0) || DRIVE_IS_PRESENT((c),1))
 116 #define SELECTED_TYPE_STRING(channel) ((SELECTED_IS_CD(channel)) ? "CD-ROM" : "NONE")
 117
 118 #define WRITE_FEATURES(c,a) do { uint8 _a = a; CONTROLLER((c),0).features = _a; CONTROLLER((c),1).features = _a; } while(0)
 119 #define WRITE_SECTOR_COUNT(c,a) do { uint8 _a = a; CONTROLLER((c),0).sector_count = _a; CONTROLLER((c),1).sector_count = _a; } while(0)
 120 #define WRITE_SECTOR_NUMBER(c,a) do { uint8 _a = a; CONTROLLER((c),0).sector_no = _a; CONTROLLER((c),1).sector_no = _a; } while(0)
 121 #define WRITE_CYLINDER_LOW(c,a) do { uint8 _a = a; CONTROLLER((c),0).cylinder_no = (CONTROLLER((c),0).cylinder_no & 0xff00) | _a; CONTROLLER((c),1).cylinder_no = (CONTROLLER((c),1).cylinder_no & 0xff00) | _a; } while(0)
 122 #define WRITE_CYLINDER_HIGH(c,a) do { uint16 _a = a; CONTROLLER((c),0).cylinder_no = (_a << 8) | (CONTROLLER((c),0).cylinder_no & 0xff); CONTROLLER((c),1).cylinder_no = (_a << 8) | (CONTROLLER((c),1).cylinder_no & 0xff); } while(0)
 123 #define WRITE_HEAD_NO(c,a) do { uint8 _a = a; CONTROLLER((c),0).head_no = _a; CONTROLLER((c),1).head_no = _a; } while(0)
 124 #define WRITE_LBA_MODE(c,a) do { uint8 _a = a; CONTROLLER((c),0).lba_mode = _a; CONTROLLER((c),1).lba_mode = _a; } while(0)
 125
 126
 127
 128 #define GOTO_RETURN_VALUE  if(io_len==4){\
 129                              goto return_value32;\
 130                              }\
 131                            else if(io_len==2){\
 132                              value16=(Bit16u)value32;\
 133                              goto return_value16;\
 134                              }\
 135                            else{\
 136                              value8=(Bit8u)value32;\
 137                              goto return_value8;\
 138                              }
 139
 140 #define UNUSED(x) ((void)x)
 141
 142 #define PACKET_SIZE 12
 143
 144 static struct ramdisk_t *ramdisk_state;
 145
 146
 147
 148
 149
 150
 151 ////////////////////////////////////////////////////////////////////////////
 152
 153 /*
 154  * Static routines
 155  */
 156
 157 static
 158 uint_t ramdisk_read_port(ushort_t port,
 159                          void *src,
 160                          uint_t length,
 161                          struct vm_device *dev);
 162
 163 static
 164 uint_t ramdisk_write_port(ushort_t port,
 165                           void *src,
 166                           uint_t length,
 167                           struct vm_device *dev);
 168
 169 static
 170 uint_t ramdisk_read_port_ignore(ushort_t port,
 171                                 void *src,
 172                                 uint_t length,
 173                                 struct vm_device *dev);
 174
 175 static
 176 uint_t ramdisk_write_port_ignore(ushort_t port,
 177                                  void *src,
 178                                  uint_t length,
 179                                  struct vm_device *dev);
 180
 181
 182 static
 183 Bit32u rd_read_handler(struct channel_t *channels, Bit32u address, unsigned io_len);
 184
 185 static
 186 void rd_write_handler(struct channel_t *channels, Bit32u address,
 187                       Bit32u value, unsigned io_len);
 188
 189
 190
 191 /*
 192  * ATAPI routines
 193  */
 194
 195 static
 196 void rd_identify_ATAPI_drive(struct channel_t *channels, Bit8u channel);
 197
 198
 199 static
 200 void rd_init_send_atapi_command(struct channel_t *channels, Bit8u channel, Bit8u command, int req_length, int alloc_length, bool lazy /*= false*/);
 201
 202 static
 203 void rd_ready_to_send_atapi(struct channel_t *channels, Bit8u channel);
 204
 205
 206 static
 207 void rd_atapi_cmd_error(struct channel_t *channels, Bit8u channel, sense_t sense_key, asc_t asc);
 208
 209 static
 210 void rd_init_mode_sense_single(struct channel_t *channels, Bit8u channel, const void* src, int size);
 211
 212 static
 213 void rd_atapi_cmd_nop(struct channel_t *channels, Bit8u channel);
 214
 215 static
 216 void rd_command_aborted(struct channel_t *channels, Bit8u channel, unsigned value);
 217
 218
 219 /*
 220  * Interrupt handling
 221  */
 222
 223 static
 224 void rd_raise_interrupt(struct channel_t *channels, Bit8u channel);
 225
 226 static
 227 void rd_lower_irq(struct vm_device *dev, Bit32u irq);
 228
 229
 230
 231 /*
 232  * Helper routines
 233  */
 234
 235 uint16 rd_read_16bit(const uint8* buf)
 236 {
 237   return (buf[0] << 8) | buf[1];
 238 }
 239
 240
 241
 242 uint32 rd_read_32bit(const uint8* buf)
 243 {
 244   return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
 245 }
 246
 247 ////////////////////////////////////////////////////////////////////
 248
 249
 250 void rd_print_state(struct ramdisk_t *ramdisk,
 251                          struct vm_device *dev)
 252 //Bit32u   rd_init_harddrive(struct channel_t *channels)
 253 {
 254
 255   uchar_t channel;
 256   uchar_t device;
 257   struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
 258
 259   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++)
 260     memset((char *)(channels + channel), 0, sizeof(struct channel_t));
 261
 262   Ramdisk_Print("sizeof(*channels) = %d\n", sizeof((*channels)));
 263   Ramdisk_Print("sizeof(channles->drives[0].controller) = %d\n", sizeof((channels->drives[0].controller)));
 264   Ramdisk_Print("sizeof(channles->drives[0].cdrom) = %d\n", sizeof((channels->drives[0].cdrom)));
 265   Ramdisk_Print("sizeof(channles->drives[0].sense) = %d\n", sizeof((channels->drives[0].sense)));
 266   Ramdisk_Print("sizeof(channles->drives[0].atapi) = %d\n", sizeof((channels->drives[0].atapi)));
 267
 268
 269   Ramdisk_Print("sizeof(channles->drives[0].controller.status) = %d\n", sizeof((channels->drives[0].controller.status)));
 270   Ramdisk_Print("sizeof(channles->drives[0].controller.sector_count) = %d\n", sizeof((channels->drives[0].controller.sector_count)));
 271   Ramdisk_Print("sizeof(channles->drives[0].controller.interrupt_reason) = %d\n", sizeof((channels->drives[0].controller.interrupt_reason)));
 272
 273   Ramdisk_Print("sizeof(channles->drives[0].controller.cylinder_no) = %d\n", sizeof((channels->drives[0].controller.cylinder_no)));
 274   Ramdisk_Print("sizeof(channles->drives[0].controller.byte_count) = %d\n", sizeof((channels->drives[0].controller.byte_count)));
 275
 276
 277   Ramdisk_Print("sizeof(channles->drives[0].controller.control) = %d\n", sizeof((channels->drives[0].controller.control)));
 278
 279
 280   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
 281
 282     for (device = 0; device < 2; device++){
 283
 284       // Initialize controller state, even if device is not present
 285       Ramdisk_Print("channels[%d].drives[%d].controller.status.busy = %d\n",channel, device, channels[channel].drives[device].controller.status.busy);
 286       Ramdisk_Print("channels[%d].drives[%d].controller.status.drive_ready = %d\n", channel, device, channels[channel].drives[device].controller.status.drive_ready);
 287       Ramdisk_Print("channels[%d].drives[%d].controller.status.write_fault = %d\n", channel, device, channels[channel].drives[device].controller.status.write_fault);
 288       Ramdisk_Print("channels[%d].drives[%d].controller.status.seek_complete = %d\n", channel, device, channels[channel].drives[device].controller.status.seek_complete);
 289       Ramdisk_Print("channels[%d].drives[%d].controller.status.drq = %d\n", channel, device, channels[channel].drives[device].controller.status.drq);
 290       Ramdisk_Print("channels[%d].drives[%d].controller.status.corrected_data = %d\n", channel, device, channels[channel].drives[device].controller.status.corrected_data);
 291       Ramdisk_Print("channels[%d].drives[%d].controller.status.index_pulse = %d\n", channel, device, channels[channel].drives[device].controller.status.index_pulse);
 292       Ramdisk_Print("channels[%d].drives[%d].controller.status.index_pulse_count = %d\n", channel, device, channels[channel].drives[device].controller.status.index_pulse_count);
 293       Ramdisk_Print("channels[%d].drives[%d].controller.status.err = %d\n", channel, device, channels[channel].drives[device].controller.status.err);
 294
 295
 296       Ramdisk_Print("channels[%d].drives[%d].controller.error_register = %d\n", channel, device, channels[channel].drives[device].controller.error_register);
 297       Ramdisk_Print("channels[%d].drives[%d].controller.head_no = %d\n", channel, device, channels[channel].drives[device].controller.head_no);
 298       Ramdisk_Print("channels[%d].drives[%d].controller.sector_count = %d\n", channel, device, channels[channel].drives[device].controller.sector_count);
 299       Ramdisk_Print("channels[%d].drives[%d].controller.sector_no = %d\n", channel, device, channels[channel].drives[device].controller.sector_no);
 300       Ramdisk_Print("channels[%d].drives[%d].controller.cylinder_no = %d\n", channel, device, channels[channel].drives[device].controller.cylinder_no);
 301       Ramdisk_Print("channels[%d].drives[%d].controller.current_command = %02x\n", channel, device, channels[channel].drives[device].controller.current_command);
 302       Ramdisk_Print("channels[%d].drives[%d].controller.buffer_index = %d\n", channel, device, channels[channel].drives[device].controller.buffer_index);
 303
 304
 305       Ramdisk_Print("channels[%d].drives[%d].controller.control.reset = %d\n", channel, device, channels[channel].drives[device].controller.control.reset);
 306       Ramdisk_Print("channels[%d].drives[%d].controller.control.disable_irq = %d\n", channel, device, channels[channel].drives[device].controller.control.disable_irq);
 307
 308
 309       Ramdisk_Print("channels[%d].drives[%d].controller.reset_in_progress = %d\n", channel, device, channels[channel].drives[device].controller.reset_in_progress);
 310       Ramdisk_Print("channels[%d].drives[%d].controller.sectors_per_block = %02x\n", channel, device, channels[channel].drives[device].controller.sectors_per_block);
 311       Ramdisk_Print("channels[%d].drives[%d].controller.lba_mode = %d\n", channel, device, channels[channel].drives[device].controller.lba_mode);
 312       Ramdisk_Print("channels[%d].drives[%d].controller.features = %d\n", channel, device, channels[channel].drives[device].controller.features);
 313
 314
 315       Ramdisk_Print("channels[%d].drives[%d].model_no = %s\n", channel, device, channels[channel].drives[device].model_no);
 316       Ramdisk_Print("channels[%d].drives[%d].device_type = %d\n", channel, device, channels[channel].drives[device].device_type);
 317       Ramdisk_Print("channels[%d].drives[%d].cdrom.locked = %d\n", channel, device, channels[channel].drives[device].cdrom.locked);
 318       Ramdisk_Print("channels[%d].drives[%d].sense.sense_key = %d\n", channel, device, channels[channel].drives[device].sense.sense_key);
 319       Ramdisk_Print("channels[%d].drives[%d].sense.asc = %d\n", channel, device, channels[channel].drives[device].sense.asc);
 320       Ramdisk_Print("channels[%d].drives[%d].sense.ascq = %d\n", channel, device, channels[channel].drives[device].sense.ascq);
 321
 322
 323
 324       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.c_d);
 325
 326       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.i_o);
 327
 328       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.rel);
 329
 330       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.tag);
 331
 332       Ramdisk_Print("channels[%d].drives[%d].cdrom.ready = %d\n", channel, device, channels[channel].drives[device].cdrom.ready);
 333
 334     }//for device
 335   }//for channel
 336
 337   return;
 338 }
 339
 340
 341 Bit32u rd_init_harddrive(struct ramdisk_t *ramdisk,
 342                          struct vm_device *dev)
 343 {
 344
 345
 346   uchar_t channel;
 347   uchar_t device;
 348   struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
 349
 350   Ramdisk_Print("[rd_init_harddrive]\n");
 351   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++)
 352     memset((char *)(channels + channel), 0, sizeof(struct channel_t));
 353
 354
 355   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
 356
 357     channels[channel].ioaddr1 = 0x0;
 358     channels[channel].ioaddr2 = 0x0;
 359     channels[channel].irq = 0;
 360
 361     for (device = 0; device < 2; device++){
 362
 363
 364       CONTROLLER(channel,device).status.busy           = 0;
 365       CONTROLLER(channel,device).status.drive_ready    = 1;
 366       CONTROLLER(channel,device).status.write_fault    = 0;
 367       CONTROLLER(channel,device).status.seek_complete  = 1;
 368       CONTROLLER(channel,device).status.drq            = 0;
 369       CONTROLLER(channel,device).status.corrected_data = 0;
 370       CONTROLLER(channel,device).status.index_pulse    = 0;
 371       CONTROLLER(channel,device).status.index_pulse_count = 0;
 372       CONTROLLER(channel,device).status.err            = 0;
 373
 374       CONTROLLER(channel,device).error_register = 0x01; // diagnostic code: no error
 375       CONTROLLER(channel,device).head_no        = 0;
 376       CONTROLLER(channel,device).sector_count   = 1;
 377       CONTROLLER(channel,device).sector_no      = 1;
 378       CONTROLLER(channel,device).cylinder_no    = 0;
 379       CONTROLLER(channel,device).current_command = 0x00;
 380       CONTROLLER(channel,device).buffer_index = 0;
 381
 382       CONTROLLER(channel,device).control.reset       = 0;
 383       CONTROLLER(channel,device).control.disable_irq = 0;
 384       CONTROLLER(channel,device).reset_in_progress   = 0;
 385
 386       CONTROLLER(channel,device).sectors_per_block   = 0x80;
 387       CONTROLLER(channel,device).lba_mode            = 0;
 388
 389       CONTROLLER(channel,device).features            = 0;
 390
 391           // If not present
 392       channels[channel].drives[device].device_type           = IDE_NONE;
 393
 394       // Make model string
 395       strncpy((char*)channels[channel].drives[device].model_no,
 396               "", 40);
 397       while(strlen((char *)channels[channel].drives[device].model_no) < 40) {
 398         strcat ((char*)channels[channel].drives[device].model_no, " ");
 399       }
 400
 401 //      Ramdisk_Print("channels[%d].drives[%d].controller.current_command = %02x\n", channel, device, channels[channel].drives[device].controller.current_command);
 402 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.c_d);
 403
 404 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.i_o);
 405
 406 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.rel);
 407
 408 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.tag);
 409
 410 //      Ramdisk_Print("channels[%d].drives[%d].controller.control.disable_irq = %d\n", channel, device, channels[channel].drives[device].controller.control.disable_irq);
 411
 412
 413
 414       if (channel == 1) {
 415
 416         channels[channel].ioaddr1 = 0x170;
 417         channels[channel].ioaddr2 = 0x370;
 418         channels[channel].irq =  15;
 419         channels[channel].drive_select = 0;
 420
 421         if (device == 0) {
 422           // Make model string
 423           strncpy((char*)channels[channel].drives[device].model_no,
 424                   "Zheng's Ramdisk", 40);
 425           while (strlen((char *)channels[channel].drives[device].model_no) < 40) {
 426             strcat ((char*)channels[channel].drives[device].model_no, " ");
 427           }
 428
 429           Ramdisk_Print("CDROM on target %d/%d\n", channel, device);
 430
 431           channels[channel].drives[device].device_type = IDE_CDROM;
 432           channels[channel].drives[device].cdrom.locked = 0;
 433           channels[channel].drives[device].sense.sense_key = SENSE_NONE;
 434           channels[channel].drives[device].sense.asc = 0;
 435           channels[channel].drives[device].sense.ascq = 0;
 436
 437
 438           //Check bit fields
 439           channels[channel].drives[device].controller.sector_count = 0;
 440           channels[channel].drives[device].controller.interrupt_reason.c_d = 1;
 441           if (channels[channel].drives[device].controller.sector_count != 0x01) {
 442             Ramdisk_Print("interrupt reason bit field error\n");
 443             return INTR_REASON_BIT_ERR;
 444           }
 445
 446           channels[channel].drives[device].controller.sector_count = 0;
 447           channels[channel].drives[device].controller.interrupt_reason.i_o = 1;
 448           if (channels[channel].drives[device].controller.sector_count != 0x02) {
 449             Ramdisk_Print("interrupt reason bit field error\n");
 450             return INTR_REASON_BIT_ERR;
 451           }
 452
 453           channels[channel].drives[device].controller.sector_count = 0;
 454           channels[channel].drives[device].controller.interrupt_reason.rel = 1;
 455           if (channels[channel].drives[device].controller.sector_count != 0x04) {
 456             Ramdisk_Print("interrupt reason bit field error\n");
 457             return INTR_REASON_BIT_ERR;
 458           }
 459
 460           channels[channel].drives[device].controller.sector_count = 0;
 461           channels[channel].drives[device].controller.interrupt_reason.tag = 3;
 462           if (channels[channel].drives[device].controller.sector_count != 0x18) {
 463             Ramdisk_Print("interrupt reason bit field error\n");
 464             return INTR_REASON_BIT_ERR;
 465           }
 466
 467
 468           channels[channel].drives[device].controller.sector_count = 0;
 469
 470           // allocate low level driver
 471           channels[channel].drives[device].cdrom.cd = (struct cdrom_interface*)V3_Malloc(sizeof(struct cdrom_interface));
 472           Ramdisk_Print("cd = %x\n", channels[channel].drives[device].cdrom.cd);
 473           V3_ASSERT(channels[channel].drives[device].cdrom.cd != NULL);
 474
 475           struct cdrom_interface *cdif = channels[channel].drives[device].cdrom.cd;
 476           memset(cdif, 0, sizeof(struct cdrom_interface));
 477           init_cdrom(cdif);
 478           cdif->ops.init(cdif);
 479
 480           Ramdisk_Print("\t\tCD on ata%d-%d: '%s'\n",channel, device, "");
 481
 482           if((channels[channel].drives[device].cdrom.cd->ops).insert_cdrom(cdif, NULL)) {
 483             Ramdisk_Print("\t\tMedia present in CD-ROM drive\n");
 484             channels[channel].drives[device].cdrom.ready = 1;
 485             channels[channel].drives[device].cdrom.capacity = channels[channel].drives[device].cdrom.cd->ops.capacity(cdif);
 486           } else {
 487             Ramdisk_Print("\t\tCould not locate CD-ROM, continuing with media not present\n");
 488             channels[channel].drives[device].cdrom.ready = 0;
 489           }
 490
 491         }//if device = 0
 492       }//if channel = 0
 493     }//for device
 494   }//for channel
 495
 496   ramdisk->private_data = dev;
 497   ramdisk_state = ramdisk;
 498   Ramdisk_Print("ramdisk_state = %x\n", ramdisk_state);
 499   Ramdisk_Print("ramdisk = %x\n", ramdisk);
 500   //  rd_print_state(ramdisk, dev);
 501   return 0;
 502 }
 503
 504
 505 void   rd_reset_harddrive(struct ramdisk_t *ramdisk, unsigned type)
 506 {
 507   return;
 508 }
 509
 510
 511 void   rd_close_harddrive(struct ramdisk_t *ramdisk)
 512 {
 513   return;
 514 }
 515
 516
 517 ////////////////////////////////////////////////////////////////////
 518
 519
 520 static
 521 Bit32u rd_read_handler(struct channel_t *channels, Bit32u address, unsigned io_len)
 522 {
 523   Bit8u value8;
 524   Bit16u value16;
 525   Bit32u value32;
 526
 527   unsigned drive_select;
 528   unsigned index;
 529   unsigned increment = 0;
 530
 531   Bit8u  channel = MAX_ATA_CHANNEL;
 532   Bit32u port = 0xff; // undefined
 533
 534   Ramdisk_Print("[rd_read_handler]\n");
 535
 536   for (channel=0; channel<MAX_ATA_CHANNEL; channel++) {
 537     if ((address & 0xfff8) == channels[channel].ioaddr1) {
 538       port = address - channels[channel].ioaddr1;
 539       break;
 540       }
 541     else if ((address & 0xfff8) == channels[channel].ioaddr2) {
 542       port = address - channels[channel].ioaddr2 + 0x10;
 543       break;
 544       }
 545     }
 546
 547   if (channel == MAX_ATA_CHANNEL) {
 548     if ((address < 0x03f6) || (address > 0x03f7)) {
 549       RD_PANIC("Error: read: unable to find ATA channel, ioport=0x%04x\n", address);
 550       return 0;
 551     } else {
 552       channel = 0;
 553       port = address - 0x03e0;
 554     }
 555   }
 556
 557   drive_select = channels[channel].drive_select;
 558   if (port != 0x00){
 559     Ramdisk_Print("[R_handler] IO read addr at %x, on drive %d/%d, curcmd = %02x\n", address, channel, drive_select, SELECTED_CONTROLLER(channel).current_command);
 560   }else{
 561
 562   }
 563
 564
 565   struct cdrom_interface *cdif = channels[channel].drives[drive_select].cdrom.cd;
 566   switch (port) {
 567
 568   case 0x00: // hard disk data (16bit) 0x1f0
 569
 570     switch (SELECTED_CONTROLLER(channel).current_command) {
 571     case 0xec:    // IDENTIFY DEVICE
 572     case 0xa1:
 573
 574       index = 0;
 575       SELECTED_CONTROLLER(channel).status.busy = 0;
 576       SELECTED_CONTROLLER(channel).status.drive_ready = 1;
 577       SELECTED_CONTROLLER(channel).status.write_fault = 0;
 578       SELECTED_CONTROLLER(channel).status.seek_complete = 1;
 579       SELECTED_CONTROLLER(channel).status.corrected_data = 0;
 580       SELECTED_CONTROLLER(channel).status.err = 0;
 581
 582       index = SELECTED_CONTROLLER(channel).buffer_index;
 583       value32 = SELECTED_CONTROLLER(channel).buffer[index];
 584       index++;
 585
 586       if (io_len >= 2) {
 587         value32 |= (SELECTED_CONTROLLER(channel).buffer[index] << 8);
 588         index++;
 589       }
 590       if (io_len == 4) {
 591         value32 |= (SELECTED_CONTROLLER(channel).buffer[index] << 16);
 592         value32 |= (SELECTED_CONTROLLER(channel).buffer[index+1] << 24);
 593         index += 2;
 594       }
 595       SELECTED_CONTROLLER(channel).buffer_index = index;
 596
 597       if (SELECTED_CONTROLLER(channel).buffer_index >= 512) {
 598
 599         SELECTED_CONTROLLER(channel).status.drq = 0;
 600       }
 601       GOTO_RETURN_VALUE;
 602
 603     case 0xa0: //send packet cmd
 604
 605         index = SELECTED_CONTROLLER(channel).buffer_index;
 606         increment = 0;
 607         Ramdisk_Print("\t\tatapi.command(%02x), index(%d), cdrom.remaining_blocks(%d)\n", SELECTED_DRIVE(channel).atapi.command, index, SELECTED_DRIVE(channel).cdrom.remaining_blocks);
 608         // Load block if necessary
 609         if (index >= 2048) {
 610           if (index > 2048)
 611             RD_PANIC("\t\tindex > 2048 : 0x%x\n",index);
 612           switch (SELECTED_DRIVE(channel).atapi.command) {
 613           case 0x28: // read (10)
 614           case 0xa8: // read (12)
 615
 616             if (!SELECTED_DRIVE(channel).cdrom.ready) {
 617               RD_PANIC("\t\tRead with CDROM not ready\n");
 618             }
 619             SELECTED_DRIVE(channel).cdrom.cd->ops.read_block(cdif, SELECTED_CONTROLLER(channel).buffer,
 620                                                             SELECTED_DRIVE(channel).cdrom.next_lba);
 621             SELECTED_DRIVE(channel).cdrom.next_lba++;
 622             SELECTED_DRIVE(channel).cdrom.remaining_blocks--;
 623
 624
 625             if (!SELECTED_DRIVE(channel).cdrom.remaining_blocks)
 626               Ramdisk_Print("\t\tLast READ block loaded {CDROM}\n");
 627             else
 628               Ramdisk_Print("\t\tREAD block loaded (%d remaining) {CDROM}\n",
 629                             SELECTED_DRIVE(channel).cdrom.remaining_blocks);
 630
 631             // one block transfered, start at beginning
 632             index = 0;
 633             break;
 634
 635           default: // no need to load a new block
 636             break;
 637           }
 638         }
 639
 640         value32 = SELECTED_CONTROLLER(channel).buffer[index+increment];
 641         increment++;
 642         if (io_len >= 2) {
 643           value32 |= (SELECTED_CONTROLLER(channel).buffer[index+increment] << 8);
 644           increment++;
 645         }
 646         if (io_len == 4) {
 647           value32 |= (SELECTED_CONTROLLER(channel).buffer[index+increment] << 16);
 648           value32 |= (SELECTED_CONTROLLER(channel).buffer[index+increment+1] << 24);
 649           increment += 2;
 650         }
 651         SELECTED_CONTROLLER(channel).buffer_index = index + increment;
 652         SELECTED_CONTROLLER(channel).drq_index += increment;
 653
 654         if (SELECTED_CONTROLLER(channel).drq_index >= (unsigned)SELECTED_DRIVE(channel).atapi.drq_bytes) {
 655           SELECTED_CONTROLLER(channel).status.drq = 0;
 656           SELECTED_CONTROLLER(channel).drq_index = 0;
 657
 658           SELECTED_DRIVE(channel).atapi.total_bytes_remaining -= SELECTED_DRIVE(channel).atapi.drq_bytes;
 659
 660           if (SELECTED_DRIVE(channel).atapi.total_bytes_remaining > 0) {
 661             // one or more blocks remaining (works only for single block commands)
 662
 663             Ramdisk_Print("\t\tPACKET drq bytes read\n");
 664             SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
 665             SELECTED_CONTROLLER(channel).status.busy = 0;
 666             SELECTED_CONTROLLER(channel).status.drq = 1;
 667             SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 0;
 668
 669             // set new byte count if last block
 670             if (SELECTED_DRIVE(channel).atapi.total_bytes_remaining < SELECTED_CONTROLLER(channel).byte_count) {
 671               SELECTED_CONTROLLER(channel).byte_count = SELECTED_DRIVE(channel).atapi.total_bytes_remaining;
 672             }
 673             SELECTED_DRIVE(channel).atapi.drq_bytes = SELECTED_CONTROLLER(channel).byte_count;
 674
 675             rd_raise_interrupt(channels, channel);
 676           } else {
 677             // all bytes read
 678             Ramdisk_Print("\t\tPACKET all bytes read\n");
 679             SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
 680             SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 1;
 681             SELECTED_CONTROLLER(channel).status.drive_ready = 1;
 682             SELECTED_CONTROLLER(channel).interrupt_reason.rel = 0;
 683             SELECTED_CONTROLLER(channel).status.busy = 0;
 684             SELECTED_CONTROLLER(channel).status.drq = 0;
 685             SELECTED_CONTROLLER(channel).status.err = 0;
 686
 687             rd_raise_interrupt(channels, channel);
 688           }
 689         }
 690         GOTO_RETURN_VALUE;
 691         break;
 692
 693     default:
 694       Ramdisk_Print("\t\tread need support more command: %02x\n", SELECTED_CONTROLLER(channel).current_command);
 695       break;
 696     }
 697     ///////////////////////////////////////////
 698
 699   case 0x01: // hard disk error register 0x1f1
 700
 701     SELECTED_CONTROLLER(channel).status.err = 0;
 702     value8 = (!SELECTED_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).error_register;
 703     goto return_value8;
 704     break;
 705   case 0x02: // hard disk sector count / interrupt reason 0x1f2
 706     value8 = (!SELECTED_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).sector_count;
 707     goto return_value8;
 708     break;
 709   case 0x03: // sector number 0x1f3
 710     value8 = (!SELECTED_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).sector_no;
 711     goto return_value8;
 712   case 0x04: // cylinder low 0x1f4
 713     // -- WARNING : On real hardware the controller registers are shared between drives.
 714     // So we must respond even if the select device is not present. Some OS uses this fact
 715     // to detect the disks.... minix2 for example
 716     value8 = (!ANY_IS_PRESENT(channel)) ? 0 : (SELECTED_CONTROLLER(channel).cylinder_no & 0x00ff);
 717     goto return_value8;
 718   case 0x05: // cylinder high 0x1f5
 719     // -- WARNING : On real hardware the controller registers are shared between drives.
 720     // So we must respond even if the select device is not present. Some OS uses this fact
 721     // to detect the disks.... minix2 for example
 722     value8 = (!ANY_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).cylinder_no >> 8;
 723     goto return_value8;
 724
 725   case 0x06: // hard disk drive and head register 0x1f6
 726     // b7 Extended data field for ECC
 727     // b6/b5: Used to be sector size.  00=256,01=512,10=1024,11=128
 728     //   Since 512 was always used, bit 6 was taken to mean LBA mode:
 729     //     b6 1=LBA mode, 0=CHS mode
 730     //     b5 1
 731     // b4: DRV
 732     // b3..0 HD3..HD0
 733     value8 = (1 << 7) |
 734       ((SELECTED_CONTROLLER(channel).lba_mode>0) << 6) |
 735       (1 << 5) | // 01b = 512 sector size
 736       (channels[channel].drive_select << 4) |
 737       (SELECTED_CONTROLLER(channel).head_no << 0);
 738     goto return_value8;
 739     break;
 740     //CONTROLLER(channel,0).lba_mode
 741
 742   case 0x07: // Hard Disk Status 0x1f7
 743   case 0x16: // Hard Disk Alternate Status 0x3f6
 744     if (!ANY_IS_PRESENT(channel)) {
 745       // (mch) Just return zero for these registers
 746       value8 = 0;
 747     } else {
 748       value8 = (
 749                 (SELECTED_CONTROLLER(channel).status.busy << 7) |
 750                 (SELECTED_CONTROLLER(channel).status.drive_ready << 6) |
 751                 (SELECTED_CONTROLLER(channel).status.write_fault << 5) |
 752                 (SELECTED_CONTROLLER(channel).status.seek_complete << 4) |
 753                 (SELECTED_CONTROLLER(channel).status.drq << 3) |
 754                 (SELECTED_CONTROLLER(channel).status.corrected_data << 2) |
 755                 (SELECTED_CONTROLLER(channel).status.index_pulse << 1) |
 756                 (SELECTED_CONTROLLER(channel).status.err) );
 757       SELECTED_CONTROLLER(channel).status.index_pulse_count++;
 758       SELECTED_CONTROLLER(channel).status.index_pulse = 0;
 759       if (SELECTED_CONTROLLER(channel).status.index_pulse_count >= INDEX_PULSE_CYCLE) {
 760         SELECTED_CONTROLLER(channel).status.index_pulse = 1;
 761         SELECTED_CONTROLLER(channel).status.index_pulse_count = 0;
 762       }
 763     }
 764     if (port == 0x07) {
 765       rd_lower_irq((struct vm_device *)(ramdisk_state->private_data), channels[channel].irq);
 766     }
 767     goto return_value8;
 768     break;
 769
 770   case 0x17: // Hard Disk Address Register 0x3f7
 771     // Obsolete and unsupported register.  Not driven by hard
 772     // disk controller.  Report all 1's.  If floppy controller
 773     // is handling this address, it will call this function
 774     // set/clear D7 (the only bit it handles), then return
 775     // the combined value
 776     value8 = 0xff;
 777     goto return_value8;
 778     break;
 779
 780   default:
 781     RD_PANIC("hard drive: io read to address %x unsupported\n",
 782               (unsigned) address);
 783
 784
 785     ////////////////////////////////////////////
 786   }
 787
 788   Ramdisk_Print("\t\tError: hard drive: shouldnt get here!\n");
 789   return 0;
 790
 791 return_value32:
 792   Ramdisk_Print("\t\t32-bit read from %04x = %08x {%s}\n",
 793             (unsigned) address, value32, SELECTED_TYPE_STRING(channel));
 794   return value32;
 795
 796  return_value16:
 797   Ramdisk_Print("\t\t16-bit read from %04x = %04x {%s}\n",
 798             (unsigned) address, value16, SELECTED_TYPE_STRING(channel));
 799   return value16;
 800
 801  return_value8:
 802   Ramdisk_Print("\t\t8-bit read from %x = %02x {%s}\n",
 803             (unsigned) address, value8, SELECTED_TYPE_STRING(channel));
 804   return value8;
 805 }
 806
 807
 808 static
 809 void rd_write_handler(struct channel_t *channels, Bit32u address,
 810                       Bit32u value, unsigned io_len)
 811 {
 812
 813   //  off_t logical_sector;
 814   //  off_t ret;
 815   rd_bool prev_control_reset;
 816
 817   Bit32u id;
 818   int toc_length;
 819
 820   Bit8u  channel = MAX_ATA_CHANNEL;
 821   Bit32u port = 0xff; // undefined
 822
 823   Ramdisk_Print("[rd_write_handler]\n");
 824   //  Bit8u atapi_command;
 825   //int alloc_length;
 826
 827   for (channel=0; channel<MAX_ATA_CHANNEL; channel++) {
 828     if ((address & 0xfff8) == channels[channel].ioaddr1) {
 829       port = address - channels[channel].ioaddr1;
 830       break;
 831     }
 832     else if ((address & 0xfff8) == channels[channel].ioaddr2) {
 833       port = address - channels[channel].ioaddr2 + 0x10;
 834       break;
 835       }
 836     }
 837
 838   if (channel == MAX_ATA_CHANNEL) {
 839     if (address != 0x03f6) {
 840       RD_PANIC("Panic: write: unable to find ATA channel, ioport=0x%04x\n", address);
 841     } else {
 842       channel = 0;
 843       port = address - 0x03e0;
 844     }
 845   }
 846
 847   Ramdisk_Print("[W_handler] IO write to %x = %02x, channel = %d\n", (unsigned) address, (unsigned) value, channel);
 848
 849   struct cdrom_interface *cdif = SELECTED_DRIVE(channel).cdrom.cd;
 850
 851   switch (port) {
 852
 853   case 0x00: // 0x1f0
 854     Ramdisk_Print("\t\twrite port 170\n");
 855
 856     //////////////////////////////////////////////////////////
 857     switch (SELECTED_CONTROLLER(channel).current_command) {
 858     case 0x30: // WRITE SECTORS
 859       RD_PANIC("\t\tneed to implement 0x30(write sector) to port 0x170\n");
 860       break;
 861
 862     case 0xa0: // PACKET
 863       if (SELECTED_CONTROLLER(channel).buffer_index >= PACKET_SIZE)
 864         RD_PANIC("IO write(0x%04x): buffer_index >= PACKET_SIZE", address);
 865       SELECTED_CONTROLLER(channel).buffer[SELECTED_CONTROLLER(channel).buffer_index] = value;
 866       SELECTED_CONTROLLER(channel).buffer[SELECTED_CONTROLLER(channel).buffer_index+1] = (value >> 8);
 867       SELECTED_CONTROLLER(channel).buffer_index += 2;
 868
 869       /* if packet completely writtten */
 870       if (SELECTED_CONTROLLER(channel).buffer_index >= PACKET_SIZE) {
 871         // complete command received
 872         Bit8u atapi_command = SELECTED_CONTROLLER(channel).buffer[0];
 873
 874         Ramdisk_Print("\t\tcdrom: ATAPI command 0x%x started\n", atapi_command);
 875
 876         switch (atapi_command) {
 877         case 0x00: // test unit ready
 878           if (SELECTED_DRIVE(channel).cdrom.ready) {
 879             rd_atapi_cmd_nop(channels, channel);
 880           } else {
 881             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
 882           }
 883           rd_raise_interrupt(channels, channel);
 884           break;
 885
 886         case 0x03: { // request sense
 887           int alloc_length = SELECTED_CONTROLLER(channel).buffer[4];
 888           rd_init_send_atapi_command(channels, channel, atapi_command, 18, alloc_length, false);
 889
 890           // sense data
 891           SELECTED_CONTROLLER(channel).buffer[0] = 0x70 | (1 << 7);
 892           SELECTED_CONTROLLER(channel).buffer[1] = 0;
 893           SELECTED_CONTROLLER(channel).buffer[2] = SELECTED_DRIVE(channel).sense.sense_key;
 894           SELECTED_CONTROLLER(channel).buffer[3] = SELECTED_DRIVE(channel).sense.information.arr[0];
 895           SELECTED_CONTROLLER(channel).buffer[4] = SELECTED_DRIVE(channel).sense.information.arr[1];
 896           SELECTED_CONTROLLER(channel).buffer[5] = SELECTED_DRIVE(channel).sense.information.arr[2];
 897           SELECTED_CONTROLLER(channel).buffer[6] = SELECTED_DRIVE(channel).sense.information.arr[3];
 898           SELECTED_CONTROLLER(channel).buffer[7] = 17-7;
 899           SELECTED_CONTROLLER(channel).buffer[8] = SELECTED_DRIVE(channel).sense.specific_inf.arr[0];
 900           SELECTED_CONTROLLER(channel).buffer[9] = SELECTED_DRIVE(channel).sense.specific_inf.arr[1];
 901           SELECTED_CONTROLLER(channel).buffer[10] = SELECTED_DRIVE(channel).sense.specific_inf.arr[2];
 902           SELECTED_CONTROLLER(channel).buffer[11] = SELECTED_DRIVE(channel).sense.specific_inf.arr[3];
 903           SELECTED_CONTROLLER(channel).buffer[12] = SELECTED_DRIVE(channel).sense.asc;
 904           SELECTED_CONTROLLER(channel).buffer[13] = SELECTED_DRIVE(channel).sense.ascq;
 905           SELECTED_CONTROLLER(channel).buffer[14] = SELECTED_DRIVE(channel).sense.fruc;
 906           SELECTED_CONTROLLER(channel).buffer[15] = SELECTED_DRIVE(channel).sense.key_spec.arr[0];
 907           SELECTED_CONTROLLER(channel).buffer[16] = SELECTED_DRIVE(channel).sense.key_spec.arr[1];
 908           SELECTED_CONTROLLER(channel).buffer[17] = SELECTED_DRIVE(channel).sense.key_spec.arr[2];
 909
 910           rd_ready_to_send_atapi(channels, channel);
 911         }
 912           break;
 913
 914         case 0x1b: { // start stop unit
 915           //bx_bool Immed = (SELECTED_CONTROLLER(channel).buffer[1] >> 0) & 1;
 916           rd_bool LoEj = (SELECTED_CONTROLLER(channel).buffer[4] >> 1) & 1;
 917           rd_bool Start = (SELECTED_CONTROLLER(channel).buffer[4] >> 0) & 1;
 918
 919           if (!LoEj && !Start) { // stop the disc
 920             RD_ERROR("FIXME: Stop disc not implemented\n");
 921             rd_atapi_cmd_nop(channels, channel);
 922             rd_raise_interrupt(channels, channel);
 923           } else if (!LoEj && Start) { // start (spin up) the disc
 924
 925             SELECTED_DRIVE(channel).cdrom.cd->ops.start_cdrom(cdif);
 926
 927             RD_ERROR("FIXME: ATAPI start disc not reading TOC\n");
 928             rd_atapi_cmd_nop(channels, channel);
 929             rd_raise_interrupt(channels, channel);
 930           } else if (LoEj && !Start) { // Eject the disc
 931             rd_atapi_cmd_nop(channels, channel);
 932
 933             if (SELECTED_DRIVE(channel).cdrom.ready) {
 934
 935               SELECTED_DRIVE(channel).cdrom.cd->ops.eject_cdrom(cdif);
 936
 937               SELECTED_DRIVE(channel).cdrom.ready = 0;
 938               //bx_options.atadevice[channel][SLAVE_SELECTED(channel)].Ostatus->set(EJECTED);
 939               //bx_gui->update_drive_status_buttons();
 940             }
 941             rd_raise_interrupt(channels, channel);
 942           } else { // Load the disc
 943             // My guess is that this command only closes the tray, that's a no-op for us
 944             rd_atapi_cmd_nop(channels, channel);
 945             rd_raise_interrupt(channels, channel);
 946           }
 947         }
 948           break;
 949
 950         case 0xbd: { // mechanism status
 951           uint16 alloc_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 8);
 952
 953           if (alloc_length == 0)
 954             RD_PANIC("Zero allocation length to MECHANISM STATUS not impl.\n");
 955
 956           rd_init_send_atapi_command(channels, channel, atapi_command, 8, alloc_length, false);
 957
 958           SELECTED_CONTROLLER(channel).buffer[0] = 0; // reserved for non changers
 959           SELECTED_CONTROLLER(channel).buffer[1] = 0; // reserved for non changers
 960
 961           SELECTED_CONTROLLER(channel).buffer[2] = 0; // Current LBA (TODO!)
 962           SELECTED_CONTROLLER(channel).buffer[3] = 0; // Current LBA (TODO!)
 963           SELECTED_CONTROLLER(channel).buffer[4] = 0; // Current LBA (TODO!)
 964
 965           SELECTED_CONTROLLER(channel).buffer[5] = 1; // one slot
 966
 967           SELECTED_CONTROLLER(channel).buffer[6] = 0; // slot table length
 968           SELECTED_CONTROLLER(channel).buffer[7] = 0; // slot table length
 969
 970           rd_ready_to_send_atapi(channels, channel);
 971         }
 972           break;
 973
 974         case 0x5a: { // mode sense
 975           uint16 alloc_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 7);
 976
 977           Bit8u PC = SELECTED_CONTROLLER(channel).buffer[2] >> 6;
 978           Bit8u PageCode = SELECTED_CONTROLLER(channel).buffer[2] & 0x3f;
 979
 980           switch (PC) {
 981           case 0x0: // current values
 982             switch (PageCode) {
 983             case 0x01: // error recovery
 984               rd_init_send_atapi_command(channels, channel, atapi_command, sizeof(struct error_recovery_t) + 8, alloc_length, false);
 985
 986               rd_init_mode_sense_single(channels, channel, &SELECTED_DRIVE(channel).cdrom.current.error_recovery,
 987                                      sizeof(struct error_recovery_t));
 988               rd_ready_to_send_atapi(channels, channel);
 989               break;
 990
 991             case 0x2a: // CD-ROM capabilities & mech. status
 992               rd_init_send_atapi_command(channels, channel, atapi_command, 28, alloc_length, false);
 993               rd_init_mode_sense_single(channels, channel, &SELECTED_CONTROLLER(channel).buffer[8], 28);
 994               SELECTED_CONTROLLER(channel).buffer[8] = 0x2a;
 995               SELECTED_CONTROLLER(channel).buffer[9] = 0x12;
 996               SELECTED_CONTROLLER(channel).buffer[10] = 0x00;
 997               SELECTED_CONTROLLER(channel).buffer[11] = 0x00;
 998               // Multisession, Mode 2 Form 2, Mode 2 Form 1
 999               SELECTED_CONTROLLER(channel).buffer[12] = 0x70;
1000               SELECTED_CONTROLLER(channel).buffer[13] = (3 << 5);
1001               SELECTED_CONTROLLER(channel).buffer[14] = (unsigned char)
1002                 (1 |
1003                  (SELECTED_DRIVE(channel).cdrom.locked ? (1 << 1) : 0) |
1004                  (1 << 3) |
1005                  (1 << 5));
1006               SELECTED_CONTROLLER(channel).buffer[15] = 0x00;
1007               SELECTED_CONTROLLER(channel).buffer[16] = (706 >> 8) & 0xff;
1008               SELECTED_CONTROLLER(channel).buffer[17] = 706 & 0xff;
1009               SELECTED_CONTROLLER(channel).buffer[18] = 0;
1010               SELECTED_CONTROLLER(channel).buffer[19] = 2;
1011               SELECTED_CONTROLLER(channel).buffer[20] = (512 >> 8) & 0xff;
1012               SELECTED_CONTROLLER(channel).buffer[21] = 512 & 0xff;
1013               SELECTED_CONTROLLER(channel).buffer[22] = (706 >> 8) & 0xff;
1014               SELECTED_CONTROLLER(channel).buffer[23] = 706 & 0xff;
1015               SELECTED_CONTROLLER(channel).buffer[24] = 0;
1016               SELECTED_CONTROLLER(channel).buffer[25] = 0;
1017               SELECTED_CONTROLLER(channel).buffer[26] = 0;
1018               SELECTED_CONTROLLER(channel).buffer[27] = 0;
1019               rd_ready_to_send_atapi(channels, channel);
1020               break;
1021
1022             case 0x0d: // CD-ROM
1023             case 0x0e: // CD-ROM audio control
1024             case 0x3f: // all
1025               RD_ERROR("cdrom: MODE SENSE (curr), code=%x not implemented yet\n",
1026                         PageCode);
1027             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1028                             ASC_INV_FIELD_IN_CMD_PACKET);
1029             rd_raise_interrupt(channels, channel);
1030             break;
1031
1032           default:
1033             // not implemeted by this device
1034             Ramdisk_Print("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1035                      PC, PageCode);
1036             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1037                             ASC_INV_FIELD_IN_CMD_PACKET);
1038             rd_raise_interrupt(channels, channel);
1039             break;
1040           }
1041           break;
1042
1043           case 0x1: // changeable values
1044             switch (PageCode) {
1045             case 0x01: // error recovery
1046             case 0x0d: // CD-ROM
1047             case 0x0e: // CD-ROM audio control
1048             case 0x2a: // CD-ROM capabilities & mech. status
1049             case 0x3f: // all
1050               RD_ERROR("cdrom: MODE SENSE (chg), code=%x not implemented yet\n",
1051                        PageCode);
1052             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1053                               ASC_INV_FIELD_IN_CMD_PACKET);
1054             rd_raise_interrupt(channels, channel);
1055             break;
1056
1057           default:
1058               // not implemeted by this device
1059             Ramdisk_Print("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1060                           PC, PageCode);
1061           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1062                              ASC_INV_FIELD_IN_CMD_PACKET);
1063           rd_raise_interrupt(channels, channel);
1064           break;
1065         }
1066           break;
1067
1068         case 0x2: // default values
1069           switch (PageCode) {
1070           case 0x01: // error recovery
1071           case 0x0d: // CD-ROM
1072           case 0x0e: // CD-ROM audio control
1073           case 0x2a: // CD-ROM capabilities & mech. status
1074           case 0x3f: // all
1075             RD_PANIC("cdrom: MODE SENSE (dflt), code=%x\n",
1076                      PageCode);
1077             break;
1078
1079             default:
1080               // not implemeted by this device
1081               Ramdisk_Print("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1082                       PC, PageCode);
1083               rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1084                                  ASC_INV_FIELD_IN_CMD_PACKET);
1085               rd_raise_interrupt(channels, channel);
1086               break;
1087           }
1088           break;
1089
1090         case 0x3: // saved values not implemented
1091           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
1092           rd_raise_interrupt(channels, channel);
1093           break;
1094
1095         default:
1096           RD_PANIC("Should not get here!\n");
1097           break;
1098         }
1099       }
1100       break;
1101
1102     case 0x12: { // inquiry
1103       uint8 alloc_length = SELECTED_CONTROLLER(channel).buffer[4];
1104
1105       rd_init_send_atapi_command(channels, channel, atapi_command, 36, alloc_length, false);
1106
1107       SELECTED_CONTROLLER(channel).buffer[0] = 0x05; // CD-ROM
1108       SELECTED_CONTROLLER(channel).buffer[1] = 0x80; // Removable
1109       SELECTED_CONTROLLER(channel).buffer[2] = 0x00; // ISO, ECMA, ANSI version
1110       SELECTED_CONTROLLER(channel).buffer[3] = 0x21; // ATAPI-2, as specified
1111       SELECTED_CONTROLLER(channel).buffer[4] = 31; // additional length (total 36)
1112       SELECTED_CONTROLLER(channel).buffer[5] = 0x00; // reserved
1113       SELECTED_CONTROLLER(channel).buffer[6] = 0x00; // reserved
1114       SELECTED_CONTROLLER(channel).buffer[7] = 0x00; // reserved
1115
1116       // Vendor ID
1117       const char* vendor_id = "VTAB    ";
1118       int i;
1119       for (i = 0; i < 8; i++)
1120         SELECTED_CONTROLLER(channel).buffer[8+i] = vendor_id[i];
1121
1122       // Product ID
1123       const char* product_id = "Turbo CD-ROM    ";
1124       for (i = 0; i < 16; i++)
1125         SELECTED_CONTROLLER(channel).buffer[16+i] = product_id[i];
1126
1127       // Product Revision level
1128       const char* rev_level = "1.0 ";
1129       for (i = 0; i < 4; i++)
1130         SELECTED_CONTROLLER(channel).buffer[32+i] = rev_level[i];
1131
1132       rd_ready_to_send_atapi(channels, channel);
1133     }
1134       break;
1135
1136         case 0x25: { // read cd-rom capacity
1137           // no allocation length???
1138           rd_init_send_atapi_command(channels, channel, atapi_command, 8, 8, false);
1139
1140           if (SELECTED_DRIVE(channel).cdrom.ready) {
1141             uint32 capacity = SELECTED_DRIVE(channel).cdrom.capacity;
1142             Ramdisk_Print("\t\tCapacity is %d sectors (%d bytes)\n", capacity, capacity * 2048);
1143             SELECTED_CONTROLLER(channel).buffer[0] = (capacity >> 24) & 0xff;
1144             SELECTED_CONTROLLER(channel).buffer[1] = (capacity >> 16) & 0xff;
1145             SELECTED_CONTROLLER(channel).buffer[2] = (capacity >> 8) & 0xff;
1146             SELECTED_CONTROLLER(channel).buffer[3] = (capacity >> 0) & 0xff;
1147             SELECTED_CONTROLLER(channel).buffer[4] = (2048 >> 24) & 0xff;
1148             SELECTED_CONTROLLER(channel).buffer[5] = (2048 >> 16) & 0xff;
1149             SELECTED_CONTROLLER(channel).buffer[6] = (2048 >> 8) & 0xff;
1150             SELECTED_CONTROLLER(channel).buffer[7] = (2048 >> 0) & 0xff;
1151             rd_ready_to_send_atapi(channels, channel);
1152           } else {
1153             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1154             rd_raise_interrupt(channels, channel);
1155           }
1156         }
1157           break;
1158
1159         case 0xbe: { // read cd
1160           if (SELECTED_DRIVE(channel).cdrom.ready) {
1161             RD_ERROR("Read CD with CD present not implemented\n");
1162             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1163             rd_raise_interrupt(channels, channel);
1164           } else {
1165             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1166             rd_raise_interrupt(channels, channel);
1167           }
1168         }
1169           break;
1170
1171         case 0x43: { // read toc
1172           if (SELECTED_DRIVE(channel).cdrom.ready) {
1173
1174             bool msf = (SELECTED_CONTROLLER(channel).buffer[1] >> 1) & 1;
1175             uint8 starting_track = SELECTED_CONTROLLER(channel).buffer[6];
1176
1177             uint16 alloc_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 7);
1178
1179             uint8 format = (SELECTED_CONTROLLER(channel).buffer[9] >> 6);
1180             int i;
1181             switch (format) {
1182             case 0:
1183
1184               if (!(SELECTED_DRIVE(channel).cdrom.cd->ops.read_toc(cdif, SELECTED_CONTROLLER(channel).buffer,
1185                                                                &toc_length, msf, starting_track))) {
1186                 rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1187                                    ASC_INV_FIELD_IN_CMD_PACKET);
1188                 rd_raise_interrupt(channels, channel);
1189               } else {
1190                 rd_init_send_atapi_command(channels, channel, atapi_command, toc_length, alloc_length, false);
1191                 rd_ready_to_send_atapi(channels, channel);
1192               }
1193               break;
1194
1195             case 1:
1196               // multi session stuff. we ignore this and emulate a single session only
1197               rd_init_send_atapi_command(channels, channel, atapi_command, 12, alloc_length, false);
1198
1199               SELECTED_CONTROLLER(channel).buffer[0] = 0;
1200               SELECTED_CONTROLLER(channel).buffer[1] = 0x0a;
1201               SELECTED_CONTROLLER(channel).buffer[2] = 1;
1202               SELECTED_CONTROLLER(channel).buffer[3] = 1;
1203               for (i = 0; i < 8; i++)
1204                 SELECTED_CONTROLLER(channel).buffer[4+i] = 0;
1205
1206               rd_ready_to_send_atapi(channels, channel);
1207               break;
1208
1209             case 2:
1210             default:
1211               RD_PANIC("(READ TOC) Format %d not supported\n", format);
1212               break;
1213             }
1214           } else {
1215             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1216             rd_raise_interrupt(channels, channel);
1217           }
1218         }
1219           break;
1220
1221         case 0x28: // read (10)
1222         case 0xa8: // read (12)
1223           {
1224
1225             uint32 transfer_length;
1226             if (atapi_command == 0x28)
1227               transfer_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 7);
1228             else
1229               transfer_length = rd_read_32bit(SELECTED_CONTROLLER(channel).buffer + 6);
1230
1231             uint32 lba = rd_read_32bit(SELECTED_CONTROLLER(channel).buffer + 2);
1232
1233             if (!SELECTED_DRIVE(channel).cdrom.ready) {
1234               rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1235               rd_raise_interrupt(channels, channel);
1236               break;
1237             }
1238
1239             if (transfer_length == 0) {
1240               rd_atapi_cmd_nop(channels, channel);
1241               rd_raise_interrupt(channels, channel);
1242               Ramdisk_Print("\t\tREAD(%d) with transfer length 0, ok\n", atapi_command==0x28?10:12);
1243               break;
1244             }
1245
1246             if (lba + transfer_length > SELECTED_DRIVE(channel).cdrom.capacity) {
1247               rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
1248               rd_raise_interrupt(channels, channel);
1249               break;
1250             }
1251
1252             Ramdisk_Print("\t\tcdrom: READ (%d) LBA=%d LEN=%d\n", atapi_command==0x28?10:12, lba, transfer_length);
1253
1254             // handle command
1255             rd_init_send_atapi_command(channels, channel, atapi_command, transfer_length * 2048,
1256                                        transfer_length * 2048, true);
1257             SELECTED_DRIVE(channel).cdrom.remaining_blocks = transfer_length;
1258             SELECTED_DRIVE(channel).cdrom.next_lba = lba;
1259             rd_ready_to_send_atapi(channels, channel);
1260           }
1261           break;
1262
1263         case 0x2b: { // seek
1264           uint32 lba = rd_read_32bit(SELECTED_CONTROLLER(channel).buffer + 2);
1265           if (!SELECTED_DRIVE(channel).cdrom.ready) {
1266             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1267             rd_raise_interrupt(channels, channel);
1268             break;
1269           }
1270
1271           if (lba > SELECTED_DRIVE(channel).cdrom.capacity) {
1272             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
1273             rd_raise_interrupt(channels, channel);
1274             break;
1275           }
1276           Ramdisk_Print("\t\tcdrom: SEEK (ignored)\n");
1277           rd_atapi_cmd_nop(channels, channel);
1278           rd_raise_interrupt(channels, channel);
1279         }
1280           break;
1281
1282         case 0x1e: { // prevent/allow medium removal
1283           if (SELECTED_DRIVE(channel).cdrom.ready) {
1284             SELECTED_DRIVE(channel).cdrom.locked = SELECTED_CONTROLLER(channel).buffer[4] & 1;
1285             rd_atapi_cmd_nop(channels, channel);
1286           } else {
1287             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1288           }
1289           rd_raise_interrupt(channels, channel);
1290         }
1291           break;
1292
1293         case 0x42: { // read sub-channel
1294           bool msf = get_packet_field(channel,1, 1, 1);
1295           bool sub_q = get_packet_field(channel,2, 6, 1);
1296           uint8 data_format = get_packet_byte(channel,3);
1297           uint8 track_number = get_packet_byte(channel,6);
1298           uint16 alloc_length = get_packet_word(channel,7);
1299           UNUSED(msf);
1300           UNUSED(data_format);
1301           UNUSED(track_number);
1302
1303           if (!SELECTED_DRIVE(channel).cdrom.ready) {
1304             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1305             rd_raise_interrupt(channels, channel);
1306           } else {
1307             SELECTED_CONTROLLER(channel).buffer[0] = 0;
1308             SELECTED_CONTROLLER(channel).buffer[1] = 0; // audio not supported
1309             SELECTED_CONTROLLER(channel).buffer[2] = 0;
1310             SELECTED_CONTROLLER(channel).buffer[3] = 0;
1311
1312             int ret_len = 4; // header size
1313
1314             if (sub_q) { // !sub_q == header only
1315               RD_ERROR("Read sub-channel with SubQ not implemented\n");
1316               rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1317                                  ASC_INV_FIELD_IN_CMD_PACKET);
1318               rd_raise_interrupt(channels, channel);
1319             }
1320
1321             rd_init_send_atapi_command(channels, channel, atapi_command, ret_len, alloc_length, false);
1322             rd_ready_to_send_atapi(channels, channel);
1323           }
1324         }
1325           break;
1326
1327         case 0x51: { // read disc info
1328           // no-op to keep the Linux CD-ROM driver happy
1329           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1330           rd_raise_interrupt(channels, channel);
1331         }
1332           break;
1333
1334         case 0x55: // mode select
1335         case 0xa6: // load/unload cd
1336         case 0x4b: // pause/resume
1337         case 0x45: // play audio
1338         case 0x47: // play audio msf
1339         case 0xbc: // play cd
1340         case 0xb9: // read cd msf
1341         case 0x44: // read header
1342         case 0xba: // scan
1343         case 0xbb: // set cd speed
1344         case 0x4e: // stop play/scan
1345         case 0x46: // ???
1346         case 0x4a: // ???
1347           RD_ERROR("ATAPI command 0x%x not implemented yet\n",
1348                    atapi_command);
1349           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1350           rd_raise_interrupt(channels, channel);
1351           break;
1352         default:
1353           RD_PANIC("Unknown ATAPI command 0x%x (%d)\n",
1354                    atapi_command, atapi_command);
1355           // We'd better signal the error if the user chose to continue
1356           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1357           rd_raise_interrupt(channels, channel);
1358           break;
1359         }
1360       }
1361
1362       break;
1363
1364
1365     default:
1366       RD_PANIC("\t\tIO write(0x%x): current command is %02xh\n", address,
1367                (unsigned) SELECTED_CONTROLLER(channel).current_command);
1368     }
1369
1370 /////////////////////////////////////////////////////////
1371     break;
1372   case 0x01: // hard disk write precompensation 0x1f1
1373     WRITE_FEATURES(channel,value);
1374     break;
1375
1376   case 0x02: // hard disk sector count 0x1f2
1377     WRITE_SECTOR_COUNT(channel,value);
1378     break;
1379
1380   case 0x03: // hard disk sector number 0x1f3
1381     WRITE_SECTOR_NUMBER(channel,value);
1382     break;
1383
1384   case 0x04: // hard disk cylinder low 0x1f4
1385     WRITE_CYLINDER_LOW(channel,value);
1386     break;
1387
1388   case 0x05: // hard disk cylinder high 0x1f5
1389     WRITE_CYLINDER_HIGH(channel,value);
1390     break;
1391
1392   case 0x06: // hard disk drive and head register 0x1f6
1393     // b7 Extended data field for ECC
1394     // b6/b5: Used to be sector size.  00=256,01=512,10=1024,11=128
1395     //   Since 512 was always used, bit 6 was taken to mean LBA mode:
1396     //     b6 1=LBA mode, 0=CHS mode
1397     //     b5 1
1398     // b4: DRV
1399     // b3..0 HD3..HD0
1400
1401     if ( (value & 0xa0) != 0xa0 ) // 1x1xxxxx
1402       Ramdisk_Print("\t\tIO write 0x%x (%02x): not 1x1xxxxxb\n", address, (unsigned) value);
1403
1404     Bit32u drvsel = channels[channel].drive_select = (value >> 4) & 0x01;
1405     WRITE_HEAD_NO(channel,value & 0xf);
1406     if (SELECTED_CONTROLLER(channel).lba_mode == 0 && ((value >> 6) & 1) == 1){
1407       Ramdisk_Print("\t\tenabling LBA mode\n");
1408         }
1409     WRITE_LBA_MODE(channel,(value >> 6) & 1);
1410     SELECTED_DRIVE(channel).cdrom.cd->lba = (value >> 6) & 1;
1411
1412
1413     if (!SELECTED_IS_PRESENT(channel)) {
1414       Ramdisk_Print ("\t\tError: device set to %d which does not exist! channel = %d\n",drvsel, channel);
1415       SELECTED_CONTROLLER(channel).error_register = 0x04; // aborted
1416       SELECTED_CONTROLLER(channel).status.err = 1;
1417     }
1418
1419     break;
1420
1421
1422   case 0x07: // hard disk command 0x1f7
1423
1424       switch (value) {
1425         // ATAPI commands
1426         case 0xa1: // IDENTIFY PACKET DEVICE
1427               if (SELECTED_IS_CD(channel)) {
1428                     SELECTED_CONTROLLER(channel).current_command = value;
1429                     SELECTED_CONTROLLER(channel).error_register = 0;
1430
1431                     SELECTED_CONTROLLER(channel).status.busy = 0;
1432                     SELECTED_CONTROLLER(channel).status.drive_ready = 1;
1433                     SELECTED_CONTROLLER(channel).status.write_fault = 0;
1434                     SELECTED_CONTROLLER(channel).status.drq   = 1;
1435                     SELECTED_CONTROLLER(channel).status.err   = 0;
1436
1437                     SELECTED_CONTROLLER(channel).status.seek_complete = 1;
1438                     SELECTED_CONTROLLER(channel).status.corrected_data = 0;
1439
1440                     SELECTED_CONTROLLER(channel).buffer_index = 0;
1441                     rd_raise_interrupt(channels, channel);
1442                     rd_identify_ATAPI_drive(channels, channel);
1443               } else {
1444                 rd_command_aborted(channels, channel, 0xa1);
1445               }
1446               break;
1447
1448         case 0xa0: // SEND PACKET (atapi)
1449               if (SELECTED_IS_CD(channel)) {
1450                     // PACKET
1451                     if (SELECTED_CONTROLLER(channel).features & (1 << 0))
1452                           RD_PANIC("\t\tPACKET-DMA not supported");
1453                     if (SELECTED_CONTROLLER(channel).features & (1 << 1))
1454                           RD_PANIC("\t\tPACKET-overlapped not supported");
1455
1456                     // We're already ready!
1457                     SELECTED_CONTROLLER(channel).sector_count = 1;
1458                     SELECTED_CONTROLLER(channel).status.busy = 0;
1459                     SELECTED_CONTROLLER(channel).status.write_fault = 0;
1460                     // serv bit??
1461                     SELECTED_CONTROLLER(channel).status.drq = 1;
1462                     SELECTED_CONTROLLER(channel).status.err = 0;
1463
1464                     // NOTE: no interrupt here
1465                     SELECTED_CONTROLLER(channel).current_command = value;
1466                     SELECTED_CONTROLLER(channel).buffer_index = 0;
1467               } else {
1468                 rd_command_aborted (channels, channel, 0xa0);
1469               }
1470               break;
1471
1472       default:
1473         Ramdisk_Print("\t\tneed translate command %2x\n", value);
1474         break;
1475       }//switch(value)
1476
1477
1478   case 0x16: // hard disk adapter control 0x3f6
1479     // (mch) Even if device 1 was selected, a write to this register
1480     // goes to device 0 (if device 1 is absent)
1481
1482     prev_control_reset = SELECTED_CONTROLLER(channel).control.reset;
1483     channels[channel].drives[0].controller.control.reset         = value & 0x04;
1484     channels[channel].drives[1].controller.control.reset         = value & 0x04;
1485     // CGS: was: SELECTED_CONTROLLER(channel).control.disable_irq    = value & 0x02;
1486     channels[channel].drives[0].controller.control.disable_irq = value & 0x02;
1487     channels[channel].drives[1].controller.control.disable_irq = value & 0x02;
1488
1489     Ramdisk_Print("\t\tadpater control reg: reset controller = %d\n",
1490                   (unsigned) (SELECTED_CONTROLLER(channel).control.reset) ? 1 : 0);
1491     Ramdisk_Print("\t\tadpater control reg: disable_irq(X) = %d\n",
1492                   (unsigned) (SELECTED_CONTROLLER(channel).control.disable_irq) ? 1 : 0);
1493
1494     if (!prev_control_reset && SELECTED_CONTROLLER(channel).control.reset) {
1495       // transition from 0 to 1 causes all drives to reset
1496       Ramdisk_Print("\t\thard drive: RESET\n");
1497
1498       // (mch) Set BSY, drive not ready
1499       for (id = 0; id < 2; id++) {
1500         CONTROLLER(channel,id).status.busy           = 1;
1501         CONTROLLER(channel,id).status.drive_ready    = 0;
1502         CONTROLLER(channel,id).reset_in_progress     = 1;
1503
1504         CONTROLLER(channel,id).status.write_fault    = 0;
1505         CONTROLLER(channel,id).status.seek_complete  = 1;
1506         CONTROLLER(channel,id).status.drq            = 0;
1507         CONTROLLER(channel,id).status.corrected_data = 0;
1508         CONTROLLER(channel,id).status.err            = 0;
1509
1510         CONTROLLER(channel,id).error_register = 0x01; // diagnostic code: no error
1511
1512         CONTROLLER(channel,id).current_command = 0x00;
1513         CONTROLLER(channel,id).buffer_index = 0;
1514
1515         CONTROLLER(channel,id).sectors_per_block = 0x80;
1516         CONTROLLER(channel,id).lba_mode          = 0;
1517
1518         CONTROLLER(channel,id).control.disable_irq = 0;
1519         rd_lower_irq((struct vm_device *)(ramdisk_state->private_data), channels[channel].irq);
1520       }
1521     } else if (SELECTED_CONTROLLER(channel).reset_in_progress &&
1522                !SELECTED_CONTROLLER(channel).control.reset) {
1523       // Clear BSY and DRDY
1524       Ramdisk_Print("\t\tReset complete {%s}\n", SELECTED_TYPE_STRING(channel));
1525       for (id = 0; id < 2; id++) {
1526         CONTROLLER(channel,id).status.busy           = 0;
1527         CONTROLLER(channel,id).status.drive_ready    = 1;
1528         CONTROLLER(channel,id).reset_in_progress     = 0;
1529
1530         // Device signature
1531         if (DRIVE_IS_HD(channel,id)) {
1532           Ramdisk_Print("\t\tdrive %d/%d is harddrive\n", channel, id);
1533           CONTROLLER(channel,id).head_no        = 0;
1534           CONTROLLER(channel,id).sector_count   = 1;
1535           CONTROLLER(channel,id).sector_no      = 1;
1536           CONTROLLER(channel,id).cylinder_no    = 0;
1537         } else {
1538           CONTROLLER(channel,id).head_no        = 0;
1539           CONTROLLER(channel,id).sector_count   = 1;
1540           CONTROLLER(channel,id).sector_no      = 1;
1541           CONTROLLER(channel,id).cylinder_no    = 0xeb14;
1542         }
1543       }
1544     }
1545     Ramdisk_Print("\t\ts[0].controller.control.disable_irq = %02x\n", (channels[channel].drives[0]).controller.control.disable_irq);
1546     Ramdisk_Print("\t\ts[1].controller.control.disable_irq = %02x\n", (channels[channel].drives[1]).controller.control.disable_irq);
1547     break;
1548
1549   default:
1550     RD_PANIC("\t\thard drive: io write to address %x = %02x\n",
1551                   (unsigned) address, (unsigned) value);
1552   }
1553
1554   return;
1555 }
1556
1557
1558 static
1559 void rd_identify_ATAPI_drive(struct channel_t *channels, Bit8u channel)
1560 {
1561   unsigned i;
1562   const char* serial_number = " VT00001\0\0\0\0\0\0\0\0\0\0\0\0";
1563   const char* firmware = "ALPHA1  ";
1564
1565   SELECTED_DRIVE(channel).id_drive[0] = (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0); // Removable CDROM, 50us response, 12 byte packets
1566
1567   for (i = 1; i <= 9; i++)
1568         SELECTED_DRIVE(channel).id_drive[i] = 0;
1569
1570
1571   for (i = 0; i < 10; i++) {
1572         SELECTED_DRIVE(channel).id_drive[10+i] = (serial_number[i*2] << 8) |
1573               serial_number[i*2 + 1];
1574   }
1575
1576   for (i = 20; i <= 22; i++)
1577         SELECTED_DRIVE(channel).id_drive[i] = 0;
1578
1579
1580   for (i = 0; i < strlen(firmware)/2; i++) {
1581         SELECTED_DRIVE(channel).id_drive[23+i] = (firmware[i*2] << 8) |
1582               firmware[i*2 + 1];
1583   }
1584   V3_ASSERT((23+i) == 27);
1585
1586   for (i = 0; i < strlen((char *) SELECTED_MODEL(channel))/2; i++) {
1587         SELECTED_DRIVE(channel).id_drive[27+i] = (SELECTED_MODEL(channel)[i*2] << 8) |
1588               SELECTED_MODEL(channel)[i*2 + 1];
1589   }
1590   V3_ASSERT((27+i) == 47);
1591
1592   SELECTED_DRIVE(channel).id_drive[47] = 0;
1593   SELECTED_DRIVE(channel).id_drive[48] = 1; // 32 bits access
1594
1595   SELECTED_DRIVE(channel).id_drive[49] = (1 << 9); // LBA supported
1596
1597   SELECTED_DRIVE(channel).id_drive[50] = 0;
1598   SELECTED_DRIVE(channel).id_drive[51] = 0;
1599   SELECTED_DRIVE(channel).id_drive[52] = 0;
1600
1601   SELECTED_DRIVE(channel).id_drive[53] = 3; // words 64-70, 54-58 valid
1602
1603   for (i = 54; i <= 62; i++)
1604         SELECTED_DRIVE(channel).id_drive[i] = 0;
1605
1606   // copied from CFA540A
1607   SELECTED_DRIVE(channel).id_drive[63] = 0x0103; // variable (DMA stuff)
1608   SELECTED_DRIVE(channel).id_drive[64] = 0x0001; // PIO
1609   SELECTED_DRIVE(channel).id_drive[65] = 0x00b4;
1610   SELECTED_DRIVE(channel).id_drive[66] = 0x00b4;
1611   SELECTED_DRIVE(channel).id_drive[67] = 0x012c;
1612   SELECTED_DRIVE(channel).id_drive[68] = 0x00b4;
1613
1614   SELECTED_DRIVE(channel).id_drive[69] = 0;
1615   SELECTED_DRIVE(channel).id_drive[70] = 0;
1616   SELECTED_DRIVE(channel).id_drive[71] = 30; // faked
1617   SELECTED_DRIVE(channel).id_drive[72] = 30; // faked
1618   SELECTED_DRIVE(channel).id_drive[73] = 0;
1619   SELECTED_DRIVE(channel).id_drive[74] = 0;
1620
1621   SELECTED_DRIVE(channel).id_drive[75] = 0;
1622
1623   for (i = 76; i <= 79; i++)
1624         SELECTED_DRIVE(channel).id_drive[i] = 0;
1625
1626   SELECTED_DRIVE(channel).id_drive[80] = 0x1e; // supports up to ATA/ATAPI-4
1627   SELECTED_DRIVE(channel).id_drive[81] = 0;
1628   SELECTED_DRIVE(channel).id_drive[82] = 0;
1629   SELECTED_DRIVE(channel).id_drive[83] = 0;
1630   SELECTED_DRIVE(channel).id_drive[84] = 0;
1631   SELECTED_DRIVE(channel).id_drive[85] = 0;
1632   SELECTED_DRIVE(channel).id_drive[86] = 0;
1633   SELECTED_DRIVE(channel).id_drive[87] = 0;
1634   SELECTED_DRIVE(channel).id_drive[88] = 0;
1635
1636   for (i = 89; i <= 126; i++)
1637         SELECTED_DRIVE(channel).id_drive[i] = 0;
1638
1639   SELECTED_DRIVE(channel).id_drive[127] = 0;
1640   SELECTED_DRIVE(channel).id_drive[128] = 0;
1641
1642   for (i = 129; i <= 159; i++)
1643         SELECTED_DRIVE(channel).id_drive[i] = 0;
1644
1645   for (i = 160; i <= 255; i++)
1646         SELECTED_DRIVE(channel).id_drive[i] = 0;
1647
1648   // now convert the id_drive array (native 256 word format) to
1649   // the controller buffer (512 bytes)
1650   Bit16u temp16;
1651   for (i = 0; i <= 255; i++) {
1652         temp16 = SELECTED_DRIVE(channel).id_drive[i];
1653         SELECTED_CONTROLLER(channel).buffer[i*2] = temp16 & 0x00ff;
1654         SELECTED_CONTROLLER(channel).buffer[i*2+1] = temp16 >> 8;
1655   }
1656
1657   return;
1658 }
1659
1660
1661
1662 static
1663 void rd_raise_interrupt(struct channel_t *channels, Bit8u channel)
1664 {
1665   Bit32u irq;
1666   struct vm_device *dev;
1667
1668   Ramdisk_Print("[raise_interrupt] disable_irq = %02x\n", SELECTED_CONTROLLER(channel).control.disable_irq);
1669
1670   if (!SELECTED_CONTROLLER(channel).control.disable_irq) {
1671     Ramdisk_Print("\t\traising interrupt\n");
1672   } else {
1673     Ramdisk_Print("\t\tNot raising interrupt\n");
1674   }
1675   if (!SELECTED_CONTROLLER(channel).control.disable_irq) {
1676     irq = channels[channel].irq;
1677     Ramdisk_Print("\t\tRaising interrupt %d {%s}\n\n", irq, SELECTED_TYPE_STRING(channel));
1678     //        DEV_pic_raise_irq(irq);
1679     dev = (struct vm_device*) ramdisk_state->private_data;
1680     Ramdisk_Print("\t\tdev = %x\n", dev);
1681     dev->vm->vm_ops.raise_irq(dev->vm, irq);
1682   } else {
1683     Ramdisk_Print("\t\tirq is disabled\n");
1684   }
1685
1686   return;
1687 }
1688
1689 static
1690 void rd_lower_irq(struct vm_device *dev, Bit32u irq)// __attribute__(regparm(1))
1691 {
1692   Ramdisk_Print("[lower_irq] irq = %d\n", irq);
1693   dev->vm->vm_ops.lower_irq(dev->vm, irq);
1694 }
1695
1696
1697 /*
1698  * Public Routines
1699  */
1700 static
1701 uint_t ramdisk_read_port(ushort_t port,
1702                          void *src,
1703                          uint_t length,
1704                          struct vm_device *dev)
1705 {
1706   uint_t i;
1707   Ramdisk_Print("[ramdisk_read_port] port = %x, length = %d\n", port, length);
1708     switch (length) {
1709     case 1:
1710       ((uchar_t*)src)[0] = rd_read_handler(ramdisk_state->channels, port, length);
1711       break;
1712     case 2:
1713       ((ushort_t*)src)[0] = rd_read_handler(ramdisk_state->channels, port, length);
1714       break;
1715     case 4:
1716       ((uint_t*)src)[0] = rd_read_handler(ramdisk_state->channels, port, length);
1717       break;
1718     default:
1719       for (i = 0; i < length; i++) {
1720         ((uchar_t*)src)[i] = rd_read_handler(ramdisk_state->channels, port, 1);
1721       }
1722     }//switch length
1723
1724   return length;
1725 }
1726
1727
1728 static
1729 uint_t ramdisk_write_port(ushort_t port,
1730                          void *src,
1731                          uint_t length,
1732                          struct vm_device *dev)
1733 {
1734   Ramdisk_Print("[ramdisk_write_port] port = %x, length = %d\n", port, length);
1735   /*
1736   uint_t i;
1737
1738   for (i = 0; i < length; i++)
1739     Ramdisk_Print("\t\tsrc[%d] = 0x%02x\n", i, ((uchar_t*)src)[i]);
1740   */
1741
1742   switch(length) {
1743   case 1:
1744     rd_write_handler(ramdisk_state->channels, port, *((uchar_t *)src), length);
1745     break;
1746   case 2:
1747     rd_write_handler(ramdisk_state->channels, port, *((ushort_t *)src), length);
1748     break;
1749   case 4:
1750     rd_write_handler(ramdisk_state->channels, port, *((uint_t *)src), length);
1751     break;
1752   default:
1753     rd_write_handler(ramdisk_state->channels, port, *((uchar_t *)src), length);
1754     break;
1755   }
1756
1757   return 1;
1758 }
1759
1760
1761 static void trace_info(ushort_t port, void *src, uint_t length)
1762 {
1763   switch(port){
1764
1765   case 0x3e8:
1766     if (length == 1 && *((uchar_t*) src) == ATA_DETECT)
1767       Ramdisk_Print("ata_dectect()\n");
1768     break;
1769
1770   case 0x3e9:
1771     if (length == 1 && *((uchar_t*) src) == ATA_RESET)
1772       Ramdisk_Print("ata_reset()\n");
1773     break;
1774
1775   case 0x3ea:
1776     if (length == 1 && *((uchar_t*) src) == ATA_CMD_DATA_IN)
1777       Ramdisk_Print("ata_cmd_data_in()\n");
1778     break;
1779
1780   case 0x3eb:
1781     if (length == 1 && *((uchar_t*) src) == ATA_CMD_DATA_OUT)
1782       Ramdisk_Print("ata_cmd_data_out()\n");
1783     break;
1784
1785   case 0x3ec:
1786     if (length == 1 && *((uchar_t*) src) == ATA_CMD_PACKET)
1787       Ramdisk_Print("ata_cmd_packet()\n");
1788     break;
1789
1790   case 0x3ed:
1791     if (length == 1 && *((uchar_t*) src) == ATAPI_GET_SENSE)
1792       Ramdisk_Print("atapi_get_sense()\n");
1793     break;
1794
1795   case 0x3ee:
1796     if (length == 1 && *((uchar_t*) src) == ATAPI_IS_READY)
1797       Ramdisk_Print("atapi_is_ready()\n");
1798     break;
1799
1800   case 0x3ef:
1801     if (length == 1 && *((uchar_t*) src) == ATAPI_IS_CDROM)
1802       Ramdisk_Print("atapi_is_cdrom()\n");
1803     break;
1804
1805
1806   case 0x2e8:
1807     if (length == 1 && *((uchar_t*) src) == CDEMU_INIT)
1808       Ramdisk_Print("cdemu_init()\n");
1809     break;
1810
1811   case 0x2e9:
1812     if (length == 1 && *((uchar_t*) src) == CDEMU_ISACTIVE)
1813       Ramdisk_Print("cdemu_isactive()\n");
1814     break;
1815
1816   case 0x2ea:
1817     if (length == 1 && *((uchar_t*) src) == CDEMU_EMULATED_DRIVE)
1818       Ramdisk_Print("cdemu_emulated_drive()\n");
1819     break;
1820
1821   case 0x2eb:
1822     if (length == 1 && *((uchar_t*) src) == CDROM_BOOT)
1823       Ramdisk_Print("cdrom_boot()\n");
1824     break;
1825
1826   case 0x2ec:
1827     if (length == 1 && *((uchar_t*) src) == HARD_DRIVE_POST)
1828       Ramdisk_Print("ata_hard_drive_post()\n");
1829     break;
1830
1831   case 0x2ed:
1832     if (length == 1)
1833       Ramdisk_Print("ata_device_no(%d)\n", *((uchar_t*) src));
1834     break;
1835
1836   case 0x2ee:
1837     if (length == 1)
1838       Ramdisk_Print("ata_device_type(%d)\n", *((uchar_t*) src));
1839     break;
1840
1841   case 0x2ef:
1842     if (length == 1 && *((uchar_t*) src) == INT13_HARDDISK)
1843       Ramdisk_Print("int13_harddrive()\n");
1844     break;
1845
1846   case 0x2f8:
1847     if (length == 1 && *((uchar_t*) src) == INT13_CDROM)
1848       Ramdisk_Print("int13_cdrom()\n");
1849     break;
1850
1851   case 0x2f9:
1852     if (length == 1 && *((uchar_t*) src) == INT13_CDEMU)
1853       Ramdisk_Print("int13_cdemu()\n");
1854     break;
1855
1856   case 0x2fa:
1857     if (length == 1 && *((uchar_t*) src) == INT13_ELTORITO)
1858       Ramdisk_Print("int13_eltorito()\n");
1859     break;
1860
1861   case 0x2fb:
1862     if (length == 1 && *((uchar_t*) src) == INT13_DISKETTE_FUNCTION)
1863       Ramdisk_Print("int13_diskette_function()\n");
1864     break;
1865
1866
1867   default:
1868     break;
1869   }
1870 }
1871
1872
1873 uint_t ramdisk_read_port_ignore(ushort_t port,
1874                          void *src,
1875                          uint_t length,
1876                          struct vm_device *dev)
1877 {
1878   //  Ramdisk_Print("[ramdisk_read_port_ignore] port = %x, length = %d\n", port, length);
1879   return 1;
1880 }
1881
1882 uint_t ramdisk_write_port_ignore(ushort_t port,
1883                          void *src,
1884                          uint_t length,
1885                          struct vm_device *dev)
1886 {
1887
1888   //  Ramdisk_Print("[ramdisk_write_port_ignore] port = %x, length = %d\n", port, length);
1889
1890   trace_info(port, src, length);
1891   return 1;
1892 }
1893
1894 //////////////////////////////////////////////////////////////////////////
1895
1896 /*
1897  * ATAPI subroutines
1898  */
1899
1900 static
1901 void rd_init_send_atapi_command(struct channel_t *channels, Bit8u channel, Bit8u command, int req_length, int alloc_length, bool lazy)
1902 {
1903   // SELECTED_CONTROLLER(channel).byte_count is a union of SELECTED_CONTROLLER(channel).cylinder_no;
1904   // lazy is used to force a data read in the buffer at the next read.
1905
1906   Ramdisk_Print("[rd_init_send_atapi_cmd]\n");
1907   if (SELECTED_CONTROLLER(channel).byte_count == 0xffff)
1908     SELECTED_CONTROLLER(channel).byte_count = 0xfffe;
1909
1910   if ((SELECTED_CONTROLLER(channel).byte_count & 1)
1911       && !(alloc_length <= SELECTED_CONTROLLER(channel).byte_count)) {
1912     Ramdisk_Print("\t\tOdd byte count (0x%04x) to ATAPI command 0x%02x, using 0x%x\n",
1913                   SELECTED_CONTROLLER(channel).byte_count, command, SELECTED_CONTROLLER(channel).byte_count - 1);
1914     SELECTED_CONTROLLER(channel).byte_count -= 1;
1915   }
1916
1917   if (SELECTED_CONTROLLER(channel).byte_count == 0)
1918     RD_PANIC("\t\tATAPI command with zero byte count\n");
1919
1920   if (alloc_length < 0)
1921     RD_PANIC("\t\tAllocation length < 0\n");
1922   if (alloc_length == 0)
1923     alloc_length = SELECTED_CONTROLLER(channel).byte_count;
1924
1925   SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
1926   SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 0;
1927   SELECTED_CONTROLLER(channel).status.busy = 0;
1928   SELECTED_CONTROLLER(channel).status.drq = 1;
1929   SELECTED_CONTROLLER(channel).status.err = 0;
1930
1931   // no bytes transfered yet
1932   if (lazy)
1933     SELECTED_CONTROLLER(channel).buffer_index = 2048;
1934   else
1935     SELECTED_CONTROLLER(channel).buffer_index = 0;
1936   SELECTED_CONTROLLER(channel).drq_index = 0;
1937
1938   if (SELECTED_CONTROLLER(channel).byte_count > req_length)
1939     SELECTED_CONTROLLER(channel).byte_count = req_length;
1940
1941   if (SELECTED_CONTROLLER(channel).byte_count > alloc_length)
1942     SELECTED_CONTROLLER(channel).byte_count = alloc_length;
1943
1944   SELECTED_DRIVE(channel).atapi.command = command;
1945   SELECTED_DRIVE(channel).atapi.drq_bytes = SELECTED_CONTROLLER(channel).byte_count;
1946   SELECTED_DRIVE(channel).atapi.total_bytes_remaining = (req_length < alloc_length) ? req_length : alloc_length;
1947
1948   // if (lazy) {
1949   // // bias drq_bytes and total_bytes_remaining
1950   // SELECTED_DRIVE(channel).atapi.drq_bytes += 2048;
1951   // SELECTED_DRIVE(channel).atapi.total_bytes_remaining += 2048;
1952   // }
1953 }
1954
1955
1956 static
1957 void rd_atapi_cmd_error(struct channel_t *channels, Bit8u channel, sense_t sense_key, asc_t asc)
1958 {
1959   Ramdisk_Print("[rd_atapi_cmd_error]\n");
1960   Ramdisk_Print("Error: atapi_cmd_error channel=%02x key=%02x asc=%02x\n", channel, sense_key, asc);
1961
1962   SELECTED_CONTROLLER(channel).error_register = sense_key << 4;
1963   SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
1964   SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 1;
1965   SELECTED_CONTROLLER(channel).interrupt_reason.rel = 0;
1966   SELECTED_CONTROLLER(channel).status.busy = 0;
1967   SELECTED_CONTROLLER(channel).status.drive_ready = 1;
1968   SELECTED_CONTROLLER(channel).status.write_fault = 0;
1969   SELECTED_CONTROLLER(channel).status.drq = 0;
1970   SELECTED_CONTROLLER(channel).status.err = 1;
1971
1972   SELECTED_DRIVE(channel).sense.sense_key = sense_key;
1973   SELECTED_DRIVE(channel).sense.asc = asc;
1974   SELECTED_DRIVE(channel).sense.ascq = 0;
1975 }
1976
1977
1978 static
1979 void rd_atapi_cmd_nop(struct channel_t *channels, Bit8u channel)
1980 {
1981   Ramdisk_Print("[rd_atapi_cmd_nop]\n");
1982   SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
1983   SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 1;
1984   SELECTED_CONTROLLER(channel).interrupt_reason.rel = 0;
1985   SELECTED_CONTROLLER(channel).status.busy = 0;
1986   SELECTED_CONTROLLER(channel).status.drive_ready = 1;
1987   SELECTED_CONTROLLER(channel).status.drq = 0;
1988   SELECTED_CONTROLLER(channel).status.err = 0;
1989 }
1990
1991
1992 static
1993 void rd_init_mode_sense_single(struct channel_t *channels,
1994                                Bit8u channel, const void* src, int size)
1995 {
1996   Ramdisk_Print("[rd_init_mode_sense_single]\n");
1997   // Header
1998   SELECTED_CONTROLLER(channel).buffer[0] = (size+6) >> 8;
1999   SELECTED_CONTROLLER(channel).buffer[1] = (size+6) & 0xff;
2000   SELECTED_CONTROLLER(channel).buffer[2] = 0x70; // no media present
2001   SELECTED_CONTROLLER(channel).buffer[3] = 0; // reserved
2002   SELECTED_CONTROLLER(channel).buffer[4] = 0; // reserved
2003   SELECTED_CONTROLLER(channel).buffer[5] = 0; // reserved
2004   SELECTED_CONTROLLER(channel).buffer[6] = 0; // reserved
2005   SELECTED_CONTROLLER(channel).buffer[7] = 0; // reserved
2006
2007   // Data
2008   memcpy(SELECTED_CONTROLLER(channel).buffer + 8, src, size);
2009 }
2010
2011
2012 static
2013 void rd_ready_to_send_atapi(struct channel_t *channels, Bit8u channel)
2014 {
2015   Ramdisk_Print("[rd_ready_to_send_atapi]\n");
2016   rd_raise_interrupt(ramdisk_state->channels, channel);
2017 }
2018
2019
2020 static
2021 void rd_command_aborted(struct channel_t *channels,
2022                         Bit8u channel, unsigned value)
2023 {
2024   Ramdisk_Print("[rd_command_aborted]\n");
2025   Ramdisk_Print("\t\taborting on command 0x%02x {%s}\n", value, SELECTED_TYPE_STRING(channel));
2026   SELECTED_CONTROLLER(channel).current_command = 0;
2027   SELECTED_CONTROLLER(channel).status.busy = 0;
2028   SELECTED_CONTROLLER(channel).status.drive_ready = 1;
2029   SELECTED_CONTROLLER(channel).status.err = 1;
2030   SELECTED_CONTROLLER(channel).error_register = 0x04; // command ABORTED
2031   SELECTED_CONTROLLER(channel).status.drq = 0;
2032   SELECTED_CONTROLLER(channel).status.seek_complete = 0;
2033   SELECTED_CONTROLLER(channel).status.corrected_data = 0;
2034   SELECTED_CONTROLLER(channel).buffer_index = 0;
2035   rd_raise_interrupt(ramdisk_state->channels, channel);
2036 }
2037
2038
2039
2040 /*
2041  * Success: return 0;
2042  * Failure: return integer greater than 0
2043  */
2044
2045 struct ramdisk_t * create_ramdisk()
2046 {
2047   struct ramdisk_t *ramdisk;
2048   ramdisk = (struct ramdisk_t *)V3_Malloc(sizeof(struct ramdisk_t));
2049   V3_ASSERT(ramdisk != NULL);
2050
2051   ramdisk->cops.init = &rd_init_harddrive;
2052   ramdisk->cops.close = &rd_close_harddrive;
2053   ramdisk->cops.reset = &rd_reset_harddrive;
2054
2055   ramdisk->eops.read_port = &ramdisk_read_port;
2056   ramdisk->eops.write_port = &ramdisk_write_port;
2057   ramdisk->eops.read_port_ignore = &ramdisk_read_port_ignore;
2058   ramdisk->eops.write_port_ignore = &ramdisk_write_port_ignore;
2059
2060   return ramdisk;
2061 }