Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


bacef2334dd32b9b1330349383ddf6e45b6d32aa
[palacios.git] / palacios / src / devices / ramdisk.c
1 /* 
2  *
3  *   Copyright (C) 2002  MandrakeSoft S.A.
4  *
5  *     MandrakeSoft S.A.
6  *     43, rue d'Aboukir
7  *     75002 Paris - France
8  *     http://www.linux-mandrake.com/
9  *     http://www.mandrakesoft.com/
10  *
11  *   This library is free software; you can redistribute it and/or
12  *   modify it under the terms of the GNU Lesser General Public
13  *   License as published by the Free Software Foundation; either
14  *   version 2 of the License, or (at your option) any later version.
15  *
16  *   This library is distributed in the hope that it will be useful,
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *   Lesser General Public License for more details.
20  *
21  *  You should have received a copy of the GNU Lesser General Public
22  *  License along with this library; if not, write to the Free Software
23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  * Major modifications made for the V3VEE project
26  * 
27  * The V3VEE Project is a joint project between Northwestern University
28  * and the University of New Mexico.  You can find out more at 
29  * http://www.v3vee.org
30  * 
31  * Copyright (c) 2008, Zheng Cui <cuizheng@cs.unm.edu>
32  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
33  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
34  * All rights reserved for original changes
35  * 
36  */
37
38
39 #include <devices/ramdisk.h>
40 #include <palacios/vmm.h>
41 #include <devices/cdrom.h>
42 #include <devices/ide.h>
43
44
45 #ifndef DEBUG_RAMDISK
46 #undef PrintDebug
47 #define PrintDebug(_f, _a...)
48 #endif
49                                                  
50
51 /*
52  * Data type definitions
53  *
54  */
55 #define INDEX_PULSE_CYCLE 10
56
57
58
59
60 #define INTR_REASON_BIT_ERR           0x01
61 #define UNABLE_FIND_TAT_CHANNEL_ERR   0x02
62 #define DRQ_ERR                       0x03
63 #define READ_BUF_GT_512               0x04
64
65
66
67 #define PRI_DATA_PORT         0x1f0
68 #define PRI_FEATURES_PORT     0x1f1
69 #define PRI_SECT_CNT_PORT     0x1f2
70 #define PRI_SECT_ADDR1_PORT   0x1f3
71 #define PRI_SECT_ADDR2_PORT   0x1f4
72 #define PRI_SECT_ADDR3_PORT   0x1f5
73 #define PRI_DRV_SEL_PORT      0x1f6
74 #define PRI_CMD_PORT          0x1f7
75 #define PRI_CTRL_PORT         0x3f6
76 #define PRI_ADDR_REG_PORT     0x3f7
77
78 #define SEC_DATA_PORT         0x170
79 #define SEC_FEATURES_PORT     0x171
80 #define SEC_SECT_CNT_PORT     0x172
81 #define SEC_SECT_ADDR1_PORT   0x173
82 #define SEC_SECT_ADDR2_PORT   0x174
83 #define SEC_SECT_ADDR3_PORT   0x175
84 #define SEC_DRV_SEL_PORT      0x176
85 #define SEC_CMD_PORT          0x177
86 #define SEC_CTRL_PORT         0x376
87 #define SEC_ADDR_REG_PORT     0x377
88
89
90
91
92
93 #define PACKET_SIZE 12
94
95
96
97 // FLAT MODE
98 // Open a image. Returns non-negative if successful.
99 //int open (const char* pathname);
100
101 // Open an image with specific flags. Returns non-negative if successful.
102 int rd_open (const char* pathname, int flags);
103
104 // Close the image.
105 void rd_close ();
106
107 // Position ourselves. Return the resulting offset from the
108 // beginning of the file.
109 off_t rd_lseek (off_t offset, int whence);
110
111 // Read count bytes to the buffer buf. Return the number of
112 // bytes read (count).
113 ssize_t rd_read (void* buf, size_t count);
114
115 // Write count bytes from buf. Return the number of bytes
116 // written (count).
117 ssize_t rd_write (const void* buf, size_t count);
118
119
120
121
122
123 /*
124  * Debug facilities
125  */
126
127 #define ATA_DETECT                     0xf0 //0X3E8
128 #define ATA_RESET                      0xf1 //0X3E9
129 #define ATA_CMD_DATA_IN                0xf2 //0X3EA
130 #define ATA_CMD_DATA_OUT               0xf3 //0X3EB
131 #define ATA_CMD_PACKET                 0xf4 //0X3EC
132 #define ATAPI_GET_SENSE                0xf5 //0X3ED
133 #define ATAPI_IS_READY                 0xf6 //0X3EE
134 #define ATAPI_IS_CDROM                 0xf7 //0X3EF
135
136 #define CDEMU_INIT                     0xf8 //0X2E8
137 #define CDEMU_ISACTIVE                 0xf9 //0X2E9
138 #define CDEMU_EMULATED_DRIVE           0xfa //0X2EA
139 #define CDROM_BOOT                     0xfb //0X2EB
140
141
142 #define HARD_DRIVE_POST                0xfc //0X2EC
143
144
145 #define ATA_DEVICE_NO                  0xfd //0X2ED
146 #define ATA_DEVICE_TYPE                0xfe //0X2ED
147
148 #define INT13_HARDDISK                 0xff //0x2ef
149 #define INT13_CDROM                    0xe0 //0x2f8
150 #define INT13_CDEMU                    0xe1 //0x2f9
151 #define INT13_ELTORITO                 0xe2 //0x2fa
152 #define INT13_DISKETTE_FUNCTION        0xe3 //0x2fb
153
154
155
156
157 static const char cdrom_str[] = "CD-ROM";
158 static const char harddisk_str[] = "HARDDISK";
159 static const char none_str[] = "NONE";
160
161
162 static inline const char * device_type_to_str(device_type_t type) {
163   switch (type) {
164   case IDE_DISK:
165     return harddisk_str;
166   case IDE_CDROM:
167     return cdrom_str;
168   case IDE_NONE:
169     return none_str;
170   default:
171     return NULL;
172   }
173 }
174
175
176 static inline void write_features(struct channel_t * channel, uchar_t value) {
177   channel->drives[0].controller.features = value;
178   channel->drives[1].controller.features = value;
179 }
180
181
182 static inline void write_sector_count(struct channel_t * channel, uchar_t value) {
183   channel->drives[0].controller.sector_count = value;
184   channel->drives[1].controller.sector_count = value;
185 }
186
187 static inline void write_sector_number(struct channel_t * channel, uchar_t value) {
188   channel->drives[0].controller.sector_no = value;
189   channel->drives[1].controller.sector_no = value;
190 }
191
192
193 static inline void write_cylinder_low(struct channel_t * channel, uchar_t value) {
194   channel->drives[0].controller.cylinder_no &= 0xff00;
195   channel->drives[0].controller.cylinder_no |= value;
196   channel->drives[1].controller.cylinder_no &= 0xff00;
197   channel->drives[1].controller.cylinder_no |= value;
198 }
199
200 static inline void write_cylinder_high(struct channel_t * channel, uchar_t value) {
201   ushort_t val2 = value;
202   val2 = val2 << 8;
203   channel->drives[0].controller.cylinder_no &= 0x00ff;
204   channel->drives[0].controller.cylinder_no |= (val2 & 0xff00);
205
206   channel->drives[1].controller.cylinder_no &= 0x00ff;
207   channel->drives[1].controller.cylinder_no |= (val2 & 0xff00);
208 }
209
210 static inline void write_head_no(struct channel_t * channel, uchar_t value) {
211   channel->drives[0].controller.head_no = value;
212   channel->drives[1].controller.head_no = value;
213 }
214
215 static inline void write_lba_mode(struct channel_t * channel, uchar_t value) {
216   channel->drives[0].controller.lba_mode = value;
217   channel->drives[1].controller.lba_mode = value;
218 }
219
220
221 static inline uint_t get_channel_no(struct ramdisk_t * ramdisk, struct channel_t * channel) {
222   return (((uchar_t *)channel - (uchar_t *)(ramdisk->channels)) / sizeof(struct channel_t));
223 }
224
225 static inline uint_t get_drive_no(struct channel_t * channel, struct drive_t * drive) {
226   return (((uchar_t *)drive - (uchar_t*)(channel->drives)) /  sizeof(struct drive_t));
227 }
228
229 static inline struct drive_t * get_selected_drive(struct channel_t * channel) {
230   return &(channel->drives[channel->drive_select]);
231 }
232
233
234 static inline int is_primary_port(struct ramdisk_t * ramdisk, ushort_t port) {
235   switch(port) 
236     {
237     case PRI_DATA_PORT:
238     case PRI_FEATURES_PORT:
239     case PRI_SECT_CNT_PORT:
240     case PRI_SECT_ADDR1_PORT:
241     case PRI_SECT_ADDR2_PORT:
242     case PRI_SECT_ADDR3_PORT:
243     case PRI_DRV_SEL_PORT:
244     case PRI_CMD_PORT:
245     case PRI_CTRL_PORT:
246       return 1;
247     default:
248       return 0;
249     }
250 }
251
252
253
254 static inline int is_secondary_port(struct ramdisk_t * ramdisk, ushort_t port) {
255   switch(port) 
256     {
257     case SEC_DATA_PORT:
258     case SEC_FEATURES_PORT:
259     case SEC_SECT_CNT_PORT:
260     case SEC_SECT_ADDR1_PORT:
261     case SEC_SECT_ADDR2_PORT:
262     case SEC_SECT_ADDR3_PORT:
263     case SEC_DRV_SEL_PORT:
264     case SEC_CMD_PORT:
265     case SEC_CTRL_PORT:
266       return 1;
267     default:
268       return 0;
269     }
270 }
271
272 static inline int num_drives_on_channel(struct channel_t * channel) {
273   if ((channel->drives[0].device_type == IDE_NONE) &&
274       (channel->drives[1].device_type == IDE_NONE)) {
275     return 0;
276   } else if ((channel->drives[0].device_type != IDE_NONE) &&
277              (channel->drives[1].device_type != IDE_NONE)) {
278     return 2;
279   } else {
280     return 1;
281   }
282 }
283
284
285
286 static inline uchar_t extract_bits(uchar_t * buf, uint_t buf_offset, uint_t bit_offset, uint_t num_bits) {
287   uchar_t val = buf[buf_offset];
288   val = val >> bit_offset;
289   val &= ((1 << num_bits) -1);
290   return val;
291 }
292
293
294 static inline uchar_t get_packet_field(struct channel_t * channel, uint_t packet_offset, uint_t bit_offset, uint_t num_bits) {
295   struct drive_t * drive = get_selected_drive(channel);
296   return extract_bits(drive->controller.buffer, packet_offset, bit_offset, num_bits);
297 }
298
299
300 static inline uchar_t get_packet_byte(struct channel_t * channel, uint_t offset) {
301   struct drive_t * drive = get_selected_drive(channel);
302   return drive->controller.buffer[offset];
303 }
304
305 static inline uint16_t get_packet_word(struct channel_t * channel, uint_t offset) {
306   struct drive_t * drive = get_selected_drive(channel);
307   uint16_t val = drive->controller.buffer[offset];
308   val = val << 8;
309   val |= drive->controller.buffer[offset + 1];
310   return val;
311 }
312
313
314 static inline uint16_t rd_read_16bit(const uint8_t* buf) {
315   return (buf[0] << 8) | buf[1];
316 }
317
318
319
320 static inline uint32_t rd_read_32bit(const uint8_t* buf) {
321   return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
322 }
323
324 ////////////////////////////////////////////////////////////////////////////
325
326
327 /*
328  * ATAPI routines
329  */
330
331
332 static void rd_init_mode_sense_single(struct vm_device * dev, struct channel_t * channel, const void * src, int size);
333
334 static void rd_command_aborted(struct vm_device * dev, struct channel_t * channel, unsigned value);
335
336
337
338
339 static int handle_atapi_packet_command(struct vm_device * dev, 
340                                        struct channel_t * channel, 
341                                        ushort_t val);
342
343 static int rd_init_send_atapi_command(struct vm_device * dev, 
344                                       struct channel_t * channel, 
345                                       Bit8u command, int req_length, 
346                                       int alloc_length, bool lazy);
347
348 static void rd_ready_to_send_atapi(struct vm_device * dev, 
349                                    struct channel_t * channel);
350
351 static void rd_atapi_cmd_error(struct vm_device * dev, 
352                                struct channel_t * channel, 
353                                sense_t sense_key, asc_t asc);
354
355 static void rd_atapi_cmd_nop(struct vm_device * dev, struct channel_t * channel);
356 static void rd_identify_ATAPI_drive(struct vm_device * dev, struct channel_t * channel);
357
358
359
360 /*
361  * Interrupt handling
362  */
363 static void rd_raise_interrupt(struct vm_device * dev, struct channel_t * channel);
364 static void rd_lower_irq(struct vm_device *dev, Bit32u irq);
365
366
367
368 /*
369  * Helper routines
370  */
371
372
373
374 #ifdef DEBUG_RAMDISK
375 static void rd_print_state(struct ramdisk_t *ramdisk);
376 static int check_bit_fields(struct controller_t * controller);
377 #endif
378 ////////////////////////////////////////////////////////////////////
379
380
381
382
383
384 static Bit32u rd_init_hardware(struct ramdisk_t *ramdisk) {
385   uint_t channel_num; 
386   uint_t device;
387   struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
388
389   PrintDebug("[rd_init_harddrive]\n");
390
391   for (channel_num = 0; channel_num < MAX_ATA_CHANNEL; channel_num++) {
392     memset((char *)(channels + channel_num), 0, sizeof(struct channel_t));
393   }
394
395   for (channel_num = 0; channel_num < MAX_ATA_CHANNEL; channel_num++){
396     struct channel_t * channel = &(channels[channel_num]);
397
398     channel->ioaddr1 = 0x0;
399     channel->ioaddr2 = 0x0;
400     channel->irq = 0;
401
402     for (device = 0; device < 2; device++){
403       struct drive_t * drive = &(channel->drives[device]);
404       struct controller_t * controller = &(drive->controller);
405
406       controller->status.busy = 0;
407       controller->status.drive_ready = 1;
408       controller->status.write_fault = 0;
409       controller->status.seek_complete = 1;
410       controller->status.drq = 0;
411       controller->status.corrected_data = 0;
412       controller->status.index_pulse = 0;
413       controller->status.index_pulse_count = 0;
414       controller->status.err = 0;
415
416       controller->error_register = 0x01; // diagnostic code: no error
417       controller->head_no = 0;
418       controller->sector_count = 1;
419       controller->sector_no = 1;
420       controller->cylinder_no = 0;
421       controller->current_command = 0x00;
422       controller->buffer_index = 0;
423
424       controller->control.reset = 0;
425       controller->control.disable_irq = 0;
426       controller->reset_in_progress = 0;
427
428       controller->sectors_per_block = 0x80;
429       controller->lba_mode = 0;
430       
431       
432       controller->features = 0;
433         
434       // If not present
435       drive->device_type = IDE_NONE;
436
437       // Make model string
438       strncpy((char*)(drive->model_no), "", 40);
439       while(strlen((char *)(drive->model_no)) < 40) {
440         strcat ((char*)(drive->model_no), " ");
441       }
442
443
444       
445       
446       if (channel_num == 1) {
447
448         channel->ioaddr1 = 0x170;
449         channel->ioaddr2 = 0x370;
450         channel->irq =  15;
451         channel->drive_select = 0;
452        
453         if (device == 0) {
454           // Make model string
455           strncpy((char*)(drive->model_no), "V3VEE Ramdisk", 40);
456           while (strlen((char *)(drive->model_no)) < 40) {
457             strcat ((char*)(drive->model_no), " ");
458           }
459           
460           PrintDebug("CDROM on target %d/%d\n", channel_num, device);
461           
462           drive->device_type = IDE_CDROM;
463           drive->cdrom.locked = 0;
464           drive->sense.sense_key = SENSE_NONE;
465           drive->sense.asc = 0;
466           drive->sense.ascq = 0;
467           
468 #ifdef DEBUG_RAMDISK
469           if (check_bit_fields(controller) == INTR_REASON_BIT_ERR) {
470             PrintDebug("interrupt reason: bit field error\n");
471             return INTR_REASON_BIT_ERR;
472           }
473 #endif
474           
475           controller->sector_count = 0;
476
477           // allocate low level driver
478           drive->cdrom.cd = (struct cdrom_interface *)V3_Malloc(sizeof(struct cdrom_interface));
479           PrintDebug("cd = %x\n", drive->cdrom.cd);
480           V3_ASSERT(drive->cdrom.cd != NULL);
481           
482           struct cdrom_interface * cdif = drive->cdrom.cd;
483           memset(cdif, 0, sizeof(struct cdrom_interface));
484           init_cdrom(cdif);
485           cdif->ops.init(cdif);
486
487           PrintDebug("\t\tCD on ata%d-%d: '%s'\n", 
488                      channel_num, 
489                      device, "");
490           
491           if((drive->cdrom.cd->ops).insert_cdrom(cdif, NULL)) {
492             PrintDebug("\t\tMedia present in CD-ROM drive\n");
493             drive->cdrom.ready = 1;
494             drive->cdrom.capacity = drive->cdrom.cd->ops.capacity(cdif);
495           } else {                  
496             PrintDebug("\t\tCould not locate CD-ROM, continuing with media not present\n");
497             drive->cdrom.ready = 0;
498           }
499           
500         }//if device = 0
501       }//if channel = 0
502     }//for device
503   }//for channel
504
505 #ifdef DEBUG_RAMDISK
506   rd_print_state(ramdisk);
507 #endif
508   return 0;
509 }
510
511
512 /*
513   static void rd_reset_harddrive(struct ramdisk_t *ramdisk, unsigned type) {
514   return;
515   }
516
517 */
518 static void rd_close_harddrive(struct ramdisk_t *ramdisk) {
519   return;
520 }
521
522
523 ////////////////////////////////////////////////////////////////////
524
525
526
527 static int read_data_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
528   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
529   struct channel_t * channel = NULL;
530   struct drive_t * drive = NULL;
531   struct controller_t * controller = NULL;
532
533
534
535   if (is_primary_port(ramdisk, port)) {
536     channel = &(ramdisk->channels[0]);
537   } else if (is_secondary_port(ramdisk, port)) {
538     channel = &(ramdisk->channels[1]);
539   } else {
540     PrintError("Invalid Port: %d\n", port);
541     return -1;
542   }
543   
544   drive = get_selected_drive(channel);
545   controller = &(drive->controller);
546
547
548   PrintDebug("[read_data_handler] IO Read at 0x%x, on drive %d/%d (current_cmd = 0x%02x)\n", 
549              port, 
550              get_channel_no(ramdisk, channel),
551              get_drive_no(channel, drive),
552              controller->current_command);
553
554   switch (controller->current_command) {
555   case 0xec:    // IDENTIFY DEVICE
556   case 0xa1:
557     {
558
559
560       controller->status.busy = 0;
561       controller->status.drive_ready = 1;
562       controller->status.write_fault = 0;
563       controller->status.seek_complete = 1;
564       controller->status.corrected_data = 0;
565       controller->status.err = 0;
566       
567       /*
568         value32 = controller->buffer[index];
569         index++;
570         
571         if (io_len >= 2) {
572         value32 |= (controller->buffer[index] << 8);
573         index++;
574         }
575         
576         if (io_len == 4) {
577         value32 |= (controller->buffer[index] << 16);
578         value32 |= (controller->buffer[index+1] << 24);
579         index += 2;
580         }
581         
582         controller->buffer_index = index;
583       */
584       /* JRL */
585       memcpy(dst, controller->buffer + controller->buffer_index, length);
586       controller->buffer_index += length;
587       
588       if (controller->buffer_index >= 512) {
589         controller->status.drq = 0;
590       }
591       
592       return length;
593     }
594   case 0xa0: //send packet cmd 
595     {
596       uint_t index = controller->buffer_index;
597
598       
599       PrintDebug("\t\tatapi.command(%02x), index(%d), cdrom.remaining_blocks(%d)\n", 
600                     drive->atapi.command, 
601                     index, 
602                     drive->cdrom.remaining_blocks);
603       
604       // Load block if necessary
605       if (index >= 2048) {
606         
607         if (index > 2048) {
608           PrintError("\t\tindex > 2048 : 0x%x\n", index);
609           return -1;
610         }
611         
612         switch (drive->atapi.command) {
613         case 0x28: // read (10)
614         case 0xa8: // read (12)
615           {
616             struct cdrom_interface * cdif = drive->cdrom.cd;
617             
618             if (!(drive->cdrom.ready)) {
619               PrintError("\t\tRead with CDROM not ready\n");
620               return -1;
621             } 
622             
623             drive->cdrom.cd->ops.read_block(cdif, controller->buffer,
624                                             drive->cdrom.next_lba);
625             drive->cdrom.next_lba++;
626             drive->cdrom.remaining_blocks--;
627             
628             
629             if (!(drive->cdrom.remaining_blocks)) {
630               PrintDebug("\t\tLast READ block loaded {CDROM}\n");
631             } else {
632               PrintDebug("\t\tREAD block loaded (%d remaining) {CDROM}\n",
633                          drive->cdrom.remaining_blocks);
634             }
635             
636             // one block transfered, start at beginning
637             index = 0;
638             break;
639           }
640         default: // no need to load a new block
641           break;
642         }
643       }
644     
645
646       /*
647         increment = 0;
648         value32 = controller->buffer[index + increment];
649         increment++;
650         
651         if (io_len >= 2) {
652         value32 |= (controller->buffer[index + increment] << 8);
653         increment++;
654         }
655         
656         if (io_len == 4) {
657         value32 |= (controller->buffer[index + increment] << 16);
658         value32 |= (controller->buffer[index + increment + 1] << 24);
659         increment += 2;
660         }
661
662         controller->buffer_index = index + increment;
663         controller->drq_index += increment;
664
665       */
666       /* JRL: CHECK THAT there is enough data in the buffer to copy.... */
667       {      
668         memcpy(dst, controller->buffer + index, length);
669         
670         controller->buffer_index  = index + length;
671         controller->drq_index += length;
672       }
673       
674       /* *** */
675       
676       if (controller->drq_index >= (unsigned)drive->atapi.drq_bytes) {
677         controller->status.drq = 0;
678         controller->drq_index = 0;
679         
680         drive->atapi.total_bytes_remaining -= drive->atapi.drq_bytes;
681         
682         if (drive->atapi.total_bytes_remaining > 0) {
683           // one or more blocks remaining (works only for single block commands)
684           
685           PrintDebug("\t\tPACKET drq bytes read\n");
686           controller->interrupt_reason.i_o = 1;
687           controller->status.busy = 0;
688           controller->status.drq = 1;
689           controller->interrupt_reason.c_d = 0;
690           
691           // set new byte count if last block
692           if (drive->atapi.total_bytes_remaining < controller->byte_count) {
693             controller->byte_count = drive->atapi.total_bytes_remaining;
694           }
695           drive->atapi.drq_bytes = controller->byte_count;
696           
697           rd_raise_interrupt(dev, channel);
698         } else {
699           // all bytes read
700           PrintDebug("\t\tPACKET all bytes read\n");
701           
702           controller->interrupt_reason.i_o = 1;
703           controller->interrupt_reason.c_d = 1;
704           controller->status.drive_ready = 1;
705           controller->interrupt_reason.rel = 0;
706           controller->status.busy = 0;
707           controller->status.drq = 0;
708           controller->status.err = 0;
709           
710           rd_raise_interrupt(dev, channel);
711         }
712       }
713       return length;
714       break;
715     }
716
717   default:
718     PrintDebug("\t\tread need support more command: %02x\n", controller->current_command);
719     break;
720   }
721
722   return -1;
723 }
724
725
726
727
728 static int write_data_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
729   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
730   struct channel_t * channel = NULL;
731   struct drive_t * drive = NULL;
732   struct controller_t * controller = NULL;
733
734   if (is_primary_port(ramdisk, port)) {
735     channel = &(ramdisk->channels[0]);
736   } else if (is_secondary_port(ramdisk, port)) {
737     channel = &(ramdisk->channels[1]);
738   } else {
739     PrintError("Invalid Port: %d\n", port);
740     return -1;
741   }
742   
743   drive = get_selected_drive(channel);
744   controller = &(drive->controller);
745
746   PrintDebug("[write_data_handler] IO write at 0x%x, current_cmd = 0x%02x\n", 
747              port, controller->current_command);
748   
749   switch (controller->current_command) {
750   case 0x30: // WRITE SECTORS
751     PrintError("\t\tneed to implement 0x30(write sector) to port 0x%x\n", port);
752     return -1;
753     
754   case 0xa0: // PACKET
755     
756     if (handle_atapi_packet_command(dev, channel, *(ushort_t *)src) == -1) {
757       return -1;
758     }
759
760     return length;
761     
762   default:
763     PrintError("\t\tIO write(0x%x): current command is %02xh\n", 
764                port, controller->current_command);
765
766     return -1;
767   }
768 }
769
770
771
772
773
774
775
776 static int read_status_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
777   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
778   struct channel_t * channel = NULL;
779   struct drive_t * drive = NULL;
780   struct controller_t * controller = NULL;
781
782
783   if (length != 1) {
784     PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
785     return -1;
786   }
787
788   if (is_primary_port(ramdisk, port)) {
789     channel = &(ramdisk->channels[0]);
790   } else if (is_secondary_port(ramdisk, port)) {
791     channel = &(ramdisk->channels[1]);
792   } else {
793     PrintError("Invalid Port: %d\n", port);
794     return -1;
795   }
796   
797   drive = get_selected_drive(channel);
798   controller = &(drive->controller);
799
800   PrintDebug("[read_status_handler] IO read at 0x%x, on drive %d/%d\n", 
801              port, get_channel_no(ramdisk, channel), 
802              channel->drive_select);
803
804
805   if (num_drives_on_channel(channel) == 0) {
806     // (mch) Just return zero for these registers
807     memset(dst, 0, length);
808
809   } else {
810     uchar_t val = (
811                    (controller->status.busy << 7)            |
812                    (controller->status.drive_ready << 6)     |
813                    (controller->status.write_fault << 5)     |
814                    (controller->status.seek_complete << 4)   |
815                    (controller->status.drq << 3)             |
816                    (controller->status.corrected_data << 2)  |
817                    (controller->status.index_pulse << 1)     |
818                    (controller->status.err) );
819    
820     memcpy(dst, &val, length);
821
822     controller->status.index_pulse_count++;
823     controller->status.index_pulse = 0;
824     
825     if (controller->status.index_pulse_count >= INDEX_PULSE_CYCLE) {
826       controller->status.index_pulse = 1;
827       controller->status.index_pulse_count = 0;
828     }
829   }
830   
831   if ((port == SEC_CMD_PORT) || (port == PRI_CMD_PORT)) {
832     rd_lower_irq(dev, channel->irq);
833   }
834   
835   return length;
836   
837 }
838
839
840 static int write_cmd_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
841   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
842   struct channel_t * channel = NULL;
843   struct drive_t * drive = NULL;
844   struct controller_t * controller = NULL;
845   uchar_t value = *(uchar_t *)src;
846
847   if (length != 1) {
848     PrintError("Invalid Command port write length: %d (port=%d)\n", length, port);
849     return -1;
850   }
851
852   if (is_primary_port(ramdisk, port)) {
853     channel = &(ramdisk->channels[0]);
854   } else if (is_secondary_port(ramdisk, port)) {
855     channel = &(ramdisk->channels[1]);
856   } else {
857     PrintError("Invalid Port: %d\n", port);
858     return -1;
859   }
860   
861   drive = get_selected_drive(channel);
862   controller = &(drive->controller);
863
864
865   PrintDebug("[write_command_handler] IO write at 0x%x, on drive %d/%d (val = 0x%x)\n", 
866              port, get_channel_no(ramdisk, channel), 
867              channel->drive_select, 
868              value);
869
870   switch (value) {
871     // ATAPI commands
872   case 0xa1: // IDENTIFY PACKET DEVICE
873     {
874       if (drive->device_type == IDE_CDROM) {
875         controller->current_command = value;
876         controller->error_register = 0;
877         
878         controller->status.busy = 0;
879         controller->status.drive_ready = 1;
880         controller->status.write_fault = 0;
881         controller->status.drq   = 1;
882         controller->status.err   = 0;
883         
884         controller->status.seek_complete = 1;
885         controller->status.corrected_data = 0;
886         
887         controller->buffer_index = 0;
888         rd_raise_interrupt(dev, channel);
889         rd_identify_ATAPI_drive(dev, channel);
890       } else {
891         rd_command_aborted(dev, channel, 0xa1);
892       }
893       break;
894     }
895   case 0xa0: // SEND PACKET (atapi)
896     {
897       if (drive->device_type == IDE_CDROM) {
898         // PACKET
899         
900         if (controller->features & (1 << 0)) {
901           PrintError("\t\tPACKET-DMA not supported");
902           return -1;
903         }
904         
905         if (controller->features & (1 << 1)) {
906           PrintError("\t\tPACKET-overlapped not supported");
907           return -1;
908         }
909         
910         // We're already ready!
911         controller->sector_count = 1;
912         controller->status.busy = 0;
913         controller->status.write_fault = 0;
914
915         // serv bit??
916         controller->status.drq = 1;
917         controller->status.err = 0;
918         
919         // NOTE: no interrupt here
920         controller->current_command = value;
921         controller->buffer_index = 0;
922       } else {
923         rd_command_aborted (dev, channel, 0xa0);
924       }
925       break;
926     }
927   default:
928     PrintError("\t\tneed translate command %2x\n", value);
929     return -1;
930
931   }
932   return length;
933 }
934
935
936 static int write_ctrl_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
937   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
938   struct channel_t * channel = NULL;
939   struct drive_t * master_drive = NULL;
940   struct drive_t * slave_drive = NULL;
941   struct controller_t * controller = NULL;
942   uchar_t value = *(uchar_t *)src;
943   rd_bool prev_control_reset;
944
945   if (length != 1) {
946     PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
947     return -1;
948   }
949
950   if (is_primary_port(ramdisk, port)) {
951     channel = &(ramdisk->channels[0]);
952   } else if (is_secondary_port(ramdisk, port)) {
953     channel = &(ramdisk->channels[1]);
954   } else {
955     PrintError("Invalid Port: %d\n", port);
956     return -1;
957   }
958
959   master_drive = &(channel->drives[0]);
960   slave_drive = &(channel->drives[1]);
961
962   controller = &(get_selected_drive(channel)->controller);
963
964
965   PrintDebug("[write_control_handler] IO write at 0x%x, on drive %d/%d (val = 0x%x)\n", 
966              port, get_channel_no(ramdisk, channel), 
967              channel->drive_select, 
968              value);
969
970   // (mch) Even if device 1 was selected, a write to this register
971   // goes to device 0 (if device 1 is absent)
972   
973   prev_control_reset = controller->control.reset;
974
975   master_drive->controller.control.reset         = value & 0x04;
976   slave_drive->controller.control.reset         = value & 0x04;
977
978   // CGS: was: SELECTED_CONTROLLER(channel).control.disable_irq    = value & 0x02;
979   master_drive->controller.control.disable_irq = value & 0x02;
980   slave_drive->controller.control.disable_irq = value & 0x02;
981   
982   PrintDebug("\t\tadpater control reg: reset controller = %d\n",
983                 (unsigned) (controller->control.reset) ? 1 : 0);
984   PrintDebug("\t\tadpater control reg: disable_irq(X) = %d\n",
985                 (unsigned) (controller->control.disable_irq) ? 1 : 0);
986   
987   if ((!prev_control_reset) && (controller->control.reset)) {
988     uint_t id = 0;
989
990     // transition from 0 to 1 causes all drives to reset
991     PrintDebug("\t\thard drive: RESET\n");
992     
993     // (mch) Set BSY, drive not ready
994     for (id = 0; id < 2; id++) {
995       struct controller_t * ctrl = NULL;
996
997       if (id == 0) {
998         ctrl = &(master_drive->controller);
999       } else if (id == 1) {
1000         ctrl = &(slave_drive->controller);
1001       }
1002
1003       ctrl->status.busy           = 1;
1004       ctrl->status.drive_ready    = 0;
1005       ctrl->reset_in_progress     = 1;
1006       
1007       ctrl->status.write_fault    = 0;
1008       ctrl->status.seek_complete  = 1;
1009       ctrl->status.drq            = 0;
1010       ctrl->status.corrected_data = 0;
1011       ctrl->status.err            = 0;
1012       
1013       ctrl->error_register = 0x01; // diagnostic code: no error
1014       
1015       ctrl->current_command = 0x00;
1016       ctrl->buffer_index = 0;
1017       
1018       ctrl->sectors_per_block = 0x80;
1019       ctrl->lba_mode          = 0;
1020       
1021       ctrl->control.disable_irq = 0;
1022     }
1023
1024     rd_lower_irq(dev, channel->irq);
1025
1026   } else if ((controller->reset_in_progress) &&
1027              (!controller->control.reset)) {
1028     uint_t id;
1029     // Clear BSY and DRDY
1030     PrintDebug("\t\tReset complete {%s}\n", device_type_to_str(get_selected_drive(channel)->device_type));
1031
1032     for (id = 0; id < 2; id++) {
1033       struct controller_t * ctrl = NULL;
1034       struct drive_t * drv = NULL;
1035
1036       if (id == 0) {
1037         ctrl = &(master_drive->controller);
1038         drv = master_drive;
1039       } else if (id == 1) {
1040         ctrl = &(slave_drive->controller);
1041         drv = slave_drive;
1042       }
1043
1044       ctrl->status.busy           = 0;
1045       ctrl->status.drive_ready    = 1;
1046       ctrl->reset_in_progress     = 0;
1047       
1048       // Device signature
1049       if (drv->device_type == IDE_DISK) {
1050         PrintDebug("\t\tdrive %d/%d is harddrive\n", get_channel_no(ramdisk, channel), id);
1051         ctrl->head_no        = 0;
1052         ctrl->sector_count   = 1;
1053         ctrl->sector_no      = 1;
1054         ctrl->cylinder_no    = 0;
1055       } else {
1056         ctrl->head_no        = 0;
1057         ctrl->sector_count   = 1;
1058         ctrl->sector_no      = 1;
1059         ctrl->cylinder_no    = 0xeb14;
1060       }
1061     }
1062   }
1063
1064   PrintDebug("\t\ts[0].controller.control.disable_irq = %02x\n", 
1065              master_drive->controller.control.disable_irq);
1066   PrintDebug("\t\ts[1].controller.control.disable_irq = %02x\n", 
1067              slave_drive->controller.control.disable_irq);
1068   return length;
1069 }
1070
1071
1072 static int read_general_port(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
1073   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
1074   struct channel_t * channel = NULL;
1075   struct drive_t * drive = NULL;
1076   struct controller_t * controller = NULL;
1077
1078
1079   if (length != 1) {
1080     PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
1081     return -1;
1082   }
1083
1084   if (is_primary_port(ramdisk, port)) {
1085     channel = &(ramdisk->channels[0]);
1086   } else if (is_secondary_port(ramdisk, port)) {
1087     channel = &(ramdisk->channels[1]);
1088   } else {
1089     PrintError("Invalid Port: %d\n", port);
1090     return -1;
1091   }
1092   
1093   drive = get_selected_drive(channel);
1094   controller = &(drive->controller);
1095
1096
1097   PrintDebug("[read_general_handler] IO read addr at %x, on drive %d/%d, curcmd = %02x\n", 
1098              port, get_channel_no(ramdisk, channel), 
1099              channel->drive_select, 
1100              controller->current_command);
1101   
1102
1103   switch (port) {
1104   case PRI_FEATURES_PORT:
1105   case SEC_FEATURES_PORT: // hard disk error register 0x1f1
1106     {    
1107       uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->error_register;
1108       
1109       controller->status.err = 0;
1110       
1111       *(uchar_t *)dst = val;
1112       return length;
1113       
1114       break;
1115     }
1116
1117   case PRI_SECT_CNT_PORT:
1118   case SEC_SECT_CNT_PORT:  // hard disk sector count / interrupt reason 0x1f2
1119     {
1120       uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->sector_count;
1121
1122       *(uchar_t *)dst = val;
1123       return length;
1124
1125       break;
1126     }
1127   case PRI_SECT_ADDR1_PORT:
1128   case SEC_SECT_ADDR1_PORT: // sector number 0x1f3
1129     {
1130       uchar_t val = (drive->device_type == IDE_NONE) ? 0 : controller->sector_no;
1131
1132       *(uchar_t *)dst = val;
1133       return length;
1134
1135       break;
1136     }
1137
1138   case PRI_SECT_ADDR2_PORT:
1139   case SEC_SECT_ADDR2_PORT:  // cylinder low 0x1f4  
1140     {
1141       // -- WARNING : On real hardware the controller registers are shared between drives. 
1142       // So we must respond even if the select device is not present. Some OS uses this fact 
1143       // to detect the disks.... minix2 for example
1144       uchar_t val = (num_drives_on_channel(channel) == 0) ? 0 : (controller->cylinder_no & 0x00ff);
1145
1146       *(uchar_t *)dst = val;
1147       return length;
1148
1149       break;      
1150   }
1151
1152   case PRI_SECT_ADDR3_PORT:
1153   case SEC_SECT_ADDR3_PORT: // cylinder high 0x1f5
1154     {
1155       // -- WARNING : On real hardware the controller registers are shared between drives. 
1156       // So we must respond even if the select device is not present. Some OS uses this fact 
1157       // to detect the disks.... minix2 for example
1158       uchar_t val = (num_drives_on_channel(channel) == 0) ? 0 : (controller->cylinder_no >> 8);
1159
1160       *(uchar_t *)dst = val;
1161       return length;
1162
1163       break;    
1164     }
1165   case PRI_DRV_SEL_PORT:
1166   case SEC_DRV_SEL_PORT:  // hard disk drive and head register 0x1f6
1167     {
1168       // b7 Extended data field for ECC
1169       // b6/b5: Used to be sector size.  00=256,01=512,10=1024,11=128
1170       //   Since 512 was always used, bit 6 was taken to mean LBA mode:
1171       //     b6 1=LBA mode, 0=CHS mode
1172       //     b5 1
1173       // b4: DRV
1174       // b3..0 HD3..HD0
1175       uchar_t val = ((1 << 7)                          |
1176                      ((controller->lba_mode > 0) << 6) |
1177                      (1 << 5)                          |            // 01b = 512 sector size
1178                      (channel->drive_select << 4)      |
1179                      (controller->head_no << 0));
1180       
1181       *(uchar_t *)dst = val;
1182       return length;
1183
1184       break;
1185     }
1186  case PRI_ADDR_REG_PORT:
1187  case SEC_ADDR_REG_PORT: // Hard Disk Address Register 0x3f7
1188    {
1189      // Obsolete and unsupported register.  Not driven by hard
1190      // disk controller.  Report all 1's.  If floppy controller
1191      // is handling this address, it will call this function
1192      // set/clear D7 (the only bit it handles), then return
1193      // the combined value
1194      *(uchar_t *)dst = 0xff;
1195      return length;
1196     }
1197
1198   default:
1199     PrintError("Invalid Port: %d\n", port);
1200     return -1;
1201   }
1202 }
1203
1204
1205
1206
1207 static int write_general_port(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
1208   struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
1209   struct channel_t * channel = NULL;
1210   struct drive_t * drive = NULL;
1211   struct controller_t * controller = NULL;
1212   uchar_t value = *(uchar_t *)src;
1213
1214   if (length != 1) {
1215     PrintError("Invalid Status port read length: %d (port=%d)\n", length, port);
1216     return -1;
1217   }
1218
1219   if (is_primary_port(ramdisk, port)) {
1220     channel = &(ramdisk->channels[0]);
1221   } else if (is_secondary_port(ramdisk, port)) {
1222     channel = &(ramdisk->channels[1]);
1223   } else {
1224     PrintError("Invalid Port: %d\n", port);
1225     return -1;
1226   }
1227   
1228   drive = get_selected_drive(channel);
1229   controller = &(drive->controller);
1230
1231
1232   PrintDebug("[write_general_handler] IO write to port %x (val=0x%02x), channel = %d\n", 
1233              port,  value, get_channel_no(ramdisk, channel));
1234
1235   switch (port) {
1236
1237   case PRI_FEATURES_PORT:
1238   case SEC_FEATURES_PORT: // hard disk write precompensation 0x1f1
1239     {
1240       write_features(channel, value);
1241       break;
1242     }
1243   case PRI_SECT_CNT_PORT:
1244   case SEC_SECT_CNT_PORT: // hard disk sector count 0x1f2
1245     {
1246       write_sector_count(channel, value);
1247       break;
1248     }
1249   case PRI_SECT_ADDR1_PORT:
1250   case SEC_SECT_ADDR1_PORT: // hard disk sector number 0x1f3
1251     {
1252       write_sector_number(channel, value);
1253       break;
1254     }
1255   case PRI_SECT_ADDR2_PORT:
1256   case SEC_SECT_ADDR2_PORT: // hard disk cylinder low 0x1f4
1257     {
1258       write_cylinder_low(channel, value);
1259       break;
1260     }
1261   case PRI_SECT_ADDR3_PORT:
1262   case SEC_SECT_ADDR3_PORT: // hard disk cylinder high 0x1f5
1263     {
1264       write_cylinder_high(channel, value);
1265       break;
1266     }
1267   case PRI_DRV_SEL_PORT:
1268   case SEC_DRV_SEL_PORT: // hard disk drive and head register 0x1f6
1269     {
1270       // b7 Extended data field for ECC
1271       // b6/b5: Used to be sector size.  00=256,01=512,10=1024,11=128
1272       //   Since 512 was always used, bit 6 was taken to mean LBA mode:
1273       //     b6 1=LBA mode, 0=CHS mode
1274       //     b5 1
1275       // b4: DRV
1276       // b3..0 HD3..HD0
1277
1278       // 1x1xxxxx
1279
1280       PrintDebug("\tDrive Select value=%x\n", value);
1281
1282       if ((value & 0xa0) != 0xa0) { 
1283         PrintDebug("\t\tIO write 0x%x (%02x): not 1x1xxxxxb\n", port, (unsigned) value);
1284       }
1285       
1286       write_head_no(channel, value & 0xf);
1287       if ((controller->lba_mode == 0) && (((value >> 6) & 1) == 1)) {
1288         PrintDebug("\t\tenabling LBA mode\n");
1289       }
1290
1291       write_lba_mode(channel, (value >> 6) & 1);
1292       drive->cdrom.cd->lba = (value >> 6) & 1;
1293       
1294       
1295       channel->drive_select = (value >> 4) & 0x01;
1296       drive = get_selected_drive(channel);
1297
1298       if (drive->device_type == IDE_NONE) {
1299         PrintDebug("\t\tError: device set to %d which does not exist! channel = 0x%x\n",
1300                    channel->drive_select, get_channel_no(ramdisk, channel));
1301
1302         controller->error_register = 0x04; // aborted
1303         controller->status.err = 1;
1304       }
1305       
1306       break;
1307     }
1308   default:
1309     PrintError("\t\thard drive: io write to unhandled port 0x%x  (value = %c)\n", port, value);
1310     //return -1;
1311   }
1312
1313   return length;
1314 }
1315
1316
1317  
1318
1319
1320 static void rd_raise_interrupt(struct vm_device * dev, struct channel_t * channel) {
1321   Bit32u irq;
1322   //  struct ramdisk_t * ramdisk = (struct ramdisk_t *)(dev->private_data);
1323   struct drive_t * drive = get_selected_drive(channel);
1324   struct controller_t * controller = &(drive->controller);
1325
1326   PrintDebug("[raise_interrupt] disable_irq = %02x\n", controller->control.disable_irq);
1327
1328   if (!(controller->control.disable_irq)) {
1329     irq = channel->irq; 
1330  
1331     PrintDebug("\t\tRaising interrupt %d {%s}\n\n", irq, device_type_to_str(drive->device_type));
1332
1333     dev->vm->vm_ops.raise_irq(dev->vm, irq);
1334   } else {
1335     PrintDebug("\t\tirq is disabled\n");
1336   }
1337   
1338   return;
1339 }
1340
1341 static void rd_lower_irq(struct vm_device *dev, Bit32u irq)  // __attribute__(regparm(1))
1342 {
1343   PrintDebug("[lower_irq] irq = %d\n", irq);
1344   dev->vm->vm_ops.lower_irq(dev->vm, irq);
1345 }
1346
1347
1348
1349
1350
1351
1352
1353 //////////////////////////////////////////////////////////////////////////
1354
1355 /*
1356  * ATAPI subroutines
1357  */
1358
1359
1360
1361 int handle_atapi_packet_command(struct vm_device * dev, struct channel_t * channel, ushort_t value) {
1362   //struct ramdisk_t * ramdisk  = (struct ramdisk_t *)(dev->private_data);
1363   struct drive_t * drive = get_selected_drive(channel);
1364   struct controller_t * controller = &(drive->controller);
1365
1366   if (controller->buffer_index >= PACKET_SIZE) {
1367     PrintError("ATAPI packet exceeded maximum length: buffer_index (%d) >= PACKET_SIZE\n", 
1368                controller->buffer_index);
1369     return -1;
1370   }
1371
1372   controller->buffer[controller->buffer_index] = value;
1373   controller->buffer[controller->buffer_index + 1] = (value >> 8);
1374   controller->buffer_index += 2;
1375   
1376   
1377   /* if packet completely writtten */
1378   if (controller->buffer_index >= PACKET_SIZE) {
1379     // complete command received
1380     Bit8u atapi_command = controller->buffer[0];
1381     
1382     PrintDebug("\t\tcdrom: ATAPI command 0x%x started\n", atapi_command);
1383     
1384     switch (atapi_command) {
1385     case 0x00: // test unit ready
1386       {
1387         if (drive->cdrom.ready) {
1388           rd_atapi_cmd_nop(dev, channel);
1389         } else {
1390           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1391         }
1392         
1393         rd_raise_interrupt(dev, channel);
1394         
1395         break;
1396       }
1397     case 0x03:  // request sense
1398       {
1399         int alloc_length = controller->buffer[4];
1400
1401         if (rd_init_send_atapi_command(dev, channel, atapi_command, 18, alloc_length, false) == -1) {
1402           return -1;
1403         }
1404         
1405         // sense data
1406         controller->buffer[0] = 0x70 | (1 << 7);
1407         controller->buffer[1] = 0;
1408         controller->buffer[2] = drive->sense.sense_key;
1409         controller->buffer[3] = drive->sense.information.arr[0];
1410         controller->buffer[4] = drive->sense.information.arr[1];
1411         controller->buffer[5] = drive->sense.information.arr[2];
1412         controller->buffer[6] = drive->sense.information.arr[3];
1413         controller->buffer[7] = 17 - 7;
1414         controller->buffer[8] = drive->sense.specific_inf.arr[0];
1415         controller->buffer[9] = drive->sense.specific_inf.arr[1];
1416         controller->buffer[10] = drive->sense.specific_inf.arr[2];
1417         controller->buffer[11] = drive->sense.specific_inf.arr[3];
1418         controller->buffer[12] = drive->sense.asc;
1419         controller->buffer[13] = drive->sense.ascq;
1420         controller->buffer[14] = drive->sense.fruc;
1421         controller->buffer[15] = drive->sense.key_spec.arr[0];
1422         controller->buffer[16] = drive->sense.key_spec.arr[1];
1423         controller->buffer[17] = drive->sense.key_spec.arr[2];
1424         
1425         rd_ready_to_send_atapi(dev, channel);
1426         break;
1427       }
1428     case 0x1b:  // start stop unit
1429       {
1430         //bx_bool Immed = (controller->buffer[1] >> 0) & 1;
1431         rd_bool LoEj = (controller->buffer[4] >> 1) & 1;
1432         rd_bool Start = (controller->buffer[4] >> 0) & 1;
1433
1434         // stop the disc
1435         if ((!LoEj) && (!Start)) { 
1436           PrintError("FIXME: Stop disc not implemented\n");
1437
1438           rd_atapi_cmd_nop(dev, channel);
1439           rd_raise_interrupt(dev, channel);
1440         } else if (!LoEj && Start) { // start (spin up) the disc
1441           
1442           drive->cdrom.cd->ops.start_cdrom(drive->cdrom.cd);
1443           
1444           PrintError("FIXME: ATAPI start disc not reading TOC\n");
1445           rd_atapi_cmd_nop(dev, channel);
1446           rd_raise_interrupt(dev, channel);
1447         } else if (LoEj && !Start) { // Eject the disc
1448           rd_atapi_cmd_nop(dev, channel);
1449           
1450           if (drive->cdrom.ready) {
1451             
1452             drive->cdrom.cd->ops.eject_cdrom(drive->cdrom.cd);
1453             
1454             drive->cdrom.ready = 0;
1455             //bx_options.atadevice[channel][SLAVE_SELECTED(channel)].Ostatus->set(EJECTED);
1456             //bx_gui->update_drive_status_buttons();
1457           }
1458           rd_raise_interrupt(dev, channel);
1459         } else { // Load the disc
1460           // My guess is that this command only closes the tray, that's a no-op for us
1461           rd_atapi_cmd_nop(dev, channel);
1462           rd_raise_interrupt(dev, channel);
1463         }
1464         break;
1465       }
1466     case 0xbd: // mechanism status
1467       {
1468         uint16_t alloc_length = rd_read_16bit(controller->buffer + 8);
1469         
1470         if (alloc_length == 0) {
1471           PrintError("Zero allocation length to MECHANISM STATUS not impl.\n");
1472           return -1;
1473         }
1474         
1475         if (rd_init_send_atapi_command(dev, channel, atapi_command, 8, alloc_length, false) == -1) {
1476           return -1;
1477         }
1478         
1479         controller->buffer[0] = 0; // reserved for non changers
1480         controller->buffer[1] = 0; // reserved for non changers
1481         
1482         controller->buffer[2] = 0; // Current LBA (TODO!)
1483         controller->buffer[3] = 0; // Current LBA (TODO!)
1484         controller->buffer[4] = 0; // Current LBA (TODO!)
1485         
1486         controller->buffer[5] = 1; // one slot
1487         
1488         controller->buffer[6] = 0; // slot table length
1489         controller->buffer[7] = 0; // slot table length
1490         
1491         rd_ready_to_send_atapi(dev, channel);
1492         break;
1493       }
1494     case 0x5a:  // mode sense
1495       {
1496         uint16_t alloc_length = rd_read_16bit(controller->buffer + 7);
1497         
1498         Bit8u PC = controller->buffer[2] >> 6;
1499         Bit8u PageCode = controller->buffer[2] & 0x3f;
1500         
1501         switch (PC) {
1502         case 0x0: // current values
1503           {
1504             switch (PageCode) {
1505             case 0x01: // error recovery
1506               {
1507                 
1508                 if (rd_init_send_atapi_command(dev, channel, atapi_command, sizeof(struct error_recovery_t) + 8, alloc_length, false) == -1) {
1509                   return -1;
1510                 }
1511                 
1512                 rd_init_mode_sense_single(dev, channel, &(drive->cdrom.current.error_recovery),
1513                                           sizeof(struct error_recovery_t));
1514                 rd_ready_to_send_atapi(dev, channel);
1515                 break;
1516               }
1517             case 0x2a: // CD-ROM capabilities & mech. status
1518               {
1519
1520                 if (rd_init_send_atapi_command(dev, channel, atapi_command, 28, alloc_length, false) == -1) {
1521                   return -1;
1522                 }
1523
1524                 rd_init_mode_sense_single(dev, channel, &(controller->buffer[8]), 28);
1525                 
1526                 controller->buffer[8] = 0x2a;
1527                 controller->buffer[9] = 0x12;
1528                 controller->buffer[10] = 0x00;
1529                 controller->buffer[11] = 0x00;
1530                 // Multisession, Mode 2 Form 2, Mode 2 Form 1
1531                 controller->buffer[12] = 0x70; 
1532                 controller->buffer[13] = (3 << 5);
1533                 controller->buffer[14] = (unsigned char) (1 |
1534                                                           (drive->cdrom.locked ? (1 << 1) : 0) |
1535                                                           (1 << 3) |
1536                                                           (1 << 5));
1537                 controller->buffer[15] = 0x00;
1538                 controller->buffer[16] = (706 >> 8) & 0xff;
1539                 controller->buffer[17] = 706 & 0xff;
1540                 controller->buffer[18] = 0;
1541                 controller->buffer[19] = 2;
1542                 controller->buffer[20] = (512 >> 8) & 0xff;
1543                 controller->buffer[21] = 512 & 0xff;
1544                 controller->buffer[22] = (706 >> 8) & 0xff;
1545                 controller->buffer[23] = 706 & 0xff;
1546                 controller->buffer[24] = 0;
1547                 controller->buffer[25] = 0;
1548                 controller->buffer[26] = 0;
1549                 controller->buffer[27] = 0;
1550                 rd_ready_to_send_atapi(dev, channel);
1551                 break;
1552               }
1553             case 0x0d: // CD-ROM
1554             case 0x0e: // CD-ROM audio control
1555             case 0x3f: // all
1556               {
1557                 PrintError("Ramdisk: cdrom: MODE SENSE (curr), code=%x not implemented yet\n",
1558                          PageCode);
1559                 rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1560                                    ASC_INV_FIELD_IN_CMD_PACKET);
1561                 rd_raise_interrupt(dev, channel);
1562                 break;
1563               }
1564             default:
1565               {
1566                 // not implemeted by this device
1567                 PrintDebug("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1568                               PC, PageCode);
1569                 rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1570                                    ASC_INV_FIELD_IN_CMD_PACKET);
1571                 rd_raise_interrupt(dev, channel);
1572                 break;
1573               }
1574             }
1575             break;
1576           }
1577         case 0x1: // changeable values
1578           {
1579             switch (PageCode) {
1580             case 0x01: // error recovery
1581             case 0x0d: // CD-ROM
1582             case 0x0e: // CD-ROM audio control
1583             case 0x2a: // CD-ROM capabilities & mech. status
1584             case 0x3f: // all
1585               {
1586                 PrintError("cdrom: MODE SENSE (chg), code=%x not implemented yet\n",
1587                            PageCode);
1588                 rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1589                                    ASC_INV_FIELD_IN_CMD_PACKET);
1590                 rd_raise_interrupt(dev, channel);
1591                 break;
1592               }
1593             default:
1594               {
1595                 // not implemeted by this device
1596                 PrintDebug("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1597                            PC, PageCode);
1598                 rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1599                                    ASC_INV_FIELD_IN_CMD_PACKET);
1600                 rd_raise_interrupt(dev, channel);
1601                 break;
1602               }
1603             }
1604             break;
1605           }
1606         case 0x2: // default values
1607           {
1608             switch (PageCode) {
1609             case 0x01: // error recovery
1610             case 0x0d: // CD-ROM
1611             case 0x0e: // CD-ROM audio control
1612             case 0x2a: // CD-ROM capabilities & mech. status
1613             case 0x3f: // all
1614               PrintError("cdrom: MODE SENSE (dflt), code=%x\n",
1615                        PageCode);
1616               return -1;
1617               
1618             default:
1619               {
1620                 // not implemeted by this device
1621                 PrintDebug("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1622                               PC, PageCode);
1623                 rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1624                                    ASC_INV_FIELD_IN_CMD_PACKET);
1625                 rd_raise_interrupt(dev, channel);
1626                 break;
1627               }
1628             }
1629             break;
1630           }
1631         case 0x3: // saved values not implemented
1632           {
1633             rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
1634             rd_raise_interrupt(dev, channel);
1635             break;
1636           }
1637         default:
1638           {
1639             PrintError("Should not get here!\n");
1640             return -1;
1641             break;
1642           }
1643         }
1644         break;
1645       }
1646     case 0x12: // inquiry
1647       { 
1648         uint8_t alloc_length = controller->buffer[4];
1649         
1650         if (rd_init_send_atapi_command(dev, channel, atapi_command, 36, alloc_length, false) == -1) {
1651           return -1;
1652         }
1653         
1654         controller->buffer[0] = 0x05; // CD-ROM
1655         controller->buffer[1] = 0x80; // Removable
1656         controller->buffer[2] = 0x00; // ISO, ECMA, ANSI version
1657         controller->buffer[3] = 0x21; // ATAPI-2, as specified
1658         controller->buffer[4] = 31; // additional length (total 36)
1659         controller->buffer[5] = 0x00; // reserved
1660         controller->buffer[6] = 0x00; // reserved
1661         controller->buffer[7] = 0x00; // reserved
1662         
1663         // Vendor ID
1664         const char* vendor_id = "VTAB    ";
1665         int i;
1666         for (i = 0; i < 8; i++) {
1667           controller->buffer[8+i] = vendor_id[i];
1668         }
1669
1670         // Product ID
1671         const char* product_id = "Turbo CD-ROM    ";
1672         for (i = 0; i < 16; i++) {
1673           controller->buffer[16+i] = product_id[i];
1674         }
1675
1676         // Product Revision level
1677         const char* rev_level = "1.0 "; 
1678         for (i = 0; i < 4; i++) {
1679           controller->buffer[32 + i] = rev_level[i];
1680         }
1681
1682         rd_ready_to_send_atapi(dev, channel);
1683         break;
1684       }
1685     case 0x25:  // read cd-rom capacity
1686       {
1687         // no allocation length???
1688         if (rd_init_send_atapi_command(dev, channel, atapi_command, 8, 8, false) == -1) {
1689           return -1;
1690         }
1691         
1692         if (drive->cdrom.ready) {
1693           uint32_t capacity = drive->cdrom.capacity;
1694
1695           PrintDebug("\t\tCapacity is %d sectors (%d bytes)\n", capacity, capacity * 2048);
1696
1697           controller->buffer[0] = (capacity >> 24) & 0xff;
1698           controller->buffer[1] = (capacity >> 16) & 0xff;
1699           controller->buffer[2] = (capacity >> 8) & 0xff;
1700           controller->buffer[3] = (capacity >> 0) & 0xff;
1701           controller->buffer[4] = (2048 >> 24) & 0xff;
1702           controller->buffer[5] = (2048 >> 16) & 0xff;
1703           controller->buffer[6] = (2048 >> 8) & 0xff;
1704           controller->buffer[7] = (2048 >> 0) & 0xff;
1705
1706           rd_ready_to_send_atapi(dev, channel);
1707         } else {
1708           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1709           rd_raise_interrupt(dev, channel);
1710         }
1711         break;
1712       }
1713       
1714       
1715     case 0xbe:  // read cd
1716       {
1717         if (drive->cdrom.ready) {
1718           PrintError("Read CD with CD present not implemented\n");
1719           rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1720           rd_raise_interrupt(dev, channel);
1721         } else {
1722           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1723           rd_raise_interrupt(dev, channel);
1724         }
1725         break;
1726       }
1727     case 0x43: // read toc
1728       { 
1729         if (drive->cdrom.ready) {
1730           int toc_length;  
1731           bool msf = (controller->buffer[1] >> 1) & 1;
1732           uint8_t starting_track = controller->buffer[6];
1733           
1734           uint16_t alloc_length = rd_read_16bit(controller->buffer + 7);
1735           
1736           uint8_t format = (controller->buffer[9] >> 6);
1737           int i;
1738           switch (format) {
1739           case 0:
1740             
1741             if (!(drive->cdrom.cd->ops.read_toc(drive->cdrom.cd, controller->buffer,
1742                                                 &toc_length, msf, starting_track))) {
1743               rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1744                                  ASC_INV_FIELD_IN_CMD_PACKET);
1745               rd_raise_interrupt(dev, channel);
1746             } else {
1747               if (rd_init_send_atapi_command(dev, channel, atapi_command, toc_length, alloc_length, false) == -1) {
1748                 return -1;
1749               }
1750               rd_ready_to_send_atapi(dev, channel);
1751             }
1752             break;
1753             
1754           case 1:
1755             // multi session stuff. we ignore this and emulate a single session only
1756             if (rd_init_send_atapi_command(dev, channel, atapi_command, 12, alloc_length, false) == -1) {
1757               return -1;
1758             }
1759             
1760             controller->buffer[0] = 0;
1761             controller->buffer[1] = 0x0a;
1762             controller->buffer[2] = 1;
1763             controller->buffer[3] = 1;
1764
1765             for (i = 0; i < 8; i++) {
1766               controller->buffer[4 + i] = 0;
1767             }
1768
1769             rd_ready_to_send_atapi(dev, channel);
1770             break;
1771             
1772           case 2:
1773           default:
1774             PrintError("(READ TOC) Format %d not supported\n", format);
1775             return -1;
1776           }
1777         } else {
1778           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1779           rd_raise_interrupt(dev, channel);
1780         }
1781         break;
1782       }  
1783     case 0x28: // read (10)
1784     case 0xa8: // read (12)
1785       { 
1786         
1787         uint32_t transfer_length;
1788         if (atapi_command == 0x28) {
1789           transfer_length = rd_read_16bit(controller->buffer + 7);
1790         } else {
1791           transfer_length = rd_read_32bit(controller->buffer + 6);
1792         }
1793
1794         uint32_t lba = rd_read_32bit(controller->buffer + 2);
1795         
1796         if (!(drive->cdrom.ready)) {
1797           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1798           rd_raise_interrupt(dev, channel);
1799           break;
1800         }
1801         
1802         if (transfer_length == 0) {
1803           rd_atapi_cmd_nop(dev, channel);
1804           rd_raise_interrupt(dev, channel);
1805           PrintDebug("\t\tREAD(%d) with transfer length 0, ok\n", (atapi_command == 0x28) ? 10 : 12);
1806           break;
1807         }
1808         
1809         if (lba + transfer_length > drive->cdrom.capacity) {
1810           rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
1811           rd_raise_interrupt(dev, channel);
1812           break;
1813         }
1814         
1815         PrintDebug("\t\tcdrom: READ (%d) LBA=%d LEN=%d\n", 
1816                    (atapi_command == 0x28) ? 10 : 12, 
1817                    lba, transfer_length);
1818         
1819         // handle command
1820         if (rd_init_send_atapi_command(dev, channel, atapi_command, transfer_length * 2048,
1821                                        transfer_length * 2048, true) == -1) {
1822           return -1;
1823         }
1824         drive->cdrom.remaining_blocks = transfer_length;
1825         drive->cdrom.next_lba = lba;
1826         rd_ready_to_send_atapi(dev, channel);
1827         break;
1828       }
1829     case 0x2b:  // seek
1830       {
1831         uint32_t lba = rd_read_32bit(controller->buffer + 2);
1832
1833         if (!(drive->cdrom.ready)) {
1834           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1835           rd_raise_interrupt(dev, channel);
1836           break;
1837         }
1838         
1839         if (lba > drive->cdrom.capacity) {
1840           rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
1841           rd_raise_interrupt(dev, channel);
1842           break;
1843         }
1844         
1845         PrintDebug("\t\tcdrom: SEEK (ignored)\n");
1846
1847         rd_atapi_cmd_nop(dev, channel);
1848         rd_raise_interrupt(dev, channel);
1849
1850         break;
1851       }
1852     case 0x1e:  // prevent/allow medium removal
1853       {
1854
1855         if (drive->cdrom.ready) {
1856           drive->cdrom.locked = controller->buffer[4] & 1;
1857           rd_atapi_cmd_nop(dev, channel);
1858         } else {
1859           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1860         }
1861
1862         rd_raise_interrupt(dev, channel);
1863
1864         break;
1865       }
1866     case 0x42:  // read sub-channel
1867       {
1868         //bool msf = get_packet_field(channel,1, 1, 1);
1869         bool sub_q = get_packet_field(channel,2, 6, 1);
1870         //uint8_t data_format = get_packet_byte(channel,3);
1871         //uint8_t track_number = get_packet_byte(channel,6);
1872         uint16_t alloc_length = get_packet_word(channel,7);
1873         
1874
1875         /*
1876           UNUSED(msf);
1877           UNUSED(data_format);
1878           UNUSED(track_number);
1879         */
1880         if (!(drive->cdrom.ready)) {
1881           rd_atapi_cmd_error(dev, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1882           rd_raise_interrupt(dev, channel);
1883         } else {
1884           controller->buffer[0] = 0;
1885           controller->buffer[1] = 0; // audio not supported
1886           controller->buffer[2] = 0;
1887           controller->buffer[3] = 0;
1888           
1889           int ret_len = 4; // header size
1890           
1891           if (sub_q) { // !sub_q == header only
1892             PrintError("Read sub-channel with SubQ not implemented\n");
1893             rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST,
1894                                ASC_INV_FIELD_IN_CMD_PACKET);
1895             rd_raise_interrupt(dev, channel);
1896           }
1897           
1898           if (rd_init_send_atapi_command(dev, channel, atapi_command, ret_len, alloc_length, false) == -1) {
1899             return -1;
1900           }
1901           rd_ready_to_send_atapi(dev, channel);
1902         }
1903         break;
1904       }
1905     case 0x51:  // read disc info
1906       {
1907         // no-op to keep the Linux CD-ROM driver happy
1908         rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1909         rd_raise_interrupt(dev, channel);
1910         break;
1911       }
1912     case 0x55: // mode select
1913     case 0xa6: // load/unload cd
1914     case 0x4b: // pause/resume
1915     case 0x45: // play audio
1916     case 0x47: // play audio msf
1917     case 0xbc: // play cd
1918     case 0xb9: // read cd msf
1919     case 0x44: // read header
1920     case 0xba: // scan
1921     case 0xbb: // set cd speed
1922     case 0x4e: // stop play/scan
1923     case 0x46: // ???
1924     case 0x4a: // ???
1925       PrintError("ATAPI command 0x%x not implemented yet\n",
1926                atapi_command);
1927       rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1928       rd_raise_interrupt(dev, channel);
1929       break;
1930     default:
1931       PrintError("Unknown ATAPI command 0x%x (%d)\n",
1932                  atapi_command, atapi_command);
1933       // We'd better signal the error if the user chose to continue
1934       rd_atapi_cmd_error(dev, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1935       rd_raise_interrupt(dev, channel);
1936       break;
1937     }
1938   }
1939   return 0;
1940 }
1941
1942
1943
1944
1945 int rd_init_send_atapi_command(struct vm_device * dev, struct channel_t * channel, Bit8u command, int req_length, int alloc_length, bool lazy)
1946 {
1947   struct drive_t * drive = &(channel->drives[channel->drive_select]);
1948   struct controller_t * controller = &(drive->controller);
1949
1950   // controller->byte_count is a union of controller->cylinder_no;
1951   // lazy is used to force a data read in the buffer at the next read.
1952   
1953   PrintDebug("[rd_init_send_atapi_cmd]\n");
1954
1955   if (controller->byte_count == 0xffff) {
1956     controller->byte_count = 0xfffe;
1957   }
1958
1959   if ((controller->byte_count & 1) && 
1960       !(alloc_length <= controller->byte_count)) {
1961       
1962     PrintDebug("\t\tOdd byte count (0x%04x) to ATAPI command 0x%02x, using 0x%x\n", 
1963                   controller->byte_count, 
1964                   command, 
1965                   controller->byte_count - 1);
1966     
1967     controller->byte_count -= 1;
1968   }
1969   
1970   if (controller->byte_count == 0) {
1971     PrintError("\t\tATAPI command with zero byte count\n");
1972     return -1;
1973   }
1974
1975   if (alloc_length < 0) {
1976     PrintError("\t\tAllocation length < 0\n");
1977     return -1;
1978   }
1979
1980   if (alloc_length == 0) {
1981     alloc_length = controller->byte_count;
1982   }
1983   
1984   controller->interrupt_reason.i_o = 1;
1985   controller->interrupt_reason.c_d = 0;
1986   controller->status.busy = 0;
1987   controller->status.drq = 1;
1988   controller->status.err = 0;
1989   
1990   // no bytes transfered yet
1991   if (lazy) {
1992     controller->buffer_index = 2048;
1993   } else {
1994     controller->buffer_index = 0;
1995   }
1996
1997   controller->drq_index = 0;
1998   
1999   if (controller->byte_count > req_length) {
2000     controller->byte_count = req_length;
2001   }
2002
2003   if (controller->byte_count > alloc_length) {
2004     controller->byte_count = alloc_length;
2005   }  
2006
2007   drive->atapi.command = command;
2008   drive->atapi.drq_bytes = controller->byte_count;
2009   drive->atapi.total_bytes_remaining = (req_length < alloc_length) ? req_length : alloc_length;
2010   
2011   // if (lazy) {
2012   // // bias drq_bytes and total_bytes_remaining
2013   // SELECTED_DRIVE(channel).atapi.drq_bytes += 2048;
2014   // SELECTED_DRIVE(channel).atapi.total_bytes_remaining += 2048;
2015   // }
2016
2017   return 0;
2018 }
2019
2020
2021
2022  void rd_ready_to_send_atapi(struct vm_device * dev, struct channel_t * channel) {
2023   PrintDebug("[rd_ready_to_send_atapi]\n");
2024
2025   rd_raise_interrupt(dev, channel);
2026 }
2027
2028
2029
2030
2031
2032 void rd_atapi_cmd_error(struct vm_device * dev, struct channel_t * channel, sense_t sense_key, asc_t asc)
2033 {
2034   struct drive_t * drive = &(channel->drives[channel->drive_select]);
2035   struct controller_t * controller = &(drive->controller);
2036
2037 #ifdef DEBUG_RAMDISK
2038   {
2039     struct ramdisk_t *ramdisk = (struct ramdisk_t *)(dev->private_data);
2040     PrintDebug("[rd_atapi_cmd_error]\n");
2041     PrintDebug("Error: atapi_cmd_error channel=%02x key=%02x asc=%02x\n", 
2042                get_channel_no(ramdisk, channel), sense_key, asc);
2043   }
2044 #endif
2045
2046   controller->error_register = sense_key << 4;
2047   controller->interrupt_reason.i_o = 1;
2048   controller->interrupt_reason.c_d = 1;
2049   controller->interrupt_reason.rel = 0;
2050   controller->status.busy = 0;
2051   controller->status.drive_ready = 1;
2052   controller->status.write_fault = 0;
2053   controller->status.drq = 0;
2054   controller->status.err = 1;
2055   
2056   drive->sense.sense_key = sense_key;
2057   drive->sense.asc = asc;
2058   drive->sense.ascq = 0;
2059 }
2060
2061
2062
2063 void rd_atapi_cmd_nop(struct vm_device * dev, struct channel_t * channel)
2064 {
2065   struct drive_t * drive = &(channel->drives[channel->drive_select]);
2066   struct controller_t * controller = &(drive->controller);
2067
2068   PrintDebug("[rd_atapi_cmd_nop]\n");
2069   controller->interrupt_reason.i_o = 1;
2070   controller->interrupt_reason.c_d = 1;
2071   controller->interrupt_reason.rel = 0;
2072   controller->status.busy = 0;
2073   controller->status.drive_ready = 1;
2074   controller->status.drq = 0;
2075   controller->status.err = 0;
2076 }
2077
2078
2079
2080
2081 void rd_identify_ATAPI_drive(struct vm_device * dev, struct channel_t * channel)
2082 {
2083   struct drive_t * drive = &(channel->drives[channel->drive_select]);
2084   struct controller_t * controller = &(drive->controller);
2085
2086
2087   uint_t i;
2088   const char* serial_number = " VT00001\0\0\0\0\0\0\0\0\0\0\0\0";
2089   const char* firmware = "ALPHA1  ";
2090
2091   drive->id_drive[0] = (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0); // Removable CDROM, 50us response, 12 byte packets
2092
2093   for (i = 1; i <= 9; i++) {
2094     drive->id_drive[i] = 0;
2095   }
2096
2097   for (i = 0; i < 10; i++) {
2098     drive->id_drive[10 + i] = ((serial_number[i * 2] << 8) |
2099                                (serial_number[(i * 2) + 1]));
2100   }
2101
2102   for (i = 20; i <= 22; i++) {
2103     drive->id_drive[i] = 0;
2104   }
2105
2106   for (i = 0; i < strlen(firmware)/2; i++) {
2107     drive->id_drive[23 + i] = ((firmware[i * 2] << 8) |
2108                                (firmware[(i * 2) + 1]));
2109   }
2110   V3_ASSERT((23 + i) == 27);
2111   
2112   for (i = 0; i < strlen((char *)(drive->model_no)) / 2; i++) {
2113     drive->id_drive[27 + i] = ((drive->model_no[i * 2] << 8) |
2114                                (drive->model_no[(i * 2) + 1]));
2115   }
2116   V3_ASSERT((27 + i) == 47);
2117
2118   drive->id_drive[47] = 0;
2119   drive->id_drive[48] = 1; // 32 bits access
2120
2121   drive->id_drive[49] = (1 << 9); // LBA supported
2122
2123   drive->id_drive[50] = 0;
2124   drive->id_drive[51] = 0;
2125   drive->id_drive[52] = 0;
2126
2127   drive->id_drive[53] = 3; // words 64-70, 54-58 valid
2128
2129   for (i = 54; i <= 62; i++) {
2130     drive->id_drive[i] = 0;
2131   }
2132
2133   // copied from CFA540A
2134   drive->id_drive[63] = 0x0103; // variable (DMA stuff)
2135   drive->id_drive[64] = 0x0001; // PIO
2136   drive->id_drive[65] = 0x00b4;
2137   drive->id_drive[66] = 0x00b4;
2138   drive->id_drive[67] = 0x012c;
2139   drive->id_drive[68] = 0x00b4;
2140
2141   drive->id_drive[69] = 0;
2142   drive->id_drive[70] = 0;
2143   drive->id_drive[71] = 30; // faked
2144   drive->id_drive[72] = 30; // faked
2145   drive->id_drive[73] = 0;
2146   drive->id_drive[74] = 0;
2147
2148   drive->id_drive[75] = 0;
2149
2150   for (i = 76; i <= 79; i++) {
2151     drive->id_drive[i] = 0;
2152   }
2153
2154   drive->id_drive[80] = 0x1e; // supports up to ATA/ATAPI-4
2155   drive->id_drive[81] = 0;
2156   drive->id_drive[82] = 0;
2157   drive->id_drive[83] = 0;
2158   drive->id_drive[84] = 0;
2159   drive->id_drive[85] = 0;
2160   drive->id_drive[86] = 0;
2161   drive->id_drive[87] = 0;
2162   drive->id_drive[88] = 0;
2163
2164   for (i = 89; i <= 126; i++) {
2165     drive->id_drive[i] = 0;
2166   }
2167
2168   drive->id_drive[127] = 0;
2169   drive->id_drive[128] = 0;
2170
2171   for (i = 129; i <= 159; i++) {
2172     drive->id_drive[i] = 0;
2173   }
2174
2175   for (i = 160; i <= 255; i++) {
2176     drive->id_drive[i] = 0;
2177   }
2178
2179   // now convert the id_drive array (native 256 word format) to
2180   // the controller buffer (512 bytes)
2181   Bit16u temp16;
2182   for (i = 0; i <= 255; i++) {
2183     temp16 = drive->id_drive[i];
2184     controller->buffer[i * 2] = temp16 & 0x00ff;
2185     controller->buffer[i * 2 + 1] = temp16 >> 8;
2186   }
2187
2188   return;
2189 }
2190
2191
2192
2193
2194
2195
2196
2197 static 
2198 void rd_init_mode_sense_single(struct vm_device * dev, 
2199                                struct channel_t * channel, const void* src, int size)
2200 {
2201   struct drive_t * drive = &(channel->drives[channel->drive_select]);
2202   struct controller_t * controller = &(drive->controller);
2203
2204   PrintDebug("[rd_init_mode_sense_single]\n");
2205
2206   // Header
2207   controller->buffer[0] = (size + 6) >> 8;
2208   controller->buffer[1] = (size + 6) & 0xff;
2209   controller->buffer[2] = 0x70; // no media present
2210   controller->buffer[3] = 0; // reserved
2211   controller->buffer[4] = 0; // reserved
2212   controller->buffer[5] = 0; // reserved
2213   controller->buffer[6] = 0; // reserved
2214   controller->buffer[7] = 0; // reserved
2215   
2216   // Data
2217   memcpy(controller->buffer + 8, src, size);
2218 }
2219
2220
2221
2222 static void rd_command_aborted(struct vm_device * dev, 
2223                                struct channel_t * channel, unsigned value) {
2224   struct drive_t * drive = &(channel->drives[channel->drive_select]);
2225   struct controller_t * controller = &(drive->controller);
2226
2227   PrintDebug("[rd_command_aborted]\n");
2228   PrintDebug("\t\taborting on command 0x%02x {%s}\n", value, device_type_to_str(drive->device_type));
2229
2230   controller->current_command = 0;
2231   controller->status.busy = 0;
2232   controller->status.drive_ready = 1;
2233   controller->status.err = 1;
2234   controller->error_register = 0x04; // command ABORTED
2235   controller->status.drq = 0;
2236   controller->status.seek_complete = 0;
2237   controller->status.corrected_data = 0;
2238   controller->buffer_index = 0;
2239
2240   rd_raise_interrupt(dev, channel);
2241 }
2242
2243
2244 static int ramdisk_init_device(struct vm_device *dev) {
2245   struct ramdisk_t *ramdisk= (struct ramdisk_t *)dev->private_data;
2246
2247   PrintDebug("Initializing Ramdisk\n");
2248
2249
2250   rd_init_hardware(ramdisk);
2251
2252
2253   dev_hook_io(dev, PRI_CTRL_PORT, 
2254               &read_status_port, &write_ctrl_port);
2255
2256   dev_hook_io(dev, PRI_DATA_PORT, 
2257               &read_data_port, &write_data_port);
2258   dev_hook_io(dev, PRI_FEATURES_PORT, 
2259               &read_general_port, &write_general_port);
2260   dev_hook_io(dev, PRI_SECT_CNT_PORT, 
2261               &read_general_port, &write_general_port);
2262   dev_hook_io(dev, PRI_SECT_ADDR1_PORT, 
2263               &read_general_port, &write_general_port);
2264   dev_hook_io(dev, PRI_SECT_ADDR2_PORT, 
2265               &read_general_port, &write_general_port);
2266   dev_hook_io(dev, PRI_SECT_ADDR3_PORT, 
2267               &read_general_port, &write_general_port);
2268   dev_hook_io(dev, PRI_DRV_SEL_PORT, 
2269               &read_general_port, &write_general_port);
2270   dev_hook_io(dev, PRI_CMD_PORT, 
2271               &read_status_port, &write_cmd_port);
2272
2273
2274   dev_hook_io(dev, SEC_CTRL_PORT, 
2275               &read_status_port, &write_ctrl_port);
2276
2277   dev_hook_io(dev, SEC_DATA_PORT, 
2278               &read_data_port, &write_data_port);
2279   dev_hook_io(dev, SEC_FEATURES_PORT, 
2280               &read_general_port, &write_general_port);
2281   dev_hook_io(dev, SEC_SECT_CNT_PORT, 
2282               &read_general_port, &write_general_port);
2283   dev_hook_io(dev, SEC_SECT_ADDR1_PORT, 
2284               &read_general_port, &write_general_port);
2285   dev_hook_io(dev, SEC_SECT_ADDR2_PORT, 
2286               &read_general_port, &write_general_port);
2287   dev_hook_io(dev, SEC_SECT_ADDR3_PORT, 
2288               &read_general_port, &write_general_port);
2289   dev_hook_io(dev, SEC_DRV_SEL_PORT, 
2290               &read_general_port, &write_general_port);
2291   dev_hook_io(dev, SEC_CMD_PORT, 
2292               &read_status_port, &write_cmd_port);
2293
2294   
2295
2296   dev_hook_io(dev, SEC_ADDR_REG_PORT, 
2297               &read_general_port, &write_general_port);
2298
2299   dev_hook_io(dev, PRI_ADDR_REG_PORT, 
2300               &read_general_port, &write_general_port);
2301
2302
2303
2304   return 0;
2305
2306 }
2307
2308
2309 static int ramdisk_deinit_device(struct vm_device *dev) {
2310   struct ramdisk_t *ramdisk = (struct ramdisk_t *)(dev->private_data);
2311   rd_close_harddrive(ramdisk);
2312   return 0;
2313 }
2314
2315 static struct vm_device_ops dev_ops = {
2316   .init = ramdisk_init_device,
2317   .deinit = ramdisk_deinit_device,
2318   .reset = NULL,
2319   .start = NULL,
2320   .stop = NULL,
2321 };
2322
2323
2324
2325
2326 struct vm_device *create_ramdisk()
2327 {
2328
2329   struct ramdisk_t *ramdisk;
2330   ramdisk = (struct ramdisk_t *)V3_Malloc(sizeof(struct ramdisk_t));  
2331   V3_ASSERT(ramdisk != NULL);  
2332
2333   PrintDebug("[create_ramdisk]\n");
2334
2335   struct vm_device *device = create_device("RAMDISK", &dev_ops, ramdisk);
2336
2337   return device;
2338 }
2339
2340
2341
2342
2343 #ifdef DEBUG_RAMDISK
2344
2345 static void rd_print_state(struct ramdisk_t * ramdisk) {
2346   uchar_t channel; 
2347   uchar_t device;
2348   struct channel_t * channels = (struct channel_t *)(&(ramdisk->channels));
2349
2350   /*
2351   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++) {
2352     memset((char *)(channels + channel), 0, sizeof(struct channel_t));
2353   }
2354   */
2355   PrintDebug("sizeof(*channels) = %d\n", sizeof(*channels));
2356   PrintDebug("sizeof(channles->drives[0].controller) = %d\n", sizeof((channels->drives[0].controller)));
2357   PrintDebug("sizeof(channles->drives[0].cdrom) = %d\n", sizeof((channels->drives[0].cdrom)));
2358   PrintDebug("sizeof(channles->drives[0].sense) = %d\n", sizeof((channels->drives[0].sense)));
2359   PrintDebug("sizeof(channles->drives[0].atapi) = %d\n", sizeof((channels->drives[0].atapi)));
2360
2361
2362   PrintDebug("sizeof(channles->drives[0].controller.status) = %d\n", 
2363                 sizeof((channels->drives[0].controller.status)));
2364   PrintDebug("sizeof(channles->drives[0].controller.sector_count) = %d\n", 
2365                 sizeof((channels->drives[0].controller.sector_count)));
2366   PrintDebug("sizeof(channles->drives[0].controller.interrupt_reason) = %d\n", 
2367                 sizeof((channels->drives[0].controller.interrupt_reason)));
2368
2369   PrintDebug("sizeof(channles->drives[0].controller.cylinder_no) = %d\n", 
2370                 sizeof((channels->drives[0].controller.cylinder_no)));
2371   PrintDebug("sizeof(channles->drives[0].controller.byte_count) = %d\n", 
2372                 sizeof((channels->drives[0].controller.byte_count)));
2373
2374
2375   PrintDebug("sizeof(channles->drives[0].controller.control) = %d\n", 
2376                 sizeof((channels->drives[0].controller.control)));
2377
2378
2379   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
2380   
2381     for (device = 0; device < 2; device++){
2382                   
2383       // Initialize controller state, even if device is not present
2384       PrintDebug("channels[%d].drives[%d].controller.status.busy = %d\n",
2385                     channel, device, 
2386                     channels[channel].drives[device].controller.status.busy);
2387       PrintDebug("channels[%d].drives[%d].controller.status.drive_ready = %d\n", 
2388                     channel, device, 
2389                     channels[channel].drives[device].controller.status.drive_ready);
2390       PrintDebug("channels[%d].drives[%d].controller.status.write_fault = %d\n", 
2391                     channel, device, 
2392                     channels[channel].drives[device].controller.status.write_fault);
2393       PrintDebug("channels[%d].drives[%d].controller.status.seek_complete = %d\n", 
2394                     channel, device, 
2395                     channels[channel].drives[device].controller.status.seek_complete);
2396       PrintDebug("channels[%d].drives[%d].controller.status.drq = %d\n", 
2397                     channel, device, 
2398                     channels[channel].drives[device].controller.status.drq);
2399       PrintDebug("channels[%d].drives[%d].controller.status.corrected_data = %d\n", 
2400                     channel, device, 
2401                     channels[channel].drives[device].controller.status.corrected_data);
2402       PrintDebug("channels[%d].drives[%d].controller.status.index_pulse = %d\n", 
2403                     channel, device, 
2404                     channels[channel].drives[device].controller.status.index_pulse);
2405       PrintDebug("channels[%d].drives[%d].controller.status.index_pulse_count = %d\n", 
2406                     channel, device, 
2407                     channels[channel].drives[device].controller.status.index_pulse_count);
2408       PrintDebug("channels[%d].drives[%d].controller.status.err = %d\n", 
2409                     channel, device, 
2410                     channels[channel].drives[device].controller.status.err);
2411
2412
2413       PrintDebug("channels[%d].drives[%d].controller.error_register = %d\n", 
2414                     channel, device, 
2415                     channels[channel].drives[device].controller.error_register);
2416       PrintDebug("channels[%d].drives[%d].controller.head_no = %d\n", 
2417                     channel, device, 
2418                     channels[channel].drives[device].controller.head_no);
2419       PrintDebug("channels[%d].drives[%d].controller.sector_count = %d\n", 
2420                     channel, device, 
2421                     channels[channel].drives[device].controller.sector_count);
2422       PrintDebug("channels[%d].drives[%d].controller.sector_no = %d\n", 
2423                     channel, device, 
2424                     channels[channel].drives[device].controller.sector_no);
2425       PrintDebug("channels[%d].drives[%d].controller.cylinder_no = %d\n", 
2426                     channel, device, 
2427                     channels[channel].drives[device].controller.cylinder_no);
2428       PrintDebug("channels[%d].drives[%d].controller.current_command = %02x\n", 
2429                     channel, device, 
2430                     channels[channel].drives[device].controller.current_command);
2431       PrintDebug("channels[%d].drives[%d].controller.buffer_index = %d\n", 
2432                     channel, device, 
2433                     channels[channel].drives[device].controller.buffer_index);
2434
2435
2436       PrintDebug("channels[%d].drives[%d].controller.control.reset = %d\n", 
2437                     channel, device, 
2438                     channels[channel].drives[device].controller.control.reset);
2439       PrintDebug("channels[%d].drives[%d].controller.control.disable_irq = %d\n", 
2440                     channel, device, 
2441                     channels[channel].drives[device].controller.control.disable_irq);
2442
2443
2444       PrintDebug("channels[%d].drives[%d].controller.reset_in_progress = %d\n", 
2445                     channel, device, 
2446                     channels[channel].drives[device].controller.reset_in_progress);
2447       PrintDebug("channels[%d].drives[%d].controller.sectors_per_block = %02x\n", 
2448                     channel, device, 
2449                     channels[channel].drives[device].controller.sectors_per_block); 
2450       PrintDebug("channels[%d].drives[%d].controller.lba_mode = %d\n", 
2451                     channel, device, 
2452                     channels[channel].drives[device].controller.lba_mode); 
2453       PrintDebug("channels[%d].drives[%d].controller.features = %d\n", 
2454                     channel, device, 
2455                     channels[channel].drives[device].controller.features); 
2456
2457
2458       PrintDebug("channels[%d].drives[%d].model_no = %s\n", 
2459                     channel, device, 
2460                     channels[channel].drives[device].model_no); 
2461       PrintDebug("channels[%d].drives[%d].device_type = %d\n", 
2462                     channel, device, 
2463                     channels[channel].drives[device].device_type); 
2464       PrintDebug("channels[%d].drives[%d].cdrom.locked = %d\n", 
2465                     channel, device, 
2466                     channels[channel].drives[device].cdrom.locked); 
2467       PrintDebug("channels[%d].drives[%d].sense.sense_key = %d\n", 
2468                     channel, device, 
2469                     channels[channel].drives[device].sense.sense_key); 
2470       PrintDebug("channels[%d].drives[%d].sense.asc = %d\n", 
2471                     channel, device, 
2472                     channels[channel].drives[device].sense.asc); 
2473       PrintDebug("channels[%d].drives[%d].sense.ascq = %d\n", 
2474                     channel, device, 
2475                     channels[channel].drives[device].sense.ascq); 
2476
2477
2478
2479       PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n", 
2480                     channel, device, 
2481                     channels[channel].drives[device].controller.interrupt_reason.c_d);
2482
2483       PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n", 
2484                     channel, device, 
2485                     channels[channel].drives[device].controller.interrupt_reason.i_o);
2486
2487       PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n", 
2488                     channel, device, 
2489                     channels[channel].drives[device].controller.interrupt_reason.rel);
2490
2491       PrintDebug("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n", 
2492                     channel, device, 
2493                     channels[channel].drives[device].controller.interrupt_reason.tag);
2494
2495       PrintDebug("channels[%d].drives[%d].cdrom.ready = %d\n", 
2496                     channel, device, 
2497                     channels[channel].drives[device].cdrom.ready);
2498       
2499     }  //for device
2500   }  //for channel
2501   
2502   return;
2503 }
2504
2505 #if 0
2506 static void trace_info(ushort_t port, void *src, uint_t length) {
2507
2508   switch(port){
2509
2510   case 0x3e8:
2511     if (length == 1 && *((uchar_t*) src) == ATA_DETECT)
2512       PrintDebug("ata_detect()\n");
2513     break;
2514
2515   case 0x3e9:
2516     if (length == 1 && *((uchar_t*) src) == ATA_RESET)
2517       PrintDebug("ata_reset()\n");
2518     break;
2519
2520   case 0x3ea:
2521     if (length == 1 && *((uchar_t*) src) == ATA_CMD_DATA_IN)
2522       PrintDebug("ata_cmd_data_in()\n");
2523     break;
2524
2525   case 0x3eb:
2526     if (length == 1 && *((uchar_t*) src) == ATA_CMD_DATA_OUT)
2527       PrintDebug("ata_cmd_data_out()\n");
2528     break;
2529
2530   case 0x3ec:
2531     if (length == 1 && *((uchar_t*) src) == ATA_CMD_PACKET)
2532       PrintDebug("ata_cmd_packet()\n");
2533     break;
2534
2535   case 0x3ed:
2536     if (length == 1 && *((uchar_t*) src) == ATAPI_GET_SENSE)
2537       PrintDebug("atapi_get_sense()\n");
2538     break;
2539
2540   case 0x3ee:
2541     if (length == 1 && *((uchar_t*) src) == ATAPI_IS_READY)
2542       PrintDebug("atapi_is_ready()\n");
2543     break;
2544
2545   case 0x3ef:
2546     if (length == 1 && *((uchar_t*) src) == ATAPI_IS_CDROM)
2547       PrintDebug("atapi_is_cdrom()\n");
2548     break;
2549
2550
2551   case 0x2e8:
2552     if (length == 1 && *((uchar_t*) src) == CDEMU_INIT)
2553       PrintDebug("cdemu_init()\n");
2554     break;
2555
2556   case 0x2e9:
2557     if (length == 1 && *((uchar_t*) src) == CDEMU_ISACTIVE)
2558       PrintDebug("cdemu_isactive()\n");
2559     break;
2560
2561   case 0x2ea:
2562     if (length == 1 && *((uchar_t*) src) == CDEMU_EMULATED_DRIVE)
2563       PrintDebug("cdemu_emulated_drive()\n");
2564     break;
2565
2566   case 0x2eb:
2567     if (length == 1 && *((uchar_t*) src) == CDROM_BOOT)
2568       PrintDebug("cdrom_boot()\n");
2569     break;
2570
2571   case 0x2ec:
2572     if (length == 1 && *((uchar_t*) src) == HARD_DRIVE_POST)
2573       PrintDebug("ata_hard_drive_post()\n");
2574     break;
2575
2576   case 0x2ed:
2577     if (length == 1)
2578       PrintDebug("ata_device_no(%d)\n", *((uchar_t*) src));
2579     break;
2580
2581   case 0x2ee:
2582     if (length == 1)
2583       PrintDebug("ata_device_type(%d)\n", *((uchar_t*) src));
2584     break;
2585
2586   case 0x2ef:
2587     if (length == 1 && *((uchar_t*) src) == INT13_HARDDISK)
2588       PrintDebug("int13_harddrive()\n");
2589     break;
2590
2591   case 0x2f8:
2592     if (length == 1 && *((uchar_t*) src) == INT13_CDROM)
2593       PrintDebug("int13_cdrom()\n");
2594     break;
2595
2596   case 0x2f9:
2597     if (length == 1 && *((uchar_t*) src) == INT13_CDEMU)
2598       PrintDebug("int13_cdemu()\n");
2599     break;
2600
2601   case 0x2fa:
2602     if (length == 1 && *((uchar_t*) src) == INT13_ELTORITO)
2603       PrintDebug("int13_eltorito()\n");
2604     break;
2605
2606   case 0x2fb:
2607     if (length == 1 && *((uchar_t*) src) == INT13_DISKETTE_FUNCTION)
2608       PrintDebug("int13_diskette_function()\n");
2609     break;
2610
2611
2612   default:
2613     break;
2614   }
2615 }
2616
2617 #endif
2618
2619 static int check_bit_fields(struct controller_t * controller) {
2620   //Check bit fields
2621   controller->sector_count = 0;
2622   controller->interrupt_reason.c_d = 1;
2623   if (controller->sector_count != 0x01) {
2624     return INTR_REASON_BIT_ERR;
2625   }
2626   
2627   controller->sector_count = 0;
2628   controller->interrupt_reason.i_o = 1;
2629   if (controller->sector_count != 0x02) {
2630     return INTR_REASON_BIT_ERR;
2631   }
2632   
2633   controller->sector_count = 0;
2634   controller->interrupt_reason.rel = 1;
2635   if (controller->sector_count != 0x04) {
2636     return INTR_REASON_BIT_ERR;
2637   }
2638   
2639   controller->sector_count = 0;
2640   controller->interrupt_reason.tag = 3;
2641   if (controller->sector_count != 0x18) {
2642     return INTR_REASON_BIT_ERR;
2643   }
2644   
2645   return 0;
2646 }
2647 #endif