palacios/src/devices/ramdisk.c

   1 /*
   2  * Zheng Cui
   3  * cuizheng@cs.unm.edu
   4  * July 2008
   5  */
   6
   7 #include <devices/ramdisk.h>
   8 #include <palacios/vmm.h>
   9 #include <string.h>
  10
  11 #ifdef DEBUG_RAMDISK
  12 //#define Ramdisk_Print(_f, _a...) PrintTrace("\nramdisk.c(%d) " _f, __LINE__, ## _a)
  13 #define Ramdisk_Print(_f, _a...) PrintTrace("\nramdisk.c " _f, ## _a)
  14 #else
  15 #define Ramdisk_Print(_f, _a...)
  16 #endif
  17
  18 #define RD_PANIC(_f, _a...)     \
  19   do {                       \
  20     PrintDebug("ramdisk.c(%d) " _f, __LINE__, ## _a);   \
  21       while(1);              \
  22     }                        \
  23    while(0)
  24
  25 #define RD_ERROR(_f, _a...) PrintTrace("\nramdisk.c(%d) " _f, __LINE__, ## _a)
  26
  27
  28
  29 /*
  30  * Data type definitions
  31  *
  32  */
  33 #define INDEX_PULSE_CYCLE 10
  34
  35 #define MAX_ATA_CHANNEL 4
  36 #define RD_LITTLE_ENDIAN
  37
  38
  39 #define INTR_REASON_BIT_ERR           0x01
  40 #define UNABLE_FIND_TAT_CHANNEL_ERR   0x02
  41 #define DRQ_ERR                       0x03
  42 #define READ_BUF_GT_512               0x04
  43
  44
  45 typedef enum _sense {
  46       SENSE_NONE = 0, SENSE_NOT_READY = 2, SENSE_ILLEGAL_REQUEST = 5,
  47       SENSE_UNIT_ATTENTION = 6
  48 } sense_t ;
  49
  50 typedef enum _asc {
  51       ASC_INV_FIELD_IN_CMD_PACKET = 0x24,
  52       ASC_MEDIUM_NOT_PRESENT = 0x3a,
  53       ASC_SAVING_PARAMETERS_NOT_SUPPORTED = 0x39,
  54       ASC_LOGICAL_BLOCK_OOR = 0x21
  55 } asc_t ;
  56
  57
  58 // FLAT MODE
  59 // Open a image. Returns non-negative if successful.
  60 //int open (const char* pathname);
  61
  62 // Open an image with specific flags. Returns non-negative if successful.
  63 int rd_open (const char* pathname, int flags);
  64
  65 // Close the image.
  66 void rd_close ();
  67
  68 // Position ourselves. Return the resulting offset from the
  69 // beginning of the file.
  70 off_t rd_lseek (off_t offset, int whence);
  71
  72 // Read count bytes to the buffer buf. Return the number of
  73 // bytes read (count).
  74 ssize_t rd_read (void* buf, size_t count);
  75
  76 // Write count bytes from buf. Return the number of bytes
  77 // written (count).
  78 ssize_t rd_write (const void* buf, size_t count);
  79
  80
  81 typedef struct  {
  82
  83       unsigned cylinders               ;
  84       unsigned heads                   ;
  85       unsigned sectors                 ;
  86
  87   //iso file descriptor
  88       int fd                           ;
  89 } device_image_t;
  90
  91
  92
  93 struct  controller_t {
  94   struct  {
  95     rd_bool busy                       ;
  96     rd_bool drive_ready                ;
  97     rd_bool write_fault                ;
  98     rd_bool seek_complete              ;
  99     rd_bool drq                        ;
 100     rd_bool corrected_data             ;
 101     rd_bool index_pulse                ;
 102     unsigned int index_pulse_count     ;
 103     rd_bool err                        ;
 104     } status;
 105   Bit8u    error_register              ;
 106   Bit8u    head_no                     ;
 107   union  {
 108     Bit8u    sector_count              ;
 109     struct  {
 110 #ifdef RD_LITTLE_ENDIAN
 111       unsigned  c_d : 1;
 112       unsigned  i_o : 1;
 113       unsigned  rel : 1;
 114       unsigned  tag : 5;
 115
 116 #else  /* RD_BIG_ENDIAN */
 117       unsigned tag : 5;
 118       unsigned rel : 1;
 119       unsigned i_o : 1;
 120       unsigned c_d : 1;
 121 #endif
 122
 123     } interrupt_reason;
 124   };
 125   Bit8u    sector_no                   ;
 126   union  {
 127     Bit16u   cylinder_no               ;
 128     Bit16u   byte_count                ;
 129   };
 130   Bit8u    buffer[2048];               ;
 131   Bit32u   buffer_index                ;
 132   Bit32u   drq_index                   ;
 133   Bit8u    current_command             ;
 134   Bit8u    sectors_per_block           ;
 135   Bit8u    lba_mode                    ;
 136   struct  {
 137     // 0=normal, 1=reset controller
 138     rd_bool reset                      ;
 139     // 0=allow irq, 1=disable irq
 140     rd_bool disable_irq                ;
 141     } control;
 142   Bit8u    reset_in_progress           ;
 143   Bit8u    features                    ;
 144   };
 145
 146 struct  sense_info_t{
 147   sense_t sense_key                    ;
 148   struct  {
 149     Bit8u arr[4]                       ;
 150   } information;
 151   struct  {
 152     Bit8u arr[4]                       ;
 153   } specific_inf;
 154   struct  {
 155     Bit8u arr[3]                       ;
 156   } key_spec;
 157   Bit8u fruc                           ;
 158   Bit8u asc                            ;
 159   Bit8u ascq                           ;
 160 };
 161
 162 struct  error_recovery_t {
 163   unsigned char data[8]                ;
 164
 165   //  error_recovery_t ();
 166 };
 167
 168 uint16 rd_read_16bit(const uint8* buf); //__attribute__(regparm(1))
 169 uint32 rd_read_32bit(const uint8* buf); //__attribute__(regparm(1))
 170
 171 struct  cdrom_t {
 172   rd_bool ready                                      ;
 173   rd_bool locked                                     ;
 174
 175
 176   struct cdrom_interface *cd                         ;
 177
 178   uint32 capacity                                    ;
 179   int next_lba                                       ;
 180   int remaining_blocks                               ;
 181   struct  currentStruct {
 182     struct error_recovery_t error_recovery           ;
 183   } current;
 184 };
 185
 186 struct  atapi_t {
 187   uint8 command                                      ;
 188   int drq_bytes                                      ;
 189   int total_bytes_remaining                          ;
 190 };
 191
 192
 193 typedef enum {
 194       IDE_NONE, IDE_DISK, IDE_CDROM
 195 } device_type_t ;
 196
 197
 198   // FIXME:
 199   // For each ATA channel we should have one controller struct
 200   // and an array of two drive structs
 201 struct  channel_t {
 202     struct  drive_t {
 203       device_image_t  hard_drive                     ;
 204       device_type_t device_type                      ;
 205       // 512 byte buffer for ID drive command
 206       // These words are stored in native word endian format, as
 207       // they are fetched and returned via a return(), so
 208       // there's no need to keep them in x86 endian format.
 209       Bit16u id_drive[256]                           ;
 210
 211       struct controller_t controller                 ;
 212       struct cdrom_t cdrom                           ;
 213       struct sense_info_t sense                      ;
 214       struct atapi_t atapi                           ;
 215
 216       Bit8u model_no[41]                             ;
 217       } drives[2];
 218     unsigned drive_select                            ;
 219
 220     Bit16u ioaddr1                                   ;
 221     Bit16u ioaddr2                                   ;
 222     Bit8u  irq                                       ;
 223 };
 224
 225 struct ramdisk_t;
 226
 227 struct ramdisk_ctrl_ops {
 228   Bit32u (*init)(struct ramdisk_t *ramdisk,
 229                  struct vm_device *dev);
 230   void   (*close)(struct ramdisk_t *ramdisk);
 231   void   (*reset)(struct ramdisk_t *ramdisk, unsigned type);
 232
 233 };
 234
 235 struct ramdisk_emu_ops {
 236
 237   int (*read_port)(ushort_t port,
 238                    void *dst,
 239                    uint_t length,
 240                    struct vm_device *dev);
 241
 242   int (*write_port)(ushort_t port,
 243                     void *src,
 244                     uint_t length,
 245                     struct vm_device *dev);
 246
 247   int (*read_port_ignore)(ushort_t port,
 248                           void *dst,
 249                           uint_t length,
 250                           struct vm_device *dev);
 251
 252   int (*write_port_ignore)(ushort_t port,
 253                            void *src,
 254                            uint_t length,
 255                            struct vm_device *dev);
 256 };
 257
 258
 259 struct  ramdisk_t {
 260
 261   struct channel_t channels[MAX_ATA_CHANNEL];
 262
 263   struct ramdisk_ctrl_ops cops;
 264
 265   struct ramdisk_emu_ops eops;
 266
 267   void *private_data;
 268   //  struct vm_device *dev;
 269 };
 270
 271
 272 /*
 273  * Debug facilities
 274  */
 275
 276 #define ATA_DETECT                     0xf0 //0X3E8
 277 #define ATA_RESET                      0xf1 //0X3E9
 278 #define ATA_CMD_DATA_IN                0xf2 //0X3EA
 279 #define ATA_CMD_DATA_OUT               0xf3 //0X3EB
 280 #define ATA_CMD_PACKET                 0xf4 //0X3EC
 281 #define ATAPI_GET_SENSE                0xf5 //0X3ED
 282 #define ATAPI_IS_READY                 0xf6 //0X3EE
 283 #define ATAPI_IS_CDROM                 0xf7 //0X3EF
 284
 285 #define CDEMU_INIT                     0xf8 //0X2E8
 286 #define CDEMU_ISACTIVE                 0xf9 //0X2E9
 287 #define CDEMU_EMULATED_DRIVE           0xfa //0X2EA
 288 #define CDROM_BOOT                     0xfb //0X2EB
 289
 290
 291 #define HARD_DRIVE_POST                0xfc //0X2EC
 292
 293
 294 #define ATA_DEVICE_NO                  0xfd //0X2ED
 295 #define ATA_DEVICE_TYPE                0xfe //0X2ED
 296
 297 #define INT13_HARDDISK                 0xff //0x2ef
 298 #define INT13_CDROM                    0xe0 //0x2f8
 299 #define INT13_CDEMU                    0xe1 //0x2f9
 300 #define INT13_ELTORITO                 0xe2 //0x2fa
 301 #define INT13_DISKETTE_FUNCTION        0xe3 //0x2fb
 302
 303 // some packet handling macros
 304 #define EXTRACT_FIELD(arr,byte,start,num_bits) (((arr)[(byte)] >> (start)) & ((1 << (num_bits)) - 1))
 305 #define get_packet_field(c,b,s,n) (EXTRACT_FIELD((SELECTED_CONTROLLER((c)).buffer),(b),(s),(n)))
 306 #define get_packet_byte(c,b) (SELECTED_CONTROLLER((c)).buffer[(b)])
 307 #define get_packet_word(c,b) (((uint16)SELECTED_CONTROLLER((c)).buffer[(b)] << 8) | SELECTED_CONTROLLER((c)).buffer[(b)+1])
 308
 309
 310 #define CONTROLLER(c,a) (channels[(c)].drives[(a)]).controller
 311 #define DRIVE(c,a) (channels[(c)].drives[(a)])
 312 #define SELECTED_CONTROLLER(c) (CONTROLLER((c), channels[(c)].drive_select))
 313 #define SELECTED_DRIVE(c) (DRIVE((c), channels[(c)].drive_select))
 314
 315
 316 #define DRIVE_IS_PRESENT(c,a) (channels[(c)].drives[(a)].device_type != IDE_NONE)
 317 #define DRIVE_IS_HD(c,a) (channels[(c)].drives[(a)].device_type == IDE_DISK)
 318 #define DRIVE_IS_CD(c,a) (channels[(c)].drives[(a)].device_type == IDE_CDROM)
 319 #define SELECTED_MODEL(c) (channels[(c)].drives[channels[(c)].drive_select].model_no)
 320
 321 #define MASTER_SELECTED(c) (!channels[(c)].drive_select)
 322 #define SLAVE_SELECTED(c)  (channels[(c)].drive_select)
 323
 324 #define SELECTED_IS_PRESENT(c) (DRIVE_IS_PRESENT((c),SLAVE_SELECTED((c))))
 325 #define SELECTED_IS_HD(c) (DRIVE_IS_HD((c),SLAVE_SELECTED((c))))
 326 #define SELECTED_IS_CD(c) (DRIVE_IS_CD((c),SLAVE_SELECTED((c))))
 327
 328 #define ANY_IS_PRESENT(c) (DRIVE_IS_PRESENT((c),0) || DRIVE_IS_PRESENT((c),1))
 329 #define SELECTED_TYPE_STRING(channel) ((SELECTED_IS_CD(channel)) ? "CD-ROM" : "NONE")
 330
 331 #define WRITE_FEATURES(c,a) do { uint8 _a = a; CONTROLLER((c),0).features = _a; CONTROLLER((c),1).features = _a; } while(0)
 332 #define WRITE_SECTOR_COUNT(c,a) do { uint8 _a = a; CONTROLLER((c),0).sector_count = _a; CONTROLLER((c),1).sector_count = _a; } while(0)
 333 #define WRITE_SECTOR_NUMBER(c,a) do { uint8 _a = a; CONTROLLER((c),0).sector_no = _a; CONTROLLER((c),1).sector_no = _a; } while(0)
 334 #define WRITE_CYLINDER_LOW(c,a) do { uint8 _a = a; CONTROLLER((c),0).cylinder_no = (CONTROLLER((c),0).cylinder_no & 0xff00) | _a; CONTROLLER((c),1).cylinder_no = (CONTROLLER((c),1).cylinder_no & 0xff00) | _a; } while(0)
 335 #define WRITE_CYLINDER_HIGH(c,a) do { uint16 _a = a; CONTROLLER((c),0).cylinder_no = (_a << 8) | (CONTROLLER((c),0).cylinder_no & 0xff); CONTROLLER((c),1).cylinder_no = (_a << 8) | (CONTROLLER((c),1).cylinder_no & 0xff); } while(0)
 336 #define WRITE_HEAD_NO(c,a) do { uint8 _a = a; CONTROLLER((c),0).head_no = _a; CONTROLLER((c),1).head_no = _a; } while(0)
 337 #define WRITE_LBA_MODE(c,a) do { uint8 _a = a; CONTROLLER((c),0).lba_mode = _a; CONTROLLER((c),1).lba_mode = _a; } while(0)
 338
 339
 340
 341 #define GOTO_RETURN_VALUE  if(io_len==4){\
 342                              goto return_value32;\
 343                              }\
 344                            else if(io_len==2){\
 345                              value16=(Bit16u)value32;\
 346                              goto return_value16;\
 347                              }\
 348                            else{\
 349                              value8=(Bit8u)value32;\
 350                              goto return_value8;\
 351                              }
 352
 353 #define UNUSED(x) ((void)x)
 354
 355 #define PACKET_SIZE 12
 356
 357 static struct ramdisk_t *ramdisk_state;
 358
 359
 360
 361
 362
 363
 364 ////////////////////////////////////////////////////////////////////////////
 365
 366 /*
 367  * Static routines
 368  */
 369
 370 static
 371 int ramdisk_read_port(ushort_t port,
 372                          void *dst,
 373                          uint_t length,
 374                          struct vm_device *dev);
 375
 376 static
 377 int ramdisk_write_port(ushort_t port,
 378                           void *src,
 379                           uint_t length,
 380                           struct vm_device *dev);
 381
 382 static
 383 int ramdisk_read_port_ignore(ushort_t port,
 384                                 void *dst,
 385                                 uint_t length,
 386                                 struct vm_device *dev);
 387
 388 static
 389 int ramdisk_write_port_ignore(ushort_t port,
 390                                  void *src,
 391                                  uint_t length,
 392                                  struct vm_device *dev);
 393
 394
 395 static
 396 Bit32u rd_read_handler(struct channel_t *channels, Bit32u address, unsigned io_len);
 397
 398 static
 399 void rd_write_handler(struct channel_t *channels, Bit32u address,
 400                       Bit32u value, unsigned io_len);
 401
 402
 403
 404 /*
 405  * ATAPI routines
 406  */
 407
 408 static
 409 void rd_identify_ATAPI_drive(struct channel_t *channels, Bit8u channel);
 410
 411
 412 static
 413 void rd_init_send_atapi_command(struct channel_t *channels, Bit8u channel, Bit8u command, int req_length, int alloc_length, bool lazy /*= false*/);
 414
 415 static
 416 void rd_ready_to_send_atapi(struct channel_t *channels, Bit8u channel);
 417
 418
 419 static
 420 void rd_atapi_cmd_error(struct channel_t *channels, Bit8u channel, sense_t sense_key, asc_t asc);
 421
 422 static
 423 void rd_init_mode_sense_single(struct channel_t *channels, Bit8u channel, const void* src, int size);
 424
 425 static
 426 void rd_atapi_cmd_nop(struct channel_t *channels, Bit8u channel);
 427
 428 static
 429 void rd_command_aborted(struct channel_t *channels, Bit8u channel, unsigned value);
 430
 431
 432 /*
 433  * Interrupt handling
 434  */
 435
 436 static
 437 void rd_raise_interrupt(struct channel_t *channels, Bit8u channel);
 438
 439 static
 440 void rd_lower_irq(struct vm_device *dev, Bit32u irq);
 441
 442
 443
 444 /*
 445  * Helper routines
 446  */
 447
 448 uint16 rd_read_16bit(const uint8* buf)
 449 {
 450   return (buf[0] << 8) | buf[1];
 451 }
 452
 453
 454
 455 uint32 rd_read_32bit(const uint8* buf)
 456 {
 457   return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
 458 }
 459
 460 ////////////////////////////////////////////////////////////////////
 461
 462
 463 void rd_print_state(struct ramdisk_t *ramdisk,
 464                          struct vm_device *dev)
 465 //Bit32u   rd_init_harddrive(struct channel_t *channels)
 466 {
 467
 468   uchar_t channel;
 469   uchar_t device;
 470   struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
 471
 472   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++)
 473     memset((char *)(channels + channel), 0, sizeof(struct channel_t));
 474
 475   Ramdisk_Print("sizeof(*channels) = %d\n", sizeof((*channels)));
 476   Ramdisk_Print("sizeof(channles->drives[0].controller) = %d\n", sizeof((channels->drives[0].controller)));
 477   Ramdisk_Print("sizeof(channles->drives[0].cdrom) = %d\n", sizeof((channels->drives[0].cdrom)));
 478   Ramdisk_Print("sizeof(channles->drives[0].sense) = %d\n", sizeof((channels->drives[0].sense)));
 479   Ramdisk_Print("sizeof(channles->drives[0].atapi) = %d\n", sizeof((channels->drives[0].atapi)));
 480
 481
 482   Ramdisk_Print("sizeof(channles->drives[0].controller.status) = %d\n", sizeof((channels->drives[0].controller.status)));
 483   Ramdisk_Print("sizeof(channles->drives[0].controller.sector_count) = %d\n", sizeof((channels->drives[0].controller.sector_count)));
 484   Ramdisk_Print("sizeof(channles->drives[0].controller.interrupt_reason) = %d\n", sizeof((channels->drives[0].controller.interrupt_reason)));
 485
 486   Ramdisk_Print("sizeof(channles->drives[0].controller.cylinder_no) = %d\n", sizeof((channels->drives[0].controller.cylinder_no)));
 487   Ramdisk_Print("sizeof(channles->drives[0].controller.byte_count) = %d\n", sizeof((channels->drives[0].controller.byte_count)));
 488
 489
 490   Ramdisk_Print("sizeof(channles->drives[0].controller.control) = %d\n", sizeof((channels->drives[0].controller.control)));
 491
 492
 493   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
 494
 495     for (device = 0; device < 2; device++){
 496
 497       // Initialize controller state, even if device is not present
 498       Ramdisk_Print("channels[%d].drives[%d].controller.status.busy = %d\n",channel, device, channels[channel].drives[device].controller.status.busy);
 499       Ramdisk_Print("channels[%d].drives[%d].controller.status.drive_ready = %d\n", channel, device, channels[channel].drives[device].controller.status.drive_ready);
 500       Ramdisk_Print("channels[%d].drives[%d].controller.status.write_fault = %d\n", channel, device, channels[channel].drives[device].controller.status.write_fault);
 501       Ramdisk_Print("channels[%d].drives[%d].controller.status.seek_complete = %d\n", channel, device, channels[channel].drives[device].controller.status.seek_complete);
 502       Ramdisk_Print("channels[%d].drives[%d].controller.status.drq = %d\n", channel, device, channels[channel].drives[device].controller.status.drq);
 503       Ramdisk_Print("channels[%d].drives[%d].controller.status.corrected_data = %d\n", channel, device, channels[channel].drives[device].controller.status.corrected_data);
 504       Ramdisk_Print("channels[%d].drives[%d].controller.status.index_pulse = %d\n", channel, device, channels[channel].drives[device].controller.status.index_pulse);
 505       Ramdisk_Print("channels[%d].drives[%d].controller.status.index_pulse_count = %d\n", channel, device, channels[channel].drives[device].controller.status.index_pulse_count);
 506       Ramdisk_Print("channels[%d].drives[%d].controller.status.err = %d\n", channel, device, channels[channel].drives[device].controller.status.err);
 507
 508
 509       Ramdisk_Print("channels[%d].drives[%d].controller.error_register = %d\n", channel, device, channels[channel].drives[device].controller.error_register);
 510       Ramdisk_Print("channels[%d].drives[%d].controller.head_no = %d\n", channel, device, channels[channel].drives[device].controller.head_no);
 511       Ramdisk_Print("channels[%d].drives[%d].controller.sector_count = %d\n", channel, device, channels[channel].drives[device].controller.sector_count);
 512       Ramdisk_Print("channels[%d].drives[%d].controller.sector_no = %d\n", channel, device, channels[channel].drives[device].controller.sector_no);
 513       Ramdisk_Print("channels[%d].drives[%d].controller.cylinder_no = %d\n", channel, device, channels[channel].drives[device].controller.cylinder_no);
 514       Ramdisk_Print("channels[%d].drives[%d].controller.current_command = %02x\n", channel, device, channels[channel].drives[device].controller.current_command);
 515       Ramdisk_Print("channels[%d].drives[%d].controller.buffer_index = %d\n", channel, device, channels[channel].drives[device].controller.buffer_index);
 516
 517
 518       Ramdisk_Print("channels[%d].drives[%d].controller.control.reset = %d\n", channel, device, channels[channel].drives[device].controller.control.reset);
 519       Ramdisk_Print("channels[%d].drives[%d].controller.control.disable_irq = %d\n", channel, device, channels[channel].drives[device].controller.control.disable_irq);
 520
 521
 522       Ramdisk_Print("channels[%d].drives[%d].controller.reset_in_progress = %d\n", channel, device, channels[channel].drives[device].controller.reset_in_progress);
 523       Ramdisk_Print("channels[%d].drives[%d].controller.sectors_per_block = %02x\n", channel, device, channels[channel].drives[device].controller.sectors_per_block);
 524       Ramdisk_Print("channels[%d].drives[%d].controller.lba_mode = %d\n", channel, device, channels[channel].drives[device].controller.lba_mode);
 525       Ramdisk_Print("channels[%d].drives[%d].controller.features = %d\n", channel, device, channels[channel].drives[device].controller.features);
 526
 527
 528       Ramdisk_Print("channels[%d].drives[%d].model_no = %s\n", channel, device, channels[channel].drives[device].model_no);
 529       Ramdisk_Print("channels[%d].drives[%d].device_type = %d\n", channel, device, channels[channel].drives[device].device_type);
 530       Ramdisk_Print("channels[%d].drives[%d].cdrom.locked = %d\n", channel, device, channels[channel].drives[device].cdrom.locked);
 531       Ramdisk_Print("channels[%d].drives[%d].sense.sense_key = %d\n", channel, device, channels[channel].drives[device].sense.sense_key);
 532       Ramdisk_Print("channels[%d].drives[%d].sense.asc = %d\n", channel, device, channels[channel].drives[device].sense.asc);
 533       Ramdisk_Print("channels[%d].drives[%d].sense.ascq = %d\n", channel, device, channels[channel].drives[device].sense.ascq);
 534
 535
 536
 537       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.c_d);
 538
 539       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.i_o);
 540
 541       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.rel);
 542
 543       Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.tag);
 544
 545       Ramdisk_Print("channels[%d].drives[%d].cdrom.ready = %d\n", channel, device, channels[channel].drives[device].cdrom.ready);
 546
 547     }//for device
 548   }//for channel
 549
 550   return;
 551 }
 552
 553
 554 Bit32u rd_init_harddrive(struct ramdisk_t *ramdisk,
 555                          struct vm_device *dev)
 556 {
 557
 558
 559   uchar_t channel;
 560   uchar_t device;
 561   struct channel_t *channels = (struct channel_t *)(&(ramdisk->channels));
 562
 563   Ramdisk_Print("[rd_init_harddrive]\n");
 564   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++)
 565     memset((char *)(channels + channel), 0, sizeof(struct channel_t));
 566
 567
 568   for (channel = 0; channel < MAX_ATA_CHANNEL; channel++){
 569
 570     channels[channel].ioaddr1 = 0x0;
 571     channels[channel].ioaddr2 = 0x0;
 572     channels[channel].irq = 0;
 573
 574     for (device = 0; device < 2; device++){
 575
 576
 577       CONTROLLER(channel,device).status.busy           = 0;
 578       CONTROLLER(channel,device).status.drive_ready    = 1;
 579       CONTROLLER(channel,device).status.write_fault    = 0;
 580       CONTROLLER(channel,device).status.seek_complete  = 1;
 581       CONTROLLER(channel,device).status.drq            = 0;
 582       CONTROLLER(channel,device).status.corrected_data = 0;
 583       CONTROLLER(channel,device).status.index_pulse    = 0;
 584       CONTROLLER(channel,device).status.index_pulse_count = 0;
 585       CONTROLLER(channel,device).status.err            = 0;
 586
 587       CONTROLLER(channel,device).error_register = 0x01; // diagnostic code: no error
 588       CONTROLLER(channel,device).head_no        = 0;
 589       CONTROLLER(channel,device).sector_count   = 1;
 590       CONTROLLER(channel,device).sector_no      = 1;
 591       CONTROLLER(channel,device).cylinder_no    = 0;
 592       CONTROLLER(channel,device).current_command = 0x00;
 593       CONTROLLER(channel,device).buffer_index = 0;
 594
 595       CONTROLLER(channel,device).control.reset       = 0;
 596       CONTROLLER(channel,device).control.disable_irq = 0;
 597       CONTROLLER(channel,device).reset_in_progress   = 0;
 598
 599       CONTROLLER(channel,device).sectors_per_block   = 0x80;
 600       CONTROLLER(channel,device).lba_mode            = 0;
 601
 602       CONTROLLER(channel,device).features            = 0;
 603
 604           // If not present
 605       channels[channel].drives[device].device_type           = IDE_NONE;
 606
 607       // Make model string
 608       strncpy((char*)channels[channel].drives[device].model_no,
 609               "", 40);
 610       while(strlen((char *)channels[channel].drives[device].model_no) < 40) {
 611         strcat ((char*)channels[channel].drives[device].model_no, " ");
 612       }
 613
 614 //      Ramdisk_Print("channels[%d].drives[%d].controller.current_command = %02x\n", channel, device, channels[channel].drives[device].controller.current_command);
 615 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.c_d = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.c_d);
 616
 617 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.i_o = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.i_o);
 618
 619 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.rel = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.rel);
 620
 621 //      Ramdisk_Print("channels[%d].drives[%d].controller.interrupt_reason.tag = %02x\n", channel, device, channels[channel].drives[device].controller.interrupt_reason.tag);
 622
 623 //      Ramdisk_Print("channels[%d].drives[%d].controller.control.disable_irq = %d\n", channel, device, channels[channel].drives[device].controller.control.disable_irq);
 624
 625
 626
 627       if (channel == 1) {
 628
 629         channels[channel].ioaddr1 = 0x170;
 630         channels[channel].ioaddr2 = 0x370;
 631         channels[channel].irq =  15;
 632         channels[channel].drive_select = 0;
 633
 634         if (device == 0) {
 635           // Make model string
 636           strncpy((char*)channels[channel].drives[device].model_no,
 637                   "Zheng's Ramdisk", 40);
 638           while (strlen((char *)channels[channel].drives[device].model_no) < 40) {
 639             strcat ((char*)channels[channel].drives[device].model_no, " ");
 640           }
 641
 642           Ramdisk_Print("CDROM on target %d/%d\n", channel, device);
 643
 644           channels[channel].drives[device].device_type = IDE_CDROM;
 645           channels[channel].drives[device].cdrom.locked = 0;
 646           channels[channel].drives[device].sense.sense_key = SENSE_NONE;
 647           channels[channel].drives[device].sense.asc = 0;
 648           channels[channel].drives[device].sense.ascq = 0;
 649
 650
 651           //Check bit fields
 652           channels[channel].drives[device].controller.sector_count = 0;
 653           channels[channel].drives[device].controller.interrupt_reason.c_d = 1;
 654           if (channels[channel].drives[device].controller.sector_count != 0x01) {
 655             Ramdisk_Print("interrupt reason bit field error\n");
 656             return INTR_REASON_BIT_ERR;
 657           }
 658
 659           channels[channel].drives[device].controller.sector_count = 0;
 660           channels[channel].drives[device].controller.interrupt_reason.i_o = 1;
 661           if (channels[channel].drives[device].controller.sector_count != 0x02) {
 662             Ramdisk_Print("interrupt reason bit field error\n");
 663             return INTR_REASON_BIT_ERR;
 664           }
 665
 666           channels[channel].drives[device].controller.sector_count = 0;
 667           channels[channel].drives[device].controller.interrupt_reason.rel = 1;
 668           if (channels[channel].drives[device].controller.sector_count != 0x04) {
 669             Ramdisk_Print("interrupt reason bit field error\n");
 670             return INTR_REASON_BIT_ERR;
 671           }
 672
 673           channels[channel].drives[device].controller.sector_count = 0;
 674           channels[channel].drives[device].controller.interrupt_reason.tag = 3;
 675           if (channels[channel].drives[device].controller.sector_count != 0x18) {
 676             Ramdisk_Print("interrupt reason bit field error\n");
 677             return INTR_REASON_BIT_ERR;
 678           }
 679
 680
 681           channels[channel].drives[device].controller.sector_count = 0;
 682
 683           // allocate low level driver
 684           channels[channel].drives[device].cdrom.cd = (struct cdrom_interface*)V3_Malloc(sizeof(struct cdrom_interface));
 685           Ramdisk_Print("cd = %x\n", channels[channel].drives[device].cdrom.cd);
 686           V3_ASSERT(channels[channel].drives[device].cdrom.cd != NULL);
 687
 688           struct cdrom_interface *cdif = channels[channel].drives[device].cdrom.cd;
 689           memset(cdif, 0, sizeof(struct cdrom_interface));
 690           init_cdrom(cdif);
 691           cdif->ops.init(cdif);
 692
 693           Ramdisk_Print("\t\tCD on ata%d-%d: '%s'\n",channel, device, "");
 694
 695           if((channels[channel].drives[device].cdrom.cd->ops).insert_cdrom(cdif, NULL)) {
 696             Ramdisk_Print("\t\tMedia present in CD-ROM drive\n");
 697             channels[channel].drives[device].cdrom.ready = 1;
 698             channels[channel].drives[device].cdrom.capacity = channels[channel].drives[device].cdrom.cd->ops.capacity(cdif);
 699           } else {
 700             Ramdisk_Print("\t\tCould not locate CD-ROM, continuing with media not present\n");
 701             channels[channel].drives[device].cdrom.ready = 0;
 702           }
 703
 704         }//if device = 0
 705       }//if channel = 0
 706     }//for device
 707   }//for channel
 708
 709   ramdisk->private_data = dev;
 710   ramdisk_state = ramdisk;
 711   Ramdisk_Print("ramdisk_state = %x\n", ramdisk_state);
 712   Ramdisk_Print("ramdisk = %x\n", ramdisk);
 713   //  rd_print_state(ramdisk, dev);
 714   return 0;
 715 }
 716
 717
 718 void   rd_reset_harddrive(struct ramdisk_t *ramdisk, unsigned type)
 719 {
 720   return;
 721 }
 722
 723
 724 void   rd_close_harddrive(struct ramdisk_t *ramdisk)
 725 {
 726   return;
 727 }
 728
 729
 730 ////////////////////////////////////////////////////////////////////
 731
 732
 733 static
 734 Bit32u rd_read_handler(struct channel_t *channels, Bit32u address, unsigned io_len)
 735 {
 736   Bit8u value8;
 737   Bit16u value16;
 738   Bit32u value32;
 739
 740   unsigned drive_select;
 741   unsigned index;
 742   unsigned increment = 0;
 743
 744   Bit8u  channel = MAX_ATA_CHANNEL;
 745   Bit32u port = 0xff; // undefined
 746
 747   //Ramdisk_Print("[rd_read_handler]\n");
 748
 749   for (channel=0; channel<MAX_ATA_CHANNEL; channel++) {
 750     if ((address & 0xfff8) == channels[channel].ioaddr1) {
 751       port = address - channels[channel].ioaddr1;
 752       break;
 753       }
 754     else if ((address & 0xfff8) == channels[channel].ioaddr2) {
 755       port = address - channels[channel].ioaddr2 + 0x10;
 756       break;
 757       }
 758     }
 759
 760   if (channel == MAX_ATA_CHANNEL) {
 761     if ((address < 0x03f6) || (address > 0x03f7)) {
 762       RD_PANIC("Error: read: unable to find ATA channel, ioport=0x%04x\n", address);
 763       return 0;
 764     } else {
 765       channel = 0;
 766       port = address - 0x03e0;
 767     }
 768   }
 769
 770   drive_select = channels[channel].drive_select;
 771   if (port != 0x00){
 772     Ramdisk_Print("[R_handler] IO read addr at %x, on drive %d/%d, curcmd = %02x\n", address, channel, drive_select, SELECTED_CONTROLLER(channel).current_command);
 773   }else{
 774
 775   }
 776
 777
 778   struct cdrom_interface *cdif = channels[channel].drives[drive_select].cdrom.cd;
 779   switch (port) {
 780
 781   case 0x00: // hard disk data (16bit) 0x1f0
 782
 783     switch (SELECTED_CONTROLLER(channel).current_command) {
 784     case 0xec:    // IDENTIFY DEVICE
 785     case 0xa1:
 786
 787       index = 0;
 788       SELECTED_CONTROLLER(channel).status.busy = 0;
 789       SELECTED_CONTROLLER(channel).status.drive_ready = 1;
 790       SELECTED_CONTROLLER(channel).status.write_fault = 0;
 791       SELECTED_CONTROLLER(channel).status.seek_complete = 1;
 792       SELECTED_CONTROLLER(channel).status.corrected_data = 0;
 793       SELECTED_CONTROLLER(channel).status.err = 0;
 794
 795       index = SELECTED_CONTROLLER(channel).buffer_index;
 796       value32 = SELECTED_CONTROLLER(channel).buffer[index];
 797       index++;
 798
 799       if (io_len >= 2) {
 800         value32 |= (SELECTED_CONTROLLER(channel).buffer[index] << 8);
 801         index++;
 802       }
 803       if (io_len == 4) {
 804         value32 |= (SELECTED_CONTROLLER(channel).buffer[index] << 16);
 805         value32 |= (SELECTED_CONTROLLER(channel).buffer[index+1] << 24);
 806         index += 2;
 807       }
 808       SELECTED_CONTROLLER(channel).buffer_index = index;
 809
 810       if (SELECTED_CONTROLLER(channel).buffer_index >= 512) {
 811
 812         SELECTED_CONTROLLER(channel).status.drq = 0;
 813       }
 814       GOTO_RETURN_VALUE;
 815
 816     case 0xa0: //send packet cmd
 817
 818         index = SELECTED_CONTROLLER(channel).buffer_index;
 819         increment = 0;
 820         Ramdisk_Print("\t\tatapi.command(%02x), index(%d), cdrom.remaining_blocks(%d)\n", SELECTED_DRIVE(channel).atapi.command, index, SELECTED_DRIVE(channel).cdrom.remaining_blocks);
 821         // Load block if necessary
 822         if (index >= 2048) {
 823           if (index > 2048)
 824             RD_PANIC("\t\tindex > 2048 : 0x%x\n",index);
 825           switch (SELECTED_DRIVE(channel).atapi.command) {
 826           case 0x28: // read (10)
 827           case 0xa8: // read (12)
 828
 829             if (!SELECTED_DRIVE(channel).cdrom.ready) {
 830               RD_PANIC("\t\tRead with CDROM not ready\n");
 831             }
 832             SELECTED_DRIVE(channel).cdrom.cd->ops.read_block(cdif, SELECTED_CONTROLLER(channel).buffer,
 833                                                             SELECTED_DRIVE(channel).cdrom.next_lba);
 834             SELECTED_DRIVE(channel).cdrom.next_lba++;
 835             SELECTED_DRIVE(channel).cdrom.remaining_blocks--;
 836
 837
 838             if (!SELECTED_DRIVE(channel).cdrom.remaining_blocks)
 839               Ramdisk_Print("\t\tLast READ block loaded {CDROM}\n");
 840             else
 841               Ramdisk_Print("\t\tREAD block loaded (%d remaining) {CDROM}\n",
 842                             SELECTED_DRIVE(channel).cdrom.remaining_blocks);
 843
 844             // one block transfered, start at beginning
 845             index = 0;
 846             break;
 847
 848           default: // no need to load a new block
 849             break;
 850           }
 851         }
 852
 853         value32 = SELECTED_CONTROLLER(channel).buffer[index+increment];
 854         increment++;
 855         if (io_len >= 2) {
 856           value32 |= (SELECTED_CONTROLLER(channel).buffer[index+increment] << 8);
 857           increment++;
 858         }
 859         if (io_len == 4) {
 860           value32 |= (SELECTED_CONTROLLER(channel).buffer[index+increment] << 16);
 861           value32 |= (SELECTED_CONTROLLER(channel).buffer[index+increment+1] << 24);
 862           increment += 2;
 863         }
 864         SELECTED_CONTROLLER(channel).buffer_index = index + increment;
 865         SELECTED_CONTROLLER(channel).drq_index += increment;
 866
 867         if (SELECTED_CONTROLLER(channel).drq_index >= (unsigned)SELECTED_DRIVE(channel).atapi.drq_bytes) {
 868           SELECTED_CONTROLLER(channel).status.drq = 0;
 869           SELECTED_CONTROLLER(channel).drq_index = 0;
 870
 871           SELECTED_DRIVE(channel).atapi.total_bytes_remaining -= SELECTED_DRIVE(channel).atapi.drq_bytes;
 872
 873           if (SELECTED_DRIVE(channel).atapi.total_bytes_remaining > 0) {
 874             // one or more blocks remaining (works only for single block commands)
 875
 876             Ramdisk_Print("\t\tPACKET drq bytes read\n");
 877             SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
 878             SELECTED_CONTROLLER(channel).status.busy = 0;
 879             SELECTED_CONTROLLER(channel).status.drq = 1;
 880             SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 0;
 881
 882             // set new byte count if last block
 883             if (SELECTED_DRIVE(channel).atapi.total_bytes_remaining < SELECTED_CONTROLLER(channel).byte_count) {
 884               SELECTED_CONTROLLER(channel).byte_count = SELECTED_DRIVE(channel).atapi.total_bytes_remaining;
 885             }
 886             SELECTED_DRIVE(channel).atapi.drq_bytes = SELECTED_CONTROLLER(channel).byte_count;
 887
 888             rd_raise_interrupt(channels, channel);
 889           } else {
 890             // all bytes read
 891             Ramdisk_Print("\t\tPACKET all bytes read\n");
 892             SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
 893             SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 1;
 894             SELECTED_CONTROLLER(channel).status.drive_ready = 1;
 895             SELECTED_CONTROLLER(channel).interrupt_reason.rel = 0;
 896             SELECTED_CONTROLLER(channel).status.busy = 0;
 897             SELECTED_CONTROLLER(channel).status.drq = 0;
 898             SELECTED_CONTROLLER(channel).status.err = 0;
 899
 900             rd_raise_interrupt(channels, channel);
 901           }
 902         }
 903         GOTO_RETURN_VALUE;
 904         break;
 905
 906     default:
 907       Ramdisk_Print("\t\tread need support more command: %02x\n", SELECTED_CONTROLLER(channel).current_command);
 908       break;
 909     }
 910     ///////////////////////////////////////////
 911
 912   case 0x01: // hard disk error register 0x1f1
 913
 914     SELECTED_CONTROLLER(channel).status.err = 0;
 915     value8 = (!SELECTED_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).error_register;
 916     goto return_value8;
 917     break;
 918   case 0x02: // hard disk sector count / interrupt reason 0x1f2
 919     value8 = (!SELECTED_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).sector_count;
 920     goto return_value8;
 921     break;
 922   case 0x03: // sector number 0x1f3
 923     value8 = (!SELECTED_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).sector_no;
 924     goto return_value8;
 925   case 0x04: // cylinder low 0x1f4
 926     // -- WARNING : On real hardware the controller registers are shared between drives.
 927     // So we must respond even if the select device is not present. Some OS uses this fact
 928     // to detect the disks.... minix2 for example
 929     value8 = (!ANY_IS_PRESENT(channel)) ? 0 : (SELECTED_CONTROLLER(channel).cylinder_no & 0x00ff);
 930     goto return_value8;
 931   case 0x05: // cylinder high 0x1f5
 932     // -- WARNING : On real hardware the controller registers are shared between drives.
 933     // So we must respond even if the select device is not present. Some OS uses this fact
 934     // to detect the disks.... minix2 for example
 935     value8 = (!ANY_IS_PRESENT(channel)) ? 0 : SELECTED_CONTROLLER(channel).cylinder_no >> 8;
 936     goto return_value8;
 937
 938   case 0x06: // hard disk drive and head register 0x1f6
 939     // b7 Extended data field for ECC
 940     // b6/b5: Used to be sector size.  00=256,01=512,10=1024,11=128
 941     //   Since 512 was always used, bit 6 was taken to mean LBA mode:
 942     //     b6 1=LBA mode, 0=CHS mode
 943     //     b5 1
 944     // b4: DRV
 945     // b3..0 HD3..HD0
 946     value8 = (1 << 7) |
 947       ((SELECTED_CONTROLLER(channel).lba_mode>0) << 6) |
 948       (1 << 5) | // 01b = 512 sector size
 949       (channels[channel].drive_select << 4) |
 950       (SELECTED_CONTROLLER(channel).head_no << 0);
 951     goto return_value8;
 952     break;
 953     //CONTROLLER(channel,0).lba_mode
 954
 955   case 0x07: // Hard Disk Status 0x1f7
 956   case 0x16: // Hard Disk Alternate Status 0x3f6
 957     if (!ANY_IS_PRESENT(channel)) {
 958       // (mch) Just return zero for these registers
 959       value8 = 0;
 960     } else {
 961       value8 = (
 962                 (SELECTED_CONTROLLER(channel).status.busy << 7) |
 963                 (SELECTED_CONTROLLER(channel).status.drive_ready << 6) |
 964                 (SELECTED_CONTROLLER(channel).status.write_fault << 5) |
 965                 (SELECTED_CONTROLLER(channel).status.seek_complete << 4) |
 966                 (SELECTED_CONTROLLER(channel).status.drq << 3) |
 967                 (SELECTED_CONTROLLER(channel).status.corrected_data << 2) |
 968                 (SELECTED_CONTROLLER(channel).status.index_pulse << 1) |
 969                 (SELECTED_CONTROLLER(channel).status.err) );
 970       SELECTED_CONTROLLER(channel).status.index_pulse_count++;
 971       SELECTED_CONTROLLER(channel).status.index_pulse = 0;
 972       if (SELECTED_CONTROLLER(channel).status.index_pulse_count >= INDEX_PULSE_CYCLE) {
 973         SELECTED_CONTROLLER(channel).status.index_pulse = 1;
 974         SELECTED_CONTROLLER(channel).status.index_pulse_count = 0;
 975       }
 976     }
 977     if (port == 0x07) {
 978       rd_lower_irq((struct vm_device *)(ramdisk_state->private_data), channels[channel].irq);
 979     }
 980     goto return_value8;
 981     break;
 982
 983   case 0x17: // Hard Disk Address Register 0x3f7
 984     // Obsolete and unsupported register.  Not driven by hard
 985     // disk controller.  Report all 1's.  If floppy controller
 986     // is handling this address, it will call this function
 987     // set/clear D7 (the only bit it handles), then return
 988     // the combined value
 989     value8 = 0xff;
 990     goto return_value8;
 991     break;
 992
 993   default:
 994     RD_PANIC("hard drive: io read to address %x unsupported\n",
 995               (unsigned) address);
 996
 997
 998     ////////////////////////////////////////////
 999   }
1000
1001   Ramdisk_Print("\t\tError: hard drive: shouldnt get here!\n");
1002   return 0;
1003
1004 return_value32:
1005   Ramdisk_Print("\t\t32-bit read from %04x = %08x {%s}\n",
1006             (unsigned) address, value32, SELECTED_TYPE_STRING(channel));
1007   return value32;
1008
1009  return_value16:
1010   Ramdisk_Print("\t\t16-bit read from %04x = %04x {%s}\n",
1011             (unsigned) address, value16, SELECTED_TYPE_STRING(channel));
1012   return value16;
1013
1014  return_value8:
1015   Ramdisk_Print("\t\t8-bit read from %x = %02x {%s}\n",
1016             (unsigned) address, value8, SELECTED_TYPE_STRING(channel));
1017   return value8;
1018 }
1019
1020
1021 static
1022 void rd_write_handler(struct channel_t *channels, Bit32u address,
1023                       Bit32u value, unsigned io_len)
1024 {
1025
1026   //  off_t logical_sector;
1027   //  off_t ret;
1028   rd_bool prev_control_reset;
1029
1030   Bit32u id;
1031   int toc_length;
1032
1033   Bit8u  channel = MAX_ATA_CHANNEL;
1034   Bit32u port = 0xff; // undefined
1035
1036   //Ramdisk_Print("[rd_write_handler]\n");
1037   //  Bit8u atapi_command;
1038   //int alloc_length;
1039
1040   for (channel=0; channel<MAX_ATA_CHANNEL; channel++) {
1041     if ((address & 0xfff8) == channels[channel].ioaddr1) {
1042       port = address - channels[channel].ioaddr1;
1043       break;
1044     }
1045     else if ((address & 0xfff8) == channels[channel].ioaddr2) {
1046       port = address - channels[channel].ioaddr2 + 0x10;
1047       break;
1048       }
1049     }
1050
1051   if (channel == MAX_ATA_CHANNEL) {
1052     if (address != 0x03f6) {
1053       RD_PANIC("Panic: write: unable to find ATA channel, ioport=0x%04x\n", address);
1054     } else {
1055       channel = 0;
1056       port = address - 0x03e0;
1057     }
1058   }
1059
1060   Ramdisk_Print("[W_handler] IO write to %x = %02x, channel = %d\n", (unsigned) address, (unsigned) value, channel);
1061
1062   struct cdrom_interface *cdif = SELECTED_DRIVE(channel).cdrom.cd;
1063
1064   switch (port) {
1065
1066   case 0x00: // 0x1f0
1067     Ramdisk_Print("\t\twrite port 170\n");
1068
1069     //////////////////////////////////////////////////////////
1070     switch (SELECTED_CONTROLLER(channel).current_command) {
1071     case 0x30: // WRITE SECTORS
1072       RD_PANIC("\t\tneed to implement 0x30(write sector) to port 0x170\n");
1073       break;
1074
1075     case 0xa0: // PACKET
1076       if (SELECTED_CONTROLLER(channel).buffer_index >= PACKET_SIZE)
1077         RD_PANIC("IO write(0x%04x): buffer_index >= PACKET_SIZE", address);
1078       SELECTED_CONTROLLER(channel).buffer[SELECTED_CONTROLLER(channel).buffer_index] = value;
1079       SELECTED_CONTROLLER(channel).buffer[SELECTED_CONTROLLER(channel).buffer_index+1] = (value >> 8);
1080       SELECTED_CONTROLLER(channel).buffer_index += 2;
1081
1082       /* if packet completely writtten */
1083       if (SELECTED_CONTROLLER(channel).buffer_index >= PACKET_SIZE) {
1084         // complete command received
1085         Bit8u atapi_command = SELECTED_CONTROLLER(channel).buffer[0];
1086
1087         Ramdisk_Print("\t\tcdrom: ATAPI command 0x%x started\n", atapi_command);
1088
1089         switch (atapi_command) {
1090         case 0x00: // test unit ready
1091           if (SELECTED_DRIVE(channel).cdrom.ready) {
1092             rd_atapi_cmd_nop(channels, channel);
1093           } else {
1094             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1095           }
1096           rd_raise_interrupt(channels, channel);
1097           break;
1098
1099         case 0x03: { // request sense
1100           int alloc_length = SELECTED_CONTROLLER(channel).buffer[4];
1101           rd_init_send_atapi_command(channels, channel, atapi_command, 18, alloc_length, false);
1102
1103           // sense data
1104           SELECTED_CONTROLLER(channel).buffer[0] = 0x70 | (1 << 7);
1105           SELECTED_CONTROLLER(channel).buffer[1] = 0;
1106           SELECTED_CONTROLLER(channel).buffer[2] = SELECTED_DRIVE(channel).sense.sense_key;
1107           SELECTED_CONTROLLER(channel).buffer[3] = SELECTED_DRIVE(channel).sense.information.arr[0];
1108           SELECTED_CONTROLLER(channel).buffer[4] = SELECTED_DRIVE(channel).sense.information.arr[1];
1109           SELECTED_CONTROLLER(channel).buffer[5] = SELECTED_DRIVE(channel).sense.information.arr[2];
1110           SELECTED_CONTROLLER(channel).buffer[6] = SELECTED_DRIVE(channel).sense.information.arr[3];
1111           SELECTED_CONTROLLER(channel).buffer[7] = 17-7;
1112           SELECTED_CONTROLLER(channel).buffer[8] = SELECTED_DRIVE(channel).sense.specific_inf.arr[0];
1113           SELECTED_CONTROLLER(channel).buffer[9] = SELECTED_DRIVE(channel).sense.specific_inf.arr[1];
1114           SELECTED_CONTROLLER(channel).buffer[10] = SELECTED_DRIVE(channel).sense.specific_inf.arr[2];
1115           SELECTED_CONTROLLER(channel).buffer[11] = SELECTED_DRIVE(channel).sense.specific_inf.arr[3];
1116           SELECTED_CONTROLLER(channel).buffer[12] = SELECTED_DRIVE(channel).sense.asc;
1117           SELECTED_CONTROLLER(channel).buffer[13] = SELECTED_DRIVE(channel).sense.ascq;
1118           SELECTED_CONTROLLER(channel).buffer[14] = SELECTED_DRIVE(channel).sense.fruc;
1119           SELECTED_CONTROLLER(channel).buffer[15] = SELECTED_DRIVE(channel).sense.key_spec.arr[0];
1120           SELECTED_CONTROLLER(channel).buffer[16] = SELECTED_DRIVE(channel).sense.key_spec.arr[1];
1121           SELECTED_CONTROLLER(channel).buffer[17] = SELECTED_DRIVE(channel).sense.key_spec.arr[2];
1122
1123           rd_ready_to_send_atapi(channels, channel);
1124         }
1125           break;
1126
1127         case 0x1b: { // start stop unit
1128           //bx_bool Immed = (SELECTED_CONTROLLER(channel).buffer[1] >> 0) & 1;
1129           rd_bool LoEj = (SELECTED_CONTROLLER(channel).buffer[4] >> 1) & 1;
1130           rd_bool Start = (SELECTED_CONTROLLER(channel).buffer[4] >> 0) & 1;
1131
1132           if (!LoEj && !Start) { // stop the disc
1133             RD_ERROR("FIXME: Stop disc not implemented\n");
1134             rd_atapi_cmd_nop(channels, channel);
1135             rd_raise_interrupt(channels, channel);
1136           } else if (!LoEj && Start) { // start (spin up) the disc
1137
1138             SELECTED_DRIVE(channel).cdrom.cd->ops.start_cdrom(cdif);
1139
1140             RD_ERROR("FIXME: ATAPI start disc not reading TOC\n");
1141             rd_atapi_cmd_nop(channels, channel);
1142             rd_raise_interrupt(channels, channel);
1143           } else if (LoEj && !Start) { // Eject the disc
1144             rd_atapi_cmd_nop(channels, channel);
1145
1146             if (SELECTED_DRIVE(channel).cdrom.ready) {
1147
1148               SELECTED_DRIVE(channel).cdrom.cd->ops.eject_cdrom(cdif);
1149
1150               SELECTED_DRIVE(channel).cdrom.ready = 0;
1151               //bx_options.atadevice[channel][SLAVE_SELECTED(channel)].Ostatus->set(EJECTED);
1152               //bx_gui->update_drive_status_buttons();
1153             }
1154             rd_raise_interrupt(channels, channel);
1155           } else { // Load the disc
1156             // My guess is that this command only closes the tray, that's a no-op for us
1157             rd_atapi_cmd_nop(channels, channel);
1158             rd_raise_interrupt(channels, channel);
1159           }
1160         }
1161           break;
1162
1163         case 0xbd: { // mechanism status
1164           uint16 alloc_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 8);
1165
1166           if (alloc_length == 0)
1167             RD_PANIC("Zero allocation length to MECHANISM STATUS not impl.\n");
1168
1169           rd_init_send_atapi_command(channels, channel, atapi_command, 8, alloc_length, false);
1170
1171           SELECTED_CONTROLLER(channel).buffer[0] = 0; // reserved for non changers
1172           SELECTED_CONTROLLER(channel).buffer[1] = 0; // reserved for non changers
1173
1174           SELECTED_CONTROLLER(channel).buffer[2] = 0; // Current LBA (TODO!)
1175           SELECTED_CONTROLLER(channel).buffer[3] = 0; // Current LBA (TODO!)
1176           SELECTED_CONTROLLER(channel).buffer[4] = 0; // Current LBA (TODO!)
1177
1178           SELECTED_CONTROLLER(channel).buffer[5] = 1; // one slot
1179
1180           SELECTED_CONTROLLER(channel).buffer[6] = 0; // slot table length
1181           SELECTED_CONTROLLER(channel).buffer[7] = 0; // slot table length
1182
1183           rd_ready_to_send_atapi(channels, channel);
1184         }
1185           break;
1186
1187         case 0x5a: { // mode sense
1188           uint16 alloc_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 7);
1189
1190           Bit8u PC = SELECTED_CONTROLLER(channel).buffer[2] >> 6;
1191           Bit8u PageCode = SELECTED_CONTROLLER(channel).buffer[2] & 0x3f;
1192
1193           switch (PC) {
1194           case 0x0: // current values
1195             switch (PageCode) {
1196             case 0x01: // error recovery
1197               rd_init_send_atapi_command(channels, channel, atapi_command, sizeof(struct error_recovery_t) + 8, alloc_length, false);
1198
1199               rd_init_mode_sense_single(channels, channel, &SELECTED_DRIVE(channel).cdrom.current.error_recovery,
1200                                      sizeof(struct error_recovery_t));
1201               rd_ready_to_send_atapi(channels, channel);
1202               break;
1203
1204             case 0x2a: // CD-ROM capabilities & mech. status
1205               rd_init_send_atapi_command(channels, channel, atapi_command, 28, alloc_length, false);
1206               rd_init_mode_sense_single(channels, channel, &SELECTED_CONTROLLER(channel).buffer[8], 28);
1207               SELECTED_CONTROLLER(channel).buffer[8] = 0x2a;
1208               SELECTED_CONTROLLER(channel).buffer[9] = 0x12;
1209               SELECTED_CONTROLLER(channel).buffer[10] = 0x00;
1210               SELECTED_CONTROLLER(channel).buffer[11] = 0x00;
1211               // Multisession, Mode 2 Form 2, Mode 2 Form 1
1212               SELECTED_CONTROLLER(channel).buffer[12] = 0x70;
1213               SELECTED_CONTROLLER(channel).buffer[13] = (3 << 5);
1214               SELECTED_CONTROLLER(channel).buffer[14] = (unsigned char)
1215                 (1 |
1216                  (SELECTED_DRIVE(channel).cdrom.locked ? (1 << 1) : 0) |
1217                  (1 << 3) |
1218                  (1 << 5));
1219               SELECTED_CONTROLLER(channel).buffer[15] = 0x00;
1220               SELECTED_CONTROLLER(channel).buffer[16] = (706 >> 8) & 0xff;
1221               SELECTED_CONTROLLER(channel).buffer[17] = 706 & 0xff;
1222               SELECTED_CONTROLLER(channel).buffer[18] = 0;
1223               SELECTED_CONTROLLER(channel).buffer[19] = 2;
1224               SELECTED_CONTROLLER(channel).buffer[20] = (512 >> 8) & 0xff;
1225               SELECTED_CONTROLLER(channel).buffer[21] = 512 & 0xff;
1226               SELECTED_CONTROLLER(channel).buffer[22] = (706 >> 8) & 0xff;
1227               SELECTED_CONTROLLER(channel).buffer[23] = 706 & 0xff;
1228               SELECTED_CONTROLLER(channel).buffer[24] = 0;
1229               SELECTED_CONTROLLER(channel).buffer[25] = 0;
1230               SELECTED_CONTROLLER(channel).buffer[26] = 0;
1231               SELECTED_CONTROLLER(channel).buffer[27] = 0;
1232               rd_ready_to_send_atapi(channels, channel);
1233               break;
1234
1235             case 0x0d: // CD-ROM
1236             case 0x0e: // CD-ROM audio control
1237             case 0x3f: // all
1238               RD_ERROR("cdrom: MODE SENSE (curr), code=%x not implemented yet\n",
1239                         PageCode);
1240             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1241                             ASC_INV_FIELD_IN_CMD_PACKET);
1242             rd_raise_interrupt(channels, channel);
1243             break;
1244
1245           default:
1246             // not implemeted by this device
1247             Ramdisk_Print("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1248                      PC, PageCode);
1249             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1250                             ASC_INV_FIELD_IN_CMD_PACKET);
1251             rd_raise_interrupt(channels, channel);
1252             break;
1253           }
1254           break;
1255
1256           case 0x1: // changeable values
1257             switch (PageCode) {
1258             case 0x01: // error recovery
1259             case 0x0d: // CD-ROM
1260             case 0x0e: // CD-ROM audio control
1261             case 0x2a: // CD-ROM capabilities & mech. status
1262             case 0x3f: // all
1263               RD_ERROR("cdrom: MODE SENSE (chg), code=%x not implemented yet\n",
1264                        PageCode);
1265             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1266                               ASC_INV_FIELD_IN_CMD_PACKET);
1267             rd_raise_interrupt(channels, channel);
1268             break;
1269
1270           default:
1271               // not implemeted by this device
1272             Ramdisk_Print("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1273                           PC, PageCode);
1274           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1275                              ASC_INV_FIELD_IN_CMD_PACKET);
1276           rd_raise_interrupt(channels, channel);
1277           break;
1278         }
1279           break;
1280
1281         case 0x2: // default values
1282           switch (PageCode) {
1283           case 0x01: // error recovery
1284           case 0x0d: // CD-ROM
1285           case 0x0e: // CD-ROM audio control
1286           case 0x2a: // CD-ROM capabilities & mech. status
1287           case 0x3f: // all
1288             RD_PANIC("cdrom: MODE SENSE (dflt), code=%x\n",
1289                      PageCode);
1290             break;
1291
1292             default:
1293               // not implemeted by this device
1294               Ramdisk_Print("\t\tcdrom: MODE SENSE PC=%x, PageCode=%x, not implemented by device\n",
1295                       PC, PageCode);
1296               rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1297                                  ASC_INV_FIELD_IN_CMD_PACKET);
1298               rd_raise_interrupt(channels, channel);
1299               break;
1300           }
1301           break;
1302
1303         case 0x3: // saved values not implemented
1304           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
1305           rd_raise_interrupt(channels, channel);
1306           break;
1307
1308         default:
1309           RD_PANIC("Should not get here!\n");
1310           break;
1311         }
1312       }
1313       break;
1314
1315     case 0x12: { // inquiry
1316       uint8 alloc_length = SELECTED_CONTROLLER(channel).buffer[4];
1317
1318       rd_init_send_atapi_command(channels, channel, atapi_command, 36, alloc_length, false);
1319
1320       SELECTED_CONTROLLER(channel).buffer[0] = 0x05; // CD-ROM
1321       SELECTED_CONTROLLER(channel).buffer[1] = 0x80; // Removable
1322       SELECTED_CONTROLLER(channel).buffer[2] = 0x00; // ISO, ECMA, ANSI version
1323       SELECTED_CONTROLLER(channel).buffer[3] = 0x21; // ATAPI-2, as specified
1324       SELECTED_CONTROLLER(channel).buffer[4] = 31; // additional length (total 36)
1325       SELECTED_CONTROLLER(channel).buffer[5] = 0x00; // reserved
1326       SELECTED_CONTROLLER(channel).buffer[6] = 0x00; // reserved
1327       SELECTED_CONTROLLER(channel).buffer[7] = 0x00; // reserved
1328
1329       // Vendor ID
1330       const char* vendor_id = "VTAB    ";
1331       int i;
1332       for (i = 0; i < 8; i++)
1333         SELECTED_CONTROLLER(channel).buffer[8+i] = vendor_id[i];
1334
1335       // Product ID
1336       const char* product_id = "Turbo CD-ROM    ";
1337       for (i = 0; i < 16; i++)
1338         SELECTED_CONTROLLER(channel).buffer[16+i] = product_id[i];
1339
1340       // Product Revision level
1341       const char* rev_level = "1.0 ";
1342       for (i = 0; i < 4; i++)
1343         SELECTED_CONTROLLER(channel).buffer[32+i] = rev_level[i];
1344
1345       rd_ready_to_send_atapi(channels, channel);
1346     }
1347       break;
1348
1349         case 0x25: { // read cd-rom capacity
1350           // no allocation length???
1351           rd_init_send_atapi_command(channels, channel, atapi_command, 8, 8, false);
1352
1353           if (SELECTED_DRIVE(channel).cdrom.ready) {
1354             uint32 capacity = SELECTED_DRIVE(channel).cdrom.capacity;
1355             Ramdisk_Print("\t\tCapacity is %d sectors (%d bytes)\n", capacity, capacity * 2048);
1356             SELECTED_CONTROLLER(channel).buffer[0] = (capacity >> 24) & 0xff;
1357             SELECTED_CONTROLLER(channel).buffer[1] = (capacity >> 16) & 0xff;
1358             SELECTED_CONTROLLER(channel).buffer[2] = (capacity >> 8) & 0xff;
1359             SELECTED_CONTROLLER(channel).buffer[3] = (capacity >> 0) & 0xff;
1360             SELECTED_CONTROLLER(channel).buffer[4] = (2048 >> 24) & 0xff;
1361             SELECTED_CONTROLLER(channel).buffer[5] = (2048 >> 16) & 0xff;
1362             SELECTED_CONTROLLER(channel).buffer[6] = (2048 >> 8) & 0xff;
1363             SELECTED_CONTROLLER(channel).buffer[7] = (2048 >> 0) & 0xff;
1364             rd_ready_to_send_atapi(channels, channel);
1365           } else {
1366             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1367             rd_raise_interrupt(channels, channel);
1368           }
1369         }
1370           break;
1371
1372         case 0xbe: { // read cd
1373           if (SELECTED_DRIVE(channel).cdrom.ready) {
1374             RD_ERROR("Read CD with CD present not implemented\n");
1375             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1376             rd_raise_interrupt(channels, channel);
1377           } else {
1378             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1379             rd_raise_interrupt(channels, channel);
1380           }
1381         }
1382           break;
1383
1384         case 0x43: { // read toc
1385           if (SELECTED_DRIVE(channel).cdrom.ready) {
1386
1387             bool msf = (SELECTED_CONTROLLER(channel).buffer[1] >> 1) & 1;
1388             uint8 starting_track = SELECTED_CONTROLLER(channel).buffer[6];
1389
1390             uint16 alloc_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 7);
1391
1392             uint8 format = (SELECTED_CONTROLLER(channel).buffer[9] >> 6);
1393             int i;
1394             switch (format) {
1395             case 0:
1396
1397               if (!(SELECTED_DRIVE(channel).cdrom.cd->ops.read_toc(cdif, SELECTED_CONTROLLER(channel).buffer,
1398                                                                &toc_length, msf, starting_track))) {
1399                 rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1400                                    ASC_INV_FIELD_IN_CMD_PACKET);
1401                 rd_raise_interrupt(channels, channel);
1402               } else {
1403                 rd_init_send_atapi_command(channels, channel, atapi_command, toc_length, alloc_length, false);
1404                 rd_ready_to_send_atapi(channels, channel);
1405               }
1406               break;
1407
1408             case 1:
1409               // multi session stuff. we ignore this and emulate a single session only
1410               rd_init_send_atapi_command(channels, channel, atapi_command, 12, alloc_length, false);
1411
1412               SELECTED_CONTROLLER(channel).buffer[0] = 0;
1413               SELECTED_CONTROLLER(channel).buffer[1] = 0x0a;
1414               SELECTED_CONTROLLER(channel).buffer[2] = 1;
1415               SELECTED_CONTROLLER(channel).buffer[3] = 1;
1416               for (i = 0; i < 8; i++)
1417                 SELECTED_CONTROLLER(channel).buffer[4+i] = 0;
1418
1419               rd_ready_to_send_atapi(channels, channel);
1420               break;
1421
1422             case 2:
1423             default:
1424               RD_PANIC("(READ TOC) Format %d not supported\n", format);
1425               break;
1426             }
1427           } else {
1428             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1429             rd_raise_interrupt(channels, channel);
1430           }
1431         }
1432           break;
1433
1434         case 0x28: // read (10)
1435         case 0xa8: // read (12)
1436           {
1437
1438             uint32 transfer_length;
1439             if (atapi_command == 0x28)
1440               transfer_length = rd_read_16bit(SELECTED_CONTROLLER(channel).buffer + 7);
1441             else
1442               transfer_length = rd_read_32bit(SELECTED_CONTROLLER(channel).buffer + 6);
1443
1444             uint32 lba = rd_read_32bit(SELECTED_CONTROLLER(channel).buffer + 2);
1445
1446             if (!SELECTED_DRIVE(channel).cdrom.ready) {
1447               rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1448               rd_raise_interrupt(channels, channel);
1449               break;
1450             }
1451
1452             if (transfer_length == 0) {
1453               rd_atapi_cmd_nop(channels, channel);
1454               rd_raise_interrupt(channels, channel);
1455               Ramdisk_Print("\t\tREAD(%d) with transfer length 0, ok\n", atapi_command==0x28?10:12);
1456               break;
1457             }
1458
1459             if (lba + transfer_length > SELECTED_DRIVE(channel).cdrom.capacity) {
1460               rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
1461               rd_raise_interrupt(channels, channel);
1462               break;
1463             }
1464
1465             Ramdisk_Print("\t\tcdrom: READ (%d) LBA=%d LEN=%d\n", atapi_command==0x28?10:12, lba, transfer_length);
1466
1467             // handle command
1468             rd_init_send_atapi_command(channels, channel, atapi_command, transfer_length * 2048,
1469                                        transfer_length * 2048, true);
1470             SELECTED_DRIVE(channel).cdrom.remaining_blocks = transfer_length;
1471             SELECTED_DRIVE(channel).cdrom.next_lba = lba;
1472             rd_ready_to_send_atapi(channels, channel);
1473           }
1474           break;
1475
1476         case 0x2b: { // seek
1477           uint32 lba = rd_read_32bit(SELECTED_CONTROLLER(channel).buffer + 2);
1478           if (!SELECTED_DRIVE(channel).cdrom.ready) {
1479             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1480             rd_raise_interrupt(channels, channel);
1481             break;
1482           }
1483
1484           if (lba > SELECTED_DRIVE(channel).cdrom.capacity) {
1485             rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_LOGICAL_BLOCK_OOR);
1486             rd_raise_interrupt(channels, channel);
1487             break;
1488           }
1489           Ramdisk_Print("\t\tcdrom: SEEK (ignored)\n");
1490           rd_atapi_cmd_nop(channels, channel);
1491           rd_raise_interrupt(channels, channel);
1492         }
1493           break;
1494
1495         case 0x1e: { // prevent/allow medium removal
1496           if (SELECTED_DRIVE(channel).cdrom.ready) {
1497             SELECTED_DRIVE(channel).cdrom.locked = SELECTED_CONTROLLER(channel).buffer[4] & 1;
1498             rd_atapi_cmd_nop(channels, channel);
1499           } else {
1500             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1501           }
1502           rd_raise_interrupt(channels, channel);
1503         }
1504           break;
1505
1506         case 0x42: { // read sub-channel
1507           bool msf = get_packet_field(channel,1, 1, 1);
1508           bool sub_q = get_packet_field(channel,2, 6, 1);
1509           uint8 data_format = get_packet_byte(channel,3);
1510           uint8 track_number = get_packet_byte(channel,6);
1511           uint16 alloc_length = get_packet_word(channel,7);
1512           UNUSED(msf);
1513           UNUSED(data_format);
1514           UNUSED(track_number);
1515
1516           if (!SELECTED_DRIVE(channel).cdrom.ready) {
1517             rd_atapi_cmd_error(channels, channel, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
1518             rd_raise_interrupt(channels, channel);
1519           } else {
1520             SELECTED_CONTROLLER(channel).buffer[0] = 0;
1521             SELECTED_CONTROLLER(channel).buffer[1] = 0; // audio not supported
1522             SELECTED_CONTROLLER(channel).buffer[2] = 0;
1523             SELECTED_CONTROLLER(channel).buffer[3] = 0;
1524
1525             int ret_len = 4; // header size
1526
1527             if (sub_q) { // !sub_q == header only
1528               RD_ERROR("Read sub-channel with SubQ not implemented\n");
1529               rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST,
1530                                  ASC_INV_FIELD_IN_CMD_PACKET);
1531               rd_raise_interrupt(channels, channel);
1532             }
1533
1534             rd_init_send_atapi_command(channels, channel, atapi_command, ret_len, alloc_length, false);
1535             rd_ready_to_send_atapi(channels, channel);
1536           }
1537         }
1538           break;
1539
1540         case 0x51: { // read disc info
1541           // no-op to keep the Linux CD-ROM driver happy
1542           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1543           rd_raise_interrupt(channels, channel);
1544         }
1545           break;
1546
1547         case 0x55: // mode select
1548         case 0xa6: // load/unload cd
1549         case 0x4b: // pause/resume
1550         case 0x45: // play audio
1551         case 0x47: // play audio msf
1552         case 0xbc: // play cd
1553         case 0xb9: // read cd msf
1554         case 0x44: // read header
1555         case 0xba: // scan
1556         case 0xbb: // set cd speed
1557         case 0x4e: // stop play/scan
1558         case 0x46: // ???
1559         case 0x4a: // ???
1560           RD_ERROR("ATAPI command 0x%x not implemented yet\n",
1561                    atapi_command);
1562           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1563           rd_raise_interrupt(channels, channel);
1564           break;
1565         default:
1566           RD_PANIC("Unknown ATAPI command 0x%x (%d)\n",
1567                    atapi_command, atapi_command);
1568           // We'd better signal the error if the user chose to continue
1569           rd_atapi_cmd_error(channels, channel, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
1570           rd_raise_interrupt(channels, channel);
1571           break;
1572         }
1573       }
1574
1575       break;
1576
1577
1578     default:
1579       RD_PANIC("\t\tIO write(0x%x): current command is %02xh\n", address,
1580                (unsigned) SELECTED_CONTROLLER(channel).current_command);
1581     }
1582
1583 /////////////////////////////////////////////////////////
1584     break;
1585   case 0x01: // hard disk write precompensation 0x1f1
1586     WRITE_FEATURES(channel,value);
1587     break;
1588
1589   case 0x02: // hard disk sector count 0x1f2
1590     WRITE_SECTOR_COUNT(channel,value);
1591     break;
1592
1593   case 0x03: // hard disk sector number 0x1f3
1594     WRITE_SECTOR_NUMBER(channel,value);
1595     break;
1596
1597   case 0x04: // hard disk cylinder low 0x1f4
1598     WRITE_CYLINDER_LOW(channel,value);
1599     break;
1600
1601   case 0x05: // hard disk cylinder high 0x1f5
1602     WRITE_CYLINDER_HIGH(channel,value);
1603     break;
1604
1605   case 0x06: // hard disk drive and head register 0x1f6
1606     // b7 Extended data field for ECC
1607     // b6/b5: Used to be sector size.  00=256,01=512,10=1024,11=128
1608     //   Since 512 was always used, bit 6 was taken to mean LBA mode:
1609     //     b6 1=LBA mode, 0=CHS mode
1610     //     b5 1
1611     // b4: DRV
1612     // b3..0 HD3..HD0
1613
1614     if ( (value & 0xa0) != 0xa0 ) // 1x1xxxxx
1615       Ramdisk_Print("\t\tIO write 0x%x (%02x): not 1x1xxxxxb\n", address, (unsigned) value);
1616
1617     Bit32u drvsel = channels[channel].drive_select = (value >> 4) & 0x01;
1618     WRITE_HEAD_NO(channel,value & 0xf);
1619     if (SELECTED_CONTROLLER(channel).lba_mode == 0 && ((value >> 6) & 1) == 1){
1620       Ramdisk_Print("\t\tenabling LBA mode\n");
1621         }
1622     WRITE_LBA_MODE(channel,(value >> 6) & 1);
1623     SELECTED_DRIVE(channel).cdrom.cd->lba = (value >> 6) & 1;
1624
1625
1626     if (!SELECTED_IS_PRESENT(channel)) {
1627       Ramdisk_Print ("\t\tError: device set to %d which does not exist! channel = %d\n",drvsel, channel);
1628       SELECTED_CONTROLLER(channel).error_register = 0x04; // aborted
1629       SELECTED_CONTROLLER(channel).status.err = 1;
1630     }
1631
1632     break;
1633
1634
1635   case 0x07: // hard disk command 0x1f7
1636
1637       switch (value) {
1638         // ATAPI commands
1639         case 0xa1: // IDENTIFY PACKET DEVICE
1640               if (SELECTED_IS_CD(channel)) {
1641                     SELECTED_CONTROLLER(channel).current_command = value;
1642                     SELECTED_CONTROLLER(channel).error_register = 0;
1643
1644                     SELECTED_CONTROLLER(channel).status.busy = 0;
1645                     SELECTED_CONTROLLER(channel).status.drive_ready = 1;
1646                     SELECTED_CONTROLLER(channel).status.write_fault = 0;
1647                     SELECTED_CONTROLLER(channel).status.drq   = 1;
1648                     SELECTED_CONTROLLER(channel).status.err   = 0;
1649
1650                     SELECTED_CONTROLLER(channel).status.seek_complete = 1;
1651                     SELECTED_CONTROLLER(channel).status.corrected_data = 0;
1652
1653                     SELECTED_CONTROLLER(channel).buffer_index = 0;
1654                     rd_raise_interrupt(channels, channel);
1655                     rd_identify_ATAPI_drive(channels, channel);
1656               } else {
1657                 rd_command_aborted(channels, channel, 0xa1);
1658               }
1659               break;
1660
1661         case 0xa0: // SEND PACKET (atapi)
1662               if (SELECTED_IS_CD(channel)) {
1663                     // PACKET
1664                     if (SELECTED_CONTROLLER(channel).features & (1 << 0))
1665                           RD_PANIC("\t\tPACKET-DMA not supported");
1666                     if (SELECTED_CONTROLLER(channel).features & (1 << 1))
1667                           RD_PANIC("\t\tPACKET-overlapped not supported");
1668
1669                     // We're already ready!
1670                     SELECTED_CONTROLLER(channel).sector_count = 1;
1671                     SELECTED_CONTROLLER(channel).status.busy = 0;
1672                     SELECTED_CONTROLLER(channel).status.write_fault = 0;
1673                     // serv bit??
1674                     SELECTED_CONTROLLER(channel).status.drq = 1;
1675                     SELECTED_CONTROLLER(channel).status.err = 0;
1676
1677                     // NOTE: no interrupt here
1678                     SELECTED_CONTROLLER(channel).current_command = value;
1679                     SELECTED_CONTROLLER(channel).buffer_index = 0;
1680               } else {
1681                 rd_command_aborted (channels, channel, 0xa0);
1682               }
1683               break;
1684
1685       default:
1686         Ramdisk_Print("\t\tneed translate command %2x\n", value);
1687         break;
1688       }//switch(value)
1689
1690
1691   case 0x16: // hard disk adapter control 0x3f6
1692     // (mch) Even if device 1 was selected, a write to this register
1693     // goes to device 0 (if device 1 is absent)
1694
1695     prev_control_reset = SELECTED_CONTROLLER(channel).control.reset;
1696     channels[channel].drives[0].controller.control.reset         = value & 0x04;
1697     channels[channel].drives[1].controller.control.reset         = value & 0x04;
1698     // CGS: was: SELECTED_CONTROLLER(channel).control.disable_irq    = value & 0x02;
1699     channels[channel].drives[0].controller.control.disable_irq = value & 0x02;
1700     channels[channel].drives[1].controller.control.disable_irq = value & 0x02;
1701
1702     Ramdisk_Print("\t\tadpater control reg: reset controller = %d\n",
1703                   (unsigned) (SELECTED_CONTROLLER(channel).control.reset) ? 1 : 0);
1704     Ramdisk_Print("\t\tadpater control reg: disable_irq(X) = %d\n",
1705                   (unsigned) (SELECTED_CONTROLLER(channel).control.disable_irq) ? 1 : 0);
1706
1707     if (!prev_control_reset && SELECTED_CONTROLLER(channel).control.reset) {
1708       // transition from 0 to 1 causes all drives to reset
1709       Ramdisk_Print("\t\thard drive: RESET\n");
1710
1711       // (mch) Set BSY, drive not ready
1712       for (id = 0; id < 2; id++) {
1713         CONTROLLER(channel,id).status.busy           = 1;
1714         CONTROLLER(channel,id).status.drive_ready    = 0;
1715         CONTROLLER(channel,id).reset_in_progress     = 1;
1716
1717         CONTROLLER(channel,id).status.write_fault    = 0;
1718         CONTROLLER(channel,id).status.seek_complete  = 1;
1719         CONTROLLER(channel,id).status.drq            = 0;
1720         CONTROLLER(channel,id).status.corrected_data = 0;
1721         CONTROLLER(channel,id).status.err            = 0;
1722
1723         CONTROLLER(channel,id).error_register = 0x01; // diagnostic code: no error
1724
1725         CONTROLLER(channel,id).current_command = 0x00;
1726         CONTROLLER(channel,id).buffer_index = 0;
1727
1728         CONTROLLER(channel,id).sectors_per_block = 0x80;
1729         CONTROLLER(channel,id).lba_mode          = 0;
1730
1731         CONTROLLER(channel,id).control.disable_irq = 0;
1732         rd_lower_irq((struct vm_device *)(ramdisk_state->private_data), channels[channel].irq);
1733       }
1734     } else if (SELECTED_CONTROLLER(channel).reset_in_progress &&
1735                !SELECTED_CONTROLLER(channel).control.reset) {
1736       // Clear BSY and DRDY
1737       Ramdisk_Print("\t\tReset complete {%s}\n", SELECTED_TYPE_STRING(channel));
1738       for (id = 0; id < 2; id++) {
1739         CONTROLLER(channel,id).status.busy           = 0;
1740         CONTROLLER(channel,id).status.drive_ready    = 1;
1741         CONTROLLER(channel,id).reset_in_progress     = 0;
1742
1743         // Device signature
1744         if (DRIVE_IS_HD(channel,id)) {
1745           Ramdisk_Print("\t\tdrive %d/%d is harddrive\n", channel, id);
1746           CONTROLLER(channel,id).head_no        = 0;
1747           CONTROLLER(channel,id).sector_count   = 1;
1748           CONTROLLER(channel,id).sector_no      = 1;
1749           CONTROLLER(channel,id).cylinder_no    = 0;
1750         } else {
1751           CONTROLLER(channel,id).head_no        = 0;
1752           CONTROLLER(channel,id).sector_count   = 1;
1753           CONTROLLER(channel,id).sector_no      = 1;
1754           CONTROLLER(channel,id).cylinder_no    = 0xeb14;
1755         }
1756       }
1757     }
1758     Ramdisk_Print("\t\ts[0].controller.control.disable_irq = %02x\n", (channels[channel].drives[0]).controller.control.disable_irq);
1759     Ramdisk_Print("\t\ts[1].controller.control.disable_irq = %02x\n", (channels[channel].drives[1]).controller.control.disable_irq);
1760     break;
1761
1762   default:
1763     RD_PANIC("\t\thard drive: io write to address %x = %02x\n",
1764                   (unsigned) address, (unsigned) value);
1765   }
1766
1767   return;
1768 }
1769
1770
1771 static
1772 void rd_identify_ATAPI_drive(struct channel_t *channels, Bit8u channel)
1773 {
1774   unsigned i;
1775   const char* serial_number = " VT00001\0\0\0\0\0\0\0\0\0\0\0\0";
1776   const char* firmware = "ALPHA1  ";
1777
1778   SELECTED_DRIVE(channel).id_drive[0] = (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0); // Removable CDROM, 50us response, 12 byte packets
1779
1780   for (i = 1; i <= 9; i++)
1781         SELECTED_DRIVE(channel).id_drive[i] = 0;
1782
1783
1784   for (i = 0; i < 10; i++) {
1785         SELECTED_DRIVE(channel).id_drive[10+i] = (serial_number[i*2] << 8) |
1786               serial_number[i*2 + 1];
1787   }
1788
1789   for (i = 20; i <= 22; i++)
1790         SELECTED_DRIVE(channel).id_drive[i] = 0;
1791
1792
1793   for (i = 0; i < strlen(firmware)/2; i++) {
1794         SELECTED_DRIVE(channel).id_drive[23+i] = (firmware[i*2] << 8) |
1795               firmware[i*2 + 1];
1796   }
1797   V3_ASSERT((23+i) == 27);
1798
1799   for (i = 0; i < strlen((char *) SELECTED_MODEL(channel))/2; i++) {
1800         SELECTED_DRIVE(channel).id_drive[27+i] = (SELECTED_MODEL(channel)[i*2] << 8) |
1801               SELECTED_MODEL(channel)[i*2 + 1];
1802   }
1803   V3_ASSERT((27+i) == 47);
1804
1805   SELECTED_DRIVE(channel).id_drive[47] = 0;
1806   SELECTED_DRIVE(channel).id_drive[48] = 1; // 32 bits access
1807
1808   SELECTED_DRIVE(channel).id_drive[49] = (1 << 9); // LBA supported
1809
1810   SELECTED_DRIVE(channel).id_drive[50] = 0;
1811   SELECTED_DRIVE(channel).id_drive[51] = 0;
1812   SELECTED_DRIVE(channel).id_drive[52] = 0;
1813
1814   SELECTED_DRIVE(channel).id_drive[53] = 3; // words 64-70, 54-58 valid
1815
1816   for (i = 54; i <= 62; i++)
1817         SELECTED_DRIVE(channel).id_drive[i] = 0;
1818
1819   // copied from CFA540A
1820   SELECTED_DRIVE(channel).id_drive[63] = 0x0103; // variable (DMA stuff)
1821   SELECTED_DRIVE(channel).id_drive[64] = 0x0001; // PIO
1822   SELECTED_DRIVE(channel).id_drive[65] = 0x00b4;
1823   SELECTED_DRIVE(channel).id_drive[66] = 0x00b4;
1824   SELECTED_DRIVE(channel).id_drive[67] = 0x012c;
1825   SELECTED_DRIVE(channel).id_drive[68] = 0x00b4;
1826
1827   SELECTED_DRIVE(channel).id_drive[69] = 0;
1828   SELECTED_DRIVE(channel).id_drive[70] = 0;
1829   SELECTED_DRIVE(channel).id_drive[71] = 30; // faked
1830   SELECTED_DRIVE(channel).id_drive[72] = 30; // faked
1831   SELECTED_DRIVE(channel).id_drive[73] = 0;
1832   SELECTED_DRIVE(channel).id_drive[74] = 0;
1833
1834   SELECTED_DRIVE(channel).id_drive[75] = 0;
1835
1836   for (i = 76; i <= 79; i++)
1837         SELECTED_DRIVE(channel).id_drive[i] = 0;
1838
1839   SELECTED_DRIVE(channel).id_drive[80] = 0x1e; // supports up to ATA/ATAPI-4
1840   SELECTED_DRIVE(channel).id_drive[81] = 0;
1841   SELECTED_DRIVE(channel).id_drive[82] = 0;
1842   SELECTED_DRIVE(channel).id_drive[83] = 0;
1843   SELECTED_DRIVE(channel).id_drive[84] = 0;
1844   SELECTED_DRIVE(channel).id_drive[85] = 0;
1845   SELECTED_DRIVE(channel).id_drive[86] = 0;
1846   SELECTED_DRIVE(channel).id_drive[87] = 0;
1847   SELECTED_DRIVE(channel).id_drive[88] = 0;
1848
1849   for (i = 89; i <= 126; i++)
1850         SELECTED_DRIVE(channel).id_drive[i] = 0;
1851
1852   SELECTED_DRIVE(channel).id_drive[127] = 0;
1853   SELECTED_DRIVE(channel).id_drive[128] = 0;
1854
1855   for (i = 129; i <= 159; i++)
1856         SELECTED_DRIVE(channel).id_drive[i] = 0;
1857
1858   for (i = 160; i <= 255; i++)
1859         SELECTED_DRIVE(channel).id_drive[i] = 0;
1860
1861   // now convert the id_drive array (native 256 word format) to
1862   // the controller buffer (512 bytes)
1863   Bit16u temp16;
1864   for (i = 0; i <= 255; i++) {
1865         temp16 = SELECTED_DRIVE(channel).id_drive[i];
1866         SELECTED_CONTROLLER(channel).buffer[i*2] = temp16 & 0x00ff;
1867         SELECTED_CONTROLLER(channel).buffer[i*2+1] = temp16 >> 8;
1868   }
1869
1870   return;
1871 }
1872
1873
1874
1875 static
1876 void rd_raise_interrupt(struct channel_t *channels, Bit8u channel)
1877 {
1878   Bit32u irq;
1879   struct vm_device *dev;
1880
1881   Ramdisk_Print("[raise_interrupt] disable_irq = %02x\n", SELECTED_CONTROLLER(channel).control.disable_irq);
1882
1883   if (!SELECTED_CONTROLLER(channel).control.disable_irq) {
1884     Ramdisk_Print("\t\traising interrupt\n");
1885   } else {
1886     Ramdisk_Print("\t\tNot raising interrupt\n");
1887   }
1888   if (!SELECTED_CONTROLLER(channel).control.disable_irq) {
1889     irq = channels[channel].irq;
1890     Ramdisk_Print("\t\tRaising interrupt %d {%s}\n\n", irq, SELECTED_TYPE_STRING(channel));
1891     //        DEV_pic_raise_irq(irq);
1892     dev = (struct vm_device*) ramdisk_state->private_data;
1893     Ramdisk_Print("\t\tdev = %x\n", dev);
1894     dev->vm->vm_ops.raise_irq(dev->vm, irq);
1895   } else {
1896     Ramdisk_Print("\t\tirq is disabled\n");
1897   }
1898
1899   return;
1900 }
1901
1902 static
1903 void rd_lower_irq(struct vm_device *dev, Bit32u irq)// __attribute__(regparm(1))
1904 {
1905   Ramdisk_Print("[lower_irq] irq = %d\n", irq);
1906   dev->vm->vm_ops.lower_irq(dev->vm, irq);
1907 }
1908
1909
1910 /*
1911  * Public Routines
1912  */
1913 static
1914 int ramdisk_read_port(ushort_t port,
1915                          void *src,
1916                          uint_t length,
1917                          struct vm_device *dev)
1918 {
1919   uint_t i;
1920   //Ramdisk_Print("[ramdisk_read_port] port = %x, length = %d\n", port, length);
1921     switch (length) {
1922     case 1:
1923       ((uchar_t*)src)[0] = rd_read_handler(ramdisk_state->channels, port, length);
1924       break;
1925     case 2:
1926       ((ushort_t*)src)[0] = rd_read_handler(ramdisk_state->channels, port, length);
1927       break;
1928     case 4:
1929       ((uint_t*)src)[0] = rd_read_handler(ramdisk_state->channels, port, length);
1930       break;
1931     default:
1932       for (i = 0; i < length; i++) {
1933         ((uchar_t*)src)[i] = rd_read_handler(ramdisk_state->channels, port, 1);
1934       }
1935     }//switch length
1936
1937   return length;
1938 }
1939
1940
1941 static
1942 int ramdisk_write_port(ushort_t port,
1943                          void *src,
1944                          uint_t length,
1945                          struct vm_device *dev)
1946 {
1947   //Ramdisk_Print("[ramdisk_write_port] port = %x, length = %d\n", port, length);
1948   /*
1949   uint_t i;
1950
1951   for (i = 0; i < length; i++)
1952     Ramdisk_Print("\t\tsrc[%d] = 0x%02x\n", i, ((uchar_t*)src)[i]);
1953   */
1954
1955   switch(length) {
1956   case 1:
1957     rd_write_handler(ramdisk_state->channels, port, *((uchar_t *)src), length);
1958     break;
1959   case 2:
1960     rd_write_handler(ramdisk_state->channels, port, *((ushort_t *)src), length);
1961     break;
1962   case 4:
1963     rd_write_handler(ramdisk_state->channels, port, *((uint_t *)src), length);
1964     break;
1965   default:
1966     rd_write_handler(ramdisk_state->channels, port, *((uchar_t *)src), length);
1967     break;
1968   }
1969
1970   return length;
1971 }
1972
1973
1974 static void trace_info(ushort_t port, void *src, uint_t length)
1975 {
1976   switch(port){
1977
1978   case 0x3e8:
1979     if (length == 1 && *((uchar_t*) src) == ATA_DETECT)
1980       Ramdisk_Print("ata_dectect()\n");
1981     break;
1982
1983   case 0x3e9:
1984     if (length == 1 && *((uchar_t*) src) == ATA_RESET)
1985       Ramdisk_Print("ata_reset()\n");
1986     break;
1987
1988   case 0x3ea:
1989     if (length == 1 && *((uchar_t*) src) == ATA_CMD_DATA_IN)
1990       Ramdisk_Print("ata_cmd_data_in()\n");
1991     break;
1992
1993   case 0x3eb:
1994     if (length == 1 && *((uchar_t*) src) == ATA_CMD_DATA_OUT)
1995       Ramdisk_Print("ata_cmd_data_out()\n");
1996     break;
1997
1998   case 0x3ec:
1999     if (length == 1 && *((uchar_t*) src) == ATA_CMD_PACKET)
2000       Ramdisk_Print("ata_cmd_packet()\n");
2001     break;
2002
2003   case 0x3ed:
2004     if (length == 1 && *((uchar_t*) src) == ATAPI_GET_SENSE)
2005       Ramdisk_Print("atapi_get_sense()\n");
2006     break;
2007
2008   case 0x3ee:
2009     if (length == 1 && *((uchar_t*) src) == ATAPI_IS_READY)
2010       Ramdisk_Print("atapi_is_ready()\n");
2011     break;
2012
2013   case 0x3ef:
2014     if (length == 1 && *((uchar_t*) src) == ATAPI_IS_CDROM)
2015       Ramdisk_Print("atapi_is_cdrom()\n");
2016     break;
2017
2018
2019   case 0x2e8:
2020     if (length == 1 && *((uchar_t*) src) == CDEMU_INIT)
2021       Ramdisk_Print("cdemu_init()\n");
2022     break;
2023
2024   case 0x2e9:
2025     if (length == 1 && *((uchar_t*) src) == CDEMU_ISACTIVE)
2026       Ramdisk_Print("cdemu_isactive()\n");
2027     break;
2028
2029   case 0x2ea:
2030     if (length == 1 && *((uchar_t*) src) == CDEMU_EMULATED_DRIVE)
2031       Ramdisk_Print("cdemu_emulated_drive()\n");
2032     break;
2033
2034   case 0x2eb:
2035     if (length == 1 && *((uchar_t*) src) == CDROM_BOOT)
2036       Ramdisk_Print("cdrom_boot()\n");
2037     break;
2038
2039   case 0x2ec:
2040     if (length == 1 && *((uchar_t*) src) == HARD_DRIVE_POST)
2041       Ramdisk_Print("ata_hard_drive_post()\n");
2042     break;
2043
2044   case 0x2ed:
2045     if (length == 1)
2046       Ramdisk_Print("ata_device_no(%d)\n", *((uchar_t*) src));
2047     break;
2048
2049   case 0x2ee:
2050     if (length == 1)
2051       Ramdisk_Print("ata_device_type(%d)\n", *((uchar_t*) src));
2052     break;
2053
2054   case 0x2ef:
2055     if (length == 1 && *((uchar_t*) src) == INT13_HARDDISK)
2056       Ramdisk_Print("int13_harddrive()\n");
2057     break;
2058
2059   case 0x2f8:
2060     if (length == 1 && *((uchar_t*) src) == INT13_CDROM)
2061       Ramdisk_Print("int13_cdrom()\n");
2062     break;
2063
2064   case 0x2f9:
2065     if (length == 1 && *((uchar_t*) src) == INT13_CDEMU)
2066       Ramdisk_Print("int13_cdemu()\n");
2067     break;
2068
2069   case 0x2fa:
2070     if (length == 1 && *((uchar_t*) src) == INT13_ELTORITO)
2071       Ramdisk_Print("int13_eltorito()\n");
2072     break;
2073
2074   case 0x2fb:
2075     if (length == 1 && *((uchar_t*) src) == INT13_DISKETTE_FUNCTION)
2076       Ramdisk_Print("int13_diskette_function()\n");
2077     break;
2078
2079
2080   default:
2081     break;
2082   }
2083 }
2084
2085
2086 int ramdisk_read_port_ignore(ushort_t port,
2087                          void *src,
2088                          uint_t length,
2089                          struct vm_device *dev)
2090 {
2091   //  Ramdisk_Print("[ramdisk_read_port_ignore] port = %x, length = %d\n", port, length);
2092   return length;
2093 }
2094
2095 int ramdisk_write_port_ignore(ushort_t port,
2096                          void *src,
2097                          uint_t length,
2098                          struct vm_device *dev)
2099 {
2100
2101   //  Ramdisk_Print("[ramdisk_write_port_ignore] port = %x, length = %d\n", port, length);
2102
2103   trace_info(port, src, length);
2104   return length;
2105 }
2106
2107 //////////////////////////////////////////////////////////////////////////
2108
2109 /*
2110  * ATAPI subroutines
2111  */
2112
2113 static
2114 void rd_init_send_atapi_command(struct channel_t *channels, Bit8u channel, Bit8u command, int req_length, int alloc_length, bool lazy)
2115 {
2116   // SELECTED_CONTROLLER(channel).byte_count is a union of SELECTED_CONTROLLER(channel).cylinder_no;
2117   // lazy is used to force a data read in the buffer at the next read.
2118
2119   Ramdisk_Print("[rd_init_send_atapi_cmd]\n");
2120   if (SELECTED_CONTROLLER(channel).byte_count == 0xffff)
2121     SELECTED_CONTROLLER(channel).byte_count = 0xfffe;
2122
2123   if ((SELECTED_CONTROLLER(channel).byte_count & 1)
2124       && !(alloc_length <= SELECTED_CONTROLLER(channel).byte_count)) {
2125     Ramdisk_Print("\t\tOdd byte count (0x%04x) to ATAPI command 0x%02x, using 0x%x\n",
2126                   SELECTED_CONTROLLER(channel).byte_count, command, SELECTED_CONTROLLER(channel).byte_count - 1);
2127     SELECTED_CONTROLLER(channel).byte_count -= 1;
2128   }
2129
2130   if (SELECTED_CONTROLLER(channel).byte_count == 0)
2131     RD_PANIC("\t\tATAPI command with zero byte count\n");
2132
2133   if (alloc_length < 0)
2134     RD_PANIC("\t\tAllocation length < 0\n");
2135   if (alloc_length == 0)
2136     alloc_length = SELECTED_CONTROLLER(channel).byte_count;
2137
2138   SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
2139   SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 0;
2140   SELECTED_CONTROLLER(channel).status.busy = 0;
2141   SELECTED_CONTROLLER(channel).status.drq = 1;
2142   SELECTED_CONTROLLER(channel).status.err = 0;
2143
2144   // no bytes transfered yet
2145   if (lazy)
2146     SELECTED_CONTROLLER(channel).buffer_index = 2048;
2147   else
2148     SELECTED_CONTROLLER(channel).buffer_index = 0;
2149   SELECTED_CONTROLLER(channel).drq_index = 0;
2150
2151   if (SELECTED_CONTROLLER(channel).byte_count > req_length)
2152     SELECTED_CONTROLLER(channel).byte_count = req_length;
2153
2154   if (SELECTED_CONTROLLER(channel).byte_count > alloc_length)
2155     SELECTED_CONTROLLER(channel).byte_count = alloc_length;
2156
2157   SELECTED_DRIVE(channel).atapi.command = command;
2158   SELECTED_DRIVE(channel).atapi.drq_bytes = SELECTED_CONTROLLER(channel).byte_count;
2159   SELECTED_DRIVE(channel).atapi.total_bytes_remaining = (req_length < alloc_length) ? req_length : alloc_length;
2160
2161   // if (lazy) {
2162   // // bias drq_bytes and total_bytes_remaining
2163   // SELECTED_DRIVE(channel).atapi.drq_bytes += 2048;
2164   // SELECTED_DRIVE(channel).atapi.total_bytes_remaining += 2048;
2165   // }
2166 }
2167
2168
2169 static
2170 void rd_atapi_cmd_error(struct channel_t *channels, Bit8u channel, sense_t sense_key, asc_t asc)
2171 {
2172   Ramdisk_Print("[rd_atapi_cmd_error]\n");
2173   Ramdisk_Print("Error: atapi_cmd_error channel=%02x key=%02x asc=%02x\n", channel, sense_key, asc);
2174
2175   SELECTED_CONTROLLER(channel).error_register = sense_key << 4;
2176   SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
2177   SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 1;
2178   SELECTED_CONTROLLER(channel).interrupt_reason.rel = 0;
2179   SELECTED_CONTROLLER(channel).status.busy = 0;
2180   SELECTED_CONTROLLER(channel).status.drive_ready = 1;
2181   SELECTED_CONTROLLER(channel).status.write_fault = 0;
2182   SELECTED_CONTROLLER(channel).status.drq = 0;
2183   SELECTED_CONTROLLER(channel).status.err = 1;
2184
2185   SELECTED_DRIVE(channel).sense.sense_key = sense_key;
2186   SELECTED_DRIVE(channel).sense.asc = asc;
2187   SELECTED_DRIVE(channel).sense.ascq = 0;
2188 }
2189
2190
2191 static
2192 void rd_atapi_cmd_nop(struct channel_t *channels, Bit8u channel)
2193 {
2194   Ramdisk_Print("[rd_atapi_cmd_nop]\n");
2195   SELECTED_CONTROLLER(channel).interrupt_reason.i_o = 1;
2196   SELECTED_CONTROLLER(channel).interrupt_reason.c_d = 1;
2197   SELECTED_CONTROLLER(channel).interrupt_reason.rel = 0;
2198   SELECTED_CONTROLLER(channel).status.busy = 0;
2199   SELECTED_CONTROLLER(channel).status.drive_ready = 1;
2200   SELECTED_CONTROLLER(channel).status.drq = 0;
2201   SELECTED_CONTROLLER(channel).status.err = 0;
2202 }
2203
2204
2205 static
2206 void rd_init_mode_sense_single(struct channel_t *channels,
2207                                Bit8u channel, const void* src, int size)
2208 {
2209   Ramdisk_Print("[rd_init_mode_sense_single]\n");
2210   // Header
2211   SELECTED_CONTROLLER(channel).buffer[0] = (size+6) >> 8;
2212   SELECTED_CONTROLLER(channel).buffer[1] = (size+6) & 0xff;
2213   SELECTED_CONTROLLER(channel).buffer[2] = 0x70; // no media present
2214   SELECTED_CONTROLLER(channel).buffer[3] = 0; // reserved
2215   SELECTED_CONTROLLER(channel).buffer[4] = 0; // reserved
2216   SELECTED_CONTROLLER(channel).buffer[5] = 0; // reserved
2217   SELECTED_CONTROLLER(channel).buffer[6] = 0; // reserved
2218   SELECTED_CONTROLLER(channel).buffer[7] = 0; // reserved
2219
2220   // Data
2221   memcpy(SELECTED_CONTROLLER(channel).buffer + 8, src, size);
2222 }
2223
2224
2225 static
2226 void rd_ready_to_send_atapi(struct channel_t *channels, Bit8u channel)
2227 {
2228   Ramdisk_Print("[rd_ready_to_send_atapi]\n");
2229   rd_raise_interrupt(ramdisk_state->channels, channel);
2230 }
2231
2232
2233 static
2234 void rd_command_aborted(struct channel_t *channels,
2235                         Bit8u channel, unsigned value)
2236 {
2237   Ramdisk_Print("[rd_command_aborted]\n");
2238   Ramdisk_Print("\t\taborting on command 0x%02x {%s}\n", value, SELECTED_TYPE_STRING(channel));
2239   SELECTED_CONTROLLER(channel).current_command = 0;
2240   SELECTED_CONTROLLER(channel).status.busy = 0;
2241   SELECTED_CONTROLLER(channel).status.drive_ready = 1;
2242   SELECTED_CONTROLLER(channel).status.err = 1;
2243   SELECTED_CONTROLLER(channel).error_register = 0x04; // command ABORTED
2244   SELECTED_CONTROLLER(channel).status.drq = 0;
2245   SELECTED_CONTROLLER(channel).status.seek_complete = 0;
2246   SELECTED_CONTROLLER(channel).status.corrected_data = 0;
2247   SELECTED_CONTROLLER(channel).buffer_index = 0;
2248   rd_raise_interrupt(ramdisk_state->channels, channel);
2249 }
2250
2251
2252 static int ramdisk_init_device(struct vm_device *dev)
2253 {
2254   struct ramdisk_t *ramdisk_state = (struct ramdisk_t *)dev->private_data;
2255
2256   ramdisk_state->cops.init(ramdisk_state, dev);
2257
2258   //hook ports IDE 0x170-0x177, 0x376 & 0x377
2259   dev_hook_io(dev, 0x170,
2260               (ramdisk_state->eops.read_port),
2261               (ramdisk_state->eops.write_port));
2262
2263   dev_hook_io(dev, 0x171,
2264               (ramdisk_state->eops.read_port),
2265               (ramdisk_state->eops.write_port));
2266
2267   dev_hook_io(dev, 0x172,
2268               (ramdisk_state->eops.read_port),
2269               (ramdisk_state->eops.write_port));
2270
2271   dev_hook_io(dev, 0x173,
2272               (ramdisk_state->eops.read_port),
2273               (ramdisk_state->eops.write_port));
2274
2275   dev_hook_io(dev, 0x174,
2276               (ramdisk_state->eops.read_port),
2277               (ramdisk_state->eops.write_port));
2278
2279   dev_hook_io(dev, 0x175,
2280               (ramdisk_state->eops.read_port),
2281               (ramdisk_state->eops.write_port));
2282
2283   dev_hook_io(dev, 0x176,
2284               (ramdisk_state->eops.read_port),
2285               (ramdisk_state->eops.write_port));
2286
2287   dev_hook_io(dev, 0x177,
2288               (ramdisk_state->eops.read_port),
2289               (ramdisk_state->eops.write_port));
2290
2291   dev_hook_io(dev, 0x376,
2292               (ramdisk_state->eops.read_port),
2293               (ramdisk_state->eops.write_port));
2294
2295   dev_hook_io(dev, 0x377,
2296               (ramdisk_state->eops.read_port),
2297               (ramdisk_state->eops.write_port));
2298
2299   //Debug ports: 0x3e8-0x3ef & 0x2e8-0x2ef
2300
2301 #ifdef DEBUG_RAMDISK
2302
2303   dev_hook_io(dev, 0x3e8,
2304               (ramdisk_state->eops.read_port_ignore),
2305               (ramdisk_state->eops.write_port_ignore));
2306
2307   dev_hook_io(dev, 0x3e9,
2308               (ramdisk_state->eops.read_port_ignore),
2309               (ramdisk_state->eops.write_port_ignore));
2310
2311   dev_hook_io(dev, 0x3ea,
2312               (ramdisk_state->eops.read_port_ignore),
2313               (ramdisk_state->eops.write_port_ignore));
2314
2315   dev_hook_io(dev, 0x3eb,
2316               (ramdisk_state->eops.read_port_ignore),
2317               (ramdisk_state->eops.write_port_ignore));
2318
2319   dev_hook_io(dev, 0x3ec,
2320               (ramdisk_state->eops.read_port_ignore),
2321               (ramdisk_state->eops.write_port_ignore));
2322
2323   dev_hook_io(dev, 0x3ed,
2324               (ramdisk_state->eops.read_port_ignore),
2325               (ramdisk_state->eops.write_port_ignore));
2326
2327   dev_hook_io(dev, 0x3ee,
2328               (ramdisk_state->eops.read_port_ignore),
2329               (ramdisk_state->eops.write_port_ignore));
2330
2331   dev_hook_io(dev, 0x3ef,
2332               (ramdisk_state->eops.read_port_ignore),
2333               (ramdisk_state->eops.write_port_ignore));
2334
2335   dev_hook_io(dev, 0x2e8,
2336               (ramdisk_state->eops.read_port_ignore),
2337               (ramdisk_state->eops.write_port_ignore));
2338
2339   dev_hook_io(dev, 0x2e9,
2340               (ramdisk_state->eops.read_port_ignore),
2341               (ramdisk_state->eops.write_port_ignore));
2342
2343   dev_hook_io(dev, 0x2ea,
2344               (ramdisk_state->eops.read_port_ignore),
2345               (ramdisk_state->eops.write_port_ignore));
2346
2347   dev_hook_io(dev, 0x2eb,
2348               (ramdisk_state->eops.read_port_ignore),
2349               (ramdisk_state->eops.write_port_ignore));
2350
2351   dev_hook_io(dev, 0x2ec,
2352               (ramdisk_state->eops.read_port_ignore),
2353               (ramdisk_state->eops.write_port_ignore));
2354
2355   dev_hook_io(dev, 0x2ed,
2356               (ramdisk_state->eops.read_port_ignore),
2357               (ramdisk_state->eops.write_port_ignore));
2358
2359   dev_hook_io(dev, 0x2ee,
2360               (ramdisk_state->eops.read_port_ignore),
2361               (ramdisk_state->eops.write_port_ignore));
2362
2363   dev_hook_io(dev, 0x2ef,
2364               (ramdisk_state->eops.read_port_ignore),
2365               (ramdisk_state->eops.write_port_ignore));
2366
2367 #endif
2368
2369 }
2370
2371
2372 static int ramdisk_deinit_device(struct vm_device *dev)
2373 {
2374   struct ramdisk_t *ramdisk_state = (struct ramdisk_t *)(dev->private_data);
2375   ramdisk_state->cops.close(ramdisk_state);
2376
2377   return 0;
2378 }
2379
2380 static struct vm_device_ops dev_ops = {
2381   .init = ramdisk_init_device,
2382   .deinit = ramdisk_deinit_device,
2383   .reset = NULL,
2384   .start = NULL,
2385   .stop = NULL,
2386 };
2387
2388
2389
2390 /*
2391  * Success: return 0;
2392  * Failure: return integer greater than 0
2393  */
2394
2395 /*
2396 struct ramdisk_t * create_ramdisk()
2397 {
2398   struct ramdisk_t *ramdisk;
2399   ramdisk = (struct ramdisk_t *)V3_Malloc(sizeof(struct ramdisk_t));
2400   V3_ASSERT(ramdisk != NULL);
2401
2402   ramdisk->cops.init = &rd_init_harddrive;
2403   ramdisk->cops.close = &rd_close_harddrive;
2404   ramdisk->cops.reset = &rd_reset_harddrive;
2405
2406   ramdisk->eops.read_port = &ramdisk_read_port;
2407   ramdisk->eops.write_port = &ramdisk_write_port;
2408   ramdisk->eops.read_port_ignore = &ramdisk_read_port_ignore;
2409   ramdisk->eops.write_port_ignore = &ramdisk_write_port_ignore;
2410
2411   return ramdisk;
2412 }
2413
2414 */
2415
2416
2417 struct vm_device *create_ramdisk()
2418 {
2419
2420   struct ramdisk_t *ramdisk;
2421   ramdisk = (struct ramdisk_t *)V3_Malloc(sizeof(struct ramdisk_t));
2422   V3_ASSERT(ramdisk != NULL);
2423
2424   Ramdisk_Print("[create_ramdisk]\n");
2425   ramdisk->cops.init = &rd_init_harddrive;
2426   ramdisk->cops.close = &rd_close_harddrive;
2427   ramdisk->cops.reset = &rd_reset_harddrive;
2428
2429   ramdisk->eops.read_port = &ramdisk_read_port;
2430   ramdisk->eops.write_port = &ramdisk_write_port;
2431   ramdisk->eops.read_port_ignore = &ramdisk_read_port_ignore;
2432   ramdisk->eops.write_port_ignore = &ramdisk_write_port_ignore;
2433
2434   struct vm_device *device = create_device("RAMDISK", &dev_ops, ramdisk);
2435
2436   return device;
2437 }