Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


Update to the device framework.
[palacios.git] / palacios / src / devices / piix3.c
1 /* 
2  * This file is part of the Palacios Virtual Machine Monitor developed
3  * by the V3VEE Project with funding from the United States National 
4  * Science Foundation and the Department of Energy.  
5  *
6  * The V3VEE Project is a joint project between Northwestern University
7  * and the University of New Mexico.  You can find out more at 
8  * http://www.v3vee.org
9  *
10  * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
11  * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
12  * Copyright (c) 2009, Jack Lange <jarusl@cs.northwestern.edu>
13  * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org> 
14  * All rights reserved.
15  *
16  * Author:  Lei Xia <lxia@northwestern.edu>
17  *          Chang Seok Bae <jhuell@gmail.com>
18  *          Jack Lange <jarusl@cs.northwestern.edu>
19  *
20  * This is free software.  You are permitted to use,
21  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
22  */ 
23  
24
25 #include <palacios/vmm.h>
26 #include <devices/pci.h>
27 #include <devices/southbridge.h>
28
29
30
31 static int reset_piix3(struct vm_device * dev) {
32     struct v3_southbridge * piix3 = (struct v3_southbridge *)(dev->private_data);
33     struct pci_device * pci_dev = piix3->southbridge_pci;
34
35     pci_dev->config_header.command = 0x0007; // master, memory and I/O
36     pci_dev->config_header.status = 0x0200;
37
38     pci_dev->config_space[0x4c] = 0x4d;
39     pci_dev->config_space[0x4e] = 0x03;
40     pci_dev->config_space[0x4f] = 0x00;
41     pci_dev->config_space[0x60] = 0x80;
42     pci_dev->config_space[0x69] = 0x02;
43     pci_dev->config_space[0x70] = 0x80;
44     pci_dev->config_space[0x76] = 0x0c;
45     pci_dev->config_space[0x77] = 0x0c;
46     pci_dev->config_space[0x78] = 0x02;
47     pci_dev->config_space[0x79] = 0x00;
48     pci_dev->config_space[0x80] = 0x00;
49     pci_dev->config_space[0x82] = 0x00;
50     pci_dev->config_space[0xa0] = 0x08;
51     pci_dev->config_space[0xa2] = 0x00;
52     pci_dev->config_space[0xa3] = 0x00;
53     pci_dev->config_space[0xa4] = 0x00;
54     pci_dev->config_space[0xa5] = 0x00;
55     pci_dev->config_space[0xa6] = 0x00;
56     pci_dev->config_space[0xa7] = 0x00;
57     pci_dev->config_space[0xa8] = 0x0f;
58     pci_dev->config_space[0xaa] = 0x00;
59     pci_dev->config_space[0xab] = 0x00;
60     pci_dev->config_space[0xac] = 0x00;
61     pci_dev->config_space[0xae] = 0x00;
62
63     return 0;
64 }
65
66
67
68
69
70 static int piix_free(struct vm_device * dev) {
71     return 0;
72 }
73
74
75 static struct v3_device_ops dev_ops = {
76     .free = piix_free,
77     .reset = reset_piix3,
78     .start = NULL,
79     .stop = NULL,
80 };
81
82
83
84
85 static int setup_pci(struct vm_device * dev) {
86     struct v3_southbridge * piix3 = (struct v3_southbridge *)(dev->private_data);
87     struct pci_device * pci_dev = NULL;
88     struct v3_pci_bar bars[6];
89     int i;
90
91     for (i = 0; i < 6; i++) {
92         bars[i].type = PCI_BAR_NONE;
93     }
94
95     pci_dev = v3_pci_register_device(piix3->pci_bus, PCI_MULTIFUNCTION, 
96                                      0, -1, 0, 
97                                      "PIIX3", bars, 
98                                      NULL, NULL, NULL, dev);
99     if (pci_dev == NULL) {
100         PrintError("Could not register PCI Device for PIIX3\n");
101         return -1;
102     }
103
104     pci_dev->config_header.vendor_id = 0x8086;
105     pci_dev->config_header.device_id = 0x7000; // PIIX4 is 0x7001
106     pci_dev->config_header.class = PCI_CLASS_BRIDGE;
107     pci_dev->config_header.subclass = PCI_BRIDGE_SUBCLASS_PCI_ISA; 
108
109     piix3->southbridge_pci = pci_dev;
110
111     reset_piix3(dev);
112
113     return 0;
114 }
115
116 static int piix3_init(struct guest_info * vm, void * cfg_data) {
117     struct v3_southbridge * piix3 = (struct v3_southbridge *)V3_Malloc(sizeof(struct v3_southbridge));
118     struct vm_device * dev = NULL;
119     struct vm_device * pci = v3_find_dev(vm, (char *)cfg_data);
120
121     if (!pci) {
122         PrintError("Could not find PCI device\n");
123         return -1;
124     }
125
126     piix3->pci_bus = pci;
127     piix3->type = V3_SB_PIIX3;
128     
129     dev = v3_allocate_device("PIIX3", &dev_ops, piix3);
130
131     if (v3_attach_device(vm, dev) == -1) {
132         PrintError("Could not attach device %s\n", "PIIX3");
133         return -1;
134     }
135
136     PrintDebug("Created PIIX3\n");
137
138     return setup_pci(dev);
139 }
140
141
142 device_register("PIIX3", piix3_init)