palacios/src/devices/ide-types.h

   1 /*
   2  * This file is part of the Palacios Virtual Machine Monitor developed
   3  * by the V3VEE Project with funding from the United States National
   4  * Science Foundation and the Department of Energy.
   5  *
   6  * The V3VEE Project is a joint project between Northwestern University
   7  * and the University of New Mexico.  You can find out more at
   8  * http://www.v3vee.org
   9  *
  10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
  11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
  12  * All rights reserved.
  13  *
  14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
  15  *
  16  * This is free software.  You are permitted to use,
  17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
  18  */
  19
  20
  21 #ifndef __DEVICES_IDE_TYPES_H__
  22 #define __DEVICES_IDE_TYPES_H__
  23
  24 #ifdef __V3VEE__
  25
  26 #include <palacios/vmm_types.h>
  27
  28
  29 struct ide_error_reg {
  30     union {
  31         uint8_t val;
  32         struct {
  33             uint_t addr_mark_nf     : 1;
  34             uint_t track0_nf        : 1;
  35             uint_t abort            : 1;
  36             uint_t rsvd0            : 1;
  37             uint_t ID_nf            : 1;
  38             uint_t rsvd1            : 1;
  39             uint_t data_error       : 1;
  40             uint_t bad_block        : 1;
  41         } __attribute__((packed));
  42     } __attribute__((packed));
  43 } __attribute__((packed));
  44
  45
  46
  47 struct ide_drive_head_reg {
  48     union {
  49         uint8_t val;
  50         struct {
  51             uint_t head_num      : 4;
  52             uint_t drive_sel     : 1;
  53             uint_t rsvd1         : 1;
  54             uint_t lba_mode      : 1;
  55             uint_t rsvd2         : 1;
  56         } __attribute__((packed));
  57
  58         struct {
  59             uint_t lba3      : 4;
  60             uint_t rsvd3     : 4;
  61         } __attribute__((packed));
  62
  63     } __attribute__((packed));
  64 } __attribute__((packed));
  65
  66
  67
  68 struct ide_status_reg {
  69     union {
  70         uint8_t val;
  71         struct {
  72             uint_t error         : 1;
  73             uint_t index         : 1;
  74             uint_t corrected     : 1;
  75             uint_t data_req      : 1;
  76             uint_t seek_complete : 1;
  77             uint_t write_fault   : 1;
  78             uint_t ready         : 1;
  79             uint_t busy          : 1;
  80         } __attribute__((packed));
  81     } __attribute__((packed));
  82 } __attribute__((packed));
  83
  84
  85 struct ide_ctrl_reg {
  86     union {
  87         uint8_t val;
  88         struct {
  89             uint_t rsvd0        : 1;
  90             uint_t irq_disable   : 1;
  91             uint_t soft_reset   : 1;
  92             uint_t rsvd1        : 5;
  93         } __attribute__((packed));
  94     } __attribute__((packed));
  95 } __attribute__((packed));
  96
  97
  98 struct ide_features_reg {
  99     union {
 100         uint8_t val;
 101         uint8_t dma; // 1 == DMA, 0 = PIO
 102     } __attribute__((packed));
 103 } __attribute__((packed));
 104
 105
 106 struct ide_dma_cmd_reg {
 107     union {
 108         uint8_t val;
 109         struct {
 110             uint8_t start : 1;
 111             uint8_t rsvd1 : 2;
 112             uint8_t read  : 1;
 113             uint8_t rsvd2 : 4;
 114         } __attribute__((packed));
 115     } __attribute__((packed));
 116 } __attribute__((packed));
 117
 118
 119
 120 struct ide_dma_status_reg {
 121     union {
 122         uint8_t val;
 123         struct {
 124             uint8_t active  : 1;
 125             uint8_t err     : 1;
 126             uint8_t int_gen : 1;
 127             uint8_t rsvd1   : 4;
 128             uint8_t prd_int_status : 1;
 129         } __attribute__((packed));
 130     } __attribute__((packed));
 131 } __attribute__((packed));
 132
 133 struct ide_dma_prd {
 134     uint32_t base_addr;
 135     uint16_t size;
 136     uint16_t rsvd           : 15;
 137     uint8_t end_of_table    : 1;
 138 } __attribute__((packed));
 139
 140
 141
 142 typedef enum {IDE_CTRL_NOT_SPECIFIED,
 143               IDE_CTRL_SINGLE_PORT,
 144               IDE_CTRL_DUAL_PORT,
 145               IDE_CTRL_DUAL_PORT_CACHE} ide_controller_type;
 146
 147 struct ide_drive_id {
 148     union {
 149         uint16_t buf[256];
 150         struct {
 151             // 0
 152             uint_t rsvd1           : 1;
 153             uint_t hard_sectors    : 1;
 154             uint_t no_soft_sectors : 1;
 155             uint_t no_mfm_enc      : 1;
 156             uint_t head_switch_time : 1;
 157             uint_t spnd_mot_ctrl   : 1;
 158             uint_t fixed_drive     : 1;
 159             uint_t removable_media : 1;
 160             uint_t disk_speed1     : 1;
 161             uint_t disk_speed2     : 1;
 162             uint_t disk_speed3     : 1;
 163             uint_t rpm_tolerance   : 1;
 164             uint_t data_strobe_offset : 1;
 165             uint_t track_offset_option : 1;
 166             uint_t fmt_speed_tol   : 1;
 167             uint_t cdrom_flag      : 1;
 168
 169             // 1
 170             uint16_t num_cylinders;
 171
 172             // 2
 173             uint16_t rsvd2;
 174
 175             // 3
 176             uint16_t num_heads;
 177             // 4
 178             uint16_t bytes_per_track;
 179             // 5
 180             uint16_t bytes_per_sector;
 181             // 6
 182             uint16_t sectors_per_track;
 183
 184             // 7
 185             uint16_t sector_gap;
 186
 187             // 8
 188             uint8_t phase_lock_bytes;
 189             uint8_t rsvd3;
 190
 191             // 9
 192             uint16_t num_vendor_wds;
 193
 194             // 10
 195             uint8_t serial_num[20]; // right aligned, padded with 0x20
 196
 197             // 20
 198             uint16_t controller_type;
 199
 200             // 21
 201             uint16_t buffer_size; // in 512 byte chunks
 202
 203             // 22
 204             uint16_t num_ecc_bytes;
 205
 206             // 23
 207             uint8_t firmware_rev[8]; // space padded
 208
 209             // 27
 210             uint8_t model_num[40]; // space padded
 211
 212             // 47
 213             uint16_t rw_multiples;
 214
 215             // 48
 216             uint16_t dword_io;
 217
 218             // 49
 219             uint8_t rsvd4;
 220             uint8_t dma_enable : 1;
 221             uint8_t lba_enable : 1;
 222             uint8_t IORDYsw    : 1;
 223             uint8_t IORDYsup   : 1;
 224             uint8_t rsvd5      : 4;
 225
 226
 227             // 50
 228             uint16_t rsvd6;
 229
 230             // 51
 231             uint16_t min_PIO_cycle; // 0=slow, 1=medium, 2=fast
 232             // 52
 233             uint16_t min_DMA_cycle; // 0=slow, 1=medium, 2=fast
 234
 235             // 53
 236             uint16_t field_valid; //  2:        ultra_ok        word  88
 237                                   //  1:        eide_ok         words 64-70
 238                                   //  0:        cur_ok          words 54-58
 239             // 54
 240             uint16_t cur_cyls;
 241             // 55
 242             uint16_t cur_heads;
 243             // 56
 244             uint16_t cur_sectors;
 245             // 57
 246             uint16_t cur_capacity0;
 247             // 58
 248             uint16_t cur_capacity1;
 249
 250             // 59
 251             uint8_t cur_mult_sect_cnt;
 252             uint8_t mult_sect_valid; // bit0==0: valid
 253
 254             // 60
 255             uint32_t lba_capacity;
 256
 257             // 62
 258             uint16_t dma_lword;
 259             // 63
 260             uint16_t dma_mword;
 261
 262             // 64
 263             uint16_t eide_pio_modes; // 0: (mode 3), 1: (mode 4)
 264             // 65
 265             uint16_t eide_dma_min; /* min mword dma cycle time (ns) */
 266             // 66
 267             uint16_t eide_dma_time; /* recommended mword dma cycle time (ns) */
 268             // 67
 269             uint16_t eide_pio; /* min cycle time (ns), no IORDY  */
 270             // 68
 271             uint16_t eide_pio_iordy; /* min cycle time (ns), with IORDY */
 272
 273             // 69
 274             uint16_t rsvd7[6];
 275
 276             // 75
 277             uint16_t queue_depth;
 278
 279             // 76
 280             uint16_t rsvd8[4];
 281
 282             // 80
 283             uint16_t major_rev_num;
 284             // 81
 285             uint16_t minor_rev_num;
 286             // 82
 287             uint16_t cmd_set_1; /*  15: Obsolete
 288                                  * 14:  NOP command
 289                                  * 13:  READ_BUFFER
 290                                  * 12:  WRITE_BUFFER
 291                                  * 11:  Obsolete
 292                                  * 10:  Host Protected Area
 293                                  *  9:  DEVICE Reset
 294                                  *  8:  SERVICE Interrupt
 295                                  *  7:  Release Interrupt
 296                                  *  6:  look-ahead
 297                                  *  5:  write cache
 298                                  *  4:  PACKET Command
 299                                  *  3:  Power Management Feature Set
 300                                  *  2:  Removable Feature Set
 301                                  *  1:  Security Feature Set
 302                                  *  0:  S
 303                                  */
 304
 305             // 83
 306             uint16_t cmd_set_2; /*  15: Shall be ZERO
 307                                  * 14:  Shall be ONE
 308                                  * 13:  FLUSH CACHE EXT
 309                                  * 12:  FLUSH CACHE
 310                                  * 11:  Device Configuration Overlay
 311                                  * 10:  48-bit Address Feature Set
 312                                  *  9:  Automatic Acoustic Management
 313                                  *  8:  SET MAX security
 314                                  *  7:  reserved 1407DT PARTIES
 315                                  *  6:  SetF sub-command Power-Up
 316                                  *  5:  Power-Up in Standby Feature Set
 317                                  *  4:  Removable Media Notification
 318                                  *  3:  APM Feature Set
 319                                  *  2:  CFA Feature Set
 320                                  *  1:  READ/WRITE DMA QUEUED
 321                                  *  0:  Download MicroCode
 322                                  */
 323
 324             // 84
 325             uint16_t cfsse;     /*  cmd set-feature supported extensions
 326                                  * 15:  Shall be ZERO
 327                                  * 14:  Shall be ONE
 328                                  * 13:6 reserved
 329                                  *  5:  General Purpose Logging
 330                                  *  4:  Streaming Feature Set
 331                                  *  3:  Media Card Pass Through
 332                                  *  2:  Media Serial Number Valid
 333                                  *  1:  SMART selt-test supported
 334                                  *  0:  SMART error logging
 335                                  */
 336
 337             // 85
 338             uint16_t cfs_enable_1;      /* command set-feature enabled
 339                                          * 15:  Obsolete
 340                                          * 14:  NOP command
 341                                          * 13:  READ_BUFFER
 342                                          * 12:  WRITE_BUFFER
 343                                          * 11:  Obsolete
 344                                          * 10:  Host Protected Area
 345                                          *  9:  DEVICE Reset
 346                                          *  8:  SERVICE Interrupt
 347                                          *  7:  Release Interrupt
 348                                          *  6:  look-ahead
 349                                          *  5:  write cache
 350                                          *  4:  PACKET Command
 351                                          *  3:  Power Management Feature Set
 352                                          *  2:  Removable Feature Set
 353                                          *  1:  Security Feature Set
 354                                          *  0:  SMART Feature Set
 355                                          */
 356             // 86
 357             uint16_t cfs_enable_2;      /* command set-feature enabled
 358                                          * 15:  Shall be ZERO
 359                                          * 14:  Shall be ONE
 360                                          * 13:  FLUSH CACHE EXT
 361                                          * 12:  FLUSH CACHE
 362                                          * 11:  Device Configuration Overlay
 363                                          * 10:  48-bit Address Feature Set
 364                                          *  9:  Automatic Acoustic Management
 365                                          *  8:  SET MAX security
 366                                          *  7:  reserved 1407DT PARTIES
 367                                          *  6:  SetF sub-command Power-Up
 368                                          *  5:  Power-Up in Standby Feature Set
 369                                          *  4:  Removable Media Notification
 370                                          *  3:  APM Feature Set
 371                                          *  2:  CFA Feature Set
 372                                          *  1:  READ/WRITE DMA QUEUED
 373                                          *  0:  Download MicroCode
 374                                          */
 375             // 87
 376             uint16_t csf_default;       /* command set-feature default
 377                                          * 15:  Shall be ZERO
 378                                          * 14:  Shall be ONE
 379                                          * 13:6 reserved
 380                                          *  5:  General Purpose Logging enabled
 381                                          *  4:  Valid CONFIGURE STREAM executed
 382                                          *  3:  Media Card Pass Through enabled
 383                                          *  2:  Media Serial Number Valid
 384                                          *  1:  SMART selt-test supported
 385                                          *  0:  SMART error logging
 386                                          */
 387             // 88
 388             uint16_t dma_ultra;
 389             // 89
 390             uint16_t trs_euc;           /* time required for security erase */
 391             // 90
 392             uint16_t trs_Euc;           /* time required for enhanced erase */
 393             // 91
 394             uint16_t cur_apm_values;    /* current APM values */
 395             // 92
 396             uint16_t mprc;              /* master password revision code */
 397             // 93
 398             uint16_t hw_config;         /* hardware config (word 93)
 399                                          * 15:  Shall be ZERO
 400                                          * 14:  Shall be ONE
 401                                          *  0:  Shall be ONE
 402                                          */
 403             // 94
 404             uint16_t acoustic;
 405             // 95
 406             uint16_t msrqs;             /* min stream request size */
 407             // 96
 408             uint16_t sxfert;            /* stream transfer time */
 409             // 97
 410             uint16_t sal;               /* stream access latency */
 411             // 98
 412             uint32_t spg;               /* stream performance granularity */
 413             // 100
 414             uint64_t lba_capacity_2; /* 48-bit total number of sectors */
 415             // 104
 416             uint16_t rsvd9[22];
 417
 418             // 126
 419             uint16_t last_lun;
 420             // 127
 421             uint16_t feature_set; //  Removable Media Notification
 422
 423             // 128
 424             uint16_t dlf; /* device lock function
 425                            * 15:9       reserved
 426                            *  8 security level 1:max 0:high
 427                            *  7:6       reserved
 428                            *  5 enhanced erase
 429                            *  4 expire
 430                            *  3 frozen
 431                            *  2 locked
 432                            *  1 en/disabled
 433                            *  0 capability
 434                            */
 435             // 129
 436             uint16_t csfo; /* current set features options
 437                             * 15:4      reserved
 438                             *  3:       auto reassign
 439                             *  2:       reverting
 440                             *  1:       read-look-ahead
 441                             *  0:       write cache
 442                             */
 443
 444             // 130
 445             uint16_t rsvd10[30];
 446
 447             // 160
 448             uint16_t cfa_power;
 449
 450             // 161
 451             uint16_t cfa[15];
 452             // 176
 453             uint16_t cur_media_ser_num[30];
 454             // 206
 455             uint16_t rsvd11[49];
 456             // 255
 457             uint16_t integrity; /* 15:8 Checksum
 458                                  *  7:0 Signature
 459                                  */
 460
 461
 462         } __attribute__((packed));
 463     } __attribute__((packed));
 464 } __attribute__((packed));
 465
 466
 467 #endif // ! __V3VEE__
 468
 469 #endif