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31 /// @file xed-operand-bitvec.h
32 /// @author Mark Charney <mark.charney@intel.com>
34 // This file was automatically generated.
35 // Do not edit this file.
37 #if !defined(_XED_OPERAND_BITVEC_H_)
38 # define _XED_OPERAND_BITVEC_H_
39 #include <xed/xed-types.h>
43 xed_uint32_t x_AGEN : 1; /* 00:00 */
44 xed_uint32_t x_AMODE : 1; /* 00:01 */
45 xed_uint32_t x_ASZ : 1; /* 00:02 */
46 xed_uint32_t x_BASE0 : 1; /* 00:03 */
47 xed_uint32_t x_BASE1 : 1; /* 00:04 */
48 xed_uint32_t x_BRDISP_WIDTH : 1; /* 00:05 */
49 xed_uint32_t x_BRDISP0 : 1; /* 00:06 */
50 xed_uint32_t x_BRDISP1 : 1; /* 00:07 */
51 xed_uint32_t x_DEFAULT_SEG : 1; /* 00:08 */
52 xed_uint32_t x_DF64 : 1; /* 00:09 */
53 xed_uint32_t x_DISP_WIDTH : 1; /* 00:10 */
54 xed_uint32_t x_DISP0 : 1; /* 00:11 */
55 xed_uint32_t x_DISP1 : 1; /* 00:12 */
56 xed_uint32_t x_DISP2 : 1; /* 00:13 */
57 xed_uint32_t x_DISP3 : 1; /* 00:14 */
58 xed_uint32_t x_EASZ : 1; /* 00:15 */
59 xed_uint32_t x_ENCODER_PREFERRED : 1; /* 00:16 */
60 xed_uint32_t x_EOSZ : 1; /* 00:17 */
61 xed_uint32_t x_ERROR : 1; /* 00:18 */
62 xed_uint32_t x_HINT_TAKEN : 1; /* 00:19 */
63 xed_uint32_t x_HINT_NOT_TAKEN : 1; /* 00:20 */
64 xed_uint32_t x_ICLASS : 1; /* 00:21 */
65 xed_uint32_t x_IMM_WIDTH : 1; /* 00:22 */
66 xed_uint32_t x_IMM0 : 1; /* 00:23 */
67 xed_uint32_t x_IMM0SIGNED : 1; /* 00:24 */
68 xed_uint32_t x_IMM1 : 1; /* 00:25 */
69 xed_uint32_t x_INDEX : 1; /* 00:26 */
70 xed_uint32_t x_LOCK : 1; /* 00:27 */
71 xed_uint32_t x_LOCKABLE : 1; /* 00:28 */
72 xed_uint32_t x_MEM_WIDTH : 1; /* 00:29 */
73 xed_uint32_t x_MEM0 : 1; /* 00:30 */
74 xed_uint32_t x_MEM1 : 1; /* 00:31 */
75 xed_uint32_t x_MOD : 1; /* 01:00 */
76 xed_uint32_t x_MODE : 1; /* 01:01 */
77 xed_uint32_t x_MODRM : 1; /* 01:02 */
78 xed_uint32_t x_NOREX : 1; /* 01:03 */
79 xed_uint32_t x_OSZ : 1; /* 01:04 */
80 xed_uint32_t x_OUTREG : 1; /* 01:05 */
81 xed_uint32_t x_PTR : 1; /* 01:06 */
82 xed_uint32_t x_REFINING : 1; /* 01:07 */
83 xed_uint32_t x_REG : 1; /* 01:08 */
84 xed_uint32_t x_REG0 : 1; /* 01:09 */
85 xed_uint32_t x_REG1 : 1; /* 01:10 */
86 xed_uint32_t x_REG2 : 1; /* 01:11 */
87 xed_uint32_t x_REG3 : 1; /* 01:12 */
88 xed_uint32_t x_REG4 : 1; /* 01:13 */
89 xed_uint32_t x_REG5 : 1; /* 01:14 */
90 xed_uint32_t x_REG6 : 1; /* 01:15 */
91 xed_uint32_t x_REG7 : 1; /* 01:16 */
92 xed_uint32_t x_REG8 : 1; /* 01:17 */
93 xed_uint32_t x_REG9 : 1; /* 01:18 */
94 xed_uint32_t x_REG10 : 1; /* 01:19 */
95 xed_uint32_t x_REG11 : 1; /* 01:20 */
96 xed_uint32_t x_REG12 : 1; /* 01:21 */
97 xed_uint32_t x_REG13 : 1; /* 01:22 */
98 xed_uint32_t x_REG14 : 1; /* 01:23 */
99 xed_uint32_t x_REG15 : 1; /* 01:24 */
100 xed_uint32_t x_RELBR : 1; /* 01:25 */
101 xed_uint32_t x_REP : 1; /* 01:26 */
102 xed_uint32_t x_REP_ABLE : 1; /* 01:27 */
103 xed_uint32_t x_REX : 1; /* 01:28 */
104 xed_uint32_t x_REXB : 1; /* 01:29 */
105 xed_uint32_t x_REXR : 1; /* 01:30 */
106 xed_uint32_t x_REXW : 1; /* 01:31 */
107 xed_uint32_t x_REXX : 1; /* 02:00 */
108 xed_uint32_t x_RM : 1; /* 02:01 */
109 xed_uint32_t x_SCALE : 1; /* 02:02 */
110 xed_uint32_t x_SEG_OVD : 1; /* 02:03 */
111 xed_uint32_t x_SEG0 : 1; /* 02:04 */
112 xed_uint32_t x_SEG1 : 1; /* 02:05 */
113 xed_uint32_t x_SIB : 1; /* 02:06 */
114 xed_uint32_t x_SIBBASE : 1; /* 02:07 */
115 xed_uint32_t x_SIBINDEX : 1; /* 02:08 */
116 xed_uint32_t x_SIBSCALE : 1; /* 02:09 */
117 xed_uint32_t x_SMODE : 1; /* 02:10 */
118 xed_uint32_t x_UIMM00 : 1; /* 02:11 */
119 xed_uint32_t x_UIMM1 : 1; /* 02:12 */
120 xed_uint32_t x_UIMM01 : 1; /* 02:13 */
121 xed_uint32_t x_UIMM02 : 1; /* 02:14 */
122 xed_uint32_t x_UIMM03 : 1; /* 02:15 */
123 xed_uint32_t x_USING_DEFAULT_SEGMENT0 : 1; /* 02:16 */
124 xed_uint32_t x_USING_DEFAULT_SEGMENT1 : 1; /* 02:17 */
126 } xed_operand_bitvec_t;
