2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm_types.h>
22 /* .... Giant fucking switch tables */
137 static int get_addr_width(struct guest_info * info, struct x86_instr * instr) {
139 switch (v3_get_vm_cpu_mode(info)) {
141 return (instr->prefixes.addr_size) ? 4 : 2;
147 if (info->segments.cs.db) {
148 return (instr->prefixes.addr_size) ? 2 : 4;
150 return (instr->prefixes.addr_size) ? 4 : 2;
153 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
158 static int get_operand_width(struct guest_info * info, struct x86_instr * instr,
258 switch (v3_get_vm_cpu_mode(info)) {
260 return (instr->prefixes.op_size) ? 4 : 2;
262 if (instr->prefixes.rex_op_size) {
270 if (info->segments.cs.db) {
272 return (instr->prefixes.op_size) ? 2 : 4;
274 return (instr->prefixes.op_size) ? 4 : 2;
277 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
282 switch (v3_get_vm_cpu_mode(info)) {
284 PrintError("Invalid instruction given operating mode (%d)\n", form);
293 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
299 switch (v3_get_vm_cpu_mode(info)) {
309 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
317 switch (v3_get_vm_cpu_mode(info)) {
327 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
334 PrintError("Unsupported instruction form %d\n", form);
344 typedef enum {INVALID_ADDR_TYPE, REG, DISP0, DISP8, DISP16, DISP32} modrm_mode_t;
345 typedef enum {INVALID_REG_SIZE, REG64, REG32, REG16, REG8} reg_size_t;
352 } __attribute__((packed));
359 } __attribute__((packed));
366 static inline int decode_gpr(struct guest_info * core,
368 struct x86_operand * reg) {
370 struct v3_gprs * gprs = &(core->vm_regs);
374 reg->operand = (addr_t)&(gprs->rax);
377 reg->operand = (addr_t)&(gprs->rcx);
380 reg->operand = (addr_t)&(gprs->rdx);
383 reg->operand = (addr_t)&(gprs->rbx);
386 if (reg->size == 1) {
387 reg->operand = (addr_t)&(gprs->rax) + 1;
389 reg->operand = (addr_t)&(gprs->rsp);
393 if (reg->size == 1) {
394 reg->operand = (addr_t)&(gprs->rcx) + 1;
396 reg->operand = (addr_t)&(gprs->rbp);
400 if (reg->size == 1) {
401 reg->operand = (addr_t)&(gprs->rdx) + 1;
403 reg->operand = (addr_t)&(gprs->rsi);
407 if (reg->size == 1) {
408 reg->operand = (addr_t)&(gprs->rbx) + 1;
410 reg->operand = (addr_t)&(gprs->rdi);
414 reg->operand = (addr_t)&(gprs->r8);
417 reg->operand = (addr_t)&(gprs->r9);
420 reg->operand = (addr_t)&(gprs->r10);
423 reg->operand = (addr_t)&(gprs->r11);
426 reg->operand = (addr_t)&(gprs->r12);
429 reg->operand = (addr_t)&(gprs->r13);
432 reg->operand = (addr_t)&(gprs->r14);
435 reg->operand = (addr_t)&(gprs->r15);
438 PrintError("Invalid Reg Code (%d)\n", reg_code);
449 static inline int decode_cr(struct guest_info * core,
451 struct x86_operand * reg) {
453 struct v3_ctrl_regs * crs = &(core->ctrl_regs);
455 // PrintDebug("\t Ctrl regs %d\n", reg_code);
459 reg->operand = (addr_t)&(crs->cr0);
462 reg->operand = (addr_t)&(crs->cr2);
465 reg->operand = (addr_t)&(crs->cr3);
468 reg->operand = (addr_t)&(crs->cr4);
472 PrintError("Invalid Reg Code (%d)\n", reg_code);
479 // This converts the displacement into the appropriate masked value
481 QUESTION: Are the register Values signed ?????
483 #define MASK_DISPLACEMENT(reg, mode) ({ \
485 if (mode == DISP8) { \
486 val = (sint8_t)(reg & 0xff); \
487 } else if (mode == DISP16) { \
488 val = (sint16_t)(reg & 0xffff); \
489 } else if (mode == DISP32) { \
490 val = (sint32_t)(reg & 0xffffffff); \
492 PrintError("Error invalid displacement size (%d)\n", mode); \
499 #define ADDR_MASK(val, length) ({ \
500 ullong_t mask = 0x0LL; \
503 mask = 0x00000000000fffffLL; \
506 mask = 0x00000000ffffffffLL; \
509 mask = 0xffffffffffffffffLL; \
517 static int decode_rm_operand16(struct guest_info * core,
518 uint8_t * modrm_instr,
519 struct x86_instr * instr,
520 struct x86_operand * operand,
521 uint8_t * reg_code) {
523 struct v3_gprs * gprs = &(core->vm_regs);
524 struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
525 addr_t base_addr = 0;
526 modrm_mode_t mod_mode = 0;
527 uint8_t * instr_cursor = modrm_instr;
529 // PrintDebug("ModRM mod=%d\n", modrm->mod);
531 *reg_code = modrm->reg;
535 if (modrm->mod == 3) {
536 //PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
537 operand->type = REG_OPERAND;
539 decode_gpr(core, modrm->rm, operand);
542 struct v3_segment * seg = NULL;
544 operand->type = MEM_OPERAND;
546 if (modrm->mod == 0) {
548 } else if (modrm->mod == 1) {
550 } else if (modrm->mod == 2) {
556 base_addr = gprs->rbx + MASK_DISPLACEMENT(gprs->rsi, mod_mode);
559 base_addr = gprs->rbx + MASK_DISPLACEMENT(gprs->rdi, mod_mode);
562 base_addr = gprs->rbp + MASK_DISPLACEMENT(gprs->rsi, mod_mode);
565 base_addr = gprs->rbp + MASK_DISPLACEMENT(gprs->rdi, mod_mode);
568 base_addr = gprs->rsi;
571 base_addr = gprs->rdi;
574 if (modrm->mod == 0) {
578 base_addr = gprs->rbp;
582 base_addr = gprs->rbx;
588 if (mod_mode == DISP8) {
589 base_addr += *(sint8_t *)instr_cursor;
591 } else if (mod_mode == DISP16) {
592 base_addr += *(sint16_t *)instr_cursor;
597 // get appropriate segment
598 if (instr->prefixes.cs_override) {
599 seg = &(core->segments.cs);
600 } else if (instr->prefixes.es_override) {
601 seg = &(core->segments.es);
602 } else if (instr->prefixes.ss_override) {
603 seg = &(core->segments.ss);
604 } else if (instr->prefixes.fs_override) {
605 seg = &(core->segments.fs);
606 } else if (instr->prefixes.gs_override) {
607 seg = &(core->segments.gs);
609 seg = &(core->segments.ds);
612 operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
613 get_addr_width(core, instr));
617 return (instr_cursor - modrm_instr);
621 // returns num_bytes parsed
622 static int decode_rm_operand32(struct guest_info * core,
623 uint8_t * modrm_instr,
624 struct x86_instr * instr,
625 struct x86_operand * operand,
626 uint8_t * reg_code) {
628 struct v3_gprs * gprs = &(core->vm_regs);
629 uint8_t * instr_cursor = modrm_instr;
630 struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
631 addr_t base_addr = 0;
632 modrm_mode_t mod_mode = 0;
633 uint_t has_sib_byte = 0;
636 *reg_code = modrm->reg;
640 if (modrm->mod == 3) {
641 operand->type = REG_OPERAND;
642 // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
644 decode_gpr(core, modrm->rm, operand);
647 struct v3_segment * seg = NULL;
649 operand->type = MEM_OPERAND;
651 if (modrm->mod == 0) {
653 } else if (modrm->mod == 1) {
655 } else if (modrm->mod == 2) {
661 base_addr = gprs->rax;
664 base_addr = gprs->rcx;
667 base_addr = gprs->rdx;
670 base_addr = gprs->rbx;
676 if (modrm->mod == 0) {
680 base_addr = gprs->rbp;
684 base_addr = gprs->rsi;
687 base_addr = gprs->rdi;
693 struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
694 int scale = 0x1 << sib->scale;
698 switch (sib->index) {
700 base_addr = gprs->rax;
703 base_addr = gprs->rcx;
706 base_addr = gprs->rdx;
709 base_addr = gprs->rbx;
715 base_addr = gprs->rbp;
718 base_addr = gprs->rsi;
721 base_addr = gprs->rdi;
730 base_addr += MASK_DISPLACEMENT(gprs->rax, mod_mode);
733 base_addr += MASK_DISPLACEMENT(gprs->rcx, mod_mode);
736 base_addr += MASK_DISPLACEMENT(gprs->rdx, mod_mode);
739 base_addr += MASK_DISPLACEMENT(gprs->rbx, mod_mode);
742 base_addr += MASK_DISPLACEMENT(gprs->rsp, mod_mode);
745 if (modrm->mod != 0) {
746 base_addr += MASK_DISPLACEMENT(gprs->rbp, mod_mode);
750 base_addr += MASK_DISPLACEMENT(gprs->rsi, mod_mode);
753 base_addr += MASK_DISPLACEMENT(gprs->rdi, mod_mode);
760 if (mod_mode == DISP8) {
761 base_addr += *(sint8_t *)instr_cursor;
763 } else if (mod_mode == DISP32) {
764 base_addr += *(sint32_t *)instr_cursor;
768 // get appropriate segment
769 if (instr->prefixes.cs_override) {
770 seg = &(core->segments.cs);
771 } else if (instr->prefixes.es_override) {
772 seg = &(core->segments.es);
773 } else if (instr->prefixes.ss_override) {
774 seg = &(core->segments.ss);
775 } else if (instr->prefixes.fs_override) {
776 seg = &(core->segments.fs);
777 } else if (instr->prefixes.gs_override) {
778 seg = &(core->segments.gs);
780 seg = &(core->segments.ds);
783 operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
784 get_addr_width(core, instr));
788 return (instr_cursor - modrm_instr);
792 int decode_rm_operand64(struct guest_info * core, uint8_t * modrm_instr,
793 struct x86_instr * instr, struct x86_operand * operand,
794 uint8_t * reg_code) {
796 struct v3_gprs * gprs = &(core->vm_regs);
797 uint8_t * instr_cursor = modrm_instr;
798 struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
799 addr_t base_addr = 0;
800 modrm_mode_t mod_mode = 0;
801 uint_t has_sib_byte = 0;
806 *reg_code = modrm->reg;
807 *reg_code |= (instr->prefixes.rex_reg << 3);
809 if (modrm->mod == 3) {
810 uint8_t rm_val = modrm->rm;
812 rm_val |= (instr->prefixes.rex_rm << 3);
814 operand->type = REG_OPERAND;
815 // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
817 decode_gpr(core, rm_val, operand);
819 struct v3_segment * seg = NULL;
820 uint8_t rm_val = modrm->rm;
822 operand->type = MEM_OPERAND;
825 if (modrm->mod == 0) {
827 } else if (modrm->mod == 1) {
829 } else if (modrm->mod == 2) {
836 rm_val |= (instr->prefixes.rex_rm << 3);
840 base_addr = gprs->rax;
843 base_addr = gprs->rcx;
846 base_addr = gprs->rdx;
849 base_addr = gprs->rbx;
852 if (modrm->mod == 0) {
856 base_addr = gprs->rbp;
860 base_addr = gprs->rsi;
863 base_addr = gprs->rdi;
866 base_addr = gprs->r8;
869 base_addr = gprs->r9;
872 base_addr = gprs->r10;
875 base_addr = gprs->r11;
878 base_addr = gprs->r12;
881 base_addr = gprs->r13;
884 base_addr = gprs->r14;
887 base_addr = gprs->r15;
896 struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
897 int scale = 0x1 << sib->scale;
898 uint8_t index_val = sib->index;
899 uint8_t base_val = sib->base;
901 index_val |= (instr->prefixes.rex_sib_idx << 3);
902 base_val |= (instr->prefixes.rex_rm << 3);
908 base_addr = gprs->rax;
911 base_addr = gprs->rcx;
914 base_addr = gprs->rdx;
917 base_addr = gprs->rbx;
923 base_addr = gprs->rbp;
926 base_addr = gprs->rsi;
929 base_addr = gprs->rdi;
932 base_addr = gprs->r8;
935 base_addr = gprs->r9;
938 base_addr = gprs->r10;
941 base_addr = gprs->r11;
944 base_addr = gprs->r12;
947 base_addr = gprs->r13;
950 base_addr = gprs->r14;
953 base_addr = gprs->r15;
962 base_addr += MASK_DISPLACEMENT(gprs->rax, mod_mode);
965 base_addr += MASK_DISPLACEMENT(gprs->rcx, mod_mode);
968 base_addr += MASK_DISPLACEMENT(gprs->rdx, mod_mode);
971 base_addr += MASK_DISPLACEMENT(gprs->rbx, mod_mode);
974 base_addr += MASK_DISPLACEMENT(gprs->rsp, mod_mode);
977 if (modrm->mod != 0) {
978 base_addr += MASK_DISPLACEMENT(gprs->rbp, mod_mode);
982 base_addr += MASK_DISPLACEMENT(gprs->rsi, mod_mode);
985 base_addr += MASK_DISPLACEMENT(gprs->rdi, mod_mode);
988 base_addr += MASK_DISPLACEMENT(gprs->r8, mod_mode);
991 base_addr += MASK_DISPLACEMENT(gprs->r9, mod_mode);
994 base_addr += MASK_DISPLACEMENT(gprs->r10, mod_mode);
997 base_addr += MASK_DISPLACEMENT(gprs->r11, mod_mode);
1000 base_addr += MASK_DISPLACEMENT(gprs->r12, mod_mode);
1003 base_addr += MASK_DISPLACEMENT(gprs->r13, mod_mode);
1006 base_addr += MASK_DISPLACEMENT(gprs->r14, mod_mode);
1009 base_addr += MASK_DISPLACEMENT(gprs->r15, mod_mode);
1016 if (mod_mode == DISP8) {
1017 base_addr += *(sint8_t *)instr_cursor;
1019 } else if (mod_mode == DISP32) {
1020 base_addr += *(sint32_t *)instr_cursor;
1026 Segments should be ignored
1027 // get appropriate segment
1028 if (instr->prefixes.cs_override) {
1029 seg = &(core->segments.cs);
1030 } else if (instr->prefixes.es_override) {
1031 seg = &(core->segments.es);
1032 } else if (instr->prefixes.ss_override) {
1033 seg = &(core->segments.ss);
1034 } else if (instr->prefixes.fs_override) {
1035 seg = &(core->segments.fs);
1036 } else if (instr->prefixes.gs_override) {
1037 seg = &(core->segments.gs);
1039 seg = &(core->segments.ds);
1043 operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
1044 get_addr_width(core, instr));
1048 return (instr_cursor - modrm_instr);
1054 static int decode_rm_operand(struct guest_info * core,
1055 uint8_t * instr_ptr, // input
1057 struct x86_instr * instr,
1058 struct x86_operand * operand,
1059 uint8_t * reg_code) {
1061 v3_cpu_mode_t mode = v3_get_vm_cpu_mode(core);
1063 operand->size = get_operand_width(core, instr, form);
1067 return decode_rm_operand16(core, instr_ptr, instr, operand, reg_code);
1069 if (instr->prefixes.rex_op_size) {
1070 return decode_rm_operand64(core, instr_ptr, instr, operand, reg_code);
1074 case LONG_32_COMPAT:
1075 return decode_rm_operand32(core, instr_ptr, instr, operand, reg_code);
1077 PrintError("Invalid CPU_MODE (%d)\n", mode);
1084 static inline op_form_t op_code_to_form_0f(uint8_t * instr, int * length) {
1089 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[2]);
1091 switch (modrm->reg) {
1099 return INVALID_INSTR;
1160 return INVALID_INSTR;
1165 static op_form_t op_code_to_form(uint8_t * instr, int * length) {
1189 return op_code_to_form_0f(instr, length);
1229 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1231 switch (modrm->reg) {
1245 return INVALID_INSTR;
1249 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1251 switch (modrm->reg) {
1265 return INVALID_INSTR;
1269 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1271 switch (modrm->reg) {
1273 return ADD_IMM2SX_8;
1277 return ADC_IMM2SX_8;
1279 return AND_IMM2SX_8;
1281 return SUB_IMM2SX_8;
1283 return XOR_IMM2SX_8;
1285 return INVALID_INSTR;
1314 return MOV_MEM2AL_8;
1318 return MOV_AL2MEM_8;
1342 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1344 switch (modrm->reg) {
1350 return INVALID_INSTR;
1354 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1356 switch (modrm->reg) {
1362 return INVALID_INSTR;
1368 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1370 switch (modrm->reg) {
1376 return INVALID_INSTR;
1381 struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
1383 switch (modrm->reg) {
1389 return INVALID_INSTR;
1394 return INVALID_INSTR;
1400 static char * op_form_to_str(op_form_t form) {
1403 case LMSW: return "LMSW";
1404 case SMSW: return "SMSW";
1405 case CLTS: return "CLTS";
1406 case INVLPG: return "INVLPG";
1407 case MOV_CR2: return "MOV_CR2";
1408 case MOV_2CR: return "MOV_2CR";
1409 case MOV_DR2: return "MOV_DR2";
1410 case MOV_2DR: return "MOV_2DR";
1411 case MOV_SR2: return "MOV_SR2";
1412 case MOV_2SR: return "MOV_2SR";
1413 case MOV_MEM2_8: return "MOV_MEM2_8";
1414 case MOV_MEM2: return "MOV_MEM2";
1415 case MOV_2MEM_8: return "MOV_2MEM_8";
1416 case MOV_2MEM: return "MOV_2MEM";
1417 case MOV_MEM2AL_8: return "MOV_MEM2AL_8";
1418 case MOV_MEM2AX: return "MOV_MEM2AX";
1419 case MOV_AL2MEM_8: return "MOV_AL2MEM_8";
1420 case MOV_AX2MEM: return "MOV_AX2MEM";
1421 case MOV_IMM2_8: return "MOV_IMM2_8";
1422 case MOV_IMM2: return "MOV_IMM2";
1423 case MOVS_8: return "MOVS_8";
1424 case MOVS: return "MOVS";
1425 case MOVSX_8: return "MOVSX_8";
1426 case MOVSX: return "MOVSX";
1427 case MOVZX_8: return "MOVZX_8";
1428 case MOVZX: return "MOVZX";
1429 case HLT: return "HLT";
1430 case PUSHF: return "PUSHF";
1431 case POPF: return "POPF";
1432 case ADC_2MEM_8: return "ADC_2MEM_8";
1433 case ADC_2MEM: return "ADC_2MEM";
1434 case ADC_MEM2_8: return "ADC_MEM2_8";
1435 case ADC_MEM2: return "ADC_MEM2";
1436 case ADC_IMM2_8: return "ADC_IMM2_8";
1437 case ADC_IMM2: return "ADC_IMM2";
1438 case ADC_IMM2SX_8: return "ADC_IMM2SX_8";
1439 case ADD_IMM2_8: return "ADD_IMM2_8";
1440 case ADD_IMM2: return "ADD_IMM2";
1441 case ADD_IMM2SX_8: return "ADD_IMM2SX_8";
1442 case ADD_2MEM_8: return "ADD_2MEM_8";
1443 case ADD_2MEM: return "ADD_2MEM";
1444 case ADD_MEM2_8: return "ADD_MEM2_8";
1445 case ADD_MEM2: return "ADD_MEM2";
1446 case AND_MEM2_8: return "AND_MEM2_8";
1447 case AND_MEM2: return "AND_MEM2";
1448 case AND_2MEM_8: return "AND_2MEM_8";
1449 case AND_2MEM: return "AND_2MEM";
1450 case AND_IMM2_8: return "AND_IMM2_8";
1451 case AND_IMM2: return "AND_IMM2";
1452 case AND_IMM2SX_8: return "AND_IMM2SX_8";
1453 case OR_2MEM_8: return "OR_2MEM_8";
1454 case OR_2MEM: return "OR_2MEM";
1455 case OR_MEM2_8: return "OR_MEM2_8";
1456 case OR_MEM2: return "OR_MEM2";
1457 case OR_IMM2_8: return "OR_IMM2_8";
1458 case OR_IMM2: return "OR_IMM2";
1459 case OR_IMM2SX_8: return "OR_IMM2SX_8";
1460 case SUB_2MEM_8: return "SUB_2MEM_8";
1461 case SUB_2MEM: return "SUB_2MEM";
1462 case SUB_MEM2_8: return "SUB_MEM2_8";
1463 case SUB_MEM2: return "SUB_MEM2";
1464 case SUB_IMM2_8: return "SUB_IMM2_8";
1465 case SUB_IMM2: return "SUB_IMM2";
1466 case SUB_IMM2SX_8: return "SUB_IMM2SX_8";
1467 case XOR_2MEM_8: return "XOR_2MEM_8";
1468 case XOR_2MEM: return "XOR_2MEM";
1469 case XOR_MEM2_8: return "XOR_MEM2_8";
1470 case XOR_MEM2: return "XOR_MEM2";
1471 case XOR_IMM2_8: return "XOR_IMM2_8";
1472 case XOR_IMM2: return "XOR_IMM2";
1473 case XOR_IMM2SX_8: return "XOR_IMM2SX_8";
1474 case INC_8: return "INC_8";
1475 case INC: return "INC";
1476 case DEC_8: return "DEC_8";
1477 case DEC: return "DEC";
1478 case NEG_8: return "NEG_8";
1479 case NEG: return "NEG";
1480 case NOT_8: return "NOT_8";
1481 case NOT: return "NOT";
1482 case XCHG_8: return "XCHG_8";
1483 case XCHG: return "XCHG";
1484 case SETB: return "SETB";
1485 case SETBE: return "SETBE";
1486 case SETL: return "SETL";
1487 case SETLE: return "SETLE";
1488 case SETNB: return "SETNB";
1489 case SETNBE: return "SETNBE";
1490 case SETNL: return "SETNL";
1491 case SETNLE: return "SETNLE";
1492 case SETNO: return "SETNO";
1493 case SETNP: return "SETNP";
1494 case SETNS: return "SETNS";
1495 case SETNZ: return "SETNZ";
1496 case SETP: return "SETP";
1497 case SETS: return "SETS";
1498 case SETZ: return "SETZ";
1499 case SETO: return "SETO";
1500 case STOS_8: return "STOS_8";
1501 case STOS: return "STOS";
1505 return "INVALID_INSTR";