Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


Merge branch 'devel'
[palacios.git] / kitten / include / arch-x86_64 / idt_vectors.h
1 #ifndef _ARCH_X86_64_IDT_VECTORS_H
2 #define _ARCH_X86_64_IDT_VECTORS_H
3
4 /*
5  * Based on linux/include/asm-x86_64/hw_irq.h
6  * Original file header:
7  *     (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8  *     moved some of the old arch/i386/kernel/irq.h to here. VY
9  *     IRQ/IPI changes taken from work by Thomas Radke
10  *     <tomsoft@informatik.tu-chemnitz.de>
11  *     hacked by Andi Kleen for x86-64.
12  */
13
14 /**
15  * This file defines symbolic names for interrupt vectors installed in the
16  * Interrupt Descriptor Table (IDT). The IDT contains entries for 256 interrupt
17  * vectors.  Vectors [0,31] are used for specific purposes defined by the x86_64
18  * architecture.  Vectors [32,255] are available for external interrupts. The
19  * LWK uses a number of interrupt vectors for its own internal purposes, e.g.,
20  * inter-processor interrupts for TLB invalidations.
21  */
22
23 /*
24  * [0,31] Standard x86_64 architecture vectors
25  */
26 #define DIVIDE_ERROR_VECTOR                     0
27 #define DEBUG_VECTOR                            1
28 #define NMI_VECTOR                              2
29 #define INT3_VECTOR                             3
30 #define OVERFLOW_VECTOR                         4
31 #define BOUNDS_VECTOR                           5
32 #define INVALID_OP_VECTOR                       6
33 #define DEVICE_NOT_AVAILABLE_VECTOR             7
34 #define DOUBLE_FAULT_VECTOR                     8
35 #define COPROC_SEGMENT_OVERRUN_VECTOR           9
36 #define INVALID_TSS_VECTOR                      10
37 #define SEGMENT_NOT_PRESENT_VECTOR              11
38 #define STACK_SEGMENT_VECTOR                    12
39 #define GENERAL_PROTECTION_VECTOR               13
40 #define PAGE_FAULT_VECTOR                       14
41 #define SPURIOUS_INTERRUPT_BUG_VECTOR           15
42 #define COPROCESSOR_ERROR_VECTOR                16
43 #define ALIGNMENT_CHECK_VECTOR                  17
44 #define MACHINE_CHECK_VECTOR                    18
45 #define SIMD_COPROCESSOR_ERROR_VECTOR           19
46 /*
47  * [20,31] Reserved by x86_64 architecture for future use
48  * [32,47] Free for use by devices
49  * [48,63] Standard ISA IRQs
50  */
51 #define IRQ0_VECTOR                             48
52 #define IRQ1_VECTOR                             49
53 #define IRQ2_VECTOR                             50
54 #define IRQ3_VECTOR                             51
55 #define IRQ4_VECTOR                             52
56 #define IRQ5_VECTOR                             53
57 #define IRQ6_VECTOR                             54
58 #define IRQ7_VECTOR                             55
59 #define IRQ8_VECTOR                             56
60 #define IRQ9_VECTOR                             57
61 #define IRQ10_VECTOR                            58
62 #define IRQ11_VECTOR                            59
63 #define IRQ12_VECTOR                            60
64 #define IRQ13_VECTOR                            61
65 #define IRQ14_VECTOR                            62
66 #define IRQ15_VECTOR                            63
67 /*
68  * [64,238]  Free for use by devices
69  * [239,255] Used by LWK for various internal purposes
70  */
71 #define APIC_TIMER_VECTOR                       239
72 #define INVALIDATE_TLB_0_VECTOR                 240
73 #define INVALIDATE_TLB_1_VECTOR                 241
74 #define INVALIDATE_TLB_2_VECTOR                 242
75 #define INVALIDATE_TLB_3_VECTOR                 243
76 #define INVALIDATE_TLB_4_VECTOR                 244
77 #define INVALIDATE_TLB_5_VECTOR                 245
78 #define INVALIDATE_TLB_6_VECTOR                 246
79 #define INVALIDATE_TLB_7_VECTOR                 247
80 /* 248 is available */
81 #define APIC_PERF_COUNTER_VECTOR                249
82 #define APIC_THERMAL_VECTOR                     250
83 /* 251 is available */
84 #define XCALL_FUNCTION_VECTOR                   252
85 #define XCALL_RESCHEDULE_VECTOR                 253
86 #define APIC_ERROR_VECTOR                       254
87 #define APIC_SPURIOUS_VECTOR                    255
88
89 /**
90  * Meta-defines describing the interrupt vector space defined above.
91  */
92 #define NUM_IDT_ENTRIES                         256
93 #define FIRST_EXTERNAL_VECTOR                   32
94 #define FIRST_SYSTEM_VECTOR                     239
95 #define INVALIDATE_TLB_VECTOR_START             240
96 #define INVALIDATE_TLB_VECTOR_END               247
97 #define NUM_INVALIDATE_TLB_VECTORS              8
98
99 #endif