kitten/include/arch-x86_64/apicdef.h

   1 #ifndef __ASM_APICDEF_H
   2 #define __ASM_APICDEF_H
   3
   4 /*
   5  * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)
   6  *
   7  * Alan Cox <Alan.Cox@linux.org>, 1995.
   8  * Ingo Molnar <mingo@redhat.com>, 1999, 2000
   9  */
  10
  11 #define         APIC_DEFAULT_PHYS_BASE  0xfee00000
  12
  13 #define         APIC_ID         0x20
  14 #define                 APIC_ID_MASK            (0xFFu<<24)
  15 #define                 GET_APIC_ID(x)          (((x)>>24)&0xFFu)
  16 #define                 SET_APIC_ID(x)          (((x)<<24))
  17 #define         APIC_LVR        0x30
  18 #define                 APIC_LVR_MASK           0xFF00FF
  19 #define                 GET_APIC_VERSION(x)     ((x)&0xFFu)
  20 #define                 GET_APIC_MAXLVT(x)      (((x)>>16)&0xFFu)
  21 #define                 APIC_INTEGRATED(x)      ((x)&0xF0u)
  22 #define         APIC_TASKPRI    0x80
  23 #define                 APIC_TPRI_MASK          0xFFu
  24 #define         APIC_ARBPRI     0x90
  25 #define                 APIC_ARBPRI_MASK        0xFFu
  26 #define         APIC_PROCPRI    0xA0
  27 #define         APIC_EOI        0xB0
  28 #define                 APIC_EIO_ACK            0x0             /* Write this to the EOI register */
  29 #define         APIC_RRR        0xC0
  30 #define         APIC_LDR        0xD0
  31 #define                 APIC_LDR_MASK           (0xFFu<<24)
  32 #define                 GET_APIC_LOGICAL_ID(x)  (((x)>>24)&0xFFu)
  33 #define                 SET_APIC_LOGICAL_ID(x)  (((x)<<24))
  34 #define                 APIC_ALL_CPUS           0xFFu
  35 #define         APIC_DFR        0xE0
  36 #define                 APIC_DFR_CLUSTER                0x0FFFFFFFul
  37 #define                 APIC_DFR_FLAT                   0xFFFFFFFFul
  38 #define         APIC_SPIV       0xF0
  39 #define                 APIC_SPIV_FOCUS_DISABLED        (1<<9)
  40 #define                 APIC_SPIV_APIC_ENABLED          (1<<8)
  41 #define         APIC_ISR        0x100
  42 #define         APIC_ISR_NR     0x8     /* Number of 32 bit ISR registers. */
  43 #define         APIC_TMR        0x180
  44 #define         APIC_IRR        0x200
  45 #define         APIC_ESR        0x280
  46 #define                 APIC_ESR_SEND_CS        0x00001
  47 #define                 APIC_ESR_RECV_CS        0x00002
  48 #define                 APIC_ESR_SEND_ACC       0x00004
  49 #define                 APIC_ESR_RECV_ACC       0x00008
  50 #define                 APIC_ESR_SENDILL        0x00020
  51 #define                 APIC_ESR_RECVILL        0x00040
  52 #define                 APIC_ESR_ILLREGA        0x00080
  53 #define         APIC_ICR        0x300
  54 #define                 APIC_DEST_SELF          0x40000
  55 #define                 APIC_DEST_ALLINC        0x80000
  56 #define                 APIC_DEST_ALLBUT        0xC0000
  57 #define                 APIC_ICR_RR_MASK        0x30000
  58 #define                 APIC_ICR_RR_INVALID     0x00000
  59 #define                 APIC_ICR_RR_INPROG      0x10000
  60 #define                 APIC_ICR_RR_VALID       0x20000
  61 #define                 APIC_INT_LEVELTRIG      0x08000
  62 #define                 APIC_INT_ASSERT         0x04000
  63 #define                 APIC_ICR_BUSY           0x01000
  64 #define                 APIC_DEST_LOGICAL       0x00800
  65 #define                 APIC_DEST_PHYSICAL      0x00000
  66 #define                 APIC_DM_FIXED           0x00000
  67 #define                 APIC_DM_LOWEST          0x00100
  68 #define                 APIC_DM_SMI             0x00200
  69 #define                 APIC_DM_REMRD           0x00300
  70 #define                 APIC_DM_NMI             0x00400
  71 #define                 APIC_DM_INIT            0x00500
  72 #define                 APIC_DM_STARTUP         0x00600
  73 #define                 APIC_DM_EXTINT          0x00700
  74 #define                 APIC_VECTOR_MASK        0x000FF
  75 #define         APIC_ICR2       0x310
  76 #define                 GET_APIC_DEST_FIELD(x)  (((x)>>24)&0xFF)
  77 #define                 SET_APIC_DEST_FIELD(x)  ((x)<<24)
  78 #define         APIC_LVTT       0x320
  79 #define         APIC_LVTTHMR    0x330
  80 #define         APIC_LVTPC      0x340
  81 #define         APIC_LVT0       0x350
  82 #define                 APIC_LVT_TIMER_BASE_MASK        (0x3<<18)
  83 #define                 GET_APIC_TIMER_BASE(x)          (((x)>>18)&0x3)
  84 #define                 SET_APIC_TIMER_BASE(x)          (((x)<<18))
  85 #define                 APIC_TIMER_BASE_CLKIN           0x0
  86 #define                 APIC_TIMER_BASE_TMBASE          0x1
  87 #define                 APIC_TIMER_BASE_DIV             0x2
  88 #define                 APIC_LVT_TIMER_PERIODIC         (1<<17)
  89 #define                 APIC_LVT_MASKED                 (1<<16)
  90 #define                 APIC_LVT_LEVEL_TRIGGER          (1<<15)
  91 #define                 APIC_LVT_REMOTE_IRR             (1<<14)
  92 #define                 APIC_INPUT_POLARITY             (1<<13)
  93 #define                 APIC_SEND_PENDING               (1<<12)
  94 #define                 APIC_MODE_MASK                  0x700
  95 #define                 GET_APIC_DELIVERY_MODE(x)       (((x)>>8)&0x7)
  96 #define                 SET_APIC_DELIVERY_MODE(x,y)     (((x)&~0x700)|((y)<<8))
  97 #define                         APIC_MODE_FIXED         0x0
  98 #define                         APIC_MODE_NMI           0x4
  99 #define                         APIC_MODE_EXTINT        0x7
 100 #define         APIC_LVT1       0x360
 101 #define         APIC_LVTERR     0x370
 102 #define         APIC_TMICT      0x380
 103 #define         APIC_TMCCT      0x390
 104 #define         APIC_TDCR       0x3E0
 105 #define                 APIC_TDR_DIV_TMBASE     (1<<2)
 106 #define                 APIC_TDR_DIV_1          0xB
 107 #define                 APIC_TDR_DIV_2          0x0
 108 #define                 APIC_TDR_DIV_4          0x1
 109 #define                 APIC_TDR_DIV_8          0x2
 110 #define                 APIC_TDR_DIV_16         0x3
 111 #define                 APIC_TDR_DIV_32         0x8
 112 #define                 APIC_TDR_DIV_64         0x9
 113 #define                 APIC_TDR_DIV_128        0xA
 114
 115 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
 116
 117 #define MAX_IO_APICS 16
 118 #define MAX_LOCAL_APIC 256
 119
 120 /*
 121  * All x86-64 systems are xAPIC compatible.
 122  * In the following, "apicid" is a physical APIC ID.
 123  */
 124 #define XAPIC_DEST_CPUS_SHIFT   4
 125 #define XAPIC_DEST_CPUS_MASK    ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
 126 #define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
 127 #define APIC_CLUSTER(apicid)    ((apicid) & XAPIC_DEST_CLUSTER_MASK)
 128 #define APIC_CLUSTERID(apicid)  (APIC_CLUSTER(apicid) >> XAPIC_DEST_CPUS_SHIFT)
 129 #define APIC_CPUID(apicid)      ((apicid) & XAPIC_DEST_CPUS_MASK)
 130 #define NUM_APIC_CLUSTERS       ((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)
 131
 132 #define BAD_APICID 0xFFu
 133
 134 #endif