Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


Merge branch 'devel'
[palacios-OLD.git] / kitten / arch / x86_64 / Kconfig
diff --git a/kitten/arch/x86_64/Kconfig b/kitten/arch/x86_64/Kconfig
new file mode 100644 (file)
index 0000000..ba47c68
--- /dev/null
@@ -0,0 +1,117 @@
+mainmenu "Kitten Kernel Configuration"
+
+config x86_64
+       bool
+       default y
+       help
+         Support for the x86-64 architecture.
+
+source "init/Kconfig"
+
+menu "Target Configuration"
+
+choice
+       prompt "System Architecture"
+       default PC
+
+config PC
+        bool "PC-compatible"
+        help
+         Support for standard PC compatible systems.
+
+config CRAY_XT
+        bool "Red Storm (Cray XT3/XT4)"
+         help
+         Support for Cray XT3 and XT4 systems.
+
+endchoice
+
+
+choice
+       prompt "Processor Family"
+       default MK8
+
+config MK8
+       bool "AMD-Opteron/Athlon64"
+       help
+         Optimize for AMD Opteron/Athlon64/Hammer/K8 CPUs.
+
+config MPSC
+       bool "Intel-64/Core2"
+       help
+         Optimize for Intel 64 architecture.
+
+config GENERIC_CPU
+       bool "Generic-x86-64"
+       help
+         Generic x86-64 CPU.
+
+endchoice
+
+config V3VEE
+       bool "V3Vee abstraction layer"
+       default "n"
+       help
+         V3Vee guest OS instead of ELF image
+
+#
+# Define implied options from the CPU selection
+#
+
+config X86_L1_CACHE_BYTES
+        int
+        default "128" if GENERIC_CPU || MPSC
+        default "64" if MK8
+
+config X86_L1_CACHE_SHIFT
+        int
+        default "7" if GENERIC_CPU || MPSC
+        default "6" if MK8
+
+config X86_INTERNODE_CACHE_BYTES
+       int
+       default X86_L1_CACHE_BYTES
+
+config X86_INTERNODE_CACHE_SHIFT
+       int
+       default X86_L1_CACHE_SHIFT
+
+config NR_CPUS
+        int "Maximum number of CPUs (2-256)"
+        range 1 255
+        default "8"
+        help
+          This allows you to specify the maximum number of CPUs which this
+          kernel will support. Current maximum is 256 CPUs due to
+          APIC addressing limits. Less depending on the hardware.
+
+          This is purely to save memory - each supported CPU requires
+          memory in the static kernel configuration.
+
+#
+# Physical address where the kernel is loaded
+#
+config PHYSICAL_START
+       hex "Physical address for kernel load"
+       default "0x200000"
+
+
+
+config VGA_CONSOLE
+       bool "VGA console"
+       default "y" if PC
+
+config SERIAL_CONSOLE
+       bool "Serial console support"
+       default "y" if PC
+
+config RCAL0_CONSOLE
+       bool "Cray XT3 L0 console support"
+       default "y" if CRAY_XT
+       default "n"
+
+
+
+endmenu
+
+source "arch/x86_64/Kconfig.debug"