PrintDebug("IN of %d bytes on port %d (0x%x)\n", read_size, io_info->port, io_info->port);
if (hook == NULL) {
- PrintDebug("IN operation on unhooked IO port 0x%x\n", io_info->port);
+ PrintDebug("IN operation on unhooked IO port 0x%x - returning zero\n", io_info->port);
+ core->vm_regs.rax >>= 8*read_size;
+ core->vm_regs.rax <<= 8*read_size;
- /* What are the HW semantics for an IN on an invalid port?
- * Do we need to clear the register value or leave it untouched???
- */
} else {
if (hook->read(core, io_info->port, &(core->vm_regs.rax), read_size, hook->priv_data) != read_size) {
// not sure how we handle errors.....
}
if (hook == NULL) {
- PrintDebug("INS operation on unhooked IO port 0x%x\n", io_info->port);
- /* What are the HW semantics for an INS on an invalid port?
- * Do we need to clear the memory region or leave it untouched???
- */
+ PrintDebug("INS operation on unhooked IO port 0x%x - returning zeros\n", io_info->port);
+ memset((char*)host_addr,0,read_size);
+
} else {
if (hook->read(core, io_info->port, (char *)host_addr, read_size, hook->priv_data) != read_size) {
// not sure how we handle errors.....
PrintDebug("OUT of %d bytes on port %d (0x%x)\n", write_size, io_info->port, io_info->port);
if (hook == NULL) {
- PrintDebug("OUT operation on unhooked IO port 0x%x\n", io_info->port);
+ PrintDebug("OUT operation on unhooked IO port 0x%x - ignored\n", io_info->port);
} else {
if (hook->write(core, io_info->port, &(core->vm_regs.rax), write_size, hook->priv_data) != write_size) {
// not sure how we handle errors.....
}
if (hook == NULL) {
- PrintDebug("OUTS operation on unhooked IO port 0x%x\n", io_info->port);
+ PrintDebug("OUTS operation on unhooked IO port 0x%x - ignored\n", io_info->port);
} else {
if (hook->write(core, io_info->port, (char*)host_addr, write_size, hook->priv_data) != write_size) {
// not sure how we handle errors.....
PrintDebug("IN of %d bytes on port %d (0x%x)\n", read_size, io_qual.port, io_qual.port);
if (hook == NULL) {
- PrintDebug("IN operation on unhooked IO port 0x%x\n", io_qual.port);
+ PrintDebug("IN operation on unhooked IO port 0x%x - returning zeros\n", io_qual.port);
+ core->vm_regs.rax >>= 8*read_size;
+ core->vm_regs.rax <<= 8*read_size;
- /* What are the HW semantics for an IN on an invalid port?
- * Do we need to clear the register value or leave it untouched???
- */
} else {
if (hook->read(core, io_qual.port, &(core->vm_regs.rax), read_size, hook->priv_data) != read_size) {
PrintError("Read failure for IN on port %x\n", io_qual.port);
do {
if (hook == NULL) {
- PrintDebug("INS operation on unhooked IO port 0x%x\n", io_qual.port);
+ PrintDebug("INS operation on unhooked IO port 0x%x - returning zeros\n", io_qual.port);
- /* What are the HW semantics for an INS on an invalid port?
- * Do we need to clear the memory region or leave it untouched???
- */
+ memset((char*)host_addr,0,read_size);
+
} else {
if (hook->read(core, io_qual.port, (char *)host_addr, read_size, hook->priv_data) != read_size) {
PrintError("Read Failure for INS on port 0x%x\n", io_qual.port);
PrintDebug("OUT of %d bytes on port %d (0x%x)\n", write_size, io_qual.port, io_qual.port);
if (hook == NULL) {
- PrintDebug("OUT operation on unhooked IO port 0x%x\n", io_qual.port);
+ PrintDebug("OUT operation on unhooked IO port 0x%x - ignored\n", io_qual.port);
} else {
if (hook->write(core, io_qual.port, &(core->vm_regs.rax), write_size, hook->priv_data) != write_size) {
PrintError("Write failure for out on port %x\n",io_qual.port);
do {
if (hook == NULL) {
- PrintDebug("OUTS operation on unhooked IO port 0x%x\n", io_qual.port);
+ PrintDebug("OUTS operation on unhooked IO port 0x%x - ignored\n", io_qual.port);
} else {
if (hook->write(core, io_qual.port, (char *)host_addr, write_size, hook->priv_data) != write_size) {
PrintError("Read failure for INS on port 0x%x\n", io_qual.port);