#define PT32_PAGE_OFFSET(x) (((uint_t)x) & 0xfff)
#define PT32_PAGE_POWER 12
+#define PD32_4MB_PAGE_ADDR(x) (((uint_t)x) & 0xffc00000)
+#define PD32_4MB_PAGE_OFFSET(x) (((uint_t)x) & 0x003fffff)
/* The following should be phased out */
#define PAGE_OFFSET(x) ((((uint_t)x) & 0xfff))
+
#define CR3_TO_PDE32(cr3) (((ulong_t)cr3) & 0xfffff000)
#define CR3_TO_PDPTRE(cr3) (((ulong_t)cr3) & 0xffffffe0)
#define CR3_TO_PML4E64(cr3) (((ullong_t)cr3) & 0x000ffffffffff000LL)
/* Accessor functions for the page table structures */
#define PDE32_T_ADDR(x) (((x).pt_base_addr) << 12)
#define PTE32_T_ADDR(x) (((x).page_base_addr) << 12)
-
+#define PDE32_4MB_T_ADDR(x) (((x).page_base_addr) << 22)
/* Page Table Flag Values */
#define PT32_HOOK 0x1
uint_t global_page : 1;
uint_t vmm_info : 3;
uint_t pat : 1;
- uint_t page_base_addr_lo: 8;
- uint_t zero : 1;
- uint_t page_base_addr_hi: 10;
+ uint_t rsvd : 9;
+ uint_t page_base_addr : 10;
} pde32_4MB_t;
/* JRL FIXME:
* This should be somewhere else....
*/
- addr_t tmp_addr;
+ /*
+ addr_t tmp_addr;
addr_t shadow_pde = CR3_TO_PDE32(guest_info->shdw_pg_state.shadow_cr3);
return bytes_read;
}
}
+*/
/* JRL: END GRUESOME HACK */
- /*
- if (guest_va_to_host_va(guest_info, cursor, &host_addr) != 0) {
+
+ if (guest_va_to_host_va(guest_info, cursor, &host_addr) != 0) {
PrintDebug("Invalid GVA(%x)->HVA lookup\n", cursor);
return bytes_read;
- }
- */
+ }
+
memcpy(dest + bytes_read, (void*)host_addr, bytes_to_copy);
*entry = 0;
return PDE32_ENTRY_NOT_PRESENT;
} else {
- *entry = PAGE_ADDR(pde_entry->pt_base_addr);
-
+
if (pde_entry->large_page) {
- *entry += PAGE_OFFSET(addr);
+ pde32_4MB_t * large_pde = (pde32_4MB_t *)pde_entry;
+
+ *entry = PDE32_4MB_T_ADDR(*large_pde);
+ *entry += PD32_4MB_PAGE_OFFSET(addr);
return PDE32_ENTRY_LARGE_PAGE;
} else {
*entry = PDE32_T_ADDR(*pde_entry);
return 0;
}
+
+ // Check that the Guest PDE entry points to valid memory
+ // else Machine Check the guest
+
shadow_pde_access = can_access_pde32(shadow_pde, fault_addr, error_code);