# This section defines programs that are used to build GeekOS.
# ----------------------------------------------------------------------
+
+V3_ARCH := __V3_32BIT__
+#V3_ARCH := __V3_64BIT__
+
# Uncomment if cross compiling
TARGET_CC_PREFIX := $(PROJECT_ROOT)/../devtools/i386/bin/i386-elf-
#TARGET_CC_PREFIX := i386-elf-
CC_GENERAL_OPTS := $(GENERAL_OPTS) -Werror
# Flags used for VMM C source files
-CC_VMM_OPTS := -g -I$(PROJECT_ROOT)/include -D__V3VEE__ -D__V3_32BIT__ $(DECODER_FLAGS) $(JRLDEBUG)
+CC_VMM_OPTS := -g -I$(PROJECT_ROOT)/include -D__V3VEE__ -D$(V3_ARCH) $(DECODER_FLAGS) $(JRLDEBUG)
# Flags used for VMM C ASM files
NASM_VMM_OPTS := -I$(PROJECT_ROOT)/src/palacios/ -f elf $(EXTRA_NASM_OPTS)
#ifdef __V3VEE__
#include <palacios/vmm_types.h>
-#ifdef __V3_32BIT__
+
typedef long off_t;
typedef sint32_t ssize_t;
typedef unsigned int rd_bool;
typedef ushort_t Bit16u;
typedef uint32_t Bit32u;
typedef uint64_t Bit64u;
-#endif
+
#define MAX_ATA_CHANNEL 4
-int read_guest_va_memory(struct guest_info * guest_info, addr_t guest_va, int count, char * dest);
-int read_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, char * dest);
-int write_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, char * src);
+int read_guest_va_memory(struct guest_info * guest_info, addr_t guest_va, int count, uchar_t * dest);
+int read_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, uchar_t * dest);
+int write_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, uchar_t * src);
// TODO int write_guest_va_memory(struct guest_info * guest_info, addr_t guest_va, int count, char * src);
struct Ctrl_Registers {
- uint_t cr0 : 1 PACKED;
- uint_t cr1 : 1 PACKED;
- uint_t cr2 : 1 PACKED;
- uint_t cr3 : 1 PACKED;
- uint_t cr4 : 1 PACKED;
- uint_t cr5 : 1 PACKED;
- uint_t cr6 : 1 PACKED;
- uint_t cr7 : 1 PACKED;
- uint_t cr8 : 1 PACKED;
- uint_t cr9 : 1 PACKED;
- uint_t cr10 : 1 PACKED;
- uint_t cr11 : 1 PACKED;
- uint_t cr12 : 1 PACKED;
- uint_t cr13 : 1 PACKED;
- uint_t cr14 : 1 PACKED;
- uint_t cr15 : 1 PACKED;
-};
+ uint_t cr0 : 1;
+ uint_t cr1 : 1;
+ uint_t cr2 : 1;
+ uint_t cr3 : 1;
+ uint_t cr4 : 1;
+ uint_t cr5 : 1;
+ uint_t cr6 : 1;
+ uint_t cr7 : 1;
+ uint_t cr8 : 1;
+ uint_t cr9 : 1;
+ uint_t cr10 : 1;
+ uint_t cr11 : 1;
+ uint_t cr12 : 1;
+ uint_t cr13 : 1;
+ uint_t cr14 : 1;
+ uint_t cr15 : 1;
+} __attribute__((packed));
struct Debug_Registers {
- uint_t dr0 : 1 PACKED;
- uint_t dr1 : 1 PACKED;
- uint_t dr2 : 1 PACKED;
- uint_t dr3 : 1 PACKED;
- uint_t dr4 : 1 PACKED;
- uint_t dr5 : 1 PACKED;
- uint_t dr6 : 1 PACKED;
- uint_t dr7 : 1 PACKED;
- uint_t dr8 : 1 PACKED;
- uint_t dr9 : 1 PACKED;
- uint_t dr10 : 1 PACKED;
- uint_t dr11 : 1 PACKED;
- uint_t dr12 : 1 PACKED;
- uint_t dr13 : 1 PACKED;
- uint_t dr14 : 1 PACKED;
- uint_t dr15 : 1 PACKED;
-};
+ uint_t dr0 : 1;
+ uint_t dr1 : 1;
+ uint_t dr2 : 1;
+ uint_t dr3 : 1;
+ uint_t dr4 : 1;
+ uint_t dr5 : 1;
+ uint_t dr6 : 1;
+ uint_t dr7 : 1;
+ uint_t dr8 : 1;
+ uint_t dr9 : 1;
+ uint_t dr10 : 1;
+ uint_t dr11 : 1;
+ uint_t dr12 : 1;
+ uint_t dr13 : 1;
+ uint_t dr14 : 1;
+ uint_t dr15 : 1;
+} __attribute__((packed));
struct Exception_Vectors {
- uint_t de : 1 PACKED; // (0) divide by zero
- uint_t db : 1 PACKED; // (1) Debug
- uint_t nmi : 1 PACKED; // (2) Non-maskable interrupt
- uint_t bp : 1 PACKED; // (3) Breakpoint
- uint_t of : 1 PACKED; // (4) Overflow
- uint_t br : 1 PACKED; // (5) Bound-Range
- uint_t ud : 1 PACKED; // (6) Invalid-Opcode
- uint_t nm : 1 PACKED; // (7) Device-not-available
- uint_t df : 1 PACKED; // (8) Double Fault
- uint_t ex9 : 1 PACKED;
- uint_t ts : 1 PACKED; // (10) Invalid TSS
- uint_t np : 1 PACKED; // (11) Segment-not-present
- uint_t ss : 1 PACKED; // (12) Stack
- uint_t gp : 1 PACKED; // (13) General Protection Fault
- uint_t pf : 1 PACKED; // (14) Page fault
- uint_t ex15 : 1 PACKED;
- uint_t mf : 1 PACKED; // (15) Floating point exception
- uint_t ac : 1 PACKED; // (16) Alignment-check
- uint_t mc : 1 PACKED; // (17) Machine Check
- uint_t xf : 1 PACKED; // (18) SIMD floating-point
- uint_t ex20 : 1 PACKED;
- uint_t ex21 : 1 PACKED;
- uint_t ex22 : 1 PACKED;
- uint_t ex23 : 1 PACKED;
- uint_t ex24 : 1 PACKED;
- uint_t ex25 : 1 PACKED;
- uint_t ex26 : 1 PACKED;
- uint_t ex27 : 1 PACKED;
- uint_t ex28 : 1 PACKED;
- uint_t ex29 : 1 PACKED;
- uint_t sx : 1 PACKED; // (30) Security Exception
- uint_t ex31 : 1 PACKED;
-};
+ uint_t de : 1; // (0) divide by zero
+ uint_t db : 1; // (1) Debug
+ uint_t nmi : 1; // (2) Non-maskable interrupt
+ uint_t bp : 1; // (3) Breakpoint
+ uint_t of : 1; // (4) Overflow
+ uint_t br : 1; // (5) Bound-Range
+ uint_t ud : 1; // (6) Invalid-Opcode
+ uint_t nm : 1; // (7) Device-not-available
+ uint_t df : 1; // (8) Double Fault
+ uint_t ex9 : 1;
+ uint_t ts : 1; // (10) Invalid TSS
+ uint_t np : 1; // (11) Segment-not-present
+ uint_t ss : 1; // (12) Stack
+ uint_t gp : 1; // (13) General Protection Fault
+ uint_t pf : 1; // (14) Page fault
+ uint_t ex15 : 1;
+ uint_t mf : 1; // (15) Floating point exception
+ uint_t ac : 1; // (16) Alignment-check
+ uint_t mc : 1; // (17) Machine Check
+ uint_t xf : 1; // (18) SIMD floating-point
+ uint_t ex20 : 1;
+ uint_t ex21 : 1;
+ uint_t ex22 : 1;
+ uint_t ex23 : 1;
+ uint_t ex24 : 1;
+ uint_t ex25 : 1;
+ uint_t ex26 : 1;
+ uint_t ex27 : 1;
+ uint_t ex28 : 1;
+ uint_t ex29 : 1;
+ uint_t sx : 1; // (30) Security Exception
+ uint_t ex31 : 1;
+} __attribute__((packed));
struct Instr_Intercepts {
- uint_t INTR : 1 PACKED;
- uint_t NMI : 1 PACKED;
- uint_t SMI : 1 PACKED;
- uint_t INIT : 1 PACKED;
- uint_t VINTR : 1 PACKED;
- uint_t CR0 : 1 PACKED;
- uint_t RD_IDTR : 1 PACKED;
- uint_t RD_GDTR : 1 PACKED;
- uint_t RD_LDTR : 1 PACKED;
- uint_t RD_TR : 1 PACKED;
- uint_t WR_IDTR : 1 PACKED;
- uint_t WR_GDTR : 1 PACKED;
- uint_t WR_LDTR : 1 PACKED;
- uint_t WR_TR : 1 PACKED;
- uint_t RDTSC : 1 PACKED;
- uint_t RDPMC : 1 PACKED;
- uint_t PUSHF : 1 PACKED;
- uint_t POPF : 1 PACKED;
- uint_t CPUID : 1 PACKED;
- uint_t RSM : 1 PACKED;
- uint_t IRET : 1 PACKED;
- uint_t INTn : 1 PACKED;
- uint_t INVD : 1 PACKED;
- uint_t PAUSE : 1 PACKED;
- uint_t HLT : 1 PACKED;
- uint_t INVLPG : 1 PACKED;
- uint_t INVLPGA : 1 PACKED;
- uint_t IOIO_PROT : 1 PACKED;
- uint_t MSR_PROT : 1 PACKED;
- uint_t task_switch : 1 PACKED;
- uint_t FERR_FREEZE : 1 PACKED;
- uint_t shutdown_evts: 1 PACKED;
-};
+ uint_t INTR : 1;
+ uint_t NMI : 1;
+ uint_t SMI : 1;
+ uint_t INIT : 1;
+ uint_t VINTR : 1;
+ uint_t CR0 : 1;
+ uint_t RD_IDTR : 1;
+ uint_t RD_GDTR : 1;
+ uint_t RD_LDTR : 1;
+ uint_t RD_TR : 1;
+ uint_t WR_IDTR : 1;
+ uint_t WR_GDTR : 1;
+ uint_t WR_LDTR : 1;
+ uint_t WR_TR : 1;
+ uint_t RDTSC : 1;
+ uint_t RDPMC : 1;
+ uint_t PUSHF : 1;
+ uint_t POPF : 1;
+ uint_t CPUID : 1;
+ uint_t RSM : 1;
+ uint_t IRET : 1;
+ uint_t INTn : 1;
+ uint_t INVD : 1;
+ uint_t PAUSE : 1;
+ uint_t HLT : 1;
+ uint_t INVLPG : 1;
+ uint_t INVLPGA : 1;
+ uint_t IOIO_PROT : 1;
+ uint_t MSR_PROT : 1;
+ uint_t task_switch : 1;
+ uint_t FERR_FREEZE : 1;
+ uint_t shutdown_evts: 1;
+} __attribute__((packed));
struct SVM_Instr_Intercepts {
- uint_t VMRUN : 1 PACKED;
- uint_t VMMCALL : 1 PACKED;
- uint_t VMLOAD : 1 PACKED;
- uint_t VMSAVE : 1 PACKED;
- uint_t STGI : 1 PACKED;
- uint_t CLGI : 1 PACKED;
- uint_t SKINIT : 1 PACKED;
- uint_t RDTSCP : 1 PACKED;
- uint_t ICEBP : 1 PACKED;
- uint_t WBINVD : 1 PACKED;
- uint_t MONITOR : 1 PACKED;
- uint_t MWAIT_always : 1 PACKED;
- uint_t MWAIT_if_armed : 1 PACKED;
- uint_t reserved : 19 PACKED; // Should be 0
-};
+ uint_t VMRUN : 1;
+ uint_t VMMCALL : 1;
+ uint_t VMLOAD : 1;
+ uint_t VMSAVE : 1;
+ uint_t STGI : 1;
+ uint_t CLGI : 1;
+ uint_t SKINIT : 1;
+ uint_t RDTSCP : 1;
+ uint_t ICEBP : 1;
+ uint_t WBINVD : 1;
+ uint_t MONITOR : 1;
+ uint_t MWAIT_always : 1;
+ uint_t MWAIT_if_armed : 1;
+ uint_t reserved : 19; // Should be 0
+} __attribute__((packed));
struct Guest_Control {
- uchar_t V_TPR PACKED;
- uint_t V_IRQ : 1 PACKED;
- uint_t rsvd1 : 7 PACKED; // Should be 0
- uint_t V_INTR_PRIO : 4 PACKED;
- uint_t V_IGN_TPR : 1 PACKED;
- uint_t rsvd2 : 3 PACKED; // Should be 0
- uint_t V_INTR_MASKING : 1 PACKED;
- uint_t rsvd3 : 7 PACKED; // Should be 0
- uchar_t V_INTR_VECTOR PACKED;
- uint_t rsvd4 : 24 PACKED; // Should be 0
-};
+ uchar_t V_TPR;
+ uint_t V_IRQ : 1;
+ uint_t rsvd1 : 7; // Should be 0
+ uint_t V_INTR_PRIO : 4;
+ uint_t V_IGN_TPR : 1;
+ uint_t rsvd2 : 3; // Should be 0
+ uint_t V_INTR_MASKING : 1;
+ uint_t rsvd3 : 7; // Should be 0
+ uchar_t V_INTR_VECTOR;
+ uint_t rsvd4 : 24; // Should be 0
+} __attribute__((packed));
#define SVM_INJECTION_EXTERNAL_INTR 0
#define SVM_INJECTION_VIRTUAL_INTR 0
#define SVM_INJECTION_SOFT_INTR 4
struct Interrupt_Info {
- uint_t vector : 8 PACKED;
- uint_t type : 3 PACKED;
- uint_t ev : 1 PACKED;
- uint_t rsvd : 19 PACKED;
- uint_t valid : 1 PACKED;
- uint_t error_code : 32 PACKED;
-};
+ uint_t vector : 8;
+ uint_t type : 3;
+ uint_t ev : 1;
+ uint_t rsvd : 19;
+ uint_t valid : 1;
+ uint_t error_code : 32;
+} __attribute__((packed));
-typedef struct VMCB_Control_Area {
+
+struct VMCB_Control_Area {
// offset 0x0
- struct Ctrl_Registers cr_reads PACKED;
- struct Ctrl_Registers cr_writes PACKED;
- struct Debug_Registers dr_reads PACKED;
- struct Debug_Registers dr_writes PACKED;
- struct Exception_Vectors exceptions PACKED;
- struct Instr_Intercepts instrs PACKED;
- struct SVM_Instr_Intercepts svm_instrs PACKED;
+ struct Ctrl_Registers cr_reads;
+ struct Ctrl_Registers cr_writes;
+ struct Debug_Registers dr_reads;
+ struct Debug_Registers dr_writes;
+ struct Exception_Vectors exceptions;
+ struct Instr_Intercepts instrs;
+ struct SVM_Instr_Intercepts svm_instrs;
- uchar_t rsvd1[44] PACKED; // Should be 0
+ uchar_t rsvd1[44]; // Should be 0
// offset 0x040
- ullong_t IOPM_BASE_PA PACKED;
- ullong_t MSRPM_BASE_PA PACKED;
- ullong_t TSC_OFFSET PACKED;
+ ullong_t IOPM_BASE_PA;
+ ullong_t MSRPM_BASE_PA;
+ ullong_t TSC_OFFSET;
- uint_t guest_ASID PACKED;
- uchar_t TLB_CONTROL PACKED;
+ uint_t guest_ASID;
+ uchar_t TLB_CONTROL;
- uchar_t rsvd2[3] PACKED; // Should be 0
+ uchar_t rsvd2[3]; // Should be 0
- struct Guest_Control guest_ctrl PACKED;
+ struct Guest_Control guest_ctrl;
- uint_t interrupt_shadow : 1 PACKED;
- uint_t rsvd3 : 31 PACKED; // Should be 0
- uint_t rsvd4 PACKED; // Should be 0
+ uint_t interrupt_shadow : 1;
+ uint_t rsvd3 : 31; // Should be 0
+ uint_t rsvd4; // Should be 0
- ullong_t exit_code PACKED;
- ullong_t exit_info1 PACKED;
- ullong_t exit_info2 PACKED;
+ ullong_t exit_code;
+ ullong_t exit_info1;
+ ullong_t exit_info2;
/* This could be a typo in the manual....
* It doesn't actually say that there is a reserved bit
* But it does say that the EXITINTINFO field is in bits 63-1
* ALL other occurances mention a 1 bit reserved field
*/
- // uint_t rsvd5 : 1 PACKED;
- //ullong_t exit_int_info : 63 PACKED;
+ // uint_t rsvd5 : 1;
+ //ullong_t exit_int_info : 63;
/* ** */
// AMD Manual 2, pg 391, sect: 15.19
- struct Interrupt_Info exit_int_info PACKED;
+ struct Interrupt_Info exit_int_info;
- // uint_t NP_ENABLE : 1 PACKED;
- //ullong_t rsvd6 : 63 PACKED; // Should be 0
- ullong_t NP_ENABLE PACKED;
+ // uint_t NP_ENABLE : 1;
+ //ullong_t rsvd6 : 63; // Should be 0
+ ullong_t NP_ENABLE;
- uchar_t rsvd7[16] PACKED; // Should be 0
+ uchar_t rsvd7[16]; // Should be 0
// Offset 0xA8
- struct Interrupt_Info EVENTINJ PACKED;
+ struct Interrupt_Info EVENTINJ;
/* This could be a typo in the manual....
* But it does say that the EXITINTINFO field is in bits 63-1
* ALL other occurances mention a 1 bit reserved field
*/
- // uint_t rsvd8 : 1 PACKED;
- //ullong_t N_CR3 : 63 PACKED;
- ullong_t N_CR3 PACKED;
+ // uint_t rsvd8 : 1;
+ //ullong_t N_CR3 : 63;
+ ullong_t N_CR3;
/* ** */
- uint_t LBR_VIRTUALIZATION_ENABLE : 1 PACKED;
- ullong_t rsvd9 : 63 PACKED; // Should be 0
+ uint_t LBR_VIRTUALIZATION_ENABLE : 1;
+ ullong_t rsvd9 : 63; // Should be 0
+
+} __attribute__((packed));
+
-} vmcb_ctrl_t;
+typedef struct VMCB_Control_Area vmcb_ctrl_t;
struct vmcb_selector {
- ushort_t selector PACKED;
+ ushort_t selector;
/* These attributes are basically a direct map of the attribute fields of a segment desc.
* The segment limit in the middle is removed and the fields are fused together
* There IS empty space at the end... See AMD Arch vol3, sect. 4.7.1, pg 78
*/
union {
- ushort_t raw PACKED;
+ ushort_t raw;
struct {
- uint_t type : 4 PACKED; // segment type, [see Intel vol. 3b, sect. 3.4.5.1 (because I have the books)]
- uint_t S : 1 PACKED; // System=0, code/data=1
- uint_t dpl : 2 PACKED; // priviledge level, corresonds to protection ring
- uint_t P : 1 PACKED; // present flag
- uint_t avl : 1 PACKED; // available for use by system software
- uint_t L : 1 PACKED; // long mode (64 bit?)
- uint_t db : 1 PACKED; // default op size (0=16 bit seg, 1=32 bit seg)
- uint_t G : 1 PACKED; // Granularity, (0=bytes, 1=4k)
- uint_t rsvd : 4 PACKED;
- } fields;
- } attrib;
- uint_t limit PACKED;
- ullong_t base PACKED;
-};
-
-
-typedef struct VMCB_State_Save_Area {
- struct vmcb_selector es PACKED; // only lower 32 bits of base are implemented
- struct vmcb_selector cs PACKED; // only lower 32 bits of base are implemented
- struct vmcb_selector ss PACKED; // only lower 32 bits of base are implemented
- struct vmcb_selector ds PACKED; // only lower 32 bits of base are implemented
- struct vmcb_selector fs PACKED;
- struct vmcb_selector gs PACKED;
-
- struct vmcb_selector gdtr PACKED; // selector+attrib are reserved, only lower 16 bits of limit are implemented
- struct vmcb_selector ldtr PACKED;
- struct vmcb_selector idtr PACKED; // selector+attrib are reserved, only lower 16 bits of limit are implemented
- struct vmcb_selector tr PACKED;
-
- uchar_t rsvd1[43] PACKED;
+ uint_t type : 4; // segment type, [see Intel vol. 3b, sect. 3.4.5.1 (because I have the books)]
+ uint_t S : 1; // System=0, code/data=1
+ uint_t dpl : 2; // priviledge level, corresonds to protection ring
+ uint_t P : 1; // present flag
+ uint_t avl : 1; // available for use by system software
+ uint_t L : 1; // long mode (64 bit?)
+ uint_t db : 1; // default op size (0=16 bit seg, 1=32 bit seg)
+ uint_t G : 1; // Granularity, (0=bytes, 1=4k)
+ uint_t rsvd : 4;
+ } __attribute__((packed)) fields;
+ } __attribute__((packed)) attrib;
+
+ uint_t limit;
+ ullong_t base;
+} __attribute__((packed));
+
+
+struct VMCB_State_Save_Area {
+ struct vmcb_selector es; // only lower 32 bits of base are implemented
+ struct vmcb_selector cs; // only lower 32 bits of base are implemented
+ struct vmcb_selector ss; // only lower 32 bits of base are implemented
+ struct vmcb_selector ds; // only lower 32 bits of base are implemented
+ struct vmcb_selector fs;
+ struct vmcb_selector gs;
+
+ struct vmcb_selector gdtr; // selector+attrib are reserved, only lower 16 bits of limit are implemented
+ struct vmcb_selector ldtr;
+ struct vmcb_selector idtr; // selector+attrib are reserved, only lower 16 bits of limit are implemented
+ struct vmcb_selector tr;
+
+ uchar_t rsvd1[43];
//offset 0x0cb
- uchar_t cpl PACKED; // if the guest is real-mode then the CPL is forced to 0
+ uchar_t cpl; // if the guest is real-mode then the CPL is forced to 0
// if the guest is virtual-mode then the CPL is forced to 3
- uint_t rsvd2 PACKED;
+ uint_t rsvd2;
// offset 0x0d0
- ullong_t efer PACKED;
+ ullong_t efer;
- uchar_t rsvd3[112] PACKED;
+ uchar_t rsvd3[112];
//offset 0x148
- ullong_t cr4 PACKED;
- ullong_t cr3 PACKED;
- ullong_t cr0 PACKED;
- ullong_t dr7 PACKED;
- ullong_t dr6 PACKED;
- ullong_t rflags PACKED;
- ullong_t rip PACKED;
-
- uchar_t rsvd4[88] PACKED;
+ ullong_t cr4;
+ ullong_t cr3;
+ ullong_t cr0;
+ ullong_t dr7;
+ ullong_t dr6;
+ ullong_t rflags;
+ ullong_t rip;
+
+ uchar_t rsvd4[88];
//offset 0x1d8
- ullong_t rsp PACKED;
+ ullong_t rsp;
- uchar_t rsvd5[24] PACKED;
+ uchar_t rsvd5[24];
//offset 0x1f8
- ullong_t rax PACKED;
- ullong_t star PACKED;
- ullong_t lstar PACKED;
- ullong_t cstar PACKED;
- ullong_t sfmask PACKED;
- ullong_t KernelGsBase PACKED;
- ullong_t sysenter_cs PACKED;
- ullong_t sysenter_esp PACKED;
- ullong_t sysenter_eip PACKED;
- ullong_t cr2 PACKED;
+ ullong_t rax;
+ ullong_t star;
+ ullong_t lstar;
+ ullong_t cstar;
+ ullong_t sfmask;
+ ullong_t KernelGsBase;
+ ullong_t sysenter_cs;
+ ullong_t sysenter_esp;
+ ullong_t sysenter_eip;
+ ullong_t cr2;
- uchar_t rsvd6[32] PACKED;
+ uchar_t rsvd6[32];
//offset 0x268
- ullong_t g_pat PACKED; // Guest PAT
+ ullong_t g_pat; // Guest PAT
// -- only used if nested paging is enabled
- ullong_t dbgctl PACKED; // Guest DBGCTL MSR
+ ullong_t dbgctl; // Guest DBGCTL MSR
// -- only used if the LBR registers are virtualized
- ullong_t br_from PACKED; // Guest LastBranchFromIP MSR
+ ullong_t br_from; // Guest LastBranchFromIP MSR
// -- only used if the LBR registers are virtualized
- ullong_t br_to PACKED; // Guest LastBranchToIP MSR
+ ullong_t br_to; // Guest LastBranchToIP MSR
// -- only used if the LBR registers are virtualized
- ullong_t lastexcpfrom PACKED; // Guest LastExceptionFromIP MSR
+ ullong_t lastexcpfrom; // Guest LastExceptionFromIP MSR
// -- only used if the LBR registers are virtualized
- ullong_t lastexcpto PACKED; // Guest LastExceptionToIP MSR
+ ullong_t lastexcpto; // Guest LastExceptionToIP MSR
// -- only used if the LBR registers are virtualized
-} vmcb_saved_state_t;
+} __attribute__((packed));
+
+
+typedef struct VMCB_State_Save_Area vmcb_saved_state_t;
void PrintDebugVMCB(vmcb_t * vmcb);
typedef void VMCS;
-#if __TINYC__
-#define PACKED
-#else
-#define PACKED __attribute__((packed))
-#endif
-
/* VMCS Exit QUALIFICATIONs */
struct VMExitIOQual {
- uint_t accessSize : 3 PACKED; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
- uint_t dir : 1 PACKED; // (0: Out ;; 1: In)
- uint_t string : 1 PACKED; // (0: not string ;; 1: string)
- uint_t REP : 1 PACKED; // (0: not REP ;; 1: REP)
- uint_t opEnc : 1 PACKED; // (0: DX ;; 1: immediate)
- uint_t rsvd : 9 PACKED; // Set to 0
- uint_t port : 16 PACKED; // IO Port Number
-};
+ uint_t accessSize : 3; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
+ uint_t dir : 1; // (0: Out ;; 1: In)
+ uint_t string : 1; // (0: not string ;; 1: string)
+ uint_t REP : 1; // (0: not REP ;; 1: REP)
+ uint_t opEnc : 1; // (0: DX ;; 1: immediate)
+ uint_t rsvd : 9; // Set to 0
+ uint_t port : 16; // IO Port Number
+} __attribute__((packed));
struct VMExitDBGQual {
- uint_t B0 : 1 PACKED; // Breakpoint 0 condition met
- uint_t B1 : 1 PACKED; // Breakpoint 1 condition met
- uint_t B2 : 1 PACKED; // Breakpoint 2 condition met
- uint_t B3 : 1 PACKED; // Breakpoint 3 condition met
- uint_t rsvd : 9 PACKED; // reserved to 0
- uint_t BD : 1 PACKED; // detected DBG reg access
- uint_t BS : 1 PACKED; // cause either single instr or taken branch
-};
+ uint_t B0 : 1; // Breakpoint 0 condition met
+ uint_t B1 : 1; // Breakpoint 1 condition met
+ uint_t B2 : 1; // Breakpoint 2 condition met
+ uint_t B3 : 1; // Breakpoint 3 condition met
+ uint_t rsvd : 9; // reserved to 0
+ uint_t BD : 1; // detected DBG reg access
+ uint_t BS : 1; // cause either single instr or taken branch
+} __attribute__((packed));
struct VMExitTSQual {
- uint_t selector : 16 PACKED; // selector of destination TSS
- uint_t rsvd : 14 PACKED; // reserved to 0
- uint_t src : 2 PACKED; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
-};
+ uint_t selector : 16; // selector of destination TSS
+ uint_t rsvd : 14; // reserved to 0
+ uint_t src : 2; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
+} __attribute__((packed));
struct VMExitCRQual {
- uint_t crID : 4 PACKED; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
- uint_t accessType : 2 PACKED; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
- uint_t lmswOpType : 1 PACKED; // (0: register ; 1: memory)
- uint_t rsvd1 : 1 PACKED; // reserved to 0
- uint_t gpr : 4 PACKED; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
- uint_t rsvd2 : 4 PACKED; // reserved to 0
- uint_t lmswSrc : 16 PACKED; // src data for lmsw
-};
+ uint_t crID : 4; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
+ uint_t accessType : 2; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
+ uint_t lmswOpType : 1; // (0: register ; 1: memory)
+ uint_t rsvd1 : 1; // reserved to 0
+ uint_t gpr : 4; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
+ uint_t rsvd2 : 4; // reserved to 0
+ uint_t lmswSrc : 16; // src data for lmsw
+} __attribute__((packed));
struct VMExitMovDRQual {
- uint_t regID : 3 PACKED; // debug register number
- uint_t rsvd1 : 1 PACKED; // reserved to 0
- uint_t dir : 1 PACKED; // (0: MOV to DR , 1: MOV from DR)
- uint_t rsvd2 : 3 PACKED; // reserved to 0
- uint_t gpr : 4 PACKED; // (0:RAX, 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
-};
+ uint_t regID : 3; // debug register number
+ uint_t rsvd1 : 1; // reserved to 0
+ uint_t dir : 1; // (0: MOV to DR , 1: MOV from DR)
+ uint_t rsvd2 : 3; // reserved to 0
+ uint_t gpr : 4; // (0:RAX, 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
+} __attribute__((packed));
/* End Exit Qualifications */
/* Exit Vector Info */
struct VMExitIntInfo {
- uint_t nr : 8 PACKED; // IRQ number, exception vector, NMI = 2
- uint_t type : 3 PACKED; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
- uint_t errorCode : 1 PACKED; // 1: error Code present
- uint_t iret : 1 PACKED; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
- uint_t rsvd : 18 PACKED; // always 0
- uint_t valid : 1 PACKED; // always 1 if valid
-};
+ uint_t nr : 8; // IRQ number, exception vector, NMI = 2
+ uint_t type : 3; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
+ uint_t errorCode : 1; // 1: error Code present
+ uint_t iret : 1; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
+ uint_t rsvd : 18; // always 0
+ uint_t valid : 1; // always 1 if valid
+} __attribute__((packed));
/* INTEL Manual: 20-4 vol 3B */
union SegAccess {
struct {
- uchar_t type PACKED;
- uint_t descType : 1 PACKED;
- uint_t dpl : 2 PACKED;
- uint_t present : 1 PACKED;
- uchar_t rsvd1 PACKED;
- uint_t avail : 1 PACKED ;
- uint_t L : 1 PACKED ; // CS only (64 bit active), reserved otherwise
- uint_t DB : 1 PACKED ;
- uint_t granularity : 1 PACKED ;
- uint_t unusable : 1 PACKED ;
- uint_t rsvd2 : 15 PACKED ;
- } as_fields;
+ uchar_t type;
+ uint_t descType : 1;
+ uint_t dpl : 2;
+ uint_t present : 1;
+ uchar_t rsvd1;
+ uint_t avail : 1;
+ uint_t L : 1; // CS only (64 bit active), reserved otherwise
+ uint_t DB : 1;
+ uint_t granularity : 1;
+ uint_t unusable : 1;
+ uint_t rsvd2 : 15;
+ } __attribute__((packed)) as_fields;
uint_t as_dword;
-};
+} __attribute__((packed));
struct VMCSSegment {
};
-int CopyOutVMCSGuestStateArea(struct VMCSGuestStateArea *p);
-int CopyInVMCSGuestStateArea(struct VMCSGuestStateArea *p);
+int CopyOutVMCSGuestStateArea(struct VMCSGuestStateArea * p);
+int CopyInVMCSGuestStateArea(struct VMCSGuestStateArea * p);
-void PrintDebugHex(unsigned char x);
-void PrintDebugMemDump(unsigned char *start, int n);
+void PrintDebugHex(uchar_t x);
+void PrintDebugMemDump(uchar_t * start, int n);
int opcode_cmp(const uchar_t * op1, const uchar_t * op2);
-static inline int is_prefix_byte(char byte) {
+static inline int is_prefix_byte(uchar_t byte) {
switch (byte) {
case 0xF0: // lock
case 0xF2: // REPNE/REPNZ
static inline operand_type_t decode_operands32(struct v3_gprs * gprs, // input/output
- char * modrm_instr, // input
+ uchar_t * modrm_instr, // input
int * offset, // output
addr_t * first_operand, // output
addr_t * second_operand, // output
reg_size_t reg_size) { // input
- char * instr_cursor = modrm_instr;
+ uchar_t * instr_cursor = modrm_instr;
struct modrm_byte * modrm = (struct modrm_byte *)modrm_instr;
addr_t base_addr = 0;
modrm_mode_t mod_mode = 0;
#include <palacios/vmm_types.h>
-#ifndef PAGE_SIZE
-#define PAGE_SIZE 4096
-#endif
-
-
typedef union reg_ex {
ullong_t r_reg;
struct {
#define GET_LOW_32(x) (*((uint_t*)(&(x))))
-#define GET_HIGH_32(x) (*((uint_t*)(((char*)(&(x)))+4)))
+#define GET_HIGH_32(x) (*((uint_t*)(((uchar_t*)(&(x)))+4)))
-void PrintTraceHex(unsigned char x);
+void PrintTraceHex(uchar_t x);
void PrintTraceLL(ullong_t num);
-void PrintTraceMemDump(unsigned char * start, int n);
+void PrintTraceMemDump(uchar_t * start, int n);
#ifdef __V3_64BIT__
+#define do_divll do_div
+
-# define do_div(n,base) ({ \
+#define do_div(n,base) ({ \
uint32_t __base = (base); \
uint32_t __rem; \
__rem = ((uint64_t)(n)) % __base; \
typedef void VmxOnRegion;
-#if __TINYC__
-#define PACKED
-#else
-#define PACKED __attribute__((packed))
-#endif
struct MSR_REGS {
- uint_t low PACKED;
- uint_t high PACKED;
-};
+ uint_t low;
+ uint_t high;
+} __attribute__((packed));
struct VMX_BASIC {
- uint_t revision PACKED ;
- uint_t regionSize : 13 PACKED ;
- uint_t rsvd1 : 4 PACKED ; // Always 0
- uint_t physWidth : 1 PACKED ;
- uint_t smm : 1 PACKED ; // Always 1
- uint_t memType : 4 PACKED ;
- uint_t rsvd2 : 10 PACKED ; // Always 0
-};
+ uint_t revision;
+ uint_t regionSize : 13;
+ uint_t rsvd1 : 4; // Always 0
+ uint_t physWidth : 1;
+ uint_t smm : 1; // Always 1
+ uint_t memType : 4;
+ uint_t rsvd2 : 10; // Always 0
+} __attribute__((packed));
union VMX_MSR {
- struct MSR_REGS regs PACKED;
- struct VMX_BASIC vmxBasic PACKED;
-};
+ struct MSR_REGS regs;
+ struct VMX_BASIC vmxBasic;
+} __attribute__((packed));
struct VMDescriptor {
uint_t entry_ip;
uint_t exit_eip;
uint_t guest_esp;
-} ;
+} __attribute__((packed));
enum VMState { VM_VMXASSIST_STARTUP, VM_VMXASSIST_V8086_BIOS, VM_VMXASSIST_V8086, VM_NORMAL };
PrintDebug("Host Address of rip = 0x%x\n", host_addr);
PrintDebug("Instr (15 bytes) at %x:\n", host_addr);
- PrintTraceMemDump((char*)host_addr, 15);
+ PrintTraceMemDump((uchar_t *)host_addr, 15);
break;
}
// Setup the host state save area
host_state = V3_AllocPages(4);
- msr.e_reg.high = 0;
- msr.e_reg.low = (uint_t)host_state;
+ /* 64-BIT-ISSUE */
+ // msr.e_reg.high = 0;
+ //msr.e_reg.low = (uint_t)host_state;
+ msr.r_reg = (addr_t)host_state;
- PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
+ PrintDebug("Host State being saved at %x\n", (addr_t)host_state);
Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
// PrintDebug("SVM Returned: Exit Code: 0x%x \t\t(tsc=%ul)\n",exit_code, (uint_t)info->time_state.guest_tsc);
if ((0) && (exit_code < 0x4f)) {
- char instr[32];
+ uchar_t instr[32];
int ret;
// Dump out the instr stream
default: {
addr_t rip_addr;
- char buf[15];
+ uchar_t buf[15];
addr_t host_addr;
PrintDebug("Unhandled SVM Exit: %s\n", vmexit_code_to_str(exit_code));
/* This is a straight address conversion + copy,
* except for the tiny little issue of crossing page boundries.....
*/
-int read_guest_va_memory(struct guest_info * guest_info, addr_t guest_va, int count, char * dest) {
+int read_guest_va_memory(struct guest_info * guest_info, addr_t guest_va, int count, uchar_t * dest) {
addr_t cursor = guest_va;
int bytes_read = 0;
/* This is a straight address conversion + copy,
* except for the tiny little issue of crossing page boundries.....
*/
-int read_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, char * dest) {
+int read_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, uchar_t * dest) {
addr_t cursor = guest_pa;
int bytes_read = 0;
/* This is a straight address conversion + copy,
* except for the tiny little issue of crossing page boundries.....
*/
-int write_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, char * src) {
+int write_guest_pa_memory(struct guest_info * guest_info, addr_t guest_pa, int count, uchar_t * src) {
addr_t cursor = guest_pa;
int bytes_written = 0;
// First Attempt = 494 lines
// current = 106 lines
int handle_cr0_write(struct guest_info * info) {
- char instr[15];
+ uchar_t instr[15];
int ret;
struct x86_instr dec_instr;
// First attempt = 253 lines
// current = 51 lines
int handle_cr0_read(struct guest_info * info) {
- char instr[15];
+ uchar_t instr[15];
int ret;
struct x86_instr dec_instr;
// current = 65 lines
int handle_cr3_write(struct guest_info * info) {
int ret;
- char instr[15];
+ uchar_t instr[15];
struct x86_instr dec_instr;
if (info->mem_mode == PHYSICAL_MEM) {
// first attempt = 156 lines
// current = 36 lines
int handle_cr3_read(struct guest_info * info) {
- char instr[15];
+ uchar_t instr[15];
int ret;
struct x86_instr dec_instr;
#include <palacios/vmm.h>
-void PrintDebugHex(unsigned char x)
+void PrintDebugHex(uchar_t x)
{
unsigned char z;
- z = (x>>4) & 0xf ;
+ z = (x >> 4) & 0xf ;
PrintDebug("%x", z);
z = x & 0xf;
PrintDebug("%x", z);
}
-void PrintDebugMemDump(unsigned char *start, int n)
+void PrintDebugMemDump(uchar_t *start, int n)
{
int i, j;
- for (i=0;i<n;i+=16) {
- PrintDebug("%8x", (unsigned)(start+i));
- for (j=i; j<i+16 && j<n; j+=2) {
+ for (i = 0; i < n; i += 16) {
+ PrintDebug("%8x", (start + i));
+
+ for (j = i; (j < (i + 16)) && (j < n); j += 2) {
PrintDebug(" ");
- PrintDebugHex(*((unsigned char *)(start+j)));
- if ((j+1)<n) {
- PrintDebugHex(*((unsigned char *)(start+j+1)));
+ PrintDebugHex(*((uchar_t *)(start + j)));
+
+ if ((j + 1) < n) {
+ PrintDebugHex(*((uchar_t *)(start + j + 1)));
}
+
}
+
PrintDebug(" ");
- for (j=i; j<i+16 && j<n;j++) {
- PrintDebug("%c", ((start[j]>=32) && (start[j]<=126)) ? start[j] : '.');
+
+ for (j = i; (j < (i + 16)) && (j < n); j++) {
+ PrintDebug("%c", ((start[j] >= 32) && (start[j] <= 126)) ? start[j] : '.');
}
+
PrintDebug("\n");
}
}
int (*read)(addr_t read_addr, void * dst, uint_t length, void * priv_data),
addr_t read_gpa, void * private_data) {
struct basic_instr_info instr_info;
- char instr[15];
+ uchar_t instr[15];
int ret;
struct emulated_page * data_page = V3_Malloc(sizeof(struct emulated_page));
addr_t data_addr_offset = PT32_PAGE_OFFSET(read_gva);
addr_t write_gpa, void * private_data) {
struct basic_instr_info instr_info;
- char instr[15];
+ uchar_t instr[15];
int ret;
struct write_region * write_op = V3_Malloc(sizeof(struct write_region ));
struct emulated_page * data_page = V3_Malloc(sizeof(struct emulated_page));
for (i = 0; (i < MAX_PDE32_ENTRIES); i++) {
if (pde[i].present) {
- pte32_t * pte = (pte32_t *)(pde[i].pt_base_addr << PAGE_POWER);
+ // We double cast, first to an addr_t to handle 64 bit issues, then to the pointer
+ pte32_t * pte = (pte32_t *)((addr_t)(pde[i].pt_base_addr << PAGE_POWER));
/*
for (j = 0; (j < MAX_PTE32_ENTRIES); j++) {
pde[i].large_page = 0;
pde[i].global_page = 0;
pde[i].vmm_info = 0;
- pde[i].pt_base_addr = PAGE_ALIGNED_ADDR(pte);
+ pde[i].pt_base_addr = PAGE_ALIGNED_ADDR((addr_t)pte);
}
}
void PrintPDE32(addr_t virtual_address, pde32_t * pde)
{
- PrintDebug("PDE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
+ PrintDebug("PDE %x -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, reserved=%x, largePages=%x, globalPage=%x, kernelInfo=%x\n",
virtual_address,
- (void *) (pde->pt_base_addr << PAGE_POWER),
+ (void *)(addr_t) (pde->pt_base_addr << PAGE_POWER),
pde->present,
pde->writable,
pde->user_page,
{
PrintDebug("PTE %p -> %p : present=%x, writable=%x, user=%x, wt=%x, cd=%x, accessed=%x, dirty=%x, pteAttribute=%x, globalPage=%x, vmm_info=%x\n",
virtual_address,
- (void*)(pte->page_base_addr << PAGE_POWER),
+ (void*)(addr_t)(pte->page_base_addr << PAGE_POWER),
pte->present,
pte->writable,
pte->user_page,
for (i = 0; (i < MAX_PDE32_ENTRIES); i++) {
if (pde[i].present) {
PrintPDE32((addr_t)(PAGE_SIZE * MAX_PTE32_ENTRIES * i), &(pde[i]));
- PrintPT32((addr_t)(PAGE_SIZE * MAX_PTE32_ENTRIES * i), (pte32_t *)(pde[i].pt_base_addr << PAGE_POWER));
+ PrintPT32((addr_t)(PAGE_SIZE * MAX_PTE32_ENTRIES * i), (pte32_t *)(addr_t)(pde[i].pt_base_addr << PAGE_POWER));
}
}
}
pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(location)]);
if (shadow_pde->large_page == 0) {
- pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(location)]);
//if (shadow_pte->present == 1) {
guest_pde->accessed = 1;
- shadow_pde->pt_base_addr = PD32_BASE_ADDR(shadow_pt);
+ shadow_pde->pt_base_addr = PD32_BASE_ADDR((addr_t)shadow_pt);
if (guest_pde->large_page == 0) {
shadow_pde->writable = guest_pde->writable;
//
// PTE fault
//
- pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
if (guest_pde->large_page == 0) {
pte32_t * guest_pt = NULL;
if (info->cpu_mode == PROTECTED) {
- char instr[15];
+ uchar_t instr[15];
int ret;
int index = 0;
} else {
if (shadow_pde->present == 1) {
- pte32_t * shadow_pt = (pte32_t *)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
pte32_t * shadow_pte = (pte32_t *)&shadow_pt[PTE32_INDEX(first_operand)];
#ifdef DEBUG_SHADOW_PAGING
}
-void PrintTraceMemDump(unsigned char *start, int n)
-{
+void PrintTraceMemDump(uchar_t * start, int n) {
int i, j;
for (i = 0; i < n; i += 16) {
- PrintTrace("%8x", (unsigned)(start + i));
+ PrintTrace("%8x", (start + i));
for (j = i; (j < (i + 16)) && (j < n); j += 2) {
PrintTrace(" ");
- PrintTraceHex(*((unsigned char *)(start + j)));
+ PrintTraceHex(*(uchar_t *)(start + j));
if ((j + 1) < n) {
- PrintTraceHex(*((unsigned char *)(start + j + 1)));
+ PrintTraceHex(*((uchar_t *)(start + j + 1)));
}
}
PrintTrace(" ");
