case MOV_MEM2:
case MOV_2MEM:
case MOV_MEM2AX:
- case MOV_AX2MEM:
- case MOV_IMM2:
+ case MOV_AX2MEM:
case MOVS:
case MOVSX:
case MOVZX:
case OR_IMM2SX_8:
case SUB_IMM2SX_8:
case XOR_IMM2SX_8:
+ case MOV_IMM2:
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
return (instr->prefixes.op_size) ? 4 : 2;
if (instr->prefixes.rex_op_size) {
return 8;
} else {
- return 4;
+ return (instr->prefixes.op_size) ? 2 : 4;
}
case PROTECTED:
case PROTECTED_PAE:
PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
-
case INVLPG:
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
#ifdef V3_CONFIG_DEBUG_DECODER
v3_print_instr(instr);
+ V3_Print("CS DB FLag=%x\n", core->segments.cs.db);
#endif
return 0;
case AND_IMM2:
case OR_IMM2:
case SUB_IMM2:
- case XOR_IMM2:
- case MOV_IMM2:{
+ case XOR_IMM2:
+ case MOV_IMM2: {
uint8_t reg_code = 0;
ret = decode_rm_operand(core, instr_ptr, form, instr, &(instr->dst_operand), ®_code);
instr->src_operand.operand = *(uint16_t *)instr_ptr;
} else if (operand_width == 4) {
instr->src_operand.operand = *(uint32_t *)instr_ptr;
+ } else if (operand_width == 8) {
+ instr->src_operand.operand = *(sint32_t *)instr_ptr; // This is a special case for sign extended 64bit ops
} else {
PrintError("Illegal operand width (%d)\n", operand_width);
return -1;