state->info_buf[state->info_offset++] = *(char*)src;
if ((*(char*)src == 0xa) || (state->info_offset == (BUF_SIZE - 1))) {
- PrintDebug(core->vm_info, core, "BOCHSINFO>%s", state->info_buf);
+ PrintDebug(core->vm_info, core, "BIOSINFO>%s", state->info_buf);
memset(state->info_buf, 0, BUF_SIZE);
state->info_offset = 0;
}
state->debug_buf[state->debug_offset++] = *(char*)src;
if ((*(char*)src == 0xa) || (state->debug_offset == (BUF_SIZE - 1))) {
- PrintDebug(core->vm_info, core, "BOCHSDEBUG>%s", state->debug_buf);
+ PrintDebug(core->vm_info, core, "BIOSDEBUG>%s", state->debug_buf);
memset(state->debug_buf, 0, BUF_SIZE);
state->debug_offset = 0;
}
state->cons_buf[state->cons_offset++] = *(char *)src;
if ((*(char *)src == 0xa) || (state->cons_offset == (BUF_SIZE - 1))) {
- V3_Print(core->vm_info, core, "BOCHSCONSOLE>%s", state->cons_buf);
+ V3_Print(core->vm_info, core, "BIOSCONSOLE>%s", state->cons_buf);
memset(state->cons_buf, 0, BUF_SIZE);
state->cons_offset = 0;
}
static int post_config_pc(struct v3_vm_info * vm, v3_cfg_tree_t * cfg) {
-#
-
-#if defined(V3_CONFIG_SEABIOS) || defined(V3_CONFIG_ROMBIOS)
+#if defined(V3_CONFIG_SEABIOS) || defined(V3_CONFIG_BOCHSBIOS)
#define VGABIOS_START 0x000c0000
/* layout vgabios */
return -1;
}
+ V3_Print(vm,VCORE_NONE,"Mapping VGA BIOS of %llu bytes at address %p\n", (uint64_t)(v3_vgabios_end-v3_vgabios_start), (void*)VGABIOS_START);
memcpy(vgabios_dst, v3_vgabios_start, v3_vgabios_end - v3_vgabios_start);
}
return -1;
}
+ V3_Print(vm,VCORE_NONE,"Mapping BIOS of %llu bytes at address %p\n", (uint64_t)(v3_rombios_end-v3_rombios_start), (void*)V3_CONFIG_BIOS_START);
memcpy(rombios_dst, v3_rombios_start, v3_rombios_end - v3_rombios_start);
#ifdef V3_CONFIG_SEABIOS
PrintError(vm, VCORE_NONE, "Error mapping SEABIOS to end of memory\n");
return -1;
}
+ V3_Print(vm,VCORE_NONE,"Additionally mapping SEABIOS of %llu bytes at address %p\n", (uint64_t)(v3_rombios_end-v3_rombios_start), (void*)0xfffe0000);
#endif
}
#include <palacios/vm_guest.h>
+/*
+ This subsystem of Palacios interacts with the SEABIOS in order to
+ create highly customized configurations for the guest. Currently,
+ the primary purpose of such configuration is to pass a NUMA configuration
+ to the guest via ACPI. Currently, we are able to create NUMA domains,
+ map regions of guest physical addresses to them, and map vcores to them.
+ Additionally, these virtual NUMA domains are then mapped to physical
+ (host) NUMA domains. Other elements of Palacios handle vcore to
+ physical core mapping, as well as guest memory allocation such that
+ the needed physical NUMA domain mapping is correct.
+
+ The following describes how the XML configuration of a virtual NUMA guest
+ works.
+
+ <mem_layout vnodes=n> (How many numa domains the guest will see)
+ (guest physical addresses x to y-1 are numa domain i and
+ numa domain i is mapped to host numa domain j)
+ <region vnode=i start_addr=x end_addr=y node=j>
+ ...
+ <mem_layout>
+
+ For example, a 4 virtual domain guest mapped toa 2 domain host:
+
+ <mem_layout vnodes="4">
+ <region vnode="0" start_addr="0x00000000" end_addr="0x10000000" node="0" />
+ <region vnode="1" start_addr="0x10000000" end_addr="0x20000000" node="1" />
+ <region vnode="2" start_addr="0x20000000" end_addr="0x30000000" node="0" />
+ <region vnode="3" start_addr="0x30000000" end_addr="0x40000000" node="1" />
+ </mem_layout>
+
+ You also need to map the virtual cores to the domains, which is
+ done with the <cores> tag. This usually also indicates which physical core
+ the virtual core maps to, so that the NUMA topology the guest sees has
+ performance characteristics that make sense.
+
+ <cores count=m> (How many virtual cores we have)
+ <core vnode=i target_cpu=q> (vcore 0 maps to virtual numa zone i and pcore q)
+ <core vnode=j target_cpu=r> (vcore 1 maps to virtual numa zone j and pcore r)
+ ...
+ <cores>
+
+ For example, here are 8 virtual cores maped across our numa domains, pairwise
+
+ <cores count="8">
+ <core target_cpu="1" vnode="0"/>
+ <core target_cpu="2" vnode="0"/>
+ <core target_cpu="3" vnode="1"/>
+ <core target_cpu="4" vnode="1"/>
+ <core target_cpu="5" vnode="2"/>
+ <core target_cpu="6" vnode="2"/>
+ <core target_cpu="7" vnode="3"/>
+ <core target_cpu="8" vnode="3"/>
+ </cores>
+
+*/
+
+
+
#define FW_CFG_CTL_PORT 0x510
#define FW_CFG_DATA_PORT 0x511
}
*/
+void v3_fw_cfg_deinit(struct v3_vm_info *vm) {
+ struct v3_fw_cfg_state * cfg_state = &(vm->fw_cfg_state);
+ int i, j;
+
+ for (i = 0; i < 2; ++i) {
+ for (j = 0; j < FW_CFG_MAX_ENTRY; ++j) {
+ if (cfg_state->entries[i][j].data != NULL)
+ V3_Free(cfg_state->entries[i][j].data);
+ }
+ }
+
+ v3_unhook_io_port(vm, FW_CFG_CTL_PORT);
+ v3_unhook_io_port(vm, FW_CFG_DATA_PORT);
+
+}
+
int v3_fw_cfg_init(struct v3_vm_info * vm) {
int ret = 0;
+#ifndef V3_CONFIG_SEABIOS
+ V3_Print(vm,VCORE_NONE,"Warning: Configuring SEABIOS firmware, but SEABIOS is not being used in this build of Palacios. Configuration will be dormant.\n");
+#endif
+
/*
struct e820_table * e820 = e820_populate(vm);
if (ret != 0) {
// V3_Free(e820);
PrintError(vm, VCORE_NONE, "Failed to hook FW CFG ports!\n");
+ v3_fw_cfg_deinit(vm);
return -1;
}
if (numa_fw_cfg == NULL) {
PrintError(vm, VCORE_NONE, "Could not allocate fw_cfg NUMA config space\n");
+ v3_fw_cfg_deinit(vm);
return -1;
}
if ((!start_addr_str) || (!end_addr_str) || (!vnode_id_str)) {
PrintError(vm, VCORE_NONE, "Invalid memory layout in configuration\n");
- V3_Free(numa_fw_cfg);
+ v3_fw_cfg_deinit(vm);
return -1;
}
return 0;
}
-void v3_fw_cfg_deinit(struct v3_vm_info *vm) {
- struct v3_fw_cfg_state * cfg_state = &(vm->fw_cfg_state);
- int i, j;
-
- for (i = 0; i < 2; ++i) {
- for (j = 0; j < FW_CFG_MAX_ENTRY; ++j) {
- if (cfg_state->entries[i][j].data != NULL)
- V3_Free(cfg_state->entries[i][j].data);
- }
- }
-}
-
