#include <palacios/vmm.h>
#include <palacios/vmx_lowlevel.h>
#include <palacios/vmm_lowlevel.h>
-#include <palacios/vmm_config.h>
#include <palacios/vmm_ctrl_regs.h>
+#include <palacios/vmm_config.h>
#include <palacios/vm_guest_mem.h>
+#include <palacios/vmm_direct_paging.h>
+#include <palacios/vmx_io.h>
+#include <palacios/vmx_msr.h>
static addr_t vmxon_ptr_phys;
extern int v3_vmx_exit_handler();
-extern int v3_vmx_vmlaunch(struct v3_gprs * vm_regs);
+extern int v3_vmx_vmlaunch(struct v3_gprs * vm_regs, struct guest_info * info);
static int inline check_vmcs_write(vmcs_field_t field, addr_t val)
{
access->granularity = v3_seg->granularity;
}
+int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
+ int vmx_ret = 0;
+ struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
+
+ vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pinbased_ctrls);
+ vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_procbased_ctrls);
+
+ if(arch_data->pri_procbased_ctrls & ACTIVE_SEC_CTRLS) {
+ vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_procbased_ctrls);
+ }
-static int update_vmcs_host_state(struct guest_info * info) {
+ vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls);
+ vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls);
+
+ return vmx_ret;
+}
+
+int v3_update_vmcs_host_state(struct guest_info * info) {
int vmx_ret = 0;
addr_t tmp;
struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
}
-static int inline update_vmcs_guest_state(struct guest_info * info)
+int v3_update_vmcs_guest_state(struct guest_info * info)
{
- struct v3_msr tmp_msr;
int vmx_ret = 0;
vmx_ret |= check_vmcs_write(VMCS_GUEST_RIP, info->rip);
vmx_ret |= check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
vmx_ret |= check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
vmx_ret |= check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
-#define DEBUGCTL_MSR 0x1d9
- v3_get_msr(DEBUGCTL_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
- vmx_ret |= check_vmcs_write(VMCS_GUEST_DBG_CTL, tmp_msr.value);
-
- vmx_ret |= check_vmcs_write(VMCS_GUEST_DR7, 0x400);
- vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, 0xffffffffffffffff);
/*** Write VMCS Segments ***/
struct vmcs_segment_access access;
vmx_ret |= check_vmcs_write(VMCS_GUEST_CS_ACCESS, access.value);
/* SS Segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.ss), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_SS_BASE, info->segments.ss.base);
vmx_ret |= check_vmcs_write(VMCS_GUEST_SS_ACCESS, access.value);
/* DS Segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.ds), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_DS_BASE, info->segments.ds.base);
/* ES Segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.es), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_ES_BASE, info->segments.es.base);
vmx_ret |= check_vmcs_write(VMCS_GUEST_ES_ACCESS, access.value);
/* FS Segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.fs), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_FS_BASE, info->segments.fs.base);
vmx_ret |= check_vmcs_write(VMCS_GUEST_FS_ACCESS, access.value);
/* GS Segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.gs), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_GS_BASE, info->segments.gs.base);
vmx_ret |= check_vmcs_write(VMCS_GUEST_GS_ACCESS, access.value);
/* LDTR segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.ldtr), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_LDTR_BASE, info->segments.ldtr.base);
vmx_ret |= check_vmcs_write(VMCS_GUEST_LDTR_ACCESS, access.value);
/* TR Segment */
+ memset(&access, 0, sizeof(access));
translate_segment_access(&(info->segments.tr), &access);
vmx_ret |= check_vmcs_write(VMCS_GUEST_TR_BASE, info->segments.tr.base);
return val;
}
-static int setup_base_host_state() {
-
-
-
- // vmwrite(HOST_IDTR_BASE,
-
-
-}
#endif
}
#if 0
-static void setup_v8086_mode_for_boot(struct guest_info * vm_info)
-{
-
- ((struct vmx_data *)vm_info->vmm_data)->state = VMXASSIST_V8086_BIOS;
- struct rflags * flags = (struct rflags *)&(vm_info->ctrl_regs.rflags);
- flags->rsvd1 = 1;
- flags->vm = 1;
- flags->iopl = 3;
-
-#define GUEST_CR0_MASK 0x80000021
-#define GUEST_CR4_MASK 0x00002000
- vm_info->ctrl_regs.cr0 = GUEST_CR0_MASK;
- vm_info->ctrl_regs.cr4 = GUEST_CR4_MASK;
-
- vm_info->rip = 0xd0000;
- vm_info->vm_regs.rsp = 0x80000;
-
- vm_info->segments.cs.selector = 0xf000;
- vm_info->segments.cs.base = 0xf000 << 4;
- vm_info->segments.cs.limit = 0xffff;
- vm_info->segments.cs.type = 3;
- vm_info->segments.cs.system = 1;
- vm_info->segments.cs.dpl = 3;
- vm_info->segments.cs.present = 1;
- vm_info->segments.cs.granularity = 0;
-
- int i = 0;
- struct v3_segment * seg_ptr = (struct v3_segment *)&(vm_info->segments);
-
- /* Set values for selectors ds through ss */
- for(i = 1; i < 6 ; i++) {
- seg_ptr[i].selector = 0x0000;
- seg_ptr[i].base = 0x00000;
- seg_ptr[i].limit = 0xffff;
- }
-
- for(i = 6; i < 10; i++) {
- seg_ptr[i].base = 0x0;
- seg_ptr[i].limit = 0xffff;
- }
- vm_info->segments.ldtr.selector = 0x0;
- vm_info->segments.ldtr.type = 2;
- vm_info->segments.ldtr.system = 0;
- vm_info->segments.ldtr.present = 1;
- vm_info->segments.ldtr.granularity = 0;
-
- vm_info->segments.tr.selector = 0x0;
- vm_info->segments.tr.type = 3;
- vm_info->segments.tr.system = 0;
- vm_info->segments.tr.present = 1;
- vm_info->segments.tr.granularity = 0;
-}
#endif
#if 0
- /********** Setup and write VMX Control Fields ***********/
- struct v3_msr tmp_msr;
-
- v3_get_msr(VMX_PINBASED_CTLS_MSR,&(tmp_msr.hi),&(tmp_msr.lo));
- /* Add NMI exiting */
- tmp_msr.lo |= NMI_EXIT;
- check_vmcs_write(VMCS_PIN_CTRLS, tmp_msr.lo);
-
- v3_get_msr(VMX_PROCBASED_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
- /* Add unconditional I/O */
- tmp_msr.lo |= UNCOND_IO_EXIT;
- check_vmcs_write(VMCS_PROC_CTRLS, tmp_msr.lo);
-
- v3_get_msr(VMX_EXIT_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
- tmp_msr.lo |= HOST_ADDR_SPACE_SIZE;
- check_vmcs_write(VMCS_EXIT_CTRLS, tmp_msr.lo);
-
- v3_get_msr(VMX_ENTRY_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
- check_vmcs_write(VMCS_ENTRY_CTRLS, tmp_msr.lo);
-
- check_vmcs_write(VMCS_EXCP_BITMAP, 0xffffffff);
-
-
-
-
/******* Setup Host State **********/
/* Cache GDTR, IDTR, and TR in host struct */
vmx_data->host_state.tr.base = tmp_seg.base;
- if(update_vmcs_host_state(info)) {
- PrintError("Could not write host state\n");
- return -1;
- }
+
+
+ /********** Setup and VMX Control Fields from MSR ***********/
+ struct v3_msr tmp_msr;
+ v3_get_msr(VMX_PINBASED_CTLS_MSR,&(tmp_msr.hi),&(tmp_msr.lo));
+ /* Add NMI exiting */
+ vmx_data->pinbased_ctrls = tmp_msr.lo | NMI_EXIT;
+
+ v3_get_msr(VMX_PROCBASED_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_data->pri_procbased_ctrls = tmp_msr.lo;
+
+ v3_get_msr(VMX_EXIT_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_data->exit_ctrls = tmp_msr.lo ;
+
+ v3_get_msr(VMX_ENTRY_CTLS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_data->entry_ctrls = tmp_msr.lo;
+
+ struct vmx_exception_bitmap excp_bmap;
+ excp_bmap.value = 0xffffffff;
+ vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, excp_bmap.value);
/******* Setup VMXAssist guest state ***********/
+
info->rip = 0xd0000;
info->vm_regs.rsp = 0x80000;
struct rflags * flags = (struct rflags *)&(info->ctrl_regs.rflags);
flags->rsvd1 = 1;
+ /* Print Control MSRs */
+ v3_get_msr(VMX_CR0_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ PrintDebug("CR0 MSR: %p\n", (void *)(addr_t)tmp_msr.value);
+ v3_get_msr(VMX_CR4_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ PrintDebug("CR4 MSR: %p\n", (void *)(addr_t)tmp_msr.value);
+
+
#define GUEST_CR0 0x80000031
#define GUEST_CR4 0x00002000
info->ctrl_regs.cr0 = GUEST_CR0;
info->ctrl_regs.cr4 = GUEST_CR4;
- addr_t guest_cr3 = (addr_t)V3_AllocPages(1);
+ /* Setup paging */
+ if(info->shdw_pg_mode == SHADOW_PAGING) {
+ PrintDebug("Creating initial shadow page table\n");
- memset(V3_VAddr((void*)guest_cr3), 0, 4096);
- vmcs_write(VMCS_GUEST_CR3, guest_cr3);
+ if(v3_init_passthrough_pts(info) == -1) {
+ PrintError("Could not initialize passthrough page tables\n");
+ return -1;
+ }
- v3_get_msr(VMX_CR0_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
- PrintDebug("CR0 MSR: %p\n", (void*)tmp_msr.value);
+ info->shdw_pg_state.guest_cr0 = CR0_PE;
+ PrintDebug("Created\n");
- v3_get_msr(VMX_CR4_FIXED0_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
- PrintDebug("CR4 MSR: %p\n", (void*)tmp_msr.value);
+ vmx_ret |= check_vmcs_write(VMCS_CR0_MASK, (CR0_PE | CR0_PG) );
+ vmx_ret |= check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
+ vmx_ret |= check_vmcs_write(VMCS_CR4_MASK, CR4_VMXE);
+
+ info->ctrl_regs.cr3 = info->direct_map_pt;
+
+ // vmx_data->pinbased_ctrls |= NMI_EXIT;
+
+ /* Add unconditional I/O and CR exits */
+ vmx_data->pri_procbased_ctrls |= UNCOND_IO_EXIT
+ | CR3_LOAD_EXIT
+ | CR3_STORE_EXIT;
+
+ vmx_data->exit_ctrls |= HOST_ADDR_SPACE_SIZE;
+ }
struct v3_segment * seg_reg = (struct v3_segment *)&(info->segments);
info->segments.ldtr.present = 1;
info->segments.ldtr.granularity = 0;
+ /* Setup IO map */
+ (void) v3_init_vmx_io_map(info);
+ (void) v3_init_vmx_msr_map(info);
+ /************* Map in GDT and vmxassist *************/
+ uint64_t gdt[] __attribute__ ((aligned(32))) = {
+ 0x0000000000000000ULL, /* 0x00: reserved */
+ 0x0000830000000000ULL, /* 0x08: 32-bit TSS */
+ //0x0000890000000000ULL, /* 0x08: 32-bit TSS */
+ 0x00CF9b000000FFFFULL, /* 0x10: CS 32-bit */
+ 0x00CF93000000FFFFULL, /* 0x18: DS 32-bit */
+ 0x000082000000FFFFULL, /* 0x20: LDTR 32-bit */
+ };
-uint64_t gdt[] __attribute__ ((aligned(32))) = {
- 0x0000000000000000ULL, /* 0x00: reserved */
- 0x0000830000000000ULL, /* 0x08: 32-bit TSS */
- // 0x0000890000000000ULL, /* 0x08: 32-bit TSS */
- 0x00CF9b000000FFFFULL, /* 0x10: CS 32-bit */
- 0x00CF93000000FFFFULL, /* 0x18: DS 32-bit */
- 0x000082000000FFFFULL, /* 0x20: LDTR 32-bit */
-};
-
#define VMXASSIST_GDT 0x10000
addr_t vmxassist_gdt = 0;
if(guest_pa_to_host_va(info, VMXASSIST_GDT, &vmxassist_gdt) == -1) {
info->segments.gdtr.base = VMXASSIST_GDT;
#define VMXASSIST_TSS 0x40000
- addr_t vmxassist_tss = VMXASSIST_TSS;
+ uint64_t vmxassist_tss = VMXASSIST_TSS;
gdt[0x08 / sizeof(gdt[0])] |=
- ((vmxassist_tss & 0xFF000000) << (56-24)) |
- ((vmxassist_tss & 0x00FF0000) << (32-16)) |
+ ((vmxassist_tss & 0xFF000000) << (56 - 24)) |
+ ((vmxassist_tss & 0x00FF0000) << (32 - 16)) |
((vmxassist_tss & 0x0000FFFF) << (16)) |
(8392 - 1);
info->segments.tr.selector = 0x08;
info->segments.tr.base = vmxassist_tss;
- // info->segments.tr.type = 0x9;
+ //info->segments.tr.type = 0x9;
info->segments.tr.type = 0x3;
info->segments.tr.system = 0;
info->segments.tr.present = 1;
#define VMXASSIST_START 0x000d0000
- extern uint8_t vmxassist_start[];
- extern uint8_t vmxassist_end[];
+ extern uint8_t v3_vmxassist_start[];
+ extern uint8_t v3_vmxassist_end[];
addr_t vmxassist_dst = 0;
if(guest_pa_to_host_va(info, VMXASSIST_START, &vmxassist_dst) == -1) {
PrintError("Could not find VMXASSIST destination\n");
return -1;
}
- memcpy((void*)vmxassist_dst, vmxassist_start, vmxassist_end-vmxassist_start);
+ memcpy((void*)vmxassist_dst, v3_vmxassist_start, v3_vmxassist_end - v3_vmxassist_start);
+
+ /*** Write all the info to the VMCS ***/
+
+#define DEBUGCTL_MSR 0x1d9
+ v3_get_msr(DEBUGCTL_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DBG_CTL, tmp_msr.value);
+
+ vmx_ret |= check_vmcs_write(VMCS_GUEST_DR7, 0x400);
+
+ vmx_ret |= check_vmcs_write(VMCS_LINK_PTR, (addr_t)0xffffffffffffffffULL);
+
+ if(v3_update_vmcs_ctrl_fields(info)) {
+ PrintError("Could not write control fields!\n");
+ return -1;
+ }
+
+ if(v3_update_vmcs_host_state(info)) {
+ PrintError("Could not write host state\n");
+ return -1;
+ }
+
- if(update_vmcs_guest_state(info) != VMX_SUCCESS) {
- PrintDebug("Writing guest state failed!\n");
+ if(v3_update_vmcs_guest_state(info) != VMX_SUCCESS) {
+ PrintError("Writing guest state failed!\n");
return -1;
}
v3_print_vmcs();
+ vmx_data->state = VMXASSIST_STARTUP;
- //v3_post_config_guest(info, config_ptr);
+ v3_post_config_guest(info, config_ptr);
return 0;
}
PrintDebug("Attempting VMLAUNCH\n");
- ret = v3_vmx_vmlaunch(&(info->vm_regs));
+ ret = v3_vmx_vmlaunch(&(info->vm_regs), info);
if (ret != VMX_SUCCESS) {
vmcs_read(VMCS_INSTR_ERR, &error);
PrintError("VMLAUNCH failed: %d\n", error);
if (ecx & CPUID_1_ECX_VTXFLAG) {
v3_get_msr(VMX_FEATURE_CONTROL_MSR, &(feature_msr.hi), &(feature_msr.lo));
- PrintTrace("MSRREGlow: 0x%.8x\n", feature_msr.lo);
+ PrintDebug("MSRREGlow: 0x%.8x\n", feature_msr.lo);
if ((feature_msr.lo & FEATURE_CONTROL_VALID) != FEATURE_CONTROL_VALID) {
PrintDebug("VMX is locked -- enable in the BIOS\n");