update_irq_entry_state(info);
#endif
+ {
+ addr_t guest_cr3;
+ vmcs_read(VMCS_GUEST_CR3, &guest_cr3);
+ vmcs_write(VMCS_GUEST_CR3, guest_cr3);
+ }
rdtscll(info->time_state.cached_host_tsc);
/* Update guest state */
v3_vmx_save_vmcs(info);
+ // info->cpl = info->segments.cs.selector & 0x3;
+
info->mem_mode = v3_get_vm_mem_mode(info);
info->cpu_mode = v3_get_vm_cpu_mode(info);
uint64_t ret = 0;
v3_get_msr(VMX_CR4_FIXED0_MSR,&(tmp_msr.hi),&(tmp_msr.lo));
-
+#ifdef __V3_64BIT__
__asm__ __volatile__ (
"movq %%cr4, %%rbx;"
"orq $0x00002000, %%rbx;"
:
: "%rbx"
);
+#elif __V3_32BIT__
+ __asm__ __volatile__ (
+ "movq %%cr4, %%ecx;"
+ "orq $0x00002000, %%ecx;"
+ "movq %%ecx, %0;"
+ : "=m"(ret)
+ :
+ : "%ecx"
+ );
+
+ if ((~ret & tmp_msr.value) == 0) {
+ __asm__ __volatile__ (
+ "movq %0, %%cr4;"
+ :
+ : "q"(ret)
+ );
+ } else {
+ PrintError("Invalid CR4 Settings!\n");
+ return;
+ }
+
+ __asm__ __volatile__ (
+ "movq %%cr0, %%ecx; "
+ "orq $0x00000020,%%ecx; "
+ "movq %%ecx, %%cr0;"
+ :
+ :
+ : "%ecx"
+ );
+
+#endif
+
//
// Should check and return Error here....