fix interrupt masking bug

[palacios-OLD.git] / palacios / src / palacios / vmx.c

diff --git a/palacios/src/palacios/vmx.c b/palacios/src/palacios/vmx.c
index f6a6a0b..2313abe 100644 (file)
--- a/palacios/src/palacios/vmx.c
+++ b/palacios/src/palacios/vmx.c
@@ -50,7 +50,7 @@ extern int v3_vmx_resume(struct v3_gprs * vm_regs, struct guest_info * info, str
 static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
     int ret = 0;
 
-    ret = vmcs_write(field,val);
+    ret = vmcs_write(field, val);
 
     if (ret != VMX_SUCCESS) {
         PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
@@ -388,7 +388,7 @@ static int init_vmcs_bios(struct guest_info * info, struct vmx_data * vmx_state)
     // reenable global interrupts for vm state initialization now
     // that the vm state is initialized. If another VM kicks us off, 
     // it'll update our vmx state so that we know to reload ourself
-    v3_disable_ints();
+    v3_enable_ints();
 
     return 0;
 }
@@ -641,6 +641,13 @@ int v3_vmx_enter(struct guest_info * info) {
     // disable global interrupts for vm state transition
     v3_disable_ints();
 
+
+    if (active_vmcs_ptrs[V3_Get_CPU()] != vmx_info->vmcs_ptr_phys) {
+       vmcs_load(vmx_info->vmcs_ptr_phys);
+       active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys;
+    }
+
+
     v3_vmx_restore_vmcs(info);
 
 
@@ -666,10 +673,6 @@ int v3_vmx_enter(struct guest_info * info) {
     check_vmcs_write(VMCS_TSC_OFFSET_HIGH, tsc_offset_high);
     check_vmcs_write(VMCS_TSC_OFFSET, tsc_offset_low);
 
-    if (active_vmcs_ptrs[V3_Get_CPU()] != vmx_info->vmcs_ptr_phys) {
-       vmcs_load(vmx_info->vmcs_ptr_phys);
-       active_vmcs_ptrs[V3_Get_CPU()] = vmx_info->vmcs_ptr_phys;
-    }
 
     if (vmx_info->state == VMX_UNLAUNCHED) {
        vmx_info->state = VMX_LAUNCHED;
@@ -839,6 +842,12 @@ int v3_is_vmx_capable() {
 }
 
 static int has_vmx_nested_paging() {
+    /* We assume that both EPT and unrestricted guest mode (Intel's Virtual Real Mode) 
+     * are mutually assured. i.e. We have either both or neither.
+     */
+
+    
+
     return 0;
 }