static int handle_shadow_pagefault_32pae(struct guest_info * info, addr_t fault_addr, pf_error_t error_code);
static int handle_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code);
+
+static int cache_page_tables_32(struct guest_info * info, addr_t pde);
+
int v3_init_shadow_page_state(struct guest_info * info) {
struct shadow_page_state * state = &(info->shdw_pg_state);
int v3_cache_page_tables(struct guest_info * info, addr_t cr3) {
switch(v3_get_cpu_mode(info)) {
case PROTECTED:
- return v3_cache_page_tables32(info, CR3_TO_PDE32_PA(cr3));
+ return cache_page_tables_32(info, CR3_TO_PDE32_PA(cr3));
default:
return -1;
}
}
-int v3_cache_page_tables32(struct guest_info * info, addr_t pde) {
+static int cache_page_tables_32(struct guest_info * info, addr_t pde) {
struct shadow_page_state * state = &(info->shdw_pg_state);
addr_t pde_host_addr;
pde32_t * tmp_pde;
if ((tmp_pde[i].present) && (tmp_pde[i].large_page == 0)) {
addr_t pte_host_addr;
- if (guest_pa_to_host_va(info, (addr_t)(PDE32_T_ADDR(tmp_pde[i])), &pte_host_addr) == -1) {
+ if (guest_pa_to_host_va(info, (addr_t)(BASE_TO_PAGE_ADDR(tmp_pde[i].pt_base_addr)), &pte_host_addr) == -1) {
PrintError("Could not lookup host address of guest PDE\n");
return -1;
}
- add_pte_map(pte_cache, (addr_t)(PDE32_T_ADDR(tmp_pde[i])), pte_host_addr);
+ add_pte_map(pte_cache, (addr_t)(BASE_TO_PAGE_ADDR(tmp_pde[i].pt_base_addr)), pte_host_addr);
}
}
}
+static int cache_page_tables_64(struct guest_info * info, addr_t pde) {
+ return -1;
+}
+
int v3_replace_shdw_page32(struct guest_info * info, addr_t location, pte32_t * new_page, pte32_t * old_page) {
pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(info->ctrl_regs.cr3);
pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(location)]);
if (shadow_pde->large_page == 0) {
- pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr);
pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(location)]);
//if (shadow_pte->present == 1) {
} else {
// currently unhandled
+ PrintError("Replacing large shadow pages not implemented\n");
return -1;
}
// We assume that shdw_pg_state.guest_cr3 is pointing to the page tables we want to activate
// We also assume that the CPU mode has not changed during this page table transition
static int activate_shadow_pt_32(struct guest_info * info) {
- struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
- struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
- int cached = 0;
-
- // Check if shadow page tables are in the cache
- cached = v3_cache_page_tables32(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
+ struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
+ struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
+ int cached = 0;
+
+ // Check if shadow page tables are in the cache
+ cached = cache_page_tables_32(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
+
+ if (cached == -1) {
+ PrintError("CR3 Cache failed\n");
+ return -1;
+ } else if (cached == 0) {
+ addr_t shadow_pt;
- if (cached == -1) {
- PrintError("CR3 Cache failed\n");
- return -1;
- } else if (cached == 0) {
- addr_t shadow_pt;
-
- PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
- delete_page_tables_32(CR3_TO_PDE32_VA(*(uint_t*)shadow_cr3));
-
- shadow_pt = v3_create_new_shadow_pt();
-
- shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PD32_BASE_ADDR(shadow_pt));
- PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
- } else {
- PrintDebug("Reusing cached shadow Page table\n");
- }
-
- shadow_cr3->pwt = guest_cr3->pwt;
- shadow_cr3->pcd = guest_cr3->pcd;
-
- return 0;
+ PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
+ delete_page_tables_32(CR3_TO_PDE32_VA(*(uint_t*)shadow_cr3));
+
+ shadow_pt = v3_create_new_shadow_pt();
+
+ shadow_cr3->pdt_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PAGE_BASE_ADDR(shadow_pt));
+ PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pdt_base_addr );
+ } else {
+ PrintDebug("Reusing cached shadow Page table\n");
+ }
+
+ shadow_cr3->pwt = guest_cr3->pwt;
+ shadow_cr3->pcd = guest_cr3->pcd;
+
+ return 0;
}
static int activate_shadow_pt_32pae(struct guest_info * info) {
}
static int activate_shadow_pt_64(struct guest_info * info) {
- PrintError("Activating 64 bit page tables not implemented\n");
+ struct cr3_64 * shadow_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
+ struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
+ int cached = 0;
+
return -1;
+ // Check if shadow page tables are in the cache
+ cached = cache_page_tables_64(info, CR3_TO_PDE32_PA(*(addr_t *)guest_cr3));
+
+ if (cached == -1) {
+ PrintError("CR3 Cache failed\n");
+ return -1;
+ } else if (cached == 0) {
+ addr_t shadow_pt;
+
+ PrintDebug("New CR3 is different - flushing shadow page table %p\n", shadow_cr3 );
+ delete_page_tables_32(CR3_TO_PDE32_VA(*(uint_t*)shadow_cr3));
+
+ shadow_pt = v3_create_new_shadow_pt();
+
+ shadow_cr3->pml4t_base_addr = (addr_t)V3_PAddr((void *)(addr_t)PAGE_BASE_ADDR(shadow_pt));
+ PrintDebug( "Created new shadow page table %p\n", (void *)(addr_t)shadow_cr3->pml4t_base_addr );
+ } else {
+ PrintDebug("Reusing cached shadow Page table\n");
+ }
+
+ shadow_cr3->pwt = guest_cr3->pwt;
+ shadow_cr3->pcd = guest_cr3->pcd;
+
+ return 0;
}
if (guest_access != PT_ACCESS_OK) {
// Guest Access Error
- if ((shadow_access != PT_ENTRY_NOT_PRESENT) &&
- (guest_access != PT_ENTRY_NOT_PRESENT)) {
+ if ((shadow_access != PT_ACCESS_NOT_PRESENT) &&
+ (guest_access != PT_ACCESS_NOT_PRESENT)) {
// aka (guest permission error)
return 1;
}
- if ((shadow_access == PT_ENTRY_NOT_PRESENT) &&
- (guest_access == PT_ENTRY_NOT_PRESENT)) {
+ if ((shadow_access == PT_ACCESS_NOT_PRESENT) &&
+ (guest_access == PT_ACCESS_NOT_PRESENT)) {
// Page tables completely blank, handle guest first
return 1;
}
*/
static int handle_shadow_pagefault_64(struct guest_info * info, addr_t fault_addr, pf_error_t error_code) {
+ pt_access_status_t guest_access;
+ pt_access_status_t shadow_access;
+ int ret;
+ PrintDebug("64 bit shadow page fault\n");
+
+ ret = v3_check_guest_pt_32(info, info->shdw_pg_state.guest_cr3, fault_addr, error_code, &guest_access);
+
+ PrintDebug("Guest Access Check: %d (access=%d)\n", ret, guest_access);
+
+ ret = v3_check_host_pt_32(info->ctrl_regs.cr3, fault_addr, error_code, &shadow_access);
+
+ PrintDebug("Shadow Access Check: %d (access=%d)\n", ret, shadow_access);
+
+
PrintError("64 bit shadow paging not implemented\n");
return -1;
}
// Check the guest page permissions
- guest_pde_access = can_access_pde32(guest_pd, fault_addr, error_code);
+ guest_pde_access = v3_can_access_pde32(guest_pd, fault_addr, error_code);
// Check the shadow page permissions
- shadow_pde_access = can_access_pde32(shadow_pd, fault_addr, error_code);
+ shadow_pde_access = v3_can_access_pde32(shadow_pd, fault_addr, error_code);
/* Was the page fault caused by the Guest's page tables? */
if (is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
}
- if (shadow_pde_access == PT_ENTRY_NOT_PRESENT)
+ if (shadow_pde_access == PT_ACCESS_NOT_PRESENT)
{
pte32_t * shadow_pt = (pte32_t *)v3_create_new_shadow_pt();
guest_pde->accessed = 1;
- shadow_pde->pt_base_addr = PD32_BASE_ADDR((addr_t)V3_PAddr(shadow_pt));
+ shadow_pde->pt_base_addr = PAGE_BASE_ADDR((addr_t)V3_PAddr(shadow_pt));
if (guest_pde->large_page == 0) {
shadow_pde->writable = guest_pde->writable;
//
// PTE fault
//
- pte32_t * shadow_pt = (pte32_t *)V3_VAddr( (void*)(addr_t) PDE32_T_ADDR(*shadow_pde) );
+ pte32_t * shadow_pt = (pte32_t *)V3_VAddr( (void*)(addr_t) BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr) );
if (guest_pde->large_page == 0) {
pte32_t * guest_pt = NULL;
- if (guest_pa_to_host_va(info, PDE32_T_ADDR((*guest_pde)), (addr_t*)&guest_pt) == -1) {
+ if (guest_pa_to_host_va(info, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t*)&guest_pt) == -1) {
// Machine check the guest
- PrintDebug("Invalid Guest PTE Address: 0x%x\n", PDE32_T_ADDR((*guest_pde)));
+ PrintDebug("Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
v3_raise_exception(info, MC_EXCEPTION);
return 0;
}
}
}
}
- else if ((shadow_pde_access == PT_WRITE_ERROR) &&
+ else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
(guest_pde->large_page == 1) &&
(((pde32_4MB_t *)guest_pde)->dirty == 0))
{
return 0;
}
- else if (shadow_pde_access == PT_USER_ERROR)
+ else if (shadow_pde_access == PT_ACCESS_USER_ERROR)
{
//
// Page Directory Entry marked non-user
addr_t fault_addr, pf_error_t error_code,
pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde)
{
- pt_access_status_t shadow_pte_access = can_access_pte32(shadow_pt, fault_addr, error_code);
+ pt_access_status_t shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
if (shadow_pte_access == PT_ACCESS_OK) {
}
- if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
+ if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
// Get the guest physical address of the fault
- addr_t guest_fault_pa = PDE32_4MB_T_ADDR(*large_guest_pde) + PD32_4MB_PAGE_OFFSET(fault_addr);
+ addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_4MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_4MB(fault_addr);
host_region_type_t host_page_type = get_shadow_addr_type(info, guest_fault_pa);
struct shadow_page_state * state = &(info->shdw_pg_state);
addr_t shadow_pa = get_shadow_addr(info, guest_fault_pa);
- shadow_pte->page_base_addr = PT32_BASE_ADDR(shadow_pa);
+ shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
shadow_pte->present = 1;
*/
shadow_pte->user_page = 1;
- if (find_pte_map(state->cached_ptes, PT32_PAGE_ADDR(guest_fault_pa)) != NULL) {
+ if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_fault_pa)) != NULL) {
// Check if the entry is a page table...
PrintDebug("Marking page as Guest Page Table (large page)\n");
shadow_pte->vmm_info = PT32_GUEST_PT;
return -1;
}
}
- } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
+ } else if ((shadow_pte_access == PT_ACCESS_WRITE_ERROR) &&
(shadow_pte->vmm_info == PT32_GUEST_PT)) {
struct shadow_page_state * state = &(info->shdw_pg_state);
// Check the guest page permissions
- guest_pte_access = can_access_pte32(guest_pt, fault_addr, error_code);
+ guest_pte_access = v3_can_access_pte32(guest_pt, fault_addr, error_code);
// Check the shadow page permissions
- shadow_pte_access = can_access_pte32(shadow_pt, fault_addr, error_code);
+ shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
#ifdef DEBUG_SHADOW_PAGING
PrintDebug("Guest PTE: (access=%d)\n\t", guest_pte_access);
}
- if (shadow_pte_access == PT_ENTRY_NOT_PRESENT) {
+ if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
- addr_t guest_pa = PTE32_T_ADDR((*guest_pte)) + PT32_PAGE_OFFSET(fault_addr);
+ addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
// Page Table Entry Not Present
PrintDebug("guest_pa =%p\n", (void *)guest_pa);
struct shadow_page_state * state = &(info->shdw_pg_state);
addr_t shadow_pa = get_shadow_addr(info, guest_pa);
- shadow_pte->page_base_addr = PT32_BASE_ADDR(shadow_pa);
+ shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
shadow_pte->present = guest_pte->present;
shadow_pte->user_page = guest_pte->user_page;
guest_pte->accessed = 1;
- if (find_pte_map(state->cached_ptes, PT32_PAGE_ADDR(guest_pa)) != NULL) {
+ if (find_pte_map(state->cached_ptes, PAGE_ADDR(guest_pa)) != NULL) {
// Check if the entry is a page table...
PrintDebug("Marking page as Guest Page Table %d\n", shadow_pte->writable);
shadow_pte->vmm_info = PT32_GUEST_PT;
}
}
- } else if ((shadow_pte_access == PT_WRITE_ERROR) &&
+ } else if ((shadow_pte_access == PT_ACCESS_WRITE_ERROR) &&
(guest_pte->dirty == 0)) {
PrintDebug("Shadow PTE Write Error\n");
if (info->cpu_mode != PROTECTED) {
- return 0;
+ PrintError("Unsupported CPU mode (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
+ return -1;
}
uchar_t instr[15];
PrintDebug("Invalidating Large Page\n");
} else
if (shadow_pde->present == 1) {
- pte32_t * shadow_pt = (pte32_t *)(addr_t)PDE32_T_ADDR((*shadow_pde));
+ pte32_t * shadow_pt = (pte32_t *)(addr_t)BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr);
pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(first_operand)] );
#ifdef DEBUG_SHADOW_PAGING
